Control system and control method of aggregation chip and electronic equipment

By introducing identification modules and control modules into the aggregation chip control system, the power state of the aggregation chip is dynamically managed, and the power consumption waste caused by the aggregation chip is solved due to the binding of the system clock, and the battery life of electronic devices is improved.

CN119521349APending Publication Date: 2025-02-25HUAWEI TECH CO LTD
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Patent Information

Application Number
CN202311075195.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-08-23
Publication Date
2025-02-25

AI Technical Summary

Technical Problem

In foldable electronic devices, polymer chips are bound to the system's high-speed clock, causing a lot of time to run at no-load, resulting in unnecessary power consumption and reducing the battery life of electronic devices.

Method used

A control system for an aggregate chip is provided, including an identification module and a control module. The identification module is used to identify whether there is a signal to be transmitted. The control module controls the power module to power the aggregate chip based on the identification result, so that it enters a power-off state when there is no signal transmission requirement.

Benefits of technology

By dynamically managing the power state of the aggregate chip according to actual business needs, unnecessary power consumption is avoided, the battery life of electronic devices is improved, and the service life of the aggregate chip is extended.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides an aggregation chip control system, a control method and an electronic device, the control system comprises an aggregation chip, a first power supply module, an identification module and a control module, the identification module is used for identifying whether a to-be-transmitted signal exists in the aggregation chip; and the control module is used for controlling the first power supply module to supply power to the aggregation chip when the identification module identifies that the signal to be transmitted exists, so that the aggregation chip is switched from a power-off state to a power-on state. The control system can be applied to the electronic equipment, and through the control system, the aggregation chip is controlled to enter the power-on state only when it is recognized that the aggregation chip has a transmission requirement, so that the power-on duration of the aggregation chip can be shortened, the problem of unnecessary power consumption waste of the aggregation chip can be effectively solved, and the cruising ability of the electronic equipment is improved.
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Description

Technical Field

[0001] The present application relates to the field of chip technology, and in particular to a control system, a control method and an electronic device of a polymer chip. Background Art

[0002] With the development of terminal technology, foldable electronic devices with flexible display screens have received widespread attention. Foldable electronic devices include a main board and a sub-board, which are connected by a through-shaft flexible board. In order to reduce the size of the through-shaft flexible board, an aggregation chip can be set between the main board and the sub-board to achieve aggregate transmission of signals.

[0003] In the related art, the aggregation chip is bound to the high-speed clock of the system. As long as the system of the foldable device is in the business state, the aggregation chip is kept in the power-on state. However, the ratio of the actual signal transmission time of the aggregation chip to the total time of the power-on working state is very low (<0.5%), resulting in a large amount of no-load operation of the aggregation chip. The above reasons cause unnecessary power consumption waste of the aggregation chip and reduce the endurance of electronic devices. Summary of the invention

[0004] The embodiments of the present application provide a control system, a control method and an electronic device of an aggregate chip, which can effectively solve the problem of unnecessary power consumption waste of the aggregate chip, thereby improving the battery life of the electronic device.

[0005] In a first aspect, an embodiment of the present application provides a control system of an aggregate chip, the control system comprising an aggregate chip, a first power supply module, an identification module and a control module, wherein the identification module is used to identify whether there is a signal to be transmitted in the aggregate chip; and the control module is used to control the first power supply module to power the aggregate chip when the identification module identifies the presence of the signal to be transmitted, so as to switch the aggregate chip from a power-off state to a power-on state.

[0006] According to the control system of the aggregation chip provided in the embodiment of the present application, the aggregation chip has a power-on state and a power-off state. When the identification module identifies that the aggregation chip has a signal to be transmitted, the control module can control the first power module to power the aggregation chip, so that the aggregation chip switches from the power-off state to the power-on state, and then can transmit the signal to be transmitted. When the aggregation chip does not have a signal to be transmitted, the aggregation chip can be switched to the power-off state. For example, the power-off state can be the default state of the aggregation chip. When the aggregation chip is in the power-off state, no additional power consumption is required, thereby avoiding power consumption waste.

[0007] According to the control system of the aggregate chip provided in the embodiment of the present application, the aggregate chip is no longer bound to the high-speed clock of the system, and the aggregate chip can enter the power-off state even if the system of the electronic device is in the business state. In this way, the state of the aggregate chip can be reasonably selected according to specific business needs, and the aggregate chip is switched from the power-off state to the power-on state only when the signal to be transmitted is identified, and when there is no signal transmission demand, the aggregate chip can be kept in the power-off state. Compared with the related art that keeps the aggregate chip in the power-on state all the time, the present application can allocate power consumption according to actual business needs, thereby avoiding unnecessary power consumption waste of the aggregate chip and improving the endurance of the electronic device. In addition, the aggregate chip in the present application does not have to be kept in the power-on state all the time, thereby reducing the loss of the aggregate chip and extending the service life of the aggregate chip.

[0008] In a possible implementation, in terms of identifying whether the aggregate chip has a signal to be transmitted, the identification module is specifically used to: determine the existence of the signal to be transmitted according to an identified first service, and completion of the first service depends on the transmission of the signal to be transmitted by the aggregate chip. When the identification module identifies the first service, it is determined that the aggregate chip has a signal to be transmitted.

[0009] Through the above settings, the identification module can initiate the identification of the signals to be transmitted of the aggregation chip from the business layer, that is, it can identify the signals to be transmitted earlier, ensuring that the aggregation chip has enough time to switch from the power-off state to the power-on state, that is, ensuring that there is enough time to complete the state switching process, avoiding signal transmission delays caused by untimely power-on and power-off switching, and especially meeting the transmission requirements of high-speed signals for low latency and other aspects.

[0010] For example, the first service may be a TP service, and the completion of the TP service requires the aggregation chip to transmit the to-be-transmitted signal generated by the APSS to the TP. When the identification module identifies the TP service, it can be determined that the aggregation chip has a to-be-transmitted service.

[0011] For another example, the first service may be a SIM card service, and the completion of the SIM card service requires the aggregation chip to transmit the to-be-transmitted signal generated by the MPSS to the SIM card module of the other end. When the identification module identifies the SIM card service, it can be determined that the aggregation chip has a service to be transmitted.

[0012] In a possible implementation, completion of the first service also depends on the first processor generating the signal to be transmitted, and in terms of controlling the first power module to power the aggregate chip, the control module is specifically used to: control the second power module to power the first processor, so as to enable the first power module through the power supply to the first processor, wherein the second power module is connected to the enable end of the first power module.

[0013] After the first service is initiated, the completion of the first service needs to rely on both the first processor and the aggregation chip. The first processor needs to generate the signal to be transmitted according to the specific service requirements of the first service, and the aggregation chip needs to transmit the signal to be transmitted to the functional components on the opposite sub-board, so that the first service can be successfully completed. The second power supply module is the power supply module of the first processor. After identifying the first service, the control module controls the second power supply module to supply power to the first processor so that the first processor switches from a power-off state to a power-on state. In an embodiment of the present application, an output end of the second power supply module is also connected to the enable end of the first power supply module. In this way, the power supply of the second power supply module to the first processor can also be reused as an enable signal of the first power supply module, enabling the first power supply module to supply power to the aggregation chip.

[0014] Through the above-mentioned setting, the present application can reuse the power-on and power-off logic (i.e., the current inherent logic) of the first processor in the prior art, that is, use the current inherent logic to power on the aggregate chip, which is conducive to simplifying the control logic and simplifying the circuit design. In addition, the aggregate chip can be bound to the first processor to achieve simultaneous power on and off of the two, and the aggregate chip and the first processor are enabled at the same time, which is also conducive to ensuring that the aggregate chip has enough time to switch from the power-off state to the power-on state, that is, to ensure that the aggregate chip can be switched to the power-on state in a timely manner, avoiding signal transmission delays caused by untimely power on and off switching, and especially meeting the transmission requirements of high-speed signals for low latency and other aspects.

[0015] Optionally, when the signal to be transmitted is transmitted, a power-off procedure can be executed. At this time, the control module controls the second power module to stop supplying power to the first processor, and the first processor switches from the power-on state back to the power-off state. At the same time, the enable end of the first power module is input with a low level, and the first power module also stops supplying power to the aggregation chip, and the aggregation chip also switches from the power-on state back to the power-off state.

[0016] Optionally, the first processor may be a SoC or a subsystem of a SoC, for example, the first processor may be an APSS, an MPSS or an SLPI, or may be another processor or processing module other than a SoC, which is not limited in the present application.

[0017] In one possible implementation, the aggregation chip is used to transmit signals generated by multiple processors including the first processor, and the multiple power modules corresponding to the multiple processors are all connected to the enable end of the first power module. Before controlling the second power module to power the first processor, the control module is also used to: determine the second power module from the multiple power modules according to the first business.

[0018] Specifically, the control module determines the processor corresponding to the first business based on information such as the business type of the first business, and then determines the driving power supply corresponding to the first business. The control module determines the second power supply module from the multiple driving power supplies based on the first business. Then the control module controls the second power supply module to power the first processor. The power supply simultaneously enables the first power supply module to power the aggregation chip. At this time, both the first processor and the aggregation chip enter the power-on state to enable the first business to be completed.

[0019] That is to say, the aggregation chip is used to aggregate and transmit signals for multiple processors, each of the multiple driving power supplies (modules) corresponding to the multiple processors is electrically connected to the first power supply module, and the power supply corresponding to each power supply module is multiplexed as an enable signal of the first power supply module.

[0020] The control module can control any driving power supply to power the corresponding processor, and the processor and the aggregation chip will enter the power-on state at the same time. For example, after the first service is identified, it is determined that the first processor needs to be powered on based on information such as the service type of the first service, that is, the second power supply module is determined from multiple driving power supplies, and then the first processor and the aggregation chip are both powered on by controlling the second power supply module.

[0021] Through the above settings, the control module can control at least one of the multiple processors to enter the power-on state according to actual business needs, and the aggregation chip also enters the power-on state synchronously, that is, when at least one processor is powered on, the aggregation chip is also powered on, and when the multiple processors are not powered on, the aggregation chip is also not powered on. The power-on duration of the aggregation chip will be bound to the power-on duration of the multiple processors, thereby avoiding unnecessary power consumption waste of the aggregation chip to a greater extent. In addition, by reusing the power-on and power-off logic of multiple processors, the control logic of the control module can be greatly simplified, and it is conducive to simplifying the circuit design.

[0022] In a possible implementation, the multiple power modules are connected in parallel and then electrically connected to the first power module through an OR gate.

[0023] Taking into account that under normal circumstances the first power module does not require multiple power modules to be enabled at the same time, but according to business needs, there are situations where multiple power modules supply power to multiple processors at the same time, the present application sets an OR gate between multiple power modules and the first power module. This can enable the first power module by selecting one from multiple power modules through a hardware solution, without the need for intervention through a software solution, thereby simplifying the control logic of the control module.

[0024] In a possible implementation manner, a switch circuit is provided between the second power module and the first power module.

[0025] In some scenarios, the first processor may process services other than the first service. For example, APSS may process services other than TP. These other services may not require the use of an aggregate chip to transmit signals. The present application can achieve switch control between the second power module and the first power module by setting a switching circuit, so that the second power module can supply power to the first processor alone without enabling the first power module. This makes the power-on and power-off control of the aggregate chip more flexible, can meet the usage requirements in more scenarios, and avoid power consumption waste of the aggregate chip as much as possible.

[0026] In a possible implementation manner, a filter circuit is provided between the OR gate and the first power supply module.

[0027] By setting up a filtering circuit, the power supply on the power module (for example, the small core power supply corresponding to APSS or the modem core power supply corresponding to MPSS) can be filtered, so that a stable high level (i.e., an enabling signal) can be output to the first power module, thereby ensuring the working stability of the first power module.

[0028] In a possible implementation manner, the first processor is an application processor subsystem, a modem subsystem, or a low power island sensor subsystem.

[0029] In a possible implementation, the enable end of the first power module is connected to the GPIO module. In terms of controlling the first power module to power the aggregate chip, the control module is specifically used to control the GPIO module to output an enable signal to the first power module to enable the first power module to power the aggregate chip.

[0030] The first power module in the embodiment of the present application can also be switched on and off by the GPIO module, that is, the first power module can also be enabled by an enable signal sent by the GPIO module. For example, when necessary, the GPIO module can output an enable signal to the first power module to enable the first power module to supply power to the aggregate chip. Through the above settings, in some cases, the aforementioned circuit module can be used to enable the first power module, but the GPIO module can be used to enable it, and the power on and off control of the aggregate chip is more flexible and controllable, thereby being able to meet the power supply requirements of the aggregate chip in more scenarios.

[0031] In a possible implementation, after the signal to be transmitted is transmitted by the aggregate chip, the control module is further used to: control the first power module to stop supplying power to the aggregate chip, so that the aggregate chip switches from the power-on state back to the power-off state.

[0032] That is to say, after the signal to be transmitted is transmitted, the control module can automatically switch the aggregation chip from the power-on state back to the power-off state. The power-off state can be used as the default state of the aggregation chip, so that the aggregation chip can be kept in the power-off state to the maximum extent, thereby avoiding unnecessary power consumption of the aggregation chip to the maximum extent and extending the battery life of the electronic device.

[0033] In a second aspect, an electronic device is provided, comprising a control system of the aggregate chip provided by any possible implementation of the first aspect.

[0034] Optionally, the electronic device may be any foldable electronic device such as a foldable mobile phone, or any other electronic device that does not have a foldable feature, such as a conventional straight-panel mobile phone, a tablet computer, a laptop computer, etc. For example, the electronic device may be a foldable mobile phone of any of the three types: up and down inward folding, left and right inward folding, and left and right outward folding.

[0035] In a third aspect, a control method for an aggregate chip is provided, including: an identification module identifies whether there is a signal to be transmitted in the aggregate chip; when the identification module identifies the presence of the signal to be transmitted, the control module controls the first power module to power the aggregate chip, so that the aggregate chip switches from a power-off state to a power-on state.

[0036] In a possible implementation, the identification module identifies whether the aggregation chip has a signal to be transmitted, including: the identification module determines the existence of the signal to be transmitted based on the identified first service, and the completion of the first service depends on the transmission of the signal to be transmitted by the aggregation chip.

[0037] In a possible implementation, completion of the first service also depends on the first processor generating the signal to be transmitted, and the control module controls the first power module to power the aggregate chip, including: the control module controls the second power module to power the first processor to enable the first power module through the power supply to the first processor, wherein the second power module is connected to the enable end of the first power module.

[0038] In one possible implementation, the aggregation chip is used to transmit signals generated by multiple processors including the first processor, and multiple power modules corresponding to the multiple processors are connected to the enable end of the first power module. Before the control module controls the second power module to power the first processor, the method also includes: the control module determines the second power module from the multiple power modules based on the first business.

[0039] In a possible implementation, the enable end of the first power module is connected to the GPIO module, and the control module controls the first power module to supply power to the aggregate chip, including: the control module controls the GPIO module to output an enable signal to the first power module to enable the first power module to supply power to the aggregate chip.

[0040] In a possible implementation, after the signal to be transmitted is transmitted by the aggregate chip, the method further includes: the control module controls the first power module to stop supplying power to the aggregate chip, so that the aggregate chip switches from the power-on state back to the power-off state.

[0041] In a fourth aspect, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is run on an electronic device, the electronic device executes any method on the aggregation chip side, the first power module side, the identification module side or the control module side that may be implemented in the design of the third aspect.

[0042] In a fifth aspect, a computer program product is provided, comprising: a computer program code, which, when executed on an electronic device, enables the electronic device to execute a method on the aggregation chip side, the first power module side, the identification module side or the control module side provided by any possible design in the third aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 It is a schematic diagram of the structures of three different types of foldable mobile phones provided in the embodiments of the present application.

[0044] Figure 2This is a three-dimensional structural diagram of a foldable mobile phone of the left and right outward folding type provided in an embodiment of the present application before and after folding.

[0045] Figure 3 yes Figure 2 The foldable phone is shown in its open state with the cover removed from its back.

[0046] Figure 4 It is a schematic block diagram of the signal transmission principle provided in an embodiment of the present application.

[0047] Figure 5 These are other application scenario examples of the polymer chip provided in the embodiments of the present application.

[0048] Figure 6 It is a schematic diagram of the power supply principle of the polymer chip in the related technology.

[0049] Figure 7 This is the hardware structure diagram of the system-on-chip SoC of the foldable mobile phone.

[0050] Figure 8 It is a schematic block diagram of an example of a control system of a polymer chip provided in an embodiment of the present application.

[0051] Fig. 9 It is a schematic block diagram of another example of a control system of a polymer chip provided in an embodiment of the present application.

[0052] Fig.10 This is a schematic block diagram of another example of the control system of the aggregate chip provided in an embodiment of the present application.

[0053] Fig.11 This is a flowchart of an example of a control method for a polymer chip provided in an embodiment of the present application.

[0054] Fig.12 This is a flowchart of another example of the control method of the aggregate chip provided in an embodiment of the present application. DETAILED DESCRIPTION

[0055] The technical solution in the present application will be described below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments.

[0056] In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present application. However, it should be clear to those skilled in the art that the present application may also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to prevent unnecessary details from obstructing the description of the present application.

[0057] The term "include" herein indicates the presence of the described features, integral bodies, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integral bodies, steps, operations, elements, components and / or their collections. The terms "include", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized.

[0058] In the following, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present application, unless otherwise specified, "multiple" means two or more.

[0059] The term "and / or" in this article is only a description of the association relationship of the associated objects, indicating that there can be three relationships. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0060] With the development of terminal technology, users have a higher demand for electronic devices with large size and easy to carry. Therefore, foldable electronic devices with flexible display screens have received extensive attention. Foldable electronic devices can be unfolded when in use to provide a larger display interface and improve visual effects, and folded when not in use to facilitate storage and carrying by users.

[0061] As a common foldable electronic device, foldable phones are gradually becoming popular in people's daily lives. According to the folding method, foldable phones can be divided into three types: up and down folding, left and right folding, and left and right folding. Figure 1 Schematic diagram of the structure of three different types of foldable mobile phones 100 provided in the embodiments of the present application.

[0062] Figure 1 Part (a) in FIG. 1 shows a foldable mobile phone 100 of the type of folding inward from top to bottom. Figure 1 As shown in part (a) of the figure, the foldable phone 100 may have two display screens, namely a flexible display screen 110 located on the front of the foldable phone 100, and a back screen 120 located on the back of the foldable phone 100 and below the camera. The flexible display screen 110 has a foldable property so that the foldable phone 100 can be folded, for example, inwardly folded in the up and down directions (also referred to as up and down small folding).

[0063] After folding, the flexible display screen 110 is located on the inner side, and the back screen 120 is located on the outer side, so the flexible display screen 110 can also be called the inner screen, and the back screen 120 can also be called the outer screen. When the foldable mobile phone 100 is in the unfolded state, the foldable mobile phone 100 is similar to an ordinary straight-screen mobile phone. At this time, the user can perform human-computer interaction through the flexible display screen 110 with a larger area, and the user has a better visual effect; when the foldable mobile phone 100 is in the folded state, the user can perform human-computer interaction through the back screen 120, which can meet the basic usage needs of the user and facilitate the user to store and carry the foldable mobile phone 100.

[0064] Figure 1 Part (b) in FIG. 1 shows a foldable mobile phone 100 of a left-right outward folding type. Figure 1 As shown in part (b) of the figure, the foldable mobile phone 100 has a flexible display screen 110, and the flexible display screen 110 has a foldable characteristic, so that the foldable mobile phone 100 can be folded, for example, it can be folded outward in the left and right directions. The folded flexible display screen 110 is divided into multiple parts, for example, including a front display part facing the user, and a back display part opposite to the front display part and located at the back.

[0065] When the foldable mobile phone 100 is in the unfolded state, the user can perform human-computer interaction through the complete flexible display screen 110, and the user has a better visual effect at this time; when the foldable mobile phone 100 is in the folded state, the user can perform human-computer interaction through the front display part of the flexible display screen 110, which can meet the user's basic usage needs and is convenient for the user to store and carry the foldable mobile phone 100.

[0066] Figure 1 Part (c) in FIG. 1 shows a foldable mobile phone 100 of the left and right inward folding type. Figure 1 As shown in part (c) of the figure, the foldable mobile phone 100 may have two display screens, namely, a flexible display screen 110 located on the front of the foldable mobile phone 100, and a back screen 120 located on the back of the foldable mobile phone 100. The flexible display screen 110 has a foldable property so that the foldable mobile phone 100 can be folded, for example, it can be folded inward in the left and right directions. After folding, the flexible display screen 110 is located on the inside, and the back screen 120 is located on the outside.

[0067] When the foldable phone 100 is in the unfolded state, the user can perform human-computer interaction through the flexible display screen 110 with a large area, and the user has a better visual effect at this time; when the foldable phone 100 is in the folded state, the user can perform human-computer interaction through the back screen 120, which can meet the basic use needs of the user and facilitate the user to store and carry the foldable phone 100. Since the back screen 120 and the camera are arranged side by side on the left and right sides of the back of the foldable phone 100, and the back screen 120 is rectangular and is arranged close to the edge of the phone, the folded foldable phone 100 is similar to a conventional candy-bar phone and can be used as a conventional candy-bar phone.

[0068] Below Figure 1 Taking the left and right outward folding type foldable mobile phone 100 shown in part (b) as an example, the specific structure of the foldable mobile phone 100 is further introduced. Figure 2 1 is a three-dimensional structural diagram of a foldable mobile phone 100 of the left and right outward folding type provided in an embodiment of the present application before and after folding, wherein: Figure 2 Part (a) is a schematic diagram of the structure of the foldable mobile phone 100 in an open state. Figure 2 Part (b) is a schematic diagram of the structure of the foldable mobile phone 100 in a closed state.

[0069] like Figure 2 As shown, the foldable mobile phone 100 includes a housing 130 and a flexible display screen 110. Among them, the housing 130 constructs the appearance of the foldable mobile phone 100, and the housing 130 can be a metal housing, such as a magnesium alloy, an aluminum alloy, stainless steel and other metals. In addition, it can also be a plastic housing, a glass housing, a ceramic housing, etc., but not limited to this. The housing 130 generally includes structures such as a frame, a middle frame, and a back cover. The interior of the housing 130 has an installation cavity, and various electronic components are installed in the installation cavity, such as a circuit board, a processor provided on the circuit board, a battery, and various functional components such as a camera, a flash, a microphone, and a speaker, but not limited to this.

[0070] The foldable mobile phone 100 also includes a flexible display screen 110 disposed on the housing 130. The flexible display screen 110 serves as the front panel of the mobile phone and forms the aforementioned mounting cavity with the housing 130. The flexible display screen 110 constitutes the display surface of the foldable mobile phone 100, which is used to display information such as images and texts, and provide information interaction. The flexible display screen 110 has a flexible and bendable characteristic. For example, the flexible display screen 110 can be an organic light-emitting diode (OLED) display screen, an active-matrix organic light-emitting diode or an active-matrix organic light-emitting diode (AMOLED) display screen, a mini organic light-emitting diode (Mini Organic Light-Emitting Diode) display screen, a micro organic light-emitting diode (micro organic light-emitting diode) display screen, a micro organic light-emitting diode (micro organic light-emitting diode) display screen, a quantum dot light-emitting diode (quantum dot light emitting diodes, QLED) display screen, etc., but is not limited thereto.

[0071] like Figure 2 As shown, the housing 130 is composed of multiple parts, including a first housing 131, a folding mechanism 133 and a second housing 132 connected in sequence. The folding mechanism 133 can be deformed so that the first housing 131 and the second housing 132 are relatively unfolded or relatively folded. The flexible display screen 110 includes a first non-bending portion 111, a bending portion 113 and a second non-bending portion 112 connected in sequence, the first housing 131 is fixedly connected to the first non-bending portion 111, the second housing 132 is fixedly connected to the second non-bending portion 112, and the folding mechanism 133 is directly opposite to the bending portion 113.

[0072] like Figure 2 As shown in part (a) of the figure, the first housing 131 and the second housing 132 can be relatively unfolded to be fully opened, so that the foldable mobile phone 100 is in an open state. When the first housing 131 and the second housing 132 are fully opened, the angle α between the two can be approximately 180° (a slight deviation is also allowed, such as 165°, 177° or 185°).

[0073] like Figure 2As shown in part (b) of the figure, the first shell 131 and the second shell 132 can be relatively folded to close, so that the foldable mobile phone 100 is in a closed state. At this time, the first shell 131 and the second shell 132 are parallel to each other (a slight deviation is also allowed). In other words, the foldable mobile phone 100 can switch between the open state and the closed state through the deformation of the folding mechanism 133. In some embodiments, the foldable mobile phone 100 can also relatively unfold / fold the first shell 131 and the second shell 132 to the state where the foldable mobile phone 100 is partially opened through the deformation of the folding mechanism 133, that is, the first shell 131 and the second shell 132 are in an intermediate state between the fully opened state and the closed state. For example, when the first shell 131 and the second shell 132 are fully opened, the angle α between the two can also be roughly 120°, 135°, 150°, etc., and this application does not strictly limit this.

[0074] In the embodiment of the present application, the flexible display screen 110 can be bent along with the housing 130. Figure 2 In the open state shown in part (a), the flexible display screen 110 is flattened and can display in full screen, so that the foldable mobile phone 100 has a larger display area to improve the user's viewing experience; when the foldable mobile phone 100 is in Figure 2 In the closed state shown in part (b), the flexible display screen 110 is folded outside the housing 130, and the plane size of the foldable mobile phone 100 is reduced, making it easier for users to carry and store.

[0075] The folding mechanism 133 includes but is not limited to one or more of a rotating shaft, a gear, a hinge, a slider, a slide slot, a pin, a connecting rod, a slide rod, a swing rod, etc. In addition, the folding mechanism 133 can also be made of elastic materials, memory alloy materials, etc.

[0076] Next, the internal structure of the foldable mobile phone 100 will be briefly introduced. Figure 3 yes Figure 2 The foldable mobile phone 100 is shown in the back view after the cover is removed in the open state. Figure 3 As shown, various components such as circuit boards and batteries are arranged in the installation cavity inside the foldable mobile phone 100. Specifically, a main board 140, a first battery 191 and a first small board 161 are arranged in the first housing 131. The main board 140, the first battery 191 and the first small board 161 are stacked from top to bottom to form a traditional three-stage design architecture. The main board 140 and the first small board 161 are electrically connected through a first flexible printed circuit (FPC) 181, and the first flexible printed circuit 181 is sandwiched between the first battery 191 and the foldable middle frame.

[0077] Similarly, a sub-board 150, a second battery 192 and a second small board 162 are provided inside the second shell 132. The sub-board 150, the second battery 192 and the second small board 162 are stacked in sequence from top to bottom to form a traditional three-stage design structure. The sub-board 150 and the second small board 162 are electrically connected through the second flexible circuit board 182, and the second flexible circuit board 182 is clamped between the second battery 192 and the foldable middle frame.

[0078] The main board 140 and the sub-board 150 are connected through the third flexible circuit board 183 to achieve signal conduction between the main board 140 and the sub-board 150. The main board 140 is installed with a memory and various processors, such as an application processor (application processor, AP), a central processing unit (central processing unit, CPU), a graphics processing unit (graphics processing unit, GPU), an image signal processor (image signal processor, ISP), a modem peripheral subsystem (modem peripheral subsystem, MPSS) or a low power island sensor subsystem (sensor low power island, SLPI), etc., but not limited to this. Various functional components are installed (connected) on the sub-board 150, the first small board 161, and the second small board 162, such as a touch panel (touch panel, TP), a charging interface, a subscriber identity module (subscriber identity module, SIM) card interface, a camera module, a fingerprint recognition module, a speaker or a microphone, etc., but not limited to this.

[0079] The main board 140 is connected to the first small board 161 and the sub-board 150 through the first flexible circuit board 181 and the third flexible circuit board 183 respectively, and the sub-board 150 is connected to the second small board 162 through the second flexible circuit board 182, so as to realize signal transmission (for example, transmission of digital signals) between the processor on the main board 140 and each functional element on the first small board 161, the sub-board 150 and the second small board 162, thereby realizing the corresponding functions of the functional elements.

[0080] For example, Figure 3As shown, the main board 140 and the sub-board 150 transmit digital signals through the third flexible circuit board 183. The digital signals generated by the processor on the main board 140 can be transmitted to the functional elements installed or connected on the sub-board 150 through the third flexible circuit board 183 to control the functional elements so that the functional elements can achieve corresponding functions. Since the third flexible circuit board 183 needs to pass through the folding mechanism 133 to achieve signal conduction between the main board 140 and the sub-board 150, and the folding mechanism 133 usually includes a rotating shaft, the third flexible circuit board 183 is also usually called a through-shaft soft board.

[0081] like Figure 3 As shown, the main board 140 is provided with an aggregation chip 171, and the sub-board 150 is provided with a decomposition chip 172. The aggregation chip 171 is used to aggregate (usually also referred to as multiplexing, aggregation or combining) the multi-channel digital signals to be transmitted from the main board 140 to the sub-board 150, and then send the aggregated digital signals to the decomposition chip 172 through the third flexible circuit board 183. The decomposition chip 172 is used to decompose (usually also referred to as demultiplexing, recovery, restoration or branching) the digital signals aggregated by the aggregation chip 171, and then output them to the relevant functional components on the sub-board 150.

[0082] By providing the aggregation chip 171 and the decomposition chip 172 that cooperate with each other, multiple digital signals can be combined and transmitted on one physical channel, which can reduce the number of physical channels required for signal transmission, thereby effectively reducing the size of the third flexible circuit board 183. The reduction in the size of the third flexible circuit board 183 expands the layout space of other components inside the mobile phone, thereby reducing the difficulty of the internal structural design (such as folding design) and layout of the foldable mobile phone 100, and is conducive to the miniaturization and thinness of the product.

[0083] Figure 4 Schematic diagram of the signal transmission principle provided by the embodiment of the present application. Figure 4 As shown, when there are multiple signals on the main board 140 that need to be transmitted to the sub-board 150, the aggregation chip 171 can aggregate the multiple signals according to the preset logic, for example, aggregating the multiple signals (signals before aggregation) into one signal (signal after aggregation) and then transmitting it to the decomposition chip 172 through a physical channel on the third flexible circuit board 183. The decomposition chip 172 decomposes and restores the multiple digital signals according to the corresponding logic, and distributes them to the signal receiver, which can be, for example, a functional element (circuit) on the sub-board 150 or the second small board 162.

[0084] As a possible implementation method, the decomposition chip 172 can also aggregate multiple digital signals, and the aggregation chip 171 can decompose the digital signals aggregated by the decomposition chip 172, so that the third flexible circuit board 183 can also use multi-channel aggregation technology to combine multiple digital signals in the transmission direction from the sub-board 150 to the main board 140 and transmit them on one physical channel, thereby further reducing the size of the third flexible circuit board 183 and facilitating the internal structural design of the mobile phone.

[0085] At this time, since both the aggregation chip 171 and the decomposition chip 172 have the functions of signal aggregation and signal decomposition, the structures of the two can be the same. In some cases, both can be called aggregation chips, for example, the aggregation chip 171 is called the first aggregation chip, and the decomposition chip 172 is called the second aggregation chip.

[0086] The above-mentioned signal aggregation transmission scheme of the aggregation chip 171 can be applied to various types of foldable devices, for example, Figure 1 In the three types of foldable mobile phones 100 shown in FIG. 1 , the foldable mobile phones 100 can be folded inwardly, folded inwardly, and folded outwardly. For example, according to the signal aggregation transmission scheme, up to 60+ pin signals can be transmitted through only 4 physical channels, which greatly facilitates the design of the folding mechanism 133 and is conducive to improving the structural stability and strength of the folding device.

[0087] Figure 5 These are other application scenario examples of the aggregation chip 171 provided in the embodiments of the present application. Figure 5 As shown in part (a) of the figure, the aggregation chip 171 and the decomposition chip 172 can also be used to realize the signal aggregation transmission between the main board 140 and the first small board 161. Specifically, the aggregation chip 171 is provided on the main board 140, and the decomposition chip 172 is provided on the first small board 161. The aggregation chip 171 is used to aggregate the multi-channel digital signals to be transmitted from the main board 140 to the first small board 161, and then send the aggregated digital signals to the decomposition chip 172 through the first flexible circuit board 181. The decomposition chip 172 is used to decompose and restore the digital signals aggregated by the aggregation chip 171, and then output them to the relevant functional elements on the first small board 161. The above settings can reduce the size of the first flexible circuit board 181.

[0088] like Figure 5As shown in part (a) of the figure, the aggregation chip 171 and the decomposition chip 172 can also be used to realize the signal aggregation transmission between the sub-board 150 and the second small board 162. Specifically, the aggregation chip 171 is provided on the sub-board 150, and the decomposition chip 172 is provided on the second small board 162. The aggregation chip 171 is used to aggregate the multi-channel digital signals to be transmitted from the sub-board 150 to the second small board 162, and then send the aggregated digital signals to the decomposition chip 172 through the second flexible circuit board 182. The decomposition chip 172 is used to decompose and restore the digital signals aggregated by the aggregation chip 171, and then output them to the relevant functional elements on the second small board 162. The above settings can reduce the size of the second flexible circuit board 182.

[0089] The above-mentioned signal aggregation transmission scheme of the aggregation chip 171 can also be applied to non-folding devices, for example, it can be applied to any electronic device such as a conventional mobile phone (bar phone), a tablet computer, a laptop computer, etc. The specific application scenario of the aggregation chip 171 of this application is not limited. Figure 5 As shown in part (b) of the figure, the aggregation chip 171 and the decomposition chip 172 can also be used to realize the signal aggregation transmission between the main board and the small board of a conventional mobile phone. The above configuration can reduce the size of the flexible circuit board connecting the main board and the small board, and a larger battery can be set at this time, and the capacity of the battery can be increased, which is conducive to increasing the endurance of the mobile terminal.

[0090] The system of the foldable mobile phone can be divided into a business state and a sleep state when running. In the business state, the system is in a high-speed clock state, and in the sleep state, the system is in a low-speed clock state. In the related art, as long as the system of the foldable mobile phone is in a high-speed clock state, the aggregation chip is in a power-on state, that is, as long as the system of the foldable mobile phone is in a business state, the aggregation chip is kept in a power-on state. Figure 6 Schematic diagram of the power supply principle of the polymer chip in the related art. Figure 6 As shown, the system clock signal is electrically connected to the aggregation chip on the mainboard through the filter circuit. When the system of the foldable mobile phone is in the business state, the system outputs a high-speed clock signal. After the high-speed clock signal is filtered by the filter circuit, it outputs an enable signal (ie, EN is high level) to the power chip of the aggregation chip. At this time, the power chip supplies power to the aggregation chip, and the aggregation chip enters the power-on state, and can perform signal aggregation transmission. When the system of the foldable mobile phone is in the sleep state, the system outputs a low-speed clock signal. After the low-speed clock signal is filtered by the filter circuit, it outputs a low level to the power chip. At this time, the power chip stops supplying power, and the aggregation chip enters the power-off state.

[0091] During the entire process of the foldable phone system being in business mode, the aggregate chip is always kept in the powered-on state regardless of whether there is a transmission demand or not. However, research has found that the actual signal transmission time of the aggregate chip accounts for a very low ratio (<0.5%) of the total power-on working time, resulting in a large amount of time for the aggregate chip to run at no load.

[0092] The following is an analysis from the perspective of the transmission requirements of the system on chip (SoC) for the aggregate chip. SoC is an integrated circuit that integrates multiple electronic systems on the same chip, which is widely used in electronic devices such as mobile phones and tablets. Figure 7 This is the hardware structure diagram of the SoC system on a foldable phone. Figure 7 As shown in the figure, the SoC of a foldable phone can be divided into multiple subsystems from a hardware perspective, such as the application processor subsystem (APSS), modem peripheral subsystem (MPSS) subsystem, sensor low power island (SLPI) subsystem, image processing module Venus, wireless connectivity subsystem (WCNSS), wireless processor subsystem (WPSS), low power audio subsystem (LPASS) and GPU subsystem. Each subsystem runs its own software. In some cases, APSS can also be called the main system or main processor of the SoC, while other subsystems can be called additional systems or additional processors.

[0093] When the SoC system is in business state, at least one subsystem of the SoC is powered on, and the aggregation chip is also powered on. In fact, only a few subsystems in the SoC, such as APSS, MPSS, and SLPI, need to use the aggregation chip for signal transmission, that is, only a few subsystems will have transmission requirements for the aggregation chip. For most subsystems, such as Venus, WCNSS, WPSS, LPASS, and GPU, they do not have transmission requirements for the aggregation chip during their work, causing the aggregation chip to run at no load for a long time, generating unnecessary energy consumption.

[0094] It should be understood that the above division of SoC subsystems is only an example and not a limitation. In practical applications, different division rules can be used to divide the SoC into more or fewer subsystems according to actual needs. The functions or names of the subsystems may also be different from those of the above subsystems. This application does not impose any limitations on the subsystems of the SoC.

[0095] Based on the above analysis, the aggregation chip in the related technology is bound to the high-speed clock of the system. As long as the system of the foldable mobile phone is in the business state, the aggregation chip is kept in the power-on state. However, during most of this process, there is no transmission demand for the aggregation chip, resulting in a large amount of no-load operation of the aggregation chip, which results in unnecessary power consumption of the aggregation chip and reduces the battery life of the electronic device.

[0096] In view of this, an embodiment of the present application first provides a control system of an aggregate chip, which can be applied to electronic devices. Through the control system, the aggregate chip is controlled to enter a power-on state only when it is identified that there is a transmission demand for the aggregate chip. This can shorten the power-on time of the aggregate chip, effectively solve the problem of unnecessary power consumption waste of the aggregate chip, and improve the battery life of electronic devices.

[0097] Figure 8 1 is a schematic block diagram of an example of a control system of a polymer chip provided in an embodiment of the present application. The control system provided in an embodiment of the present application can be applied to an electronic device 200, which can be any foldable electronic device such as a foldable mobile phone, or any electronic device that does not have a foldable feature such as a conventional straight-screen mobile phone, a tablet computer, or a laptop computer. For example, the electronic device 200 can be the aforementioned Figure 1 Any type of foldable phone shown, or it may also be Figure 5 The conventional candy bar phone shown. Figure 8 As shown, the control system provided in the embodiment of the present application includes an aggregation chip 210, a first power module 220, an identification module 230 and a control module 240.

[0098] The aggregation chip 210 is used to aggregate the signals to be transmitted, for example, the aggregation chip 210 may be the aforementioned aggregation chip 171. The aggregation chip 210 may be used to realize the aggregation transmission of signals between the main board and the secondary board, between the main board and the small board, or between the secondary board and the small board, so as to reduce the size of the flexible circuit board.

[0099] Here, the signal to be transmitted refers to a signal that needs to be aggregated and transmitted by the aggregation chip 210, and is a signal that the aggregation chip 210 is about to transmit. The signal to be transmitted can be a digital signal, for example, it can include a low-speed signal and / or a high-speed signal. The aggregation chip 210 can first aggregate the signal to be transmitted, and then send the obtained aggregated signal to the decomposition chip at the opposite end through the flexible circuit board. The decomposition chip decomposes and restores the aggregated signal and distributes it to the signal receiver, which can be, for example, the functional element 250 on the sub-board 280. The specific process of signal transmission and processing can be referred to the relevant description above, and will not be repeated here.

[0100] like Figure 8 As shown, the control system provided in the embodiment of the present application is applied in the electronic device 200 and is installed on the mainboard 260 of the electronic device 200. The signal to be transmitted of the aggregation chip 210 can come from the business module of the electronic device 200. The electronic device 200 has multiple business modules. In some cases, some business modules need to rely on the aggregation transmission of signals by the aggregation chip 210 to realize their own business. For example, for the TP module, the aggregation chip 210 is required to transmit the high-speed signal generated by the AP to the TP at the opposite end. The TP relies on the high-speed signal transmitted by the aggregation chip 210 to complete its own business. In addition, for the SIM card module and the camera module, the aggregation chip 210 also needs to aggregate and transmit the high-speed signals related to the SIM card and the camera.

[0101] The service module may include a processor capable of generating digital signals (e.g., low-speed signals and / or high-speed signals) and a functional element. The processor is connected to the aggregation chip 210 and can send the generated digital signals to the aggregation chip 210, and the aggregation chip 210 aggregates and transmits them to the functional element. Different service modules may correspond to different processors. The processor in the embodiment of the present application may be, for example, a subsystem such as APSS, MPSS, or SLPI of a SoC, but is not limited thereto. The aggregation chip 210 can aggregate and transmit signals from multiple processors.

[0102] Optionally, the signal to be transmitted of the aggregate chip 210 may include a high-speed signal and / or a low-speed signal, and the high-speed signal may include a signal related to modules such as SIM / SD, TP, I2C and RFFE, or the high-speed signal may include an APSS side signal (i.e., a signal generated by APSS), an MPSS side signal, an SLPI side signal, etc., and the low-speed signal includes a general-purpose input / output (GPIO) signal, an SPI signal or a UART serial port signal, etc., but is not limited thereto.

[0103] In some cases, the signal to be transmitted can also be converted from other signals such as analog signals. The analog signal can be generated by components such as sensors configured inside the electronic device. In this case, the electronic device can also include a corresponding converter, such as an analog to digital converter (ADC).

[0104] In other cases, the signal to be transmitted may also come from outside the electronic device 200, that is, the signal source of the signal to be transmitted does not belong to the electronic device 200, for example, the signal to be transmitted is obtained by the electronic device 200 from other devices through wired or wireless communication.

[0105] The aggregation chip 210 has a power-on state and a power-off state, and can be flexibly switched between the power-on state and the power-off state. When the aggregation chip 210 is in the power-on state, the enable end of the aggregation chip 210 can be input with a high level, and the aggregation chip 210 can load (execute) related applications to perform signal aggregation transmission. When the aggregation chip is in the power-off state, the enable end of the aggregation chip 210 can be input with a low level, and the aggregation chip 210 does not work, and the application executed by the aggregation chip 210 can be suspended in the memory.

[0106] In the embodiment of the present application, even if the system of the electronic device 200 is in the service state, the aggregate chip 210 has multiple states including the power-on state and the power-off state. When the aggregate chip 210 is in the power-off state, the aggregate chip 210 does not need to consume additional power, which can avoid the waste of power consumption of the chip. Therefore, in some cases, the power-off state can be the default state of the aggregate chip 210, and when there is no signal transmission demand, the aggregate chip 210 can be kept in the power-off state by default (automatically).

[0107] The first power module 220 is connected to the aggregation chip 210, and is used to supply power to the aggregation chip 210, so that the aggregation chip 210 enters a power-on state, and when the first power module 220 stops supplying power to the aggregation chip 210, the aggregation chip 210 enters a power-off state. The first power module 220 can also be understood as a driving module that can drive the aggregation chip 210 to work. The first power module 220 can include any circuit or chip that can enable the aggregation chip 210 to work. For example, the first power module 220 may include a driving circuit and / or a power chip. The driving circuit may include, for example, components such as a triode or a MOS (metal-oxide-semiconductor) tube. The power chip may include, for example, at least one of a low dropout regulator (LDO) power supply, a DC / DC power supply, and a voltage regulator tube.

[0108] The identification module 230 is used to identify whether there is a signal to be transmitted in the aggregate chip 210, or in other words, the identification module 230 is used to identify whether there is a transmission demand for the aggregate chip 210. For example, when the identification module 230 identifies that there is a signal to be transmitted in the aggregate chip 210, it can be understood that the identification module 230 identifies that there is a transmission demand for the aggregate chip 210. Alternatively, when the identification module 230 identifies that there is no signal to be transmitted in the aggregate chip 210 (i.e., no signal to be transmitted is identified), it can be understood that the identification module 230 identifies that there is no transmission demand for the aggregate chip 210 (i.e., no transmission demand is identified).

[0109] As a possible identification method, the identification module 230 can perform scene identification on the electronic device 200. When it is identified that the relevant scene is triggered, it can be determined that the aggregation chip 210 has a signal to be transmitted. In the triggered scene, there is a need (demand) to use the aggregation chip 210 for signal aggregation transmission. For example, when the relevant application on the electronic device 200 is opened, the relevant service is initiated, the relevant processor enters the power-on state, there is a cached signal in the signal buffer, or the form of the electronic device 200 changes (for example, the folded state is switched to the unfolded state), it can be determined that the aggregation chip 210 has a signal to be transmitted.

[0110] Optionally, when the identification module 230 identifies that a service module that needs to rely on (or depends on) the aggregation transmission of signals by the aggregation chip 210 to implement its own service has initiated a new service, it can be determined that the aggregation chip 210 has a signal to be transmitted.

[0111] For example, the TP module needs to rely on the aggregation chip 210 to aggregate and transmit signals to realize its own business. When the identification module 230 recognizes that the TP module has initiated a new business (for example, the user clicks on the screen to trigger the TP business), it is equivalent to the identification module 230 recognizing that there is a signal to be transmitted in the aggregation chip 210.

[0112] For another example, the SIM card module needs to rely on the aggregation chip 210 to aggregate and transmit signals to realize its own business. When the identification module 230 recognizes that the SIM card module has initiated a new business, it is equivalent to the identification module 230 recognizing that the aggregation chip 210 has a signal to be transmitted.

[0113] It is worth mentioning that the identification module 230 identifies that there is a signal to be transmitted in the aggregation chip 210, which indicates that there is a signal to be transmitted in the aggregation chip 210, but it does not mean that the signal to be transmitted has been generated by the processor at this time, or that the signal to be transmitted already exists. For example, when the identification module 230 identifies that the TP module has initiated a new service, it is equivalent to the identification module 230 identifying that there is a signal to be transmitted in the aggregation chip 210, indicating that there is a signal to be transmitted and related to TP in the aggregation chip 210, but at this time the signal to be transmitted may not have been generated by APSS, and the signal to be transmitted is a signal to be generated by APSS.

[0114] For example, when a TP service is initiated, the identification module 230 recognizes that there is a signal to be transmitted in the aggregation chip 210. Then, during the operation of the service, the APSS generates the signal to be transmitted according to the service requirements and sends the signal to be transmitted to the aggregation chip 210. The aggregation chip 210 then transmits it to the TP at the other end. The TP completes its own service based on the received signal.

[0115] Optionally, the aggregation chip 210 is used to aggregate and transmit signals generated by multiple processors, such as signals generated by multiple subsystems including APSS, MPSS or SLPI. When the identification module 230 recognizes that at least one of the above-mentioned multiple processors or multiple subsystems enters the power-on state, the identification module 230 recognizes that there are signals to be transmitted in the aggregation chip 210.

[0116] The control module 240 is connected to the identification module 230 and the first power module 220, and is used to control the first power module 220 according to the identification result of the identification module 230. Specifically, in the embodiment of the present application, when the identification module 230 identifies that there is a signal to be transmitted, the first power module 220 is controlled to supply power to the aggregation chip 210, so that the aggregation chip 210 switches from a power-off state to a power-on state, and after entering the power-on state, the aggregation chip 210 transmits the signal to be transmitted.

[0117] For example, the system of the electronic device 200 is in a business state. When the identification module 230 recognizes that the relevant scenario is triggered, it can be determined that the aggregation chip 210 has a signal to be transmitted. At this time, the control module 240 controls the first power supply module 220 to output a stable high level to the enable end of the aggregation chip 210, that is, to power the aggregation chip 210 so that the aggregation chip 210 switches from a power-off state to a power-on state. After the aggregation chip 210 completes the power-on process, it can transmit the signal to be transmitted in a timely manner.

[0118] According to the control system of the aggregation chip provided in the embodiment of the present application, the aggregation chip 210 has a power-on state and a power-off state. When the identification module 230 identifies that the aggregation chip 210 has a signal to be transmitted, the control module 240 can control the first power module 220 to power the aggregation chip, so that the aggregation chip 210 switches from the power-off state to the power-on state, and then can transmit the signal to be transmitted. When the aggregation chip 210 does not have a signal to be transmitted, the aggregation chip 210 can be switched to the power-off state, for example, the power-off state can be the default state of the aggregation chip 210, and the aggregation chip 210 does not need to consume additional power when it is in the power-off state, thereby avoiding power consumption waste.

[0119] According to the control system of the aggregation chip provided in the embodiment of the present application, the aggregation chip 210 is no longer bound to the high-speed clock of the system, and the aggregation chip 210 can enter the power-off state even if the system of the electronic device is in the business state. In this way, the state selection of the aggregation chip 210 can be reasonably performed according to specific business needs, and the aggregation chip 210 is switched from the power-off state to the power-on state only when the signal to be transmitted is identified, and when there is no signal transmission demand, the aggregation chip 210 can be kept in the power-off state. Compared with the related art that keeps the aggregation chip 210 in the power-on state, the present application can allocate power consumption according to actual business needs, thereby avoiding unnecessary power consumption waste of the aggregation chip 210 and improving the endurance of the electronic device. In addition, the aggregation chip 210 in the present application does not have to be kept in the power-on state all the time, thereby reducing the loss of the aggregation chip 210 and extending the service life of the aggregation chip 210.

[0120] Furthermore, in an embodiment of the present application, after the signal to be transmitted is transmitted by the aggregate chip 210, the control module 240 is also used to: control the first power module 220 to stop supplying power to the aggregate chip 210, for example, control the first power module 220 to output a low level to the aggregate chip 210, so that the aggregate chip 210 switches from the power-on state back to the power-off state.

[0121] That is to say, after the signal to be transmitted is transmitted, the control module 240 can automatically switch the aggregate chip 210 from the power-on state back to the power-off state. The power-off state can be used as the default state of the aggregate chip 210, so that the aggregate chip 210 can be kept in the power-off state to the maximum extent, thereby avoiding unnecessary power consumption of the aggregate chip 210 to the maximum extent and extending the battery life of the electronic device.

[0122] Optionally, the control module 240 controls the first power module 220 to supply power to the aggregation chip 210, which can be achieved by outputting an enable signal (i.e., EN is at a high level) to the enable terminal of the first power module 220, at which time the output terminal of the first power module 220 supplies power to the aggregation chip 210. The control module 240 controls the first power module 220 to stop supplying power to the aggregation chip 210, which can be achieved by outputting a stop enable signal (i.e., EN is at a low level) to the enable terminal of the first power module 220, at which time the output terminal of the first power module 220 stops supplying power to the aggregation chip 210.

[0123] Optionally, it may be determined that the transmission of the signal to be transmitted is completed according to an instruction from the service module.

[0124] Optionally, when it is determined that the signal to be transmitted is completely transmitted, and the identification module 230 does not identify a new signal to be transmitted that needs to be transmitted within a preset time period after the signal to be transmitted is completely transmitted, the control module 240 is further used to control the first power module 220 to stop supplying power to the aggregation chip 210, so that the aggregation chip 210 switches from the power-on state to the power-off state. When the identification module 230 identifies a new signal to be transmitted that needs to be transmitted within a preset time period after the signal to be transmitted is completely transmitted, the aggregation chip 210 is further used to directly transmit the new signal to be transmitted.

[0125] That is to say, after the transmission of the signal to be transmitted is completed, it does not switch back to the power-off state directly, but waits for a preset time, that is, it remains in standby (idle) for a preset time in the power-on state. Within the preset time, if the recognition module 230 recognizes that a new signal to be transmitted needs to be transmitted, the aggregation chip 210 directly transmits the new signal to be transmitted; and if the recognition module 230 does not recognize that a new signal to be transmitted needs to be transmitted within the preset time, the control module 240 switches the aggregation chip 210 from the power-on state back to the power-off state.

[0126] Through the above settings, frequent power-on and power-off switching of the aggregation chip 210 can be avoided to ensure the transmission stability of the aggregation chip 210, and the loss of the aggregation chip 210 caused by power-on and power-off switching can also be reduced. In addition, for some continuous services, signals may be sent multiple times in a period of time. By setting the preset standby time of the aggregation chip 210 in the power-on state, subsequent new signals can be transmitted quickly and timely after they arrive, with a fast response speed, avoiding transmission delays caused by power-on and power-off switching.

[0127] Optionally, the preset duration may be, for example, 2 seconds, 5 seconds, 10 seconds, 20 seconds, 30 seconds or 1 minute. When it is determined that the transmission of the signal to be transmitted is completed, the timer may be started. Within the preset duration of the timer start, if the identification module 230 does not identify a new signal to be transmitted, the control module 240 controls the first power module 220 (i.e., controls the first power module 220 to stop supplying power to the aggregation chip 210) to switch the aggregation chip 210 from the power-on state back to the power-off state. If a new signal to be transmitted is identified, the aggregation chip 210 directly transmits the new signal to be transmitted, and the timer is reset and restarted. The control module 240 switches the aggregation chip 210 from the power-on state back to the power-off state until a new signal to be transmitted is not identified within a certain preset duration.

[0128] Further, in the embodiment of the present application, in terms of identifying whether there is a signal to be transmitted on the aggregation chip 210, the identification module 230 is specifically used to: determine the existence of a signal to be transmitted based on the identified first service, and the completion of the first service depends on the transmission of the signal to be transmitted by the aggregation chip. The first service is a service initiated or to be initiated by the service module, and the first service is a service that needs to rely on the aggregation transmission of the signal by the aggregation chip 210 to be implemented or completed. When the identification module 230 identifies the first service, it is determined that there is a signal to be transmitted on the aggregation chip 210.

[0129] For example, the first service may be a TP service, and the completion of the TP service requires the transmission of the to-be-transmitted signal generated by the APSS to the TP by means of the aggregation chip 210. When the identification module 230 identifies the TP service, it may be determined that the aggregation chip 210 has a to-be-transmitted service.

[0130] For another example, the first service may be a SIM card service, and the completion of the SIM card service requires the aggregation chip 210 to transmit the to-be-transmitted signal generated by the MPSS to the SIM card module of the other end. When the identification module 230 identifies the SIM card service, it can be determined that the aggregation chip 210 has a service to be transmitted.

[0131] Through the above settings, the identification module 230 can initiate the identification of the signal to be transmitted of the aggregation chip 210 from the business layer, that is, it can identify the signal to be transmitted earlier, ensuring that the aggregation chip 210 has enough time to switch from the power-off state to the power-on state, that is, ensuring that there is enough time to complete the state switching process, avoiding signal transmission delays caused by untimely power-on and power-off switching, and especially meeting the transmission requirements of high-speed signals for low latency and other aspects.

[0132] Fig. 9 FIG. 1 is a schematic block diagram of another example of a control system of a polymer chip provided in an embodiment of the present application. Fig. 9As shown, in an embodiment of the present application, the completion of the first business also depends on the first processor 291 generating the signal to be transmitted. In terms of controlling the first power module 220 to power the aggregation chip 210, the control module 240 is specifically used to: control the second power module 221 to power the first processor 291, that is, enable the first processor 291 through the second power module 221, switch the first processor 291 from a power-off state to a power-on state, and then enable the first power module 220 through the power supply to the first processor 291, wherein the second power module 221 is connected to the enable end of the first power module 220.

[0133] Specifically, combined Figure 8 and Fig. 9 , after the first service is initiated, the completion of the first service needs to rely on both the first processor 291 and the aggregation chip 210. The first processor 291 needs to generate the signal to be transmitted according to the specific service requirements of the first service, and the aggregation chip 210 needs to transmit the signal to be transmitted to the functional element 250 on the opposite sub-board 280, so that the first service can be successfully completed. The second power module 221 is the power module of the first processor 291. After identifying the first service, the control module 240 controls the second power module 221 to supply power to the first processor 291, so that the first processor 291 switches from a power-off state to a power-on state. In an embodiment of the present application, an output end of the second power module 221 is also connected to the enable end of the first power module 220. In this way, the power supply of the second power module 221 to the first processor 291 can also be reused as an enable signal of the first power module 220, enabling the first power module 220 to supply power to the aggregation chip 210.

[0134] Further, when the signal to be transmitted is transmitted, the power-off procedure can be executed. At this time, the control module 240 controls the second power module 221 to stop supplying power to the first processor 291, and the first processor 291 switches from the power-on state back to the power-off state. At the same time, the enable terminal of the first power module 220 is input with a low level, and the first power module 220 also stops supplying power to the aggregation chip 210, and the aggregation chip 210 also switches from the power-on state back to the power-off state.

[0135] Through the above-mentioned settings, the present application can reuse the power-on and power-off logic (i.e., the current inherent logic) of the first processor 291 in the prior art, that is, use the current inherent logic to power on the aggregate chip 210, which is conducive to simplifying the control logic and simplifying the circuit design. In addition, the aggregate chip 210 can be bound to the first processor 291 to achieve simultaneous power on and off of the two, and the aggregate chip 210 and the first processor 291 are enabled at the same time, which is also conducive to ensuring that the aggregate chip 210 has enough time to switch from the power-off state to the power-on state, that is, to ensure that the aggregate chip 210 can be switched to the power-on state in a timely manner, avoiding signal transmission delays caused by untimely power on and off switching, and especially meeting the transmission requirements of high-speed signals for low latency and other aspects.

[0136] For example, the first service may be a TP service, in which case the first processor 291 is an APSS, and the second power module 221 is the power supply of the APSS, that is, the small core power supply. When the identification module 230 identifies the first service, the control module 240 controls the small core power supply to power the APSS, and the small core power supply as the power supply of the APSS is also multiplexed as an enable signal of the first power module 220, enabling the first power module 220 to supply power to the aggregation chip 210. At this time, the identification module 230 and the control module 240 are simplified into the native control logic inside the operating system, and the first power module 220 is enabled by the high and low level changes of the small core power supply. In this way, both the APSS and the aggregation chip 210 enter the power-on state, and the APSS generates a signal to be transmitted according to the specific service requirements of the first service, and the aggregation chip 210 transmits the signal to be transmitted to the TP at the opposite end, so that the first service can be completed.

[0137] For another example, the first service may be a SIM card service, in which case the first processor 291 is an MPSS, and the second power module 221 is the power supply of the MPSS, that is, the modem core power supply. When the identification module 230 identifies the first service, the control module 240 controls the modem core power supply to power the MPSS, and the modem core power supply is also multiplexed as an enable signal of the first power module 220, enabling the first power module 220 to supply power to the aggregation chip 210. At this time, the identification module 230 and the control module 240 are simplified into the native control logic inside the operating system, and the first power module 220 is enabled by the high and low level changes of the modem core power supply. In this way, both the MPSS and the aggregation chip 210 enter the power-on state, and the MPSS generates a signal to be transmitted according to the specific service requirements of the first service, and the aggregation chip 210 transmits the signal to be transmitted to the SIM card module of the opposite end, so that the first service can be completed.

[0138] Optionally, the first processor 291 may be a SoC or a subsystem of a SoC, for example, the first processor 291 may be APSS, MPSS or SLPI, or the first processor 291 may be other processors or processing modules other than a SoC, which is not limited in the present application.

[0139] Furthermore, the above-mentioned second power supply module 221 may include a SoC power supply chip (such as buck) and different power supply branches. Different power supply branches of the SoC power supply chip correspond to different subsystems, and power different subsystems respectively. For example, when the first processor 291 is APSS, the second power supply module 221 includes the SoC power supply chip and the power supply branch corresponding to the APSS, and the power supply on the power supply branch is the aforementioned small core power supply, and the small core power supply can also be multiplexed as an enable signal of the power supply module 220. For another example, when the first processor 291 is MPSS, the second power supply module 221 includes the SoC power supply chip and the power supply branch corresponding to the MPSS, and the power supply on the power supply branch is the aforementioned modem core power supply, and the modem core power supply can also be used as an enable signal of the power supply module 220.

[0140] Fig.10 FIG. 1 is a schematic block diagram of another example of a control system of a polymer chip provided in an embodiment of the present application. Fig.10 As shown, in an embodiment of the present application, the aggregation chip 210 is used to aggregate and transmit signals generated by multiple processors including a first processor 291 and a second processor 292, and the multiple processors are used to process different types of services. The multiple processors 291 can correspond to multiple driving power supplies one by one, for example, the first processor 291 and the second processor 292 correspond to the second power module 221 and the third power module 222 respectively. That is, the second power module 221 is used to power the first processor 291, and the third power module 222 is used to power the second processor 292. The output ends of the multiple power modules corresponding to the multiple processors are all connected to the enable end of the first power module 220, that is, any power module can be reused as the enable signal of the first power module 220 in the process of powering the corresponding processor. For example, the power supply of the third power module 222 to the second processor 292 is also reused as the enable signal of the first power module 220. When the third power module 222 starts to power the second processor 292, the power supply can also enable the first power module 220.

[0141] In this way, before the control module 240 controls the second power module 221 to supply power to the first processor 291 , the control module 240 is further configured to: determine the second power module 221 from a plurality of driving power supplies according to the first service.

[0142] Specifically, the control module 240 determines the processor corresponding to the first business based on information such as the business type of the first business, and then determines the driving power supply corresponding to the first business. The control module 240 determines the second power supply module 221 from the multiple driving power supplies based on the first business. Then the control module 240 controls the second power supply module 221 to power the first processor 291. The power supply simultaneously enables the first power supply module 220 to power the aggregation chip 210. At this time, the first processor 291 and the aggregation chip 210 both enter the power-on state to enable the first business to be completed.

[0143] That is to say, the aggregation chip 210 is used to aggregate and transmit signals for multiple processors, and each of the multiple driving power supplies (modules) corresponding to the multiple processors is electrically connected to the first power supply module 220, and the power supply corresponding to each power supply module is multiplexed as an enable signal of the first power supply module 220.

[0144] The control module 240 can control any driving power supply to power the corresponding processor, and the processor and the aggregation chip 210 will enter the power-on state at the same time. For example, after the first service is identified, it is determined that the first processor 291 needs to be powered on based on the service type and other information of the first service, that is, the second power supply module 221 is determined from multiple driving power supplies, and then the first processor 291 and the aggregation chip 210 are both powered on by controlling the second power supply module 221.

[0145] Through the above settings, the control module 240 can control at least one of the multiple processors to enter the power-on state according to actual business needs, and the aggregation chip 210 also enters the power-on state synchronously, that is, when at least one processor is powered on, the aggregation chip 210 is also powered on, and when the multiple processors are not powered on, the aggregation chip 210 is also not powered on. The power-on duration of the aggregation chip 210 will be bound to the power-on duration of the multiple processors, thereby avoiding unnecessary power consumption waste of the aggregation chip 210 to a greater extent. In addition, by reusing the power-on and power-off logic of multiple processors, the control logic of the control module 240 can be greatly simplified, and it is conducive to simplifying the circuit design.

[0146] It is worth mentioning that in the description of this application, the description of "processor" will not impose any limitation on the product form. For example, multiple processors can be multiple independent processors, or they can be one integrated processor (such as SoC), which has multiple processing capabilities of the above multiple processors, that is, it generates different signals to be transmitted. In other words, the processor in this application may refer to a processor module (unit), a processing module (unit) or a processor subsystem, etc. For example, the aforementioned first processor 291 may be a processor module, a processing module or a processor subsystem, and the aforementioned multiple processors may refer to multiple processor modules, multiple processing modules or multiple processor subsystems, etc. The multiple processor subsystems may be multiple subsystems of SoC, such as APSS, MPSS and SLPI, but are not limited to this. The first processor 291 may be one of the above subsystems.

[0147] Furthermore, if Fig.10 As shown, a plurality of power modules including the second power module 221 and the third power module 222 are connected in parallel and electrically connected to the first power module 220 through an OR gate #1.

[0148] OR gate is also called OR circuit, logic and circuit. OR gate has multiple input terminals and one output terminal. As long as one of the inputs is high level (logic "1"), the output is high level (logic "1"); only when all the inputs are low level (logic "0"), the output is low level (logic "0").

[0149] Taking into account that under normal circumstances the first power module 220 does not require multiple power modules to be enabled at the same time, but according to business needs, there are situations where multiple power modules supply power to multiple processors at the same time, the present application sets an OR gate between multiple power modules and the first power module 220. This can enable the first power module 220 by selecting one from multiple power modules through a hardware solution, without the need for intervention through a software solution, thereby simplifying the control logic of the control module 240.

[0150] like Fig.10 As shown, an operational amplifier is also provided between the multiple power modules and the OR gate #1 to amplify the signal. For example, the power module includes two (i.e. Fig.10 The second power module 221 and the third power module 222 in the embodiment are electrically connected to the OR gate #1 through a dual-channel operational amplifier.

[0151] Furthermore, a switch circuit is provided between the second power module 221 and the first power module 220 .

[0152] In some scenarios, the first processor 291 may process services other than the first service. For example, APSS may process services other than TP. These other services may not require the use of the aggregation chip 210 to transmit signals. The present application can realize switch control between the second power supply module 221 and the first power supply module 220 by setting a switching circuit, so that the second power supply module 221 can supply power to the first processor 291 alone without enabling the first power supply module 220. This makes the power-on and power-off control of the aggregation chip 210 more flexible, can meet the usage requirements in more scenarios, and avoid power consumption of the aggregation chip 210 as much as possible.

[0153] Exemplarily, the switch circuit is a switch circuit composed of a transistor and a P-channel metal oxide semiconductor (positive channel metal oxide semiconductor, PMOS). The specific working principle can refer to the current related technology and will not be repeated here.

[0154] Furthermore, if Fig.10 As shown, a filter circuit is provided between the OR gate #1 and the first power module 220. By providing the filter circuit, the power supply on the power module (for example, the small core power supply corresponding to APSS or the modem core power supply corresponding to MPSS) can be filtered, so that a stable high level (i.e., an enable signal) can be output to the first power module 220, ensuring the working stability of the first power module 220.

[0155] Furthermore, if Fig.10 As shown, the enable end of the first power module 220 is electrically connected to the output end of the GPIO module, and the output end of the first power module 220 is electrically connected to the aggregation chip 210. For example, the filter circuit is connected in parallel with the GPIO module and then connected to the first power module 220 through an OR gate #2. On this basis, in terms of controlling the first power module 220 to supply power to the aggregation chip 210, the control module 240 is specifically used to:

[0156] The GPIO module is controlled to output an enable signal (ie, EN is at a high level) to the first power module 220, so as to enable the first power module 220 to supply power to the aggregation chip 210. The first power module 220 may be, for example, an LDO power supply.

[0157] The first power module 220 in the embodiment of the present application can also be switched on and off by the GPIO module, that is, the first power module 220 can also be enabled by an enable signal sent by the GPIO module, for example, when necessary, an enable signal can be output to the first power module 220 by the GPIO module to enable the first power module 220 to supply power to the aggregation chip 210. Through the above settings, in some cases, the aforementioned circuit module can be used to enable the first power module 220, but the GPIO module can be used to enable it, and the power on and off control of the aggregation chip 210 is more flexible and controllable, so as to meet the power supply requirements of the aggregation chip 210 in more scenarios.

[0158] In combination with the control system provided in the above embodiment, the embodiment of the present application also provides a control method of an aggregate chip, which can be applied to the control system provided in the above embodiment, or applied to an electronic device having the control system. The following is a method embodiment provided by the present application, which corresponds to the above product (system) embodiment.

[0159] Fig.11 300 is a flow chart of a control method 300 of a polymer chip provided in an embodiment of the present application. Fig.11 As shown, and combined Figure 8 The control method 300 includes the following steps:

[0160] Step 310 : The identification module 230 identifies whether there is a signal to be transmitted in the aggregation chip 210 .

[0161] Step 320: When the identification module 230 identifies that there is a signal to be transmitted, the control module 240 controls the first power module 220 to supply power to the aggregation chip 210, so that the aggregation chip switches from a power-off state to a power-on state.

[0162] Step 330: The aggregation chip 210 transmits the signal to be transmitted.

[0163] Step 340: After the signal to be transmitted is transmitted, the control module 240 controls the first power module 220 to stop supplying power to the aggregation chip 210, so that the aggregation chip 210 switches from the power-on state to the power-off state.

[0164] Fig.12 4 is a flow chart of a control method 400 of a polymer chip provided in an embodiment of the present application. Fig.12 As shown, and combined Fig. 9 , Fig.10 The control method 400 includes the following steps:

[0165] In step 410 , the identification module 230 determines that there is a signal to be transmitted according to the identified first service, and the completion of the first service depends on the transmission of the signal to be transmitted by the aggregation chip 210 . Step 410 can be regarded as a sub-step of the aforementioned step 310 .

[0166] In step 420 , the control module 240 determines the second power module 221 from the plurality of power modules according to the first service.

[0167] Specifically, the aggregation chip 210 is used to transmit signals generated by multiple processors including the first processor 291, and multiple power modules corresponding to the multiple processors are connected to the enable end of the first power module 220. The control module 240 can first determine the first processor 291 from the multiple processors according to information such as the service type of the first service, and then determine the second power module 221 from the multiple power modules.

[0168] In step 430, the control module 240 controls the second power module 221 to supply power to the first processor 291, so as to enable the first power module 220 through the second power module 221 for supplying power to the first processor 291, wherein the second power module 221 is connected to the enable end of the first power module 220. The above steps 420 and 430 can be regarded as sub-steps of the above step 320.

[0169] Step 440: The first processor 291 generates the signal to be transmitted, and the aggregation chip 210 transmits the signal to be transmitted.

[0170] Step 450, after the signal to be transmitted is transmitted, the control module 240 controls the first power module 220 to stop supplying power to the first processor 291, so that the aggregation chip 210 and the first processor 291 are switched from the power-on state to the power-off state.

[0171] Regarding the above Fig.11 , Fig.12 For the introduction of the control method 300 and the control method 400 shown, please refer to the description of the corresponding content above, which will not be repeated here.

[0172] An embodiment of the present application also provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed on an electronic device, the electronic device executes the method executed by the aggregation chip 210, the first power module 220, the identification module 230 or the control module 240 in the aforementioned embodiment.

[0173] An embodiment of the present application also provides a computer program product, including: a computer program code, which, when executed on an electronic device, enables the electronic device to execute the method executed by the aggregation chip 210, the first power module 220, the identification module 230 or the control module 240 in the aforementioned embodiment.

[0174] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A control system for a polymer chip, characterized in that: The control system includes a polymerization chip, a first power module, an identification module and a control module, wherein: The identification module is used to identify whether there is a signal to be transmitted on the aggregation chip; The control module is used to control the first power module to supply power to the aggregation chip when the identification module identifies the presence of the signal to be transmitted, so that the aggregation chip switches from a power-off state to a power-on state.

2. The control system according to claim 1, characterized in that: In terms of identifying whether the aggregate chip has a signal to be transmitted, the identification module is specifically used to: The existence of the signal to be transmitted is determined according to the identified first service, and completion of the first service depends on transmission of the signal to be transmitted by the aggregation chip.

3. The control system according to claim 2, characterized in that: The completion of the first service also depends on the first processor generating the signal to be transmitted. In terms of controlling the first power module to supply power to the aggregation chip, the control module is specifically used to: The second power module is controlled to supply power to the first processor, so as to enable the first power module through the power supply to the first processor, wherein the second power module is connected to the enable terminal of the first power module.

4. The control system according to claim 3, characterized in that: The aggregation chip is used to transmit signals generated by multiple processors including the first processor, multiple power modules corresponding to the multiple processors are connected to the enable end of the first power module, and before controlling the second power module to supply power to the first processor, the control module is also used to: The second power supply module is determined from the multiple power supply modules according to the first service.

5. The control system according to claim 4, characterized in that: The multiple power modules are connected in parallel and electrically connected to the first power module through an OR gate.

6. The control system according to claim 5, characterized in that: A switch circuit is provided between the second power module and the first power module.

7. The control system according to any one of claims 5-6, characterized in that: A filter circuit is arranged between the OR gate and the first power supply module.

8. The control system according to any one of claims 3 to 7, characterized in that: The first processor is an application processor subsystem, a modem subsystem or a low power island sensor subsystem.

9. The control system according to any one of claims 1 to 8, characterized in that: The enable terminal of the first power module is connected to the GPIO module. In terms of controlling the first power module to supply power to the aggregation chip, the control module is specifically used to: The GPIO module is controlled to output an enable signal to the first power module, so as to enable the first power module to supply power to the aggregation chip.

10. The control system according to any one of claims 1 to 9, characterized in that: After the signal to be transmitted is transmitted by the aggregation chip, the control module is further used to: The first power module is controlled to stop supplying power to the aggregation chip, so that the aggregation chip switches from the power-on state back to the power-off state.

11. An electronic device, characterized in that: A control system comprising the polymer chip according to any one of claims 1 to 10.

12. A control method for a polymer chip, characterized in that: include: The identification module identifies whether there is a signal to be transmitted in the aggregation chip; When the identification module identifies that there is the signal to be transmitted, the control module controls the first power module to supply power to the aggregation chip, so that the aggregation chip switches from a power-off state to a power-on state.

13. The method according to claim 12, characterized in that The identification module identifies whether there is a signal to be transmitted on the aggregation chip, including: The identification module determines that the signal to be transmitted exists according to the identified first service, and completion of the first service depends on the transmission of the signal to be transmitted by the aggregation chip.

14. The method according to claim 13, characterized in that The completion of the first service also depends on the first processor generating the signal to be transmitted, and the control module controls the first power module to supply power to the aggregation chip, including: The control module controls the second power module to supply power to the first processor, so as to enable the first power module through the power supply to the first processor, wherein the second power module is connected to the enable terminal of the first power module.

15. The method according to claim 14, characterized in that The aggregation chip is used to transmit signals generated by multiple processors including the first processor, multiple power modules corresponding to the multiple processors are connected to the enable end of the first power module, and before the control module controls the second power module to supply power to the first processor, the method further includes: The control module determines the second power module from the multiple power modules according to the first service.

16. The method according to any one of claims 12 to 15, characterized in that: The enabling end of the first power module is connected to the GPIO module, and the control module controls the first power module to supply power to the aggregation chip, including: The control module controls the GPIO module to output an enable signal to the first power module to enable the first power module to supply power to the aggregation chip.

17. The method according to any one of claims 12 to 16, characterized in that: After the signal to be transmitted is transmitted by the aggregation chip, the method further includes: The control module controls the first power module to stop supplying power to the aggregation chip, so that the aggregation chip switches from the power-on state back to the power-off state.