Light emitting component and method of manufacturing the same, mass transfer method

By performing chip fabrication on a temporary transpose structure and etching bonding adhesive and metal layers to form a metal film layer that contacts the chip side, the problem of low transfer efficiency of Micro LED chips is solved, and efficient mass transfer is achieved.

CN119521894BActive Publication Date: 2026-01-06CHONGQING KONKA PHOTOELECTRIC TECH RES INST CO LTD
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Patent Information

Application Number
CN202311023392.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-08-15
Publication Date
2026-01-06
Estimated Expiration
2043-08-15

AI Technical Summary

Technical Problem

The existing technology for mass transfer of Micro LED chips is limited by transfer accuracy, transfer efficiency, detection difficulty, and repair difficulty, which makes it difficult to mass-produce Micro LED display technology.

Method used

By performing chip fabrication on a temporary transpose structure, an independent light-emitting chip is formed. After the chip fabrication is completed, the bonding adhesive layer and metal layer are etched to form a metal film layer that contacts the side of the chip. Finally, the remaining bonding adhesive layer is removed to achieve the fabrication of a weakened structure, which is convenient for subsequent transfer.

Benefits of technology

It improves the transfer efficiency of Micro LED chips, simplifies the transfer process, and enhances the efficiency of mass transfer.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application relates to a light-emitting component and a manufacturing method and a mass transfer method thereof. The manufacturing method of the light-emitting component comprises the following steps: providing a temporary transfer structure; wherein the temporary transfer structure comprises a first substrate, a metal layer, a bonding glue layer and an epitaxial structure arranged in sequence; the epitaxial structure is combined to the metal layer through the bonding glue layer; the epitaxial structure is subjected to a patterning treatment to form a plurality of island-shaped epitaxial layers separated from each other; wherein the bonding glue layer between adjacent island-shaped epitaxial layers is exposed; a chip process is performed on the basis of the island-shaped epitaxial layers to obtain a plurality of independent light-emitting chips; the bonding glue layer between adjacent light-emitting chips is removed to expose the metal layer; the exposed metal layer is etched; wherein the metal debris generated by etching the metal layer is accumulated along the sidewall of the bonding glue layer, and the metal film layer formed by accumulation is in contact with the side surface of the light-emitting chip; and the remaining part of the bonding glue layer is removed. The light-emitting component manufactured by the manufacturing method is more easily transferred.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a light-emitting component and its manufacturing method and mass transfer method. Background Technology

[0002] Micro LED display technology refers to a display technology that uses self-emissive, micrometer-sized LEDs as light-emitting pixel units, assembling them onto a driving panel to form a high-density LED array. Due to the small size, high integration, and self-emissive nature of micro LED chips, they offer significant advantages over LCD and OLED displays in terms of brightness, resolution, contrast ratio, energy consumption, lifespan, response speed, and thermal stability. They are considered the mainstream direction for future display technology and have immense application potential in VR / AR, high-definition, flexible, and wearable display fields.

[0003] The key obstacle to the mass production of Micro LED display technology lies in mass transfer technology. Traditional mass transfer technology requires transferring a large number of Micro LED chips from the growth substrate to the display backplane in batches and multiple times. After the transfer, the chips also need to be inspected and repaired. Because the feature size of Micro LED chips is less than 100μm and the number of chips that need to be transferred is large, traditional mass transfer technology is severely limited by transfer accuracy, transfer efficiency, inspection difficulty, and repair difficulty.

[0004] Therefore, how to make Micro LED chips easy to transfer is an urgent problem to be solved. Summary of the Invention

[0005] In view of the shortcomings of the prior art, the purpose of this application is to provide a light-emitting component and its manufacturing method and mass transfer method, which aims to solve the above-mentioned technical problem of how to facilitate the transfer of Micro LED chips.

[0006] A method for manufacturing a light-emitting component, comprising:

[0007] A temporary transposition structure is provided; wherein the temporary transposition structure includes a first substrate, a metal layer, a bonding adhesive layer and an epitaxial structure arranged sequentially; the epitaxial structure is bonded to the metal layer through the bonding adhesive layer;

[0008] The epitaxial structure is patterned to form multiple mutually separated island-shaped epitaxial layers; wherein the bonding adhesive layer between adjacent island-shaped epitaxial layers is exposed.

[0009] Chip fabrication is performed on the island-shaped epitaxial layer to obtain multiple independent light-emitting chips;

[0010] Remove the bonding adhesive layer between adjacent light-emitting chips to expose the metal layer;

[0011] The exposed metal layer is etched; wherein metal debris generated from etching the metal layer accumulates along the sidewalls of the bonding adhesive layer, and the accumulated metal film layer contacts the sidewall of the light-emitting chip; and

[0012] Remove the remaining portion of the bonding adhesive layer.

[0013] The above-described method for fabricating the light-emitting component involves obtaining multiple independent light-emitting chips through chip fabrication on a temporary transposed structure. Then, the bonding adhesive layer between adjacent light-emitting chips is removed, and the exposed metal layer is etched. Metal debris generated during etching accumulates along the sidewalls of the bonding adhesive layer, forming a metal film that contacts the sidewalls of the light-emitting chips. Finally, the remaining bonding adhesive layer (i.e., the bonding adhesive layer between the metal film layers) is removed, resulting in a metal film layer containing a cavity. This metal film layer has a small contact area with the sidewalls of the light-emitting chips, facilitating subsequent disconnection and making the light-emitting chips easier to transfer. In essence, the purpose of transferring the epitaxial structure to the first substrate via the bonding adhesive layer and metal layer is primarily to replace the original substrate of the epitaxial structure. This application ingeniously utilizes this substrate replacement process. During chip fabrication, the bonding adhesive layer and metal layer are not etched apart. Instead, they are etched after the chip is fabricated to create the weakened structure. This not only completes the chip fabrication but also the creation of the weakened structure. As a result, when transferring these light-emitting chips, it is only necessary to disconnect the contact portion between the metal film layer and the side of the light-emitting chip, thereby improving the transfer efficiency of the light-emitting chips.

[0014] In one embodiment, the method for fabricating the temporary transpose structure includes:

[0015] Provide the first substrate;

[0016] The metal layer is formed on the surface of the first substrate;

[0017] A second substrate comprising the epitaxial structure is provided;

[0018] A bonding adhesive layer is deposited on the side of the epitaxial structure opposite to the second substrate;

[0019] Bonding the bonding adhesive layer to the metal layer; and

[0020] Remove the second substrate.

[0021] In one embodiment, the chip manufacturing process includes:

[0022] A passivation layer is deposited on the island-shaped epitaxial layer and the bonding adhesive layer;

[0023] The passivation layer on the island-shaped epitaxial layer is patterned to expose a portion of the surface of the island-shaped epitaxial layer; and

[0024] Chip electrodes are fabricated on the exposed surface of the island-shaped epitaxial layer.

[0025] In one embodiment, the bonding adhesive layer is removed by chemical etching.

[0026] In one embodiment, a dry etching process is used to etch the exposed metal layer.

[0027] Based on the same inventive concept, this application also provides a light-emitting component, which is manufactured using the light-emitting component manufacturing method described above.

[0028] The light-emitting components described above, being manufactured using the aforementioned manufacturing method, possess the beneficial effects described in the aforementioned manufacturing method, namely, the resulting light-emitting components are more convenient for subsequent mass transfer and can improve mass transfer efficiency.

[0029] In one embodiment, the thickness of the metal film is between 10 nm and 100 nm, and the height of the metal film is between 0.5 μm and 2 μm.

[0030] In one embodiment, the material of the bonding adhesive layer includes any one of silica, benzocyclobutene, and polyimide.

[0031] In one embodiment, the material of the metal layer includes platinum or gold.

[0032] Based on the same inventive concept, this application also provides a mass transfer method, comprising:

[0033] Provide the light-emitting component as described above and a driving backplate;

[0034] The chip electrodes of the light-emitting chip are aligned and bonded to the pads of the driving backplane; and

[0035] Pressure is applied from one side of the first substrate to disconnect the metal film from the light-emitting chip. Attached Figure Description

[0036] Figure 1 This is a flowchart illustrating a method for manufacturing a light-emitting component according to an embodiment of this application;

[0037] Figure 2 for Figure 1 A schematic diagram of the sub-steps in step S100;

[0038] Figure 3 for Figure 1 A schematic diagram of the sub-steps in step S300;

[0039] Figures 4-11 For the corresponding Figure 1 A schematic diagram illustrating the structural changes of the Chinese method;

[0040] Figures 12-15 For the corresponding Figure 2 A schematic diagram illustrating the structural changes of the Chinese method;

[0041] Figures 16-18 This is a flowchart illustrating the mass transfer method in one embodiment of this application.

[0042] Explanation of reference numerals in the attached figures:

[0043] 10 - First substrate; SB - Second substrate; 20 - Metal layer; 30 - Bonding adhesive layer; 40 - Epitaxial structure; 410 - Island epitaxial layer; 510 - Passivation layer; H - Opening; M - Chip electrode; 310 - Remaining bonding adhesive layer; 210 - Metal film layer; LS - Light-emitting component; BM - Driving backplane; LM - Transferred light-emitting device. Detailed Implementation

[0044] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings. Preferred embodiments of this application are shown in the drawings. However, this application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the disclosure of this application.

[0045] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the specification of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application.

[0046] It should be understood that spatial relation terms such as "below," "under," "below," "below," "above," "over," etc., can be used here to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, an element or feature described as "below" or "under" or "below" of other elements or features will be oriented "over" of other elements or features. Therefore, the exemplary terms "below" and "under" can include both upper and lower orientations. Furthermore, the device may also include other orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptive terms used herein will be interpreted accordingly.

[0047] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that when the terms “comprise” and / or “comprising” are used in this specification, the presence of the stated feature, integer, step, operation, element, and / or part is established, but the presence or addition of one or more other features, integers, steps, operations, elements, parts, and / or groups is not excluded. Meanwhile, when used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0048] When used here, "deposition" processes include, but are not limited to, physical vapor deposition (PVD), chemical vapor deposition (CVD), or atomic layer deposition (ALD).

[0049] Embodiments of the invention are described herein with reference to cross-sectional views illustrating ideal embodiments (and intermediate structures) of the invention, thus allowing for variations in the illustrated shape due to, for example, manufacturing techniques and / or tolerances. Therefore, embodiments of the invention should not be limited to the specific shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing techniques. For instance, implantation regions shown as rectangular typically have rounded or curved features at their edges and / or implantation concentration gradients, rather than a binary change from implantation regions to non-implantation regions. Similarly, the buried regions formed by implantation can result in some implantation in the region between the buried region and the surface traversed during implantation. Therefore, the regions shown in the figures are substantially schematic, and their shapes do not represent the actual shapes of regions of the device and do not limit the scope of the invention.

[0050] Micro LED display technology refers to a display technology that uses self-emissive, micrometer-sized LEDs as light-emitting pixel units, assembling them onto a driving panel to form a high-density LED array. Due to the small size, high integration, and self-emissive nature of micro LED chips, they offer significant advantages over LCD and OLED displays in terms of brightness, resolution, contrast ratio, energy consumption, lifespan, response speed, and thermal stability. They are considered the mainstream direction for future display technology and have immense application potential in VR / AR, high-definition, flexible, and wearable display fields.

[0051] The key obstacle to the mass production of Micro LED display technology lies in mass transfer technology. Traditional mass transfer technology requires transferring a large number of Micro LED chips from the growth substrate to the display backplane in batches and multiple times. After the transfer, the chips also need to be inspected and repaired. Because the feature size of Micro LED chips is less than 100μm and the number of chips that need to be transferred is large, traditional mass transfer technology is severely limited by transfer accuracy, transfer efficiency, inspection difficulty, and repair difficulty.

[0052] Therefore, how to make Micro LED chips easy to transfer is an urgent problem to be solved.

[0053] Therefore, this application aims to provide a solution that can solve the above-mentioned technical problems, the details of which will be described in subsequent embodiments.

[0054] For reference Figure 1 This is a schematic flowchart illustrating a method for manufacturing a light-emitting component according to this application. The manufacturing method may include steps S100-S600.

[0055] Step S100: A temporary transposition structure is provided; wherein the temporary transposition structure includes a first substrate, a metal layer, a bonding adhesive layer and an epitaxial structure arranged sequentially; the epitaxial structure is bonded to the metal layer through the bonding adhesive layer;

[0056] Step S200: The epitaxial structure is patterned to form multiple mutually separated island-shaped epitaxial layers; wherein the bonding adhesive layer between adjacent island-shaped epitaxial layers is exposed.

[0057] Step S300: On the basis of the island-shaped epitaxial layer, a chip fabrication process is performed to obtain multiple independent light-emitting chips;

[0058] Step S400: Remove the bonding adhesive layer between adjacent light-emitting chips to expose the metal layer;

[0059] Step S500: Etching the exposed metal layer; wherein, metal debris generated from etching the metal layer accumulates along the sidewall of the bonding adhesive layer, and the accumulated metal film layer contacts the side of the light-emitting chip;

[0060] Step S600: Remove the remaining portion of the bonding adhesive layer.

[0061] The above-described method for fabricating the light-emitting component involves obtaining multiple independent light-emitting chips through chip fabrication on a temporary transposed structure. Then, the bonding adhesive layer between adjacent light-emitting chips is removed, and the exposed metal layer is etched. Metal debris generated during etching accumulates along the sidewalls of the bonding adhesive layer, forming a metal film that contacts the sidewalls of the light-emitting chips. Finally, the remaining bonding adhesive layer (i.e., the bonding adhesive layer between the metal film layers) is removed, resulting in a metal film layer containing a cavity. This metal film layer has a small contact area with the sidewalls of the light-emitting chips, facilitating subsequent disconnection and making the light-emitting chips easier to transfer. In essence, the purpose of transferring the epitaxial structure to the first substrate via the bonding adhesive layer and metal layer is primarily to replace the original substrate of the epitaxial structure. This application ingeniously utilizes this substrate replacement process. During chip fabrication, the bonding adhesive layer and metal layer are not etched apart. Instead, they are etched after the chip is fabricated to create the weakened structure. This not only completes the chip fabrication but also the creation of the weakened structure. As a result, when transferring these light-emitting chips, it is only necessary to disconnect the contact portion between the metal film layer and the side of the light-emitting chip, thereby improving the transfer efficiency of the light-emitting chips.

[0062] For specific details, please refer to the following: Figures 4-11 , for the corresponding Figure 1 A schematic diagram illustrating the structural changes of the Chinese method. (See diagram below.) Figure 4 As shown, the temporary transposition structure provided in this application may include a first substrate 10, a metal layer 20, a bonding adhesive layer 30, and an epitaxial structure 40 arranged sequentially. The epitaxial structure 40 is bonded to the metal layer 20 through the bonding adhesive layer 30. The specific bonding process and method will be described in subsequent embodiments and are omitted here for now. The first substrate 10 may be a transparent substrate, and the material of the transparent substrate includes inorganic materials or III-V semiconductor materials. Inorganic materials include silicon carbide (SiC), germanium (Ge), sapphire, lithium aluminate (LiAlO2), zinc oxide (ZnO), glass, or quartz. III-V semiconductor materials include indium phosphide (InP), gallium phosphide (GaP), gallium nitride (GaN), and aluminum nitride (AlN). The first substrate 10 should have sufficient strength to mechanically support the epitaxial layer and be able to transmit light emitted from the epitaxial layer. The thickness of the first substrate 10 may be 50 μm or more. The metal layer 20 may be either platinum or gold. The bonding adhesive layer 30 may include any one of silicon dioxide, benzocyclobutene, and polyimide. The epitaxial structure 40 may include, but is not limited to, a first conductive semiconductor layer (not shown), an active layer (not shown), and a second conductive semiconductor layer (not shown), wherein the polarities of the first semiconductor layer and the second semiconductor layer are opposite.

[0063] For example, the main difference between the first and second conductivity semiconductor layers lies in the concentration of charge carriers (holes and electrons). Specifically, the first conductivity semiconductor layer can have electrons as the majority charge carriers and holes as the minority charge carriers; in other words, the first conductivity semiconductor layer mainly conducts electricity through electrons. The second conductivity semiconductor layer can have holes as the majority charge carriers and electrons as the minority charge carriers; in other words, the second conductivity semiconductor layer mainly conducts electricity through holes. Conversely, the first conductivity semiconductor layer can also have holes as the majority charge carriers and electrons as the minority charge carriers; that is, the first conductivity semiconductor layer mainly conducts electricity through holes. Similarly, the second conductivity semiconductor layer can also have electrons as the majority charge carriers and holes as the minority charge carriers; that is, the second conductivity semiconductor layer mainly conducts electricity through electrons. Furthermore, the main reason for the difference in carrier concentration between the first and second conductive semiconductor layers lies in their different doping types. Taking the first conductive semiconductor layer as an example where conduction is via electrons and the second conductive semiconductor layer is via holes: to achieve this, the first conductive semiconductor layer can use group 5 elements such as nitrogen, phosphorus, arsenic, and tellurium as dopants. In addition, silicon and germanium have also been identified as suitable dopants for the first conductive semiconductor layer. The second conductive semiconductor layer can use group 3 elements such as boron, aluminum, gallium, and indium as dopants. In addition, magnesium and carbon have also been identified as suitable dopants for the second conductive semiconductor layer. It is understood that specific doping processes and doping concentrations can be understood by referring to existing processes; this part is not the focus of this application, and will not be elaborated further here.

[0064] The active layer can be a single heterostructure (SH), a double heterostructure (DH), a double-side double heterostructure (DDH), or a multi-quantum well (MQW).

[0065] For example, taking an N-type semiconductor layer as the first conductivity semiconductor layer and a P-type semiconductor layer as the second conductivity semiconductor layer, the N-type or P-type semiconductor layer can be a III-V group compound semiconductor material such as GaN, AlGaN, InGaN, AlInP, GaInP, or AlGaInP. The active layer can be a multiple quantum well (MQW) structure. Specifically, the quantum wells or quantum layers of the multiple quantum well structure can be InGaN, AlGaN, InN, InAlN, AlInGaN, etc., while the quantum barriers alternately stacked with the quantum well layers can be GaN, AlN, AlGaN, AlInGaN, InAlN, etc.; the multiple quantum well structure can include one, two, three, four, five, six, six, seven, or eight quantum wells (or at least one quantum hole); the wavelength emitted by the active layer can be a wavelength in the blue light band, a wavelength in the green light band, or a wavelength in the red light band, and this application embodiment does not specifically limit it.

[0066] It is understood that the epitaxial structure 40 may further include an ohmic contact layer, a hole blocking layer, an electron blocking layer, a buffer layer, a stress relief layer, etc. The aforementioned ohmic contact layer, hole blocking layer, electron blocking layer, buffer layer, and stress relief layer can be set with reference to the existing LED arrangement positions, and this application will not elaborate further.

[0067] Further reading is available. Figure 2 Also for supplementary reference Figures 12-15 Step S100 may include sub-steps S110-S160.

[0068] Step S110: Provide the first substrate;

[0069] Step S120: The metal layer is formed on the surface of the first substrate;

[0070] Step S130: Provide a second substrate including the epitaxial structure;

[0071] Step S140: Deposit a bonding adhesive layer on the side of the epitaxial structure opposite to the second substrate;

[0072] Step S150: Bond the bonding adhesive layer to the metal layer;

[0073] Step S160: Remove the second substrate.

[0074] In this specific embodiment, the second substrate SB can be a growth substrate. As an example, the material that can be used as the growth substrate can be a transparent material, which includes inorganic materials or III-V semiconductor materials. Inorganic materials include silicon carbide (SiC), germanium (Ge), sapphire, lithium aluminate (LiAlO2), zinc oxide (ZnO), glass, or quartz. III-V semiconductor materials include indium phosphide (InP), gallium phosphide (GaP), gallium nitride (GaN), and aluminum nitride (AlN).

[0075] When the second substrate SB is made of an inorganic material, such as sapphire, laser lift-off technology can be used to separate the second substrate SB from the epitaxial structure 40. Laser lift-off technology utilizes a high-energy pulsed laser beam to penetrate the substrate. The photon energy is between the substrate bandgap and the epitaxial bandgap, uniformly scanning the interface between the substrate and the epitaxial material. The epitaxial layer absorbs a large amount of photon energy and decomposes, thus achieving separation between the substrate and the epitaxial layer. However, laser lift-off technology can damage the interface between the epitaxial layer and the substrate, leading to damage to the epitaxial material or the surface of the LED chip. Therefore, after laser lift-off of the second substrate SB, to repair the damage caused by laser lift-off, further dry etching or wet etching methods can be used to remove the damage to the surface of the epitaxial structure 40 caused by laser irradiation.

[0076] Through the above process, the substrate of the epitaxial structure 40 can be replaced, and the epitaxial structure 40 can be bonded to the first substrate 10, providing a foundation for subsequent chip manufacturing processes.

[0077] See also Figure 5 After the aforementioned temporary transpose structure is fabricated, the epitaxial structure 40 can be patterned to form multiple separated island-shaped epitaxial layers 410, exposing the bonding adhesive layer 30 between adjacent island-shaped epitaxial layers 410. The island-shaped epitaxial layers 410 formed here primarily undergo a step-etching (MESA) process. The MESA process includes, but is not limited to, performing one, two, or three photolithography and etching processes. The photolithography process includes operations such as coating, exposure, and development. The photoresist used in the photolithography process can be positive or negative. The etching process can include dry etching and wet etching. It should be understood that at this stage, the island-shaped epitaxial layers 410 have only been separated at the epitaxial level, exposing the bonding adhesive layer 30 between adjacent island-shaped epitaxial layers 410; the channel etching (ISO) process has not yet been performed to achieve chip separation.

[0078] Furthermore, after forming multiple separate island-shaped epitaxial layers 410, chip manufacturing processes can be performed on this basis to obtain multiple independent light-emitting chips (not shown in the figure).

[0079] Specifically, chip fabrication is performed on the island-shaped epitaxial layer 410, which can be referred to as Figure 3 The chip manufacturing process may include the following steps S310-S330;

[0080] Step S310: Deposit a passivation layer on the island-shaped epitaxial layer and the bonding adhesive layer;

[0081] Step S320: The passivation layer on the island-shaped epitaxial layer is patterned to expose a portion of the surface of the island-shaped epitaxial layer.

[0082] Step S330: Fabricate chip electrodes on the exposed surface of the island-shaped epitaxial layer.

[0083] For specific details, please refer to the following: Figures 6-8 A passivation layer 510 is deposited on the island-shaped epitaxial layer 410 and the bonding adhesive layer 30. The material of the passivation layer 510 includes, but is not limited to, polyimide (PI), benzocyclobutene (BCB), perfluorocyclobutane (PFCB), magnesium oxide (MgO), Su8, epoxy resin, acrylic resin, cyclic olefin polymer (COC), polymethyl methacrylate (PMMA), polyethylene terephthalate (PET), polycarbonate (PC), polyetherimide, fluorocarbon polymer, glass, alumina (Al2O3), and silicon oxide (SiO2). x Titanium oxide (TiO) x ), tantalum oxide (Ta2O5), silicon nitride (SiN) x ) or spin-coated glass (SOG).

[0084] The passivation layer 510 is then patterned to expose a portion of the surface of the island-shaped epitaxial layer 410. Specifically, the patterning process includes, but is not limited to, performing one, two, or three photolithography and etching processes. The photolithography process includes operations such as coating, exposure, and development. The photoresist used in the photolithography process can be positive or negative. The etching process can include dry etching and wet etching. After patterning the passivation layer 510, an opening H is obtained. The opening H can be circular, but in some other embodiments, it can be square, annular, or finger-shaped. Furthermore, the shape and number of openings H are not particularly limited; there can be only one opening. If multiple openings are provided, the current can be distributed more evenly. In addition, in some other embodiments, when multiple openings are provided, the openings can be distributed in an equidistant or non-equidistant manner according to actual needs, and are not limited to the embodiments disclosed in this invention. Openings H are respectively formed on the passivation layers 510 corresponding to the first and second conductive semiconductor layers. After the passivation layers 510 are patterned, chip electrodes M can be fabricated through these openings H. The chip electrode M can be at least one selected from chromium, aluminum, titanium, platinum, gold, nickel, beryllium, and tungsten. Furthermore, the chip electrode M can be a multilayer metal stack structure. For example, the multilayer metal stack structure can be any combination of aluminum, titanium, platinum, gold, nickel, beryllium, and tungsten, or an alloy containing these materials may also be included. When further considering the electrode's push-pull resistance and anti-tin crosstalk capability, copper can also be considered as part of the multilayer metal stack structure; for example, a copper-aluminum alloy can replace the aluminum layer in a conventional multilayer metal stack structure.

[0085] See also Figure 9 Once the chip manufacturing is complete, multiple chips can be separated at the chip level.

[0086] Specifically, the bonding adhesive layer 30 between adjacent light-emitting chips can be removed using, for example, a wet etching technique. The chemical reagent used in wet etching can be a BOE solution. It is understood that since a passivation layer 510 also exists on the bonding adhesive layer 30 between adjacent light-emitting chips, the passivation layer 510 can be removed first using a dry etching process before removing the bonding adhesive layer 30. Because the bonding adhesive layer 30 and the metal layer 20 are made of different materials, the chemical reagent used here cannot react with the metal layer 20.

[0087] Further reading is available. Figure 10The exposed metal layer 20 can be etched using a dry etching process, such as ICP etching. Since the metal layer 20 uses inert metals such as Pt or Au, and the ICP etching process primarily involves physical bombardment, the metal debris generated by the bombardment is not easily removed by the ICP vacuum system and ultimately adheres to the sidewalls of the bonding adhesive layer 30, accumulating along the sidewalls until it contacts the side of the light-emitting chip, forming a metal film layer 210, also known as a metal fence. The thickness of this metal film layer 210 varies depending on the metal layer thickness and etching size, and the height of the metal film layer 210 varies depending on the etching power parameters. For example, in this specific embodiment, the thickness of the metal film layer 210 is typically 10nm-100nm, and the height is 0.5um-2um. As an example, the thickness and height of the metal film layer 210 can be selected within the aforementioned ranges according to actual conditions. For example, the thickness of the metal film 210 can be 10 nm, or 20 nm, or 30 nm, or 40 nm, or 50 nm, or 60 nm, or 70 nm, or 80 nm, or 90 nm, or 100 nm. The thickness of the metal film 210 can also be 15 nm, or 25 nm, or 35 nm, or 45 nm, or 55 nm, or 65 nm, or 75 nm, or 85 nm, or 95 nm. Further, the height of the metal film 210 can be 0.5 μm, or 0.6 μm, or 0.7 μm, or 0.8 μm, or 0.9 μm, or 1 μm, or 1.1 μm, or 1.3 μm, or 1.5 μm, or 1.7 μm. The height of the metal film layer 210 can also be 0.55 μm, or 0.65 μm, or 0.75 μm, or 0.85 μm, or 0.95 μm, or 1.05 μm, or 1.15 μm, or 1.35 μm, or 1.55 μm, or 1.75 μm.

[0088] It is understandable that when removing the bonding adhesive layer 30, passivation layer 510, and metal layer 20 between adjacent light-emitting chips, an etch protection layer can be deposited first on the chip electrode M to protect the light-emitting chip. The aforementioned removal process of the bonding adhesive layer 30, passivation layer 510, and metal layer 20 between adjacent light-emitting chips is equivalent to the channel etching (ISO) process in traditional chip manufacturing, thereby achieving device separation at the chip level.

[0089] See also Figure 11 After the metal film layer 210 is fabricated, the remaining bonding adhesive layer 310 can be removed by wet etching process, so that the light-emitting chip and the metal film layer 210 are enclosed to form a cavity (not shown in the figure), and the final light-emitting component is obtained.

[0090] Based on the same inventive concept, further reference can be made. Figure 16 This application also provides a light-emitting component LS, which is manufactured using the light-emitting component manufacturing method described above.

[0091] The light-emitting component LS described above, being manufactured using the aforementioned manufacturing method, possesses the beneficial effects described in the aforementioned manufacturing method, namely, the obtained light-emitting component LS is more convenient for subsequent mass transfer and can improve mass transfer efficiency.

[0092] The light-emitting component in this application may sequentially include a first substrate 10, a metal film layer 210, and a light-emitting chip. The light-emitting chip includes a chip electrode M, an island-shaped epitaxial layer 410, and a passivation layer 510. The side of the light-emitting chip contacts the metal film layer 210, thereby enclosing and forming a cavity. It is understood that the first substrate 10, chip electrode M, island-shaped epitaxial layer 410, and passivation layer 510 can be described with reference to the foregoing embodiments, and will not be further elaborated here.

[0093] In one embodiment, the material of the metal layer 20 includes platinum or gold.

[0094] Furthermore, the thickness of the metal film layer 210 ranges from 10 nm to 100 nm; the height of the metal film layer 210 ranges from 0.5 μm to 2 μm. As an example, the thickness and height of the metal film layer 210 can be selected within the aforementioned ranges according to actual conditions. For example, the thickness of the metal film layer 210 can be 10 nm, or 20 nm, or 30 nm, or 40 nm, or 50 nm, or 60 nm, or 70 nm, or 80 nm, or 90 nm, or 100 nm. The thickness of the metal film layer 210 can also be 15 nm, or 25 nm, or 35 nm, or 45 nm, or 55 nm, or 65 nm, or 75 nm, or 85 nm, or 95 nm. Furthermore, the height of the metal film layer 210 can be 0.5 μm, or 0.6 μm, or 0.7 μm, or 0.8 μm, or 0.9 μm, or 1 μm, or 1.1 μm, or 1.3 μm, or 1.5 μm, or 1.7 μm. The height of the metal film layer 210 can also be 0.55 μm, or 0.65 μm, or 0.75 μm, or 0.85 μm, or 0.95 μm, or 1.05 μm, or 1.15 μm, or 1.35 μm, or 1.55 μm, or 1.75 μm.

[0095] In one embodiment, the material of the bonding adhesive layer 30 may include any one of silica, benzocyclobutene, and polyimide.

[0096] Based on the same inventive concept, see [reference needed] Figure 16-18 This application also provides a mass transfer method, which may include the following steps:

[0097] Provide the light-emitting component as described above and a driving backplate;

[0098] The chip electrodes of the light-emitting chip are aligned and bonded to the pads of the driving backplane; and

[0099] Pressure is applied from one side of the first substrate to disconnect the metal film from the light-emitting chip.

[0100] Specifically, after obtaining the corresponding light-emitting component LS according to the aforementioned light-emitting component manufacturing method, the light-emitting component LS can be aligned and bonded to a driving backplane BM. This mainly involves aligning and bonding the chip electrode M in the light-emitting chip with the pads (not shown) of the driving backplane BM. The alignment and bonding method and standards can be performed with reference to existing technologies, and will not be further elaborated in this application. After the alignment and bonding are completed, a certain pressure can be applied from one side of the first substrate 10 to disconnect the metal film layer 210 from the light-emitting chip, thereby leaving the transferred light-emitting device LM on the driving backplane BM. Subsequently, only the chip electrode M and the pads need to be soldered.

[0101] It is understandable that before disconnecting the metal film layer 210 from the light-emitting chip, since the chip electrode M is in contact with the pad, the driving backplane BM can still be energized to identify the bad chip. When disconnecting later, the corresponding bad chip will not be disconnected. To achieve this, the first substrate 10 can be made of a material with a certain elasticity or flexibility.

[0102] Furthermore, the drive backplane BM of this application is provided with a drive circuit (not shown) and pads. The drive circuit and the pads are electrically connected. Depending on the drive method, the drive circuit can be an active matrix (AM) circuit or a passive matrix (PM) circuit.

[0103] Alternatively, in this specific embodiment, the light-emitting component LS provided to the giant transfer node can also be a light-emitting component LS with the remaining portion of the bonding adhesive layer 310 still attached. When the corresponding giant transfer node receives the light-emitting component LS, it can use chemical reagents to remove the remaining portion of the bonding adhesive layer 310 before performing the transfer operation. This is done to improve the reliability and stability of the connection between the light-emitting chip and the metal film layer 210, and to prevent the light-emitting chip from detaching before the product even arrives at the giant transfer node (during transportation).

[0104] It should be understood that the application of the present invention is not limited to the examples above. Those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.

Claims

1. A method for manufacturing a light-emitting component, characterized in that, The method comprises the following steps: providing a temporary transfer structure, wherein the temporary transfer structure comprises a first substrate, a metal layer, a bonding glue layer and an epitaxial structure arranged in sequence, and the epitaxial structure is combined with the metal layer through the bonding glue layer; performing a patterning process on the epitaxial structure to form a plurality of island-shaped epitaxial layers separated from each other, wherein the bonding glue layer between adjacent island-shaped epitaxial layers is exposed; performing a chip process on the basis of the island-shaped epitaxial layers to obtain a plurality of independent light-emitting chips; removing the bonding glue layer between adjacent light-emitting chips to expose the metal layer; performing etching on the exposed metal layer, wherein the metal debris generated by etching the metal layer accumulates along the sidewall of the bonding glue layer, and the metal film layer formed by accumulation is in contact with the side surface of the light-emitting chip; and removing the remaining part of the bonding glue layer.

2. The method of claim 1, wherein the step of forming the light emitting assembly further comprises the step of: The method for manufacturing the temporary transfer structure comprises the following steps: ​ providing the first substrate; forming the metal layer on the surface of the first substrate; providing a second substrate comprising the epitaxial structure; depositing a bonding glue layer on the side of the epitaxial structure away from the second substrate; bonding the bonding glue layer with the metal layer; and removing the second substrate.

3. The method of claim 1, wherein the step of forming the light emitting assembly further comprises the step of: forming a plurality of light emitting diodes on the substrate. The chip process comprises the following steps: depositing a passivation layer on the island-shaped epitaxial layer and the bonding glue layer; performing a patterning process on the passivation layer on the island-shaped epitaxial layer to expose part of the surface of the island-shaped epitaxial layer; and manufacturing a chip electrode on the exposed surface of the island-shaped epitaxial layer.

4. The method of claim 1, wherein the light emitting assembly is a light emitting diode (LED) assembly. The bonding glue layer is removed by using a chemical etching method.

5. The method of claim 1, wherein the light emitting assembly is a light emitting diode (LED) assembly. The exposed metal layer is etched by using a dry etching process.

6. A light emitting assembly characterized by, The light-emitting component is manufactured by using the method for manufacturing the light-emitting component according to any one of claims 1-5.

7. The light emitting assembly of claim 6, wherein, The thickness of the metal film layer ranges from 10 nm to 100 nm, and the height of the metal film layer ranges from 0.5 μm to 2 μm.

8. A light emitting assembly as claimed in any of claims 6-7, characterized in that The material of the bonding glue layer comprises any one of silicon dioxide, benzocyclobutene and polyimide.

9. A light emitting assembly as claimed in any of claims 6-7, characterized in that The material of the metal layer comprises platinum or gold.

10. A mass transfer method characterized by, The method comprises the following steps: providing a light-emitting component according to any one of claims 6-9 and a driving back plate; aligning and adhering the chip electrode of the light-emitting chip with the pad of the driving back plate; and applying pressure from the side of the first substrate to disconnect the metal film layer from the light-emitting chip. ​

Citation Information

Patent Citations

  • Display panel, manufacturing method thereof and display device

    CN112993139A

  • Transfer method of light emitting diode chip, temporary substrate and display assembly

    CN115588679A