Semiconductor device and method of manufacturing the same

Abstract

Provided is a semiconductor device having a field plate connected to a guard ring formed in a termination region via a barrier metal layer, wherein the semiconductor device is capable of suppressing the residue of the barrier metal layer. The termination region (22) has: a semiconductor substrate (1) of a first conductivity type; and a plurality of guard rings (2) of a second conductivity type. The first electrode is formed on a semiconductor substrate. An insulating film (3) in contact with the semiconductor substrate and the guard ring and having an opening at a position overlapping the guard ring; a plurality of barrier metal layers (4) which are formed at least in the opening of the insulating film, are in contact with the guard ring, and are arranged at intervals from each other; and a plurality of field plates (5) which have an outer shape outside the outer shape of the barrier metal layer in plan view, are in contact with the upper surface of the barrier metal layer and the upper surface of the insulating film, and are arranged at intervals from each other.

Description

Technical Field

[0001] The present invention relates to a semiconductor device and a method for manufacturing the same. Background Art

[0002] A semiconductor device such as a power semiconductor includes an active region where a main current flows in a semiconductor element formed therein, and a termination region formed around the active region for maintaining a withstand voltage.

[0003] As a structure of the termination region, for example, Patent Document 1 describes a structure including a guard ring (p layer) and an electrode (also referred to as a field electrode or a field plate) connected to the guard ring via a barrier metal layer.

[0004] More specifically, in the patent literature Figure 1 , Figure 2 The following technology is recorded in the abstract: "A high-voltage power semiconductor device having a terminal region formed by a guard ring, characterized in that an active region is joined to a first electrode via a first barrier metal layer, the guard ring is joined to a second electrode via a second barrier metal layer, and a channel limiting portion is joined to a third electrode via a third barrier metal layer. The barrier metal layers are respectively arranged at intervals, and in a direction crossing the terminal region, the width of each barrier metal layer (first to third barrier metal layers) is wider than the width of each electrode joined (first to third electrodes), and a portion of each barrier metal layer is exposed from both sides of the joined electrodes in the direction crossing." Thus, "a semiconductor device that can take into account both high voltage resistance and miniaturization in a power semiconductor device is provided."

[0005] Prior art literature

[0006] Patent Literature

[0007] Patent Document 1: Japanese Patent Application Publication No. 2010-251404 Summary of the invention

[0008] Problems to be solved by the invention

[0009] However, in order to realize the structure described in Patent Document 1, in Patent Document 1, as described in Patent Document 1 Figure 3 As shown, after forming a thin film for forming a barrier metal layer and a metal layer for forming electrodes such as field electrodes, the metal layer is patterned by wet etching using a photoresist to form an electrode, and the thin film is patterned by anisotropic dry etching using the same photoresist to form a barrier metal layer.

[0010] Therefore, when the opening of the photomask is insufficient due to foreign matter or the wet etching is insufficient, the barrier metal layer under the field electrode or other electrodes is not sufficiently etched and may remain as residue between the electrodes. If the barrier metal layer remains as residue, the field electrodes are electrically connected, and the guard rings connected to the field electrodes have the same potential, resulting in a problem that a sufficient withstand voltage cannot be ensured in the terminal region.

[0011] An object of the present invention is to provide a semiconductor device having a field plate connected to a guard ring formed in a termination region via a barrier metal layer, and to provide a method for manufacturing the semiconductor device and the like, which can suppress residues of the barrier metal layer from remaining.

[0012] Solutions to Solve Problems

[0013] In order to solve the above-mentioned problems, the semiconductor device of the present invention, for example, has an active area in which a semiconductor element is formed and a terminal area surrounding the above-mentioned active area, and is characterized in that the above-mentioned terminal area has: a semiconductor substrate of a first conductivity type; a plurality of guard rings of a second conductivity type, which are formed on the above-mentioned semiconductor substrate; an insulating film, which is connected to the above-mentioned semiconductor substrate and the above-mentioned guard rings, and has an opening portion at a position overlapping with the above-mentioned guard rings; a plurality of barrier metal layers, which are formed at least in the above-mentioned opening portion of the above-mentioned insulating film, are connected to the above-mentioned guard rings, and are arranged at intervals from each other; and a plurality of field plates, whose outer shape is located outside the outer shape of the above-mentioned barrier metal layer when viewed from above, are connected to the upper surface of the above-mentioned barrier metal layer and the upper surface of the above-mentioned insulating film, and are arranged at intervals from each other.

[0014] In addition, in the manufacturing method of the semiconductor device of the present invention, the semiconductor device, for example, has an active area in which a semiconductor element is formed and a terminal area surrounding the above-mentioned active area, and the above-mentioned terminal area has: a semiconductor substrate of a first conductivity type; a plurality of guard rings of a second conductivity type, which are formed on the above-mentioned semiconductor substrate; an insulating film, which is connected to the above-mentioned semiconductor substrate and the above-mentioned guard rings and has an opening at a position overlapping with the above-mentioned guard rings; a plurality of barrier metal layers, which are connected to the above-mentioned guard rings and are arranged at intervals from each other; and a plurality of field plates, which are connected to the above-mentioned barrier metal layers and are arranged at intervals from each other. The manufacturing method of the above-mentioned semiconductor device is characterized in that the above-mentioned barrier metal layer is etched after the above-mentioned barrier metal layer is formed and before the above-mentioned field plates are formed.

[0015] Effects of the Invention

[0016] According to the semiconductor device of the present invention, since the outer shape of the barrier metal layer is located on the inner side than the field plate, even if residue remains when the barrier metal layer is patterned, the residue can be removed by etching the barrier metal layer on the outer side than the field plate again, thereby suppressing the residue of the barrier metal layer.

[0017] In addition, according to the method for manufacturing a semiconductor device of the present invention, since the barrier metal layer is etched before the field plate is formed, the residue of the barrier metal layer can be suppressed. In addition, even if residue remains when the barrier metal layer is patterned, the residue can be removed by etching the barrier metal layer again during or after etching the field plate, thereby suppressing the residue of the barrier metal layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 is a cross-sectional view of the semiconductor device of Example 1.

[0019] Figure 2 1 is a top view of the semiconductor device of Example 1.

[0020] Figure 3 It is a cross-sectional view for explaining the method for manufacturing the semiconductor device according to the first embodiment.

[0021] Figure 4 It is a cross-sectional view for explaining the method for manufacturing the semiconductor device according to the first embodiment.

[0022] Figure 5 It is a cross-sectional view for explaining the method for manufacturing the semiconductor device according to the first embodiment.

[0023] Figure 6 It is a cross-sectional view for explaining the method for manufacturing the semiconductor device according to the first embodiment.

[0024] Figure 7 It is a cross-sectional view for explaining the method for manufacturing the semiconductor device according to the first embodiment.

[0025] Figure 8 is a cross-sectional view of the semiconductor device of Example 2. DETAILED DESCRIPTION

[0026] Hereinafter, embodiments of the present invention will be described using the accompanying drawings. In each of the drawings and embodiments, the same or similar components are denoted by the same reference numerals, and repeated descriptions are omitted.

[0027] Example 1

[0028] Figure 1 is a cross-sectional view of the semiconductor device of Example 1, Figure 2 1 is a top view of the semiconductor device of Example 1. Figure 1 yes Figure 2 Sectional view in A-A.

[0029] The semiconductor device 20 of the first embodiment includes an active region 21 in which a semiconductor element is formed and a terminal region 22 surrounding the active region 21. The terminal region 22 has a first conductivity type ( Figure 1 a semiconductor substrate 1 of a second conductivity type (in Figure 1 A plurality of guard rings 2 (of p-type in the embodiment), an insulating film 3, a barrier metal layer 4, and a field plate 5.

[0030] exist Figure 1 In the example, the case where the semiconductor element formed in the active region 21 is an IGBT (Insulated Gate Bipolar Transistor) is used for explanation. Therefore, the active region 21 has a drift layer composed of a semiconductor substrate 1, a main layer 6 of the second conductivity type that serves as a main bonding layer, a barrier metal layer 4 formed in contact with the main layer 6, a surface side main electrode 7 formed in contact with the barrier metal layer 4, a buffer layer 8 of the first conductivity type formed on the back side of the semiconductor substrate 1, a collector layer 9 of the second conductivity type, and a back side main electrode 10. In addition, there is also a case where the buffer layer 8 is omitted. In addition, the active region 21 has a gate electrode, a gate, and a gate insulating film, but they are omitted from the illustration. In Figure 1 In , the impurity concentration of the semiconductor substrate 1 is low, so it is recorded as n-. Figure 1 In the embodiment, the first conductivity type is set to n-type and the second conductivity type is set to p-type, but the first conductivity type may be set to p-type and the second conductivity type may be set to n-type.

[0031] Furthermore, the semiconductor element may be a MOSFET (Metal Oxide Semiconductor Field Effect Transistor). In this case, a first conductivity type drain layer is formed instead of the second conductivity type collector layer 9 .

[0032] In addition, the semiconductor element may be a diode element instead of a switching element such as an IGBT, a MOSFET, etc. In this case, a cathode layer of the first conductivity type is formed instead of the collector layer 9 of the second conductivity type.

[0033] Next, the structure of the terminal region 22 of the first embodiment will be described in detail.

[0034] A plurality of guard rings 2 are formed at intervals from each other.

[0035] The insulating film 3 is in contact with the semiconductor substrate 1 and the guard ring 2 , and has an opening at a position overlapping with the guard ring 2 .

[0036] The barrier metal layer 4 is formed in plurality, arranged at intervals from each other, and is formed at least in the opening of the insulating film 3 and in contact with the guard ring 2. In Embodiment 1, the barrier metal layer 4 is also formed on the upper surface of the insulating film 3. The barrier metal layer 4 can be formed of, for example, any one of Ti, TiN, TiW, and MoSi2. The barrier metal layer 4 has the function of preventing the metal (e.g., Al) contained in the field plate 5 from diffusing into the semiconductor layer (e.g., Si) constituting the guard ring 2. Therefore, it is desirable that the barrier metal layer 4 is formed in the opening of the insulating film 3 in the entire region overlapping with the guard ring 2.

[0037] A plurality of field plates 5 are formed, arranged at intervals from each other, and the outer shape when viewed from above is located outside the outer shape of the barrier metal layer 4, and is in contact with the upper surface of the barrier metal layer 4 and the upper surface of the insulating film 3. The field plate 5 can be formed of, for example, any one of Al, AlSi, AlCu, and AlSiCu. In Example 1, the barrier metal layer 4 is also formed on the upper surface of the insulating film 3, so the field plate 5 is also in contact with the side surface of the barrier metal layer 4 on the upper surface of the insulating film 3.

[0038] According to the above structure, the intervals between the field plates 5 are smaller than the intervals between the barrier metal layers 4. In addition, the ends of the barrier metal layers 4 are located inside the ends of the field plates 5. Furthermore, the barrier metal layers 4 are entirely covered by the field plates 5 and are not exposed.

[0039] According to the semiconductor device 20 of the first embodiment, since the outer shape of the barrier metal layer 4 is located on the inner side than the field plate 5, even if residue remains when the barrier metal layer 4 is patterned, the residue can be removed by etching the barrier metal layer on the outer side of the field plate 5 again, thereby suppressing the residue of the barrier metal layer 4.

[0040] If the barrier metal layer 4 remains as residue, the field plates 5 are electrically connected to each other, and the guard rings 2 connected to the field plates 5 are at the same potential, which causes a problem that a sufficient withstand voltage cannot be ensured in the terminal region 22. In contrast, according to the semiconductor device 20 of the first embodiment, since the outer shape of the barrier metal layer 4 is located inside the field plate 5 and the residue of the barrier metal layer 4 can be suppressed, the occurrence of this problem can be suppressed.

[0041] Next, a method for manufacturing the semiconductor device 20 of Example 1 will be described. The semiconductor device 20 of Example 1 can be formed by etching the barrier metal layer 4 after forming the barrier metal layer 4 and before forming the field plate 5 .

[0042] Figures 3 to 7 This is a cross-sectional view for explaining the method for manufacturing the semiconductor device according to Example 1. In addition, only the front side is explained here, and the illustration and explanation of the back side are omitted.

[0043] First, if Figure 3 As shown, impurities of the second conductivity type are implanted into the semiconductor substrate 1 to form the guard ring 2 and the body layer 6. Then, after the insulating film 3 is formed, openings are formed at necessary locations.

[0044] Then, if Figure 4 As shown, a metal layer serving as the barrier metal layer 4 is formed by sputtering or evaporation.

[0045] Then, if Figure 5 As shown, the barrier metal layer 4 is processed by etching using a photoresist 11. By etching the barrier metal layer 4 before forming the field plate 5, it is possible to suppress the residue of the barrier metal layer 4 and process the barrier metal layer 4 so that the outer shape of the barrier metal layer 4 is located inside the outer shape of the field plate 5.

[0046] Then, if Figure 6 As shown, a metal layer serving as the field plate 5 is formed by sputtering or evaporation.

[0047] Then, if Figure 7 As shown in FIG. 1 , the field plate 5 is processed by etching using a photoresist 11. At this time, the field plate 5 is processed in such a way that the outer shape of the field plate 5 is located outside the outer shape of the barrier metal layer 4 when viewed from above. As a result, the interval between the plurality of field plates 5 is smaller than the interval between the plurality of barrier metal layers 4. Then, by removing the photoresist 11, a Figure 1 The structure shown.

[0048] In addition, Figure 7 After the steps shown, even if residues remain when the barrier metal layer 4 is patterned, the residues can be removed by etching the barrier metal layer 4 again during or after etching the field plate 5. This can suppress residues in the barrier metal layer 4 from remaining.

[0049] Example 2

[0050] Embodiment 2 is a modified example of Embodiment 1. In Embodiment 2, the description will be mainly focused on the points different from Embodiment 1, and duplicate description will be omitted.

[0051] Figure 8 is a cross-sectional view of the semiconductor device of Example 2.

[0052] The semiconductor device 20 of the second embodiment is different from the first embodiment in that the barrier metal layer 4 is not formed on the upper surface of the insulating film 3. In other words, it is formed only in the opening of the insulating film 3. The manufacturing method is substantially the same as the first embodiment except that the patterning of the barrier metal layer 4 is different. The second embodiment can also achieve the same effect as the first embodiment.

[0053] Although the embodiments of the present invention have been described above, the present invention is not limited to the structures described in the embodiments, and various changes can be made within the scope of the technical concept of the present invention. In addition, some or all of the structures described in the embodiments can also be combined for application.

[0054] Explanation of symbols

[0055] 1—semiconductor substrate, 2—guard ring, 3—insulating film, 4—barrier metal layer, 5—field plate, 6—main layer, 7—surface-side main electrode, 8—buffer layer, 9—collector layer, 10—back-side main electrode, 11—photoresist, 12—electrode layer, 20—semiconductor device, 21—active region, 22—terminal region.

Claims

1. A semiconductor device comprising an active region in which a semiconductor element is formed and a terminal region surrounding the active region, characterized in that: The above terminal area has: a semiconductor substrate of a first conductivity type; A plurality of guard rings of the second conductivity type formed on the semiconductor substrate; an insulating film which is in contact with the semiconductor substrate and the guard ring and has an opening at a position overlapping with the guard ring; a plurality of barrier metal layers formed at least in the opening of the insulating film, in contact with the guard ring, and arranged at intervals from each other; as well as A plurality of field plates have an outer shape outside the outer shape of the barrier metal layer in a plan view, are in contact with an upper surface of the barrier metal layer and an upper surface of the insulating film, and are arranged at intervals from each other.

2. The semiconductor device according to claim 1, wherein: The barrier metal layer is also formed on the upper surface of the insulating film. The field plate is in contact with a side surface of the barrier metal layer on an upper surface of the insulating film.

3. The semiconductor device according to claim 1, wherein: The barrier metal layer is not formed on the upper surface of the insulating film.

4. The semiconductor device according to claim 1, wherein: The barrier metal layer is formed in the opening of the insulating film over the entire region overlapping with the guard ring.

5. The semiconductor device according to claim 1, wherein: The barrier metal layer is formed of any one of Ti, TiN, TiW, and MoSi2.

6. The semiconductor device according to claim 1, wherein: The intervals between the plurality of field plates are smaller than the intervals between the plurality of barrier metal layers.

7. The semiconductor device according to claim 1, wherein: The above-mentioned semiconductor element is a switching element.

8. The semiconductor device according to claim 1, wherein: The semiconductor element is a diode element.

9. A method for manufacturing a semiconductor device, the semiconductor device comprising an active region in which a semiconductor element is formed and a terminal region surrounding the active region, the terminal region comprising: a semiconductor substrate of a first conductivity type; a plurality of guard rings of a second conductivity type formed on the semiconductor substrate; an insulating film in contact with the semiconductor substrate and the guard rings and having an opening at a position overlapping with the guard rings; a plurality of barrier metal layers in contact with the guard rings and arranged at intervals from each other; and a plurality of field plates in contact with the barrier metal layers and arranged at intervals from each other, The method for manufacturing the semiconductor device is characterized in that: After the barrier metal layer is formed and before the field plate is formed, the barrier metal layer is etched.

10. The method for manufacturing a semiconductor device according to claim 9, wherein: The intervals between the plurality of field plates are smaller than the intervals between the plurality of barrier metal layers.

11. The method for manufacturing a semiconductor device according to claim 9, wherein: During or after etching the field plate, the barrier metal layer is etched again.

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