Bolt fastening stress detection system based on ultrasonic waves

Abstract

The invention discloses a bolt fastening stress detection system based on ultrasonic waves. The bolt fastening stress detection system comprises a system hardware circuit, an ultrasonic excitation probe, a to-be-detected bolt and an upper computer terminal. Based on an ultrasonic echo detection principle, a ZYNQ chip is adopted for design and development. The system hardware circuit part comprises an echo signal conditioning module, a high-speed analog-to-digital conversion module, a high-voltage power supply module, a program control digital-to-analog conversion module, an ultrasonic pulse excitation module, a temperature acquisition module, a ZYNQ control module, a serial port module, a system power supply module and an Ethernet module; the development of the software system comprises hardware logic design and application program design. In the assembling and pre-tightening process of a to-be-tested bolt, an ultrasonic excitation probe and a temperature acquisition sensor are attached to the head of the bolt, ultrasonic echo signals and temperature information are continuously acquired, data are transmitted to an upper computer terminal through the Ethernet, and the magnitude of stress borne by the bolt is inverted through ultrasonic sound time difference. According to the invention, high-precision and automatic detection of the bolt fastening stress is realized.

Description

Technical Field

[0001] The invention belongs to the field of bolt tightening stress detection, and in particular relates to an ultrasonic-based bolt tightening stress detection system. Background Art

[0002] As a universal connector, bolt fasteners are widely used in aerospace, power systems, machinery manufacturing, transportation, chemical production and other fields to improve the stability and safety of equipment and provide necessary protection for the safety of human life and property.

[0003] In the early stage of bolt tightening research and development at home and abroad, the more common bolt tightening process was to manually use simple assembly tools to judge the bolt tightening stress based on empirical values. However, due to the low efficiency and large errors of this method, this method was quickly replaced by professional assembly tools, such as torque wrenches and industrial robotic arms, which can judge the bolt stress deformation according to the torque during the assembly process. Among the different bolt tightening stress detection methods, ultrasonic detection technology is more mature and more conducive to widespread use in industrial production and manufacturing.

[0004] Ultrasonic waves, as a pioneer of non-destructive testing, can more easily, quickly and accurately measure the axial stress of bolts during bolt tightening stress testing. When ultrasonic waves propagate in the material being tested, the acoustic properties of different materials lead to differences in ultrasonic propagation characteristics. This technology of detecting changes in the internal structural characteristics of materials through ultrasonic waves is called ultrasonic testing technology. Based on the acoustic elasticity principle of ultrasonic waves propagating in metal media, the ultrasonic reflection method can calculate the axial stress change process of the tested part by measuring the ultrasonic sound time difference in the tested part, and invert the tightening stress of the fastener during the assembly process by calibrating the relationship between metal stress deformation and stress magnitude.

[0005] ZYNQ, which stands for Zynq-7000 All Programmable SoC, is a new generation of fully programmable system-on-chip launched by Xilinx. It perfectly integrates the software programmability of the processor with the hardware programmability of the FPGA to provide good system performance, flexibility and scalability. This SoC based on the ARM processor can meet the requirements of high performance, low power consumption and multi-core processing capabilities of complex embedded systems. ZYNQ can be applied to high-end embedded applications including automotive driver assistance systems, broadcast-grade cameras, factory automation, medical diagnosis and imaging, etc.

[0006] The bolt tightening stress detection instruments and equipment currently on the market are large, inconvenient to use in production and manufacturing, and the measurement accuracy is not high. Summary of the invention

[0007] Based on the above background technology, the present invention provides an ultrasonic-based bolt tightening stress detection system, which realizes high-precision and automated detection of bolt tightening stress.

[0008] The present invention discloses an ultrasonic-based bolt tightening stress detection system, which is characterized in that the system uses the ultrasonic acoustic-elastic effect to detect the bolt tightening stress;

[0009] As a detection technology, the ultrasonic wave has the following characteristics: strong penetration ability, and the detection thickness can reach several meters; high sensitivity, and can accurately measure the tightening stress of the bolt; good directivity, and can determine its propagation direction and travel trajectory inside the medium; low installation cost, and will not damage the original structure of the bolt; safe operation, and light equipment;

[0010] The ultrasonic emission and reception process is the process of transformation between piezoelectric effect and inverse piezoelectric effect. The corresponding frequency electrical signal is applied to the piezoelectric ceramic transducer, which can convert electrical energy into mechanical energy and generate mechanical oscillation. When the mechanical oscillation acts on the piezoelectric ceramic transducer, the high-frequency mechanical oscillation changes the impedance characteristics of the piezoelectric ceramic transducer, causing it to produce electrical signal changes. The greater the mechanical loss of the piezoelectric ceramic transducer, the greater the difference in signal frequency.

[0011] The acoustic-elastic effect refers to the phenomenon that the ultrasonic velocity changes with the external stress during the ultrasonic bolt tightening stress detection process. The magnitude of the tightening stress on the bolt is obtained by measuring the difference in the transit time of the ultrasonic bolt in the stressed state and the unstressed state. The detection principle diagram is shown in Figure 1 As shown;

[0012] When the specimen is under stress-free conditions, its ultrasonic characteristics are mainly determined by the material itself, while under stress conditions, its ultrasonic characteristics are changed by stress changes. This phenomenon is called stress effect.

[0013] In the bolt tightening stress detection method, in order to determine the stress change under the bolt load state, it is first necessary to calibrate the ultrasonic characteristics of the bolt material under the stress-free state, and use this as a basis to determine the stress magnitude under the load state. It can be seen from Hooke's law that inside a uniform metal material, it is generally believed that the relationship between stress and strain changes linearly, but due to the proposal of Young's elastic modulus, the change in the elastic coefficient of the material caused by the stress change is not constant, but changes accordingly. The elastic modulus decreases as the distance between atoms of the material decreases, and increases as the distance between atoms increases. In ultrasonic detection technology, although the ultrasonic sound velocity and stress strain will change with the change of the elastic modulus, experiments have shown that whether the material changes within the elastic range or the nonlinear range, the change in the ultrasonic sound velocity is linearly related to the magnitude of the stress.

[0014] The present invention provides an ultrasonic-based bolt tightening stress detection system, which is characterized by comprising a system hardware circuit, an ultrasonic excitation probe, a bolt to be tested and a host computer terminal. The overall system block diagram is as follows: Figure 2 shown.

[0015] A bolt tightening stress detection system based on ultrasonic wave, characterized in that the system hardware part includes an echo signal conditioning module, a high-speed analog-to-digital conversion module, a high-voltage power supply module, a program-controlled digital-to-analog conversion module, an ultrasonic pulse excitation module, a temperature acquisition module, a ZYNQ control module, a system power supply module, a serial port module and an Ethernet module;

[0016] 1. The echo signal conditioning module is used to isolate the high-voltage ultrasonic pulse excitation signal to prevent it from damaging the subsequent signal conditioning link, and is used to denoise, limit and amplify the echo electrical signal generated by the piezoelectric ceramic thin disc after the inverse piezoelectric effect, and output the ultrasonic echo signal of the target frequency;

[0017] The echo signal conditioning module serves as a signal receiving unit of the system, ensuring the robustness of the system and improving the signal-to-noise ratio of the received signal. The echo signal conditioning module adopts a high-speed multiplexing module, a passive filter and a programmable gain amplifier;

[0018] The high-speed multiplexing module is used to avoid the crosstalk of the high-voltage pulse signal to the echo signal conditioning module, prevent the programmable gain module and the high-speed analog-to-digital conversion module from being damaged, and meet the high-voltage triangle wave pulse excitation signal. At the same time, it is also necessary to receive the tiny echo signal to the echo signal conditioning module. This module completes the echo reception within a safe voltage amplitude range and meets the requirements of the 8-channel ultrasonic excitation signal link. The designated channel is selected through the high-speed multiplexer module. After a fixed delay after the excitation signal is triggered, the path selection is performed to complete the echo signal reception;

[0019] In the high-speed multiplexing module, the unipolar pulse excitation signal is triggered by the FPGA hardware programming system, and the negative high-voltage pulse excitation signal is generated by the unipolar pulse excitation signal triggering the ultra-high voltage MOSFET to quickly turn on. In order to avoid the negative high-voltage triangular wave pulse excitation signal from crosstalking to the echo signal conditioning module, the ultrasonic excitation signal is delayed for 200ns after it is triggered. Since the bolt length is not unique, but the amount of collected data is certain, the bolt length needs to be estimated before detection, and configuration and delay are performed;

[0020] Preferably, the ADG1408 of ADI Company is used in the high-speed multiplexing module, the chip conduction impedance is 4Ω, the enable shutdown time is 100ns, and the output leakage current in the shutdown state is 0.04nA. The circuit design is as follows Figure 3 As shown;

[0021] The passive filter can reduce the power frequency noise and power supply noise mixed into the echo signal in the circuit, isolate the DC component, and reduce power frequency interference and switching power supply frequency crosstalk;

[0022] The present invention adopts a 3rd order passive bandpass filter, such as Figure 4 As shown, the passive bandpass filter is easier to match its components in the high frequency domain. Preferably, the center frequency is 6 MHz, and the passband cutoff frequencies are 4 Hz and 8 Hz;

[0023] The programmable gain amplifier can capture tiny echo signals and meet the echo signal sizes of bolts of various specifications, thereby improving the signal-to-noise ratio;

[0024] The programmable gain amplifier module preferably uses ADI's AD8138 low-distortion differential ADC driver to convert the ultrasonic echo signal from a single-ended signal to a differential signal. Preferably, ADI's low-power, 18MHz variable gain amplifier AD8338 is used to perform program gain amplification on the differential signal. The circuit diagram is as shown in FIG. Figure 5 shown.

[0025] 2. The high-speed analog-to-digital conversion module, as the entrance of signal processing, converts analog signals into digital signals, translates signal buffers through FPGA encoding and decoding, and transmits data through external interfaces;

[0026] The present invention adopts multi-channel ultrasonic excitation output, couples the ultrasonic echo signal to the back-end signal conditioning link through a high-speed multiplexing module, and uses dynamic gain control to adjust the appropriate signal amplitude for waveform acquisition;

[0027] Preferably, the high-speed analog-to-digital conversion module adopts ADI's high-speed analog-to-digital converter AD9634-250EBZ, the chip meets 12-bit analog-to-digital conversion, and the sampling rate is 250MSPS. The circuit diagram of the high-speed analog-to-digital conversion module is as shown in Figure 6 shown.

[0028] 3. The high-voltage power supply module is used to provide a high-voltage signal for the ultrasonic pulse excitation module. Preferably, the DW-N201-10CN2 of Dongwen High Voltage Power Supply Company is used, with a DC input voltage of 12V and an output voltage of 0 to -200V;

[0029] In the high-voltage power supply module, FPGA controls the start and stop of the high-voltage power supply, and the program-controlled digital-to-analog conversion module controls its voltage. The power supply signal uses the conduction voltage of the MOSFET in the ultrasonic pulse excitation module to trigger the high-voltage pulse signal to excite the ultrasonic transducer thin disc. The circuit diagram is as follows: Figure 7 As shown;

[0030] 4. The program-controlled digital-to-analog conversion module is used to control the voltage amplitude of the high-voltage power supply module and the program-controlled amplifier in the echo signal conditioning link. After the ZYNQ control module parses the host computer instructions, it dynamically adjusts the output voltage of the high-voltage power supply and the amplification factor of the program-controlled amplifier, and can trigger an ultrasonic pulse excitation signal with relatively appropriate energy for different bolt lengths;

[0031] The present invention adopts two digital-to-analog conversion modules to control negative high voltage conversion and programmable gain modules respectively. For bolts of different lengths, since the maximum excitation voltage of the piezoelectric ceramic transducer is limited, it is necessary to apply a suitable ultrasonic excitation signal voltage;

[0032] Preferably, the present invention uses a 12-BIT buffer voltage output digital-to-analog converter MCP4822 from MICROCHIP to meet the gain control requirements, and its circuit diagram is shown in FIG. Figure 8 shown.

[0033] 5. The ultrasonic pulse excitation module is used to trigger a high-voltage pulse signal, isolate high and low voltages, and excite the piezoelectric ceramic transducer by triggering an ultrasonic pulse signal to generate a piezoelectric effect, thereby generating an ultrasonic mechanical oscillation signal along the axial direction of the bolt;

[0034] The ultrasonic pulse excitation principle is to convert electrical signals into mechanical oscillation signals through piezoelectric ceramic transducers;

[0035] The ultrasonic pulse excitation module uses a unipolar signal for pulse excitation, which ensures the stability of the device while maximizing the signal-to-noise ratio of the circuit and reducing the impact of high-voltage and negative high-voltage power supplies on the device.

[0036] The ultrasonic pulse excitation module adopts ultra-high voltage power MOSFET, which can be quickly switched on and off to ensure the frequency characteristics of the excitation signal;

[0037] Preferably, the ultrasonic pulse excitation module uses ST's ultra-high voltage power type N-channel STF1N105K3;

[0038] Unipolar pulse excitation circuit Fig. 9 As shown, the circuit is generally divided into two parts;

[0039] The first part is C3, R2, D2, C4, C5 and Q1, as well as the negative high voltage signal connection node -HV;

[0040] The second part is R1, C1, C2, L1 and D1, and the SMA interface is used to connect an external ultrasonic excitation probe. The second part converts the negative high-voltage square wave pulse signal into a negative high-voltage triangle wave pulse signal through the capacitive effect;

[0041] 6. The temperature acquisition module is connected to the temperature sensor probe to detect the temperature of the tested piece and perform system algorithm compensation;

[0042] Preferably, the present invention uses a PT1000 platinum resistance temperature sensor for temperature measurement, uses MAXIM's MAX31865 for high-precision RTD temperature conversion, the chip temperature resolution is 0.03125°C, and the temperature acquisition module circuit design is as follows: Fig.10 shown.

[0043] 7. The ZYNQ control module is the main system control module, which is used for the generation of ultrasonic pulse excitation signals, protocol communication, command parsing and other control systems and interactive communication;

[0044] The ZYNQ control module is a ZYNQ series chip launched by XILINX, which is a new generation of programmable system on chip (APSoC). The software programmable characteristics of the processor of the ZYNQ series chip are combined with the hardware programmable characteristics of the digital integrated circuit. Compared with the traditional SoC, the hardware design method is combined with the highly flexible FPGA, so that APSoC can realize more complex circuit design and integration;

[0045] Preferably, the ZYNQ control module uses MICRON's MT41J128M16 third-generation double data rate synchronous dynamic random access memory. The chip has the characteristics of large capacity, low power consumption, and small size. By using the double edges of the differential clock to work, the storage rate is greatly improved. The data transmission rate of the chip is 1066MT / s. The circuit design is as follows Fig.11 As shown;

[0046] 8. The serial port module is mainly used for rapid problem finding and verification during system debugging;

[0047] 9. The Ethernet module is used for command transmission and rapid transmission of large amounts of data to the terminal to achieve the functional requirements of rapid scanning, and the resolution during continuous scanning is improved by taking advantage of the rapid data transmission advantage of the Ethernet interface;

[0048] 10. The system power supply module provides the necessary power supply for the system. The system power supply module isolates the high-voltage circuit from the low-voltage circuit, distinguishes the digital ground from the analog ground, and adopts the LDO linear voltage regulator chip with smaller ripple, thereby reducing the influence of the power supply noise of the signal link on the analog signal.

[0049] A bolt tightening stress detection system based on ultrasonic wave is characterized in that the data transmission method is to transmit the collected data to the terminal via Ethernet. The working process of the device is as follows:

[0050] Step 1, the data transmission method includes transmitting the terminal command to the ZYNQ control module through the Ethernet module;

[0051] Step 2: After the ZYNQ control module parses the instruction and obtains the relevant configuration parameters and function instructions, the system control module sends the configuration information to the programmable digital-to-analog conversion module through AXI, and outputs the specified voltage signal to control the high-voltage power supply module and the programmable gain module in the echo signal conditioning module;

[0052] Step 3: The system control module generates a high-frequency pulse, and transmits the high-frequency, high-voltage pulse signal to the ultrasonic excitation probe through the ultrasonic pulse excitation module to excite the piezoelectric transducer of the bolt to be tested;

[0053] Step 4: The echo signal is received by the high-speed multiplexing module to the echo signal conditioning module, the signal is filtered by the filter, the programmable gain module performs gain control of the tiny signal, the high-speed analog-to-digital conversion module converts the analog signal into a digital signal, and the sampled signal data is cached and stored in the DDR high-speed storage module;

[0054] Step 5: After completing the storage of a large amount of data, the system control module controls the temperature acquisition module to collect temperature and transmits all collected data to the host computer terminal through the Ethernet module.

[0055] A bolt tightening stress detection system based on ultrasonic wave is characterized in that the system design develops the software system on the basis of the hardware system, which mainly includes hardware logic design and application program design;

[0056] Preferably, the present invention adopts ZYNQ series chips as the system main control module, and the ZYNQ series chips integrate the software programmable system of ARM processor and the FPGA hardware programmable system. In the software design of the ultrasonic bolt tightening stress detection system, cross-compilation development is performed based on the software programmable system of ZYNQ series integrated with the ARM processor and the FPGA hardware programmable system. The hardware programming system is based on the vivado compilation environment and developed in the Verilog language. The software programming system is based on the XILINX SDK (Software Development Kit) compilation environment and developed in the C language.

[0057] The FPGA hardware programmable system is a field programmable logic gate array, which is developed with CPLD, GAL, PAL and other programmable logic device technologies as the core, making up for the late development defects of fully customized circuits and overcoming the resource limitation problem of the original programmable logic control device gate circuit. FPGA, as an integrated circuit, integrates the performance characteristics of various discrete components, such as resistors, diodes, transistors, etc., to form an integrated circuit, and uses compilation to build complex logic circuits;

[0058] The hardware logic design mainly includes an excitation signal logic control module, a high-speed analog-to-digital conversion logic control module, a temperature acquisition logic control module, a data cache logic control module, and a data storage logic control module;

[0059] 1. The excitation signal logic control module adopts a finite state machine to modularize the excitation control of the module. The excitation pulse of this detection system is generated internally by the PL terminal. According to the instruction analysis of the network port, the configuration parameters are distributed and issued through the AXI bus. For the excitation signal control module, it controls the on and off of the external hardware circuit through strict timing, estimates the length of different bolts, and obtains the corresponding echo signal through dynamic instruction configuration;

[0060] 2. In the high-speed analog-to-digital conversion logic control module, FPGA controls the command signal of SPI, inputs the output data into FPGA, caches the data stream into DDR through FIFO, waits for the reception to be completed, and sends the data to the host computer terminal through the network port;

[0061] The high-speed analog-to-digital conversion logic control module triggers the high-speed analog-to-digital converter to collect data through the control signal of the excitation signal control module, converts the 12-bit data into a 16-bit complement code output, and the high-speed analog-to-digital conversion logic control module performs 8 samplings;

[0062] 3. The temperature acquisition logic control module adopts SPI bus for data communication. The SPI serial communication process strictly abides by the state conversion process. The temperature acquisition logic control module is implemented by finite state machine.

[0063] 4. The data cache logic control module converts the 128-bit data of the high-speed analog-to-digital conversion logic control module into 16 bytes of data and 8 groups of continuous sampling data through the data stream conversion logic control module. The data stream conversion logic control module converts the high-speed bit stream data into byte stream data by splicing and combining 2 bytes of data each time;

[0064] 5. The data storage control module is completed through data interaction between the PS end and the PL end, and the data cache transmission function between the PS end and the PL end is completed through the AXI-Stream DataFIFO logic control module;

[0065] The FIFO is an asynchronous data transmission buffer. It outputs high-frequency data to low-frequency data through a first-in-first-out cache mode, matches the sampling rate of the high-speed analog-to-digital converter, and uses the FIFO buffer to ensure the reliability and integrity of data during the data acquisition and storage process. Each sampled data is cached through the FIFO, and the FIFO depth is 1024 bytes;

[0066] The direct data access module is a protocol mechanism for fast data transmission. Through its internal IP core, data transmission can be performed independently. The AXI Direct Memory Access IP core can provide high-bandwidth direct storage access between the AXI4 memory mapping and AXI4-Stream IP interface.

[0067] The application design realizes data interaction between the PS end and the PL end by using the AXI bus by setting the configuration of IP cores such as the Ethernet interface, the UART interface, and the DDR3 function.

[0068] The application design realizes the rapid transfer of data between the PL side and the PS side. The data of the PL side is written into the DMA through the FIFO, and the data is transferred from the PL side DMA to the PS side DDR3 data memory through the AXI high-speed interface, and the data stored in the DDR3 is transmitted to the host terminal through Ethernet.

[0069] The application design of the present invention adopts the form of ping-pong to divide the DDR address and cyclically access the corresponding data. The invention requires a relatively high speed to transmit the data to the host computer terminal for data analysis and display;

[0070] During the system initialization process, the system performs a power-on self-test, reads and verifies the serial data of each chip IC, and after confirming that the device is started normally, instructions can be issued. The system functions are mainly divided into parameter configuration and sampling transmission. The parameter configuration process requires voltage control of the high-voltage module, gain control of the VGA programmable operational amplifier, and delayed sampling time control;

[0071] The sampling transmission process is divided into single sampling and continuous sampling, and the functions meet the daily product usage needs.

[0072] The above are only preferred examples of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 It is the detection principle diagram of the present invention; Figure 2 It is the overall block diagram of the system of the present invention; Figure 3 It is a circuit design diagram of the multiplexing module of the present invention; Figure 4 It is a circuit diagram of a third-order passive bandpass filter adopted by the present invention; Figure 5 It is a circuit diagram of a programmable gain amplifier module of the present invention; Figure 6 It is a circuit diagram of a high-speed analog-to-digital conversion module of the present invention; Figure 7 is a circuit diagram of a high voltage module of the present invention; Figure 8 The voltage output digital-to-analog converter circuit diagram of the present invention is Fig. 9 It is a unipolar pulse excitation circuit diagram of the present invention; Fig.10 It is the circuit diagram of the temperature acquisition module of the present invention; Fig.11 The present invention adopts the MT41J128M16 third generation double data rate synchronous dynamic random access memory.

Claims

1. A bolt tightening stress detection system based on ultrasonic wave, characterized in that: It comprises a system hardware circuit (100), an ultrasonic excitation probe (200), a bolt to be tested (300), and a host computer terminal (400); The ultrasonic excitation probe (200) is attached to the head of the bolt (300) to be tested; the ultrasonic excitation probe (200) is communicatively connected to the input end of the system hardware circuit (100); the system hardware circuit (100) is communicatively connected to the host computer terminal (400) via Ethernet; The ultrasonic excitation probe (200) continuously collects ultrasonic echo signals, and the system hardware circuit (100) completes the processing of ultrasonic echo signals and the calculation of ultrasonic sound time difference, and sends the calculated data to the host computer terminal (400).

2. The ultrasonic-based bolt tightening stress detection system according to claim 1, characterized in that: The ultrasonic excitation probe (200) is a transceiver integrated probe; The ultrasonic-based bolt tightening stress detection system is a multi-channel design, capable of connecting multiple ultrasonic excitation probes, and capable of detecting multiple bolts simultaneously.

3. The ultrasonic-based bolt tightening stress detection system according to claim 1, characterized in that: The bolt (300) to be tested is a sensor-embedded bolt prepared by directly bonding a piezoelectric ceramic transducer to the bolt.

4. The ultrasonic-based bolt tightening stress detection system according to claim 1, characterized in that: The system hardware circuit part includes an echo signal conditioning module (101), a high-speed analog-to-digital conversion module (102), a high-voltage power supply module (103), a program-controlled digital-to-analog conversion module (104), an ultrasonic pulse excitation module (105), a temperature acquisition module (106), a ZYNQ control module (107), a serial port module (108), a system power supply module (109) and an Ethernet module (110); The echo signal conditioning module (101) is communicatively connected with the ultrasonic excitation probe (300) and is used to isolate the high-voltage ultrasonic pulse excitation signal to prevent it from damaging the subsequent signal conditioning link, and to denoise, limit and amplify the echo electrical signal generated by the piezoelectric ceramic thin disc after the inverse piezoelectric effect, and output the ultrasonic echo signal of the target frequency; The high-speed analog-to-digital conversion module (102) is communicatively connected with the echo signal conditioning module (101) and the ZYNQ control module (107), and is used to collect the ultrasonic echo signal output by the echo signal conditioning module, and convert and output the stress change process of the bolt during the static or dynamic tightening process; The high-voltage power supply module (103) is communicatively connected with the ultrasonic pulse excitation module (105) to provide a high-voltage signal to the ultrasonic pulse excitation module; The programmable digital-to-analog conversion module (104) is in communication connection with the echo signal conditioning module (101), the high-voltage power supply module (103), and the ZYNQ control module (107), and is used to control the voltage amplitude of the high-voltage power supply module and the programmable amplifier in the echo signal conditioning link, and dynamically adjust the output voltage of the high-voltage power supply and the gain of the programmable amplifier after the ZYNQ parses the host computer instruction; The ultrasonic pulse excitation module (105) is in communication connection with the ultrasonic pulse excitation probe (200) and the ZYNQ control module (107), and is used to trigger a high-voltage pulse signal, isolate high and low voltages, and excite the piezoelectric ceramic transducer by triggering the ultrasonic pulse signal to generate a piezoelectric effect, thereby generating an ultrasonic mechanical oscillation signal along the axial direction of the bolt; The temperature acquisition module (106) is connected to a temperature sensor probe and a ZYNQ control module (107); the temperature sensor probe is attached to the head of the bolt (300) to be tested and is used to detect the temperature of the tested piece and perform algorithm compensation; The ZYNQ control module (107) is used as the main system control module for the generation of ultrasonic pulse excitation signals, protocol communication, command parsing and other control systems and interactive communications; The system power supply module (108) is connected to the ZYNQ control module (107) and is used to provide power supply for the system; The serial port module (109) is connected to the ZYNQ control module (107) for rapid problem finding and verification during the system debugging process; The Ethernet module (110) is used for transmitting instructions and a large amount of data quickly to the host computer terminal (400), and utilizes the fast data transmission advantage of the Ethernet interface to improve the resolution during the continuous scanning process, thereby realizing the function of fast scanning.

5. The ultrasonic-based bolt tightening stress detection system according to claim 4, characterized in that: The echo signal conditioning module (101) adopts a high-speed multiplexing module, a passive filter and a programmable gain amplifier; The echo signal conditioning module (101) serves as a signal receiving unit of the system, ensuring the robustness of the system and improving the signal-to-noise ratio of the received signal; The high-speed multiplexing module is used to prevent the high-voltage pulse signal from cross-interfering with the echo signal conditioning module, and to prevent damage to the programmable gain module and the high-speed analog-to-digital conversion module; The passive filter is used to reduce the power frequency noise and power supply noise mixed into the echo signal in the circuit and isolate the DC component; The programmable gain amplifier is used to capture tiny echo signals and meet the echo signal sizes of bolts of various specifications, thereby improving the signal-to-noise ratio.

6. The ultrasonic-based bolt tightening stress detection system according to claim 4, characterized in that: The program-controlled digital-to-analog conversion module (104) is divided into two paths, respectively controlling negative high voltage voltage conversion and program-controlled gain; The program-controlled digital-to-analog conversion module (104) applies appropriate ultrasonic excitation signal voltage to bolts of different lengths to meet gain control requirements.

7. The ultrasonic-based bolt tightening stress detection system according to claim 4, characterized in that: The ultrasonic pulse excitation module (105) serves as a signal generation module of the system, generating high-voltage pulse excitation for the pressure point ceramic transducer; The ultrasonic pulse excitation module (105) is used to convert a low-voltage square wave pulse signal into a high-voltage triangle wave pulse signal, thereby better coupling the piezoelectric effect of the ultrasonic transducer.

8. The ultrasonic-based bolt tightening stress detection system according to claim 4, characterized in that: The ZYNQ control module (107) sets the configuration of IP cores such as Ethernet interface, UART interface, DDR3 function, etc., and uses the AXI bus to realize data interaction between the PS and PL ends.

9. An ultrasonic-based bolt tightening stress detection system, characterized in that: The data transmission method is to transmit the collected data to the terminal via Ethernet. The workflow of the system is as follows: Step 1, the data transmission method comprises transmitting the terminal command to the ZYNQ control module (107) via the Ethernet module (110); Step 2: After the ZYNQ control module (107) parses the instruction and obtains relevant configuration parameters and function instructions, the ZYNQ control module (107) sends the configuration information to the program-controlled digital-to-analog conversion module (104) through AXI, and outputs the specified voltage signal to control the high-voltage power supply module (103) and the echo signal conditioning module (101); Step 3: The ZYNQ control module (107) generates a high-frequency pulse, and transmits the high-frequency, high-voltage pulse signal to the ultrasonic excitation probe (200) through the ultrasonic pulse excitation module (105) to excite the piezoelectric transducer of the bolt (300) to be tested; Step 4: The echo signal is received by the high-speed multiplexing module to the echo signal conditioning module (101), the signal is filtered by the filter, the gain of the tiny signal is controlled by the programmable gain module, the analog signal is converted into a digital signal by the high-speed analog-to-digital conversion module (102), and the sampled signal is stored in the DDR after being buffered by the data; Step 5: After completing storage of a large amount of data, the ZYNQ control module (107) controls the temperature acquisition module (106) to collect temperature and transmit the collected data to the terminal via the Ethernet module (110).

10. An ultrasonic-based bolt tightening stress detection system, characterized in that: System design develops the software system based on the hardware system, which mainly includes hardware logic design and application program design.

11. The ultrasonic-based bolt tightening stress detection system according to claim 10, characterized in that: The hardware programming system includes an excitation signal logic control module, a high-speed analog-to-digital conversion logic control module, a temperature acquisition logic control module, a data cache logic control module, and a data storage logic control module; The excitation signal logic control module adopts a finite state machine to divide the module's excitation control into modules. The excitation pulse is generated internally by the PL terminal. According to the instruction parsing of the network port, the configuration parameters are distributed and issued through the AXI bus. The on and off of the external hardware circuit is controlled by strict timing. According to the length estimation of different bolts, the dynamic instruction configuration obtains the corresponding echo signal. The high-speed analog-to-digital conversion logic control module performs SPI command signal control through FPGA and inputs the output data into FPGA; The temperature acquisition logic control module is implemented by a finite state machine and uses an SPI bus for data communication; The data cache logic control module converts the 128-bit data of the high-speed analog-to-digital conversion logic control module into 16 bytes of data and 8 groups of continuous sampling data through the data conversion logic control module; The data storage logic control module is completed through data interaction between the PS end and the PL end, and the data cache transmission function between the PS end and the PL end is completed through the AXI-Stream DataFIFO logic control module. The module uses a FIFO buffer to ensure the reliability and integrity of data during the collection and storage process.

12. The ultrasonic-based bolt tightening stress detection system according to claim 10, characterized in that: The application part uses ZYNQ to tightly combine the high-performance ARM Contex-A series processor and high-performance FPGA in a single chip; The application part realizes the rapid transfer of data between the PL side and the PS side. The PL side data is written into the DMA through the FIFO, and the data is migrated from the PL side DMA to the PS side DDR3 data storage through the AXI high-speed interface. The data stored in the DDR3 is transmitted to the host computer terminal (400) through the Ethernet port. The system uses the ping-pong form to divide the DDR address, cyclically access the corresponding data, and transmit the data to the host computer terminal (400) at a high speed for data analysis and display. During the system initialization process of the application, the system needs to power on for self-test. By reading and verifying the serial data of each chip IC and confirming that the device has started normally, instructions can be issued. This part of the function is mainly divided into parameter configuration and sampling transmission. The parameter configuration process requires voltage control of the high-voltage module, gain control of the VGA programmable operational amplifier, and delayed sampling time control. The functions can meet daily product usage needs.

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