Experimental system for measuring electrical characteristics of device in irradiation environment

Abstract

The invention provides an experimental system for measuring electrical characteristics of a device in an irradiation environment, which is characterized in that a trigger unit is connected with an avalanche test unit and a surge test unit after analog-to-digital conversion to generate a test trigger signal; the avalanche test unit and the surge test unit respectively output corresponding test signals and record electrical characteristic data of the to-be-tested device; on-off control of each test channel is realized through signal comprehensive judgment by controlling the signal processing unit; a self-checking comparison unit receives a self-checking current signal generated by a protection circuit, generates a corresponding signal and outputs the corresponding signal to a control signal processing unit; comparing the signal output of each test unit through a judgment unit, and marking an abnormal unit; the radiation protection unit isolates the influence of the radiation environment on the test system. The system has the advantages of simple structure, high integration level, convenient and fast test, visual display of abnormal conditions, and great reduction of fault probability.

Description

Technical Field

[0001] The invention relates to the technical field of semiconductor device testing, and in particular to an experimental system for measuring electrical characteristics of a device under an irradiation environment. Background Art

[0002] The third generation of semiconductor materials represented by gallium nitride (GaN) have important application prospects in the field of high frequency and high power density due to their wide bandgap, high breakdown electric field, high thermal conductivity, large electron saturation velocity and excellent radiation resistance. However, in an irradiated environment, the electrical properties of these devices will be affected by the radiation effect, resulting in performance degradation or even device failure.

[0003] The avalanche and surge characteristics of semiconductor devices are important indicators of their safe operation. Avalanche characteristic testing can be used to evaluate the performance of devices under overvoltage conditions, while surge testing is used to evaluate the stability of devices under transient high current shocks. For these two tests, traditional experimental systems are usually built separately, which not only increases the test cost but also reduces the test efficiency. Therefore, it is particularly important to design an experimental system that can test avalanche and surge characteristics at the same time and is suitable for irradiation environments. Summary of the invention

[0004] The present invention proposes an experimental system for measuring electrical characteristics of a device in an irradiated environment, so as to solve the technical problem that the existing test system is difficult to simultaneously test avalanche and surge characteristics in an irradiated environment.

[0005] In order to solve the above technical problems, the present invention provides an experimental system for measuring the electrical characteristics of a device under an irradiation environment, comprising a trigger unit, an avalanche test unit, a surge test unit, a control signal processing unit, a self-check comparison unit, a determination unit and an irradiation protection unit;

[0006] The trigger unit is used to generate a test signal and is connected to the avalanche test unit and the surge test unit through a unified test channel;

[0007] The avalanche test unit is connected to the semiconductor device to be tested through an avalanche test channel, outputs an avalanche test signal and displays test data of the semiconductor device to be tested;

[0008] The surge test unit is connected to the semiconductor device to be tested through a surge test channel, outputs a surge test signal and displays test data of the device;

[0009] The control signal processing unit controls the working states of the avalanche test unit and the surge test unit to ensure that the avalanche test channel and the surge test channel are not enabled at the same time, and generates a conversion signal to switch the test circuit;

[0010] The self-test comparison unit is used to receive the output signals of the avalanche test unit and the surge test unit and perform self-test to determine whether the protection circuit is working normally, and transmit the self-test result to the control signal processing unit;

[0011] The determination unit is used to compare the output signals of the avalanche test circuit and the surge test circuit, identify abnormal signals therein and drive a red LED light to prompt the operator;

[0012] The radiation protection unit wraps all the above units with radiation-proof materials and is exposed to the radiation environment.

[0013] Preferably, the avalanche test unit includes a power supply, an oscilloscope and an avalanche test circuit, the avalanche test circuit is connected to the trigger unit through a first channel, and is respectively connected to the G end, D end and S end of the semiconductor device to be tested through a second channel, a third channel and a fourth channel, wherein the first channel is used to trigger the avalanche test signal, and the second channel, the third channel and the fourth channel are used to input the test signal into the device to be tested.

[0014] Preferably, the avalanche test circuit includes a protection circuit, a control circuit and a test circuit, wherein the protection circuit is used to protect the device under test from damage by high current, the control circuit is used to send a self-test signal and transmit the self-test result to a self-test comparison unit, and the test circuit performs an avalanche test operation.

[0015] Preferably, the surge test unit includes a power supply, an oscilloscope and a surge test circuit, the surge test circuit is connected to the trigger unit through the fifth channel, and is connected to the G end, D end and S end of the semiconductor device to be tested through the sixth channel, the seventh channel and the eighth channel respectively, wherein the fifth channel is used to trigger the surge test signal, and the sixth channel, the seventh channel and the eighth channel are used to input the test signal to the device to be tested.

[0016] Preferably, the surge test circuit includes a protection circuit, a control circuit and a test circuit, wherein the protection circuit is used to protect the device under test from damage by excessive current, the control circuit is used to send a self-test signal and transmit the self-test result to a self-test comparison unit, and the test circuit performs a surge test operation.

[0017] Preferably, the control signal processing unit comprises a signal generator, an FPGA and a Bluetooth module, and the signal generator is used to control the switching of the test signal input channels of the avalanche test unit and the surge test unit, and to generate a conversion signal to switch the test circuit.

[0018] Preferably, the control signal processing unit controls the on and off of the first channel of the avalanche test unit and the fifth channel of the surge test unit through one channel of the signal generator, and the control signal processing unit is used to control the second channel to the fourth channel and the sixth channel to the eighth channel through two channels of the signal generator; the three channels of the signal generator are used to generate a conversion signal to switch the main test circuit and the backup test circuit.

[0019] Preferably, the self-test comparison unit receives the output signals of the avalanche test unit and the surge test unit, and determines the self-test result of the protection circuit. If an abnormality is found in the protection circuit or other test circuit, a fault signal is output to the control signal processing unit, and the control signal processing unit switches the test circuit or sends an alarm signal to a remote computer.

[0020] Preferably, the avalanche test unit is provided with several avalanche test circuits, the surge test unit is provided with several surge test circuits, and the determination unit includes a NAND gate, an XOR gate and an SR latch, which are respectively connected to the output ends of the several avalanche test circuits and the surge test circuits, for comparing the output signals and driving the red LED light to display an abnormal output signal different from other signals.

[0021] Preferably, the first channel, the second channel, the third channel and the fourth channel include a MEMS switch and an inverter; and the fifth channel, the sixth channel, the seventh channel and the eighth channel include a MEMS switch.

[0022] The beneficial effects of the present invention include at least:

[0023] 1) The invention realizes the electrical isolation and spatial isolation of semiconductor devices in avalanche testing and surge testing, avoiding mutual interference between the two test circuits, and enabling avalanche and surge testing to be performed simultaneously;

[0024] 2) The determination circuit designed in the present invention can intuitively monitor whether the test circuit is in a normal working state, and switch the abnormally working test circuit to a normally working test circuit.

[0025] 3) The avalanche and surge protection circuit designed in the present invention can perform self-checking, timely monitor whether the test circuit is working normally, and transmit the result to a remote computer through a self-checking comparison unit, so that the operator can obtain abnormal information and analyze the damage of the test circuit.

[0026] 4) In order to reduce the impact of radiation on the test circuit and the chip under test, the entire experimental system is distributed in a radiation protection unit. The radiation protection unit can effectively prevent space particles in the radiation environment from affecting the active devices in the entire experimental system.

[0027] 5) The present invention has the advantages of high integration, convenient and quick testing, intuitive display of abnormal conditions, and significant reduction in the probability of failure. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 A schematic diagram of the structure of an experimental system according to an embodiment of the present invention;

[0029] Figure 2 is a circuit diagram of an avalanche test circuit according to an embodiment of the present invention;

[0030] Figure 3 is a circuit diagram of a surge test circuit according to an embodiment of the present invention;

[0031] Figure 4 A schematic diagram of a circuit of a determination unit according to an embodiment of the present invention;

[0032] Figure 5 is a circuit diagram of a conversion unit according to an embodiment of the present invention;

[0033] Figure 6 A schematic diagram of the structure of a temperature control system according to an embodiment of the present invention;

[0034] Figure 7 The figure is a flowchart of a protection circuit and a self-test method thereof according to an embodiment of the present invention. DETAILED DESCRIPTION

[0035] The following is a clear and complete description of the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work belong to the protection scope of the present invention.

[0036] like Figure 1 As shown, an embodiment of the present invention provides an experimental system for measuring electrical characteristics of a device under an irradiation environment, including a trigger unit, an avalanche test unit, a surge test unit, a control signal processing unit, a self-check comparison unit, a determination unit and a radiation protection unit.

[0037] The trigger unit is used to generate a test signal and is connected to the avalanche test unit and the surge test unit through a unified test channel.

[0038] Specifically, the trigger unit adopts three identical waveform generators, which are connected to the first channel of the avalanche test unit and the fifth channel of the surge test unit through the judgment unit and the conversion unit after analog-to-digital conversion; when the main circuit in the trigger unit is judged to be working normally by the judgment unit, the trigger signal is transmitted to the avalanche test circuit or the surge test circuit through the first channel or the fifth channel respectively.

[0039] The avalanche test unit is connected to the semiconductor device to be tested through an avalanche test channel, outputs an avalanche test signal and displays test data of the semiconductor device to be tested.

[0040] Specifically, the avalanche test unit includes a power supply, an oscilloscope, a Hall current sensor, a transformer and an avalanche test circuit, the avalanche test circuit includes a protection circuit, a test circuit and a control circuit, and the avalanche test channel includes a first channel, a second channel, a third channel and a fourth channel; the avalanche test unit is connected to the trigger module through the first channel, the G end of the semiconductor device to be tested is connected through the second channel, the D end of the semiconductor device to be tested is connected through the third channel, and the S end of the semiconductor device to be tested is connected to the ground through the fourth channel; the G end and the S end of the semiconductor device to be tested are also connected to the oscilloscope respectively; the D end and the S end of the semiconductor device to be tested are connected to the oscilloscope via a transformer, and the D end or the S end of the semiconductor device to be tested is connected to the Hall current sensor. The protection circuit can perform self-test before testing, and the control circuit transmits the self-test signal to the self-test comparison unit.

[0041] The protection circuit includes avalanche diodes D21, D22 and MOS switches connected in parallel therewith. D21, D22 are diodes with higher critical avalanche voltages, which should be higher than the expected critical avalanche voltage of the chip under test. The protection circuit is connected in parallel with the device under test. In this embodiment, the redundancy setting of the protection circuit can be further increased or decreased.

[0042] When avalanche testing is performed on a device under test, one channel of the oscilloscope is connected to the G and S terminals of the device under test, and the second channel is connected to the D and S terminals of the device under test through a transformer. The current sensor is connected to the D or S terminal of the device under test; the gate-source voltage V gs , drain-source voltage V ds , drain current I ds During self-test, the connection between the device under test and the test unit is disconnected. During self-test and formal test, the two ends of the avalanche diode in the protection circuit are connected through an oscilloscope to collect the voltage signal flowing through the avalanche diode. The current signal flowing through the avalanche diode is collected through a current sensor.

[0043] When the test unit is self-checking, the control signal generator first controls the three MOSFET switches shown in the figure to all be turned on. At this time, the inductor L surgeDirectly connected to the circuit for charging. After a period of time, the three MOSFET switches shown in the control diagram are all turned off. At this time, the inductor, diode D1, avalanche diodes D21 and D22 form a loop, and the energy stored in the inductor is released through avalanche diodes D21 and D22. The size of the corresponding avalanche energy can be controlled by controlling the opening time of the three MOSFET switches. The voltage and current signals of D21 and D22 are measured at this time, which are the avalanche characteristics. If one of the avalanche diodes is damaged, the avalanche energy can still be released through another avalanche diode without damaging other parts of the circuit. The measured avalanche characteristic information of D21 and D22 is sent to the self-test comparison unit for comparison with the known characteristics of D21 and D22 to determine whether the test circuit and the protection circuit are working properly. If not, this avalanche test unit is marked as damaged, and the judgment unit will later select the undamaged unit to test the device under test.

[0044] When testing the device under test, the MOSFET switch of the protection circuit is turned off. The control signal generator first controls the MOSFET switch connected in series with the power supply and the device under test to turn on. At this time, the inductor L surge Directly connect to the circuit for charging. After a period of time, control the MOSFET switch and the device under test to close. At this time, the inductor, diode D1, and the device under test form a loop, and the energy stored in the inductor is released through the device under test. By controlling the time when the MOSFET switch is turned on, the size of the corresponding avalanche energy can be controlled. Measuring the voltage and current signal of the device under test at this time is the avalanche characteristic. Similarly, if the device under test is damaged, diode D1, avalanche diodes D21, D22 can still form a loop, and the avalanche energy can be released through the protection circuit without damaging other parts of the circuit.

[0045] The surge test unit is connected to the semiconductor device to be tested through a surge test channel, outputs a surge test signal and displays the test data of the device.

[0046] Specifically, Figure 3 As shown, the surge test unit includes a power supply, an oscilloscope and a surge test circuit, and the surge test channels include a fifth channel, a sixth channel, a seventh channel and an eighth channel. The Hall current sensor measures the current between the D terminal and the S terminal of the semiconductor device to be tested.

[0047] The surge test unit includes a power supply, an oscilloscope and a surge test circuit, and the surge test channels include a fifth channel, a sixth channel, a seventh channel and an eighth channel. The Hall current sensor measures the current between the D terminal and the S terminal of the semiconductor device to be tested.

[0048] When performing a surge test on a device under test, one channel of the oscilloscope is connected to the D terminal and S terminal of the device under test, and the current sensor is connected to the D terminal or S terminal of the device under test; the V ds, I ds During self-test, the connection between the device under test and the test unit is disconnected. During self-test and formal test, the two ends of the diode in the protection circuit are connected through an oscilloscope to collect the voltage signal flowing through the avalanche diode. The current signal flowing through the avalanche diode is collected through a current sensor.

[0049] When the test unit is self-checking, the control signal generator controls the two MOSFET switches shown in the figure to open. At this time, the diode of the self-checking circuit and the capacitor and inductor in the test circuit form an oscillation loop to generate a sine wave voltage. The voltage and current signals of the diode at this time are measured as surge characteristics. The measured surge characteristic information is sent to the self-checking comparison unit for comparison with the known characteristics of the diode to determine whether the test circuit is working properly. If not, this surge test unit is marked as damaged, and the judgment unit will select the undamaged unit for the device under test test later.

[0050] When testing the device under test, the MOSFET switch of the self-test circuit is turned off. The control signal generator controls the MOSFET device under test to turn on. At this time, the device under test and the capacitor and inductor in the test circuit form an oscillation loop to generate a sine wave voltage. The voltage and current signals of the device under test at this time are measured as surge characteristics.

[0051] In this embodiment, before the test is performed, a self-test of the test circuit is performed, the channel of the chip to be tested is closed, and the control circuit turns on the MOS switch D11 and D12 connected in series. This is equivalent to performing an avalanche test on D11 and D12, and extracting corresponding test parameters. If the test cannot be completed, or the test parameters are significantly different from the known parameters of D11 and D12, it indicates that the MOS switch is damaged, or D11 and D12 are damaged and cannot play a role in protecting the circuit. At this time, the control signal generating module sends a signal that this test module cannot work normally.

[0052] Since the critical avalanche voltage of the protection circuit avalanche diode is higher than the avalanche voltage of the device under test, no current will flow through the protection circuit during normal testing and there will be no impact on the chip under test.

[0053] If the chip under test suddenly breaks during the test, the avalanche energy can be released through D11 or D12. Similarly, if D11 or D12 is damaged during the self-test, the avalanche energy can be released through another undamaged component, thereby protecting the power supply. At this time, by extracting the current information of the protection circuit, if there is current flowing through the protection circuit, it means that the device under test has broken.

[0054] The self-test comparison unit is used to receive the output signals of the avalanche test unit and the surge test unit and perform self-test to determine whether the protection circuit is working normally, and transmit the self-test result to the control signal processing unit.

[0055] The control signal processing unit controls the working states of the avalanche test unit and the surge test unit to ensure that the avalanche test channel and the surge test channel are not enabled at the same time, and generates a conversion signal to switch the test line.

[0056] Specifically, the control signal processing unit includes a signal generator, an FPGA and a Bluetooth module; one channel of the signal generator is used to control the opening and closing of the first channel and the fifth channel, and the second channel of the signal generator is used to control the second channel, the third channel or the fourth channel, the sixth channel, the seventh channel and the eighth channel; the control signal processing unit controls the fifth channel to be turned off while controlling the first channel to be turned on, and controls the fifth channel to be turned on while controlling the first channel to be turned off; the control signal processing unit is used to control the second channel, the third channel and the fourth channel to be turned on or turned off at the same time, and to control the sixth channel, the seventh channel and the eighth channel to be turned off or turned on at the same time; it includes four test modes, when the first channel is turned on and the fifth channel is turned off, the second channel, the third channel and the fourth channel are turned off, and the sixth channel, the seventh channel and the eighth channel are turned on When the first channel is turned on and the fifth channel is turned off, the second channel, the third channel and the fourth channel are turned on, and the sixth channel, the seventh channel and the eighth channel are turned off, the avalanche test is performed at this time; when the first channel is turned off and the fifth channel is turned on, and the second channel, the third channel and the fourth channel are turned off, and the sixth channel, the seventh channel and the eighth channel are turned on, the surge test is performed at this time; when the first channel is turned off and the fifth channel is turned on, and the second channel, the third channel and the fourth channel are turned on, and the sixth channel, the seventh channel and the eighth channel are turned off, the surge test circuit self-check is performed at this time; the control of the three channels of the signal generator is realized by programming the FPGA, so that it can make a comprehensive judgment based on the signals generated by the self-check comparison unit and the judgment unit, generate a conversion signal and switch the main test line to a normal working line. In this embodiment, the first channel, the second channel, the third channel or the fourth channel may include a MEMS switch and an inverter; the fifth channel, the sixth channel, the seventh channel and the eighth channel may include a MEMS switch.

[0057] When performing a self-test operation of the avalanche or surge test unit, if one of the output results of three identical avalanche or surge test circuits is different from the other two, a switching signal is generated and the switching circuit is controlled to switch the test circuit.

[0058] The determination unit is used to compare the output signals of the avalanche test circuit and the surge test circuit, identify abnormal signals therein and drive a red LED light to prompt the operator.

[0059] Specifically, Figure 4As shown, the determination unit includes a NAND gate, an XOR gate, an SR latch and a red LED light, which are respectively connected to three identical avalanche test circuit output ends and three identical surge test circuit output ends, compare the three-end inputs, output the majority of input signals, find out the possible input ends that are different from the other two, and turn on the corresponding red LED light.

[0060] The judgment unit mainly consists of the following parts:

[0061] 1. NAND Gate: NAND gate can be used to eliminate redundant signals, simplify subsequent logical judgment, and ensure that a low level is output only when all signals are the same.

[0062] 2. XOR Gate: XOR Gate is used to detect the difference between three sets of input signals.

[0063] 3.SR latch, used to maintain the current comparison state, ensuring that the output state remains unchanged before the signal changes until the next valid input signal arrives.

[0064] 4. Red LED light: The red LED light is used as a visual indicator. When a difference in the input signal is detected, the LED light will light up, allowing operators to quickly understand the system status.

[0065] In this embodiment, the avalanche or surge test circuit can be set to a plurality of circuits, and three test circuits are used for illustration. There are three outputs of the avalanche or surge test circuit, which are recorded as S1, S2 and S3. Each test circuit output is connected to the input of the NAND gate. The specific connection method is as follows:

[0066] The first NAND gate: S1 and S2;

[0067] The second NAND gate: S2 and S3;

[0068] The third NAND gate: S1 and S3;

[0069] Connect the outputs of the three NAND gates to one NAND gate. The second-stage NAND gate will be used to comprehensively judge the outputs of the first-stage NAND gate to determine whether any input signals are different.

[0070] Assume that the output of the second-stage NAND gate is W, and connect the output of the second-stage NAND gate to the input of the three XOR gates respectively. The specific connection method is as follows:

[0071] The first XOR gate: S1 and W;

[0072] The second XOR gate: S2 and W;

[0073] The third XOR gate: S3 and W;

[0074] Connect the output of the XOR gate to the S terminal of the SR latch, and the R terminal can be connected to a reset signal, such as a button or timer, to manually or automatically reset the latch state.

[0075] Connect the output Q of the SR latch to the anode of the red LED lamp, and the cathode of the lamp is grounded. When Q is high, the LED lamp turns on, otherwise it turns off.

[0076] The system receives three avalanche test circuit outputs and three surge test circuit outputs. These output signals are converted into corresponding digital signals after analog-to-digital conversion. When the XOR gate output is high, the S end of the SR latch is activated, and the output Q of the latch will be high (1), thereby lighting up the red LED. When the XOR gate output is low, the R end of the latch can be triggered, Q will be reset to low (0), and the LED will go out.

[0077] Consider the following signal states:

[0078] 1. S1=0, S2=1, S3=1, the output of the first NAND gate is 1, the output of the second NAND gate is 1, then the XOR gate connected to S1 outputs a high level, the red LED lights up, indicating that S1 is different from the other two inputs, and the other two LEDs are off.

[0079] 2. S1=1, S2=1, S3=1, the output of the second-stage NAND gate is 1, then all XOR gates output low level, and all LED lights are off.

[0080] 3.S1=1, S2=0, S3=0, the output of the second-stage NAND gate is 0, then the XOR gate connected to S1 outputs a high level, the red LED lights up, indicating that S1 is different from the other two inputs, and the other two LEDs are off.

[0081] 4. S1=0, S2=0, S3=0, the output of the second-stage NAND gate is 0, then all XOR gates output low level, and all LED lights are off.

[0082] When performing line conversion, Figure 5 The conversion module shown performs line switching. The conversion module includes a MOSFET and a diode. When the standby line detects a switching signal, it switches to the main line, and the other two lines are turned off and become a standby state.

[0083] The radiation protection unit wraps all the above units with radiation-proof materials and exposes them to the radiation environment.

[0084] Specifically, the protective material of the radiation protection unit should be selected according to the specific environment and needs, and the thickness should be based on I = I0 × e -μεCalculated by the formula; where I represents the radiation intensity passing through the protective layer; I0 represents the intensity of the radiation source; μ represents the linear attenuation coefficient of the material; ε represents the thickness of the protective layer.

[0085] The present invention also provides a temperature control system such as Figure 6 As shown, it includes a power supply, a single-chip microcomputer, a driving module, a step-down module, a temperature sensing module, a heating plate, and a cooling plate; the power supply is connected to the driving module, the power supply is connected to the single-chip microcomputer via the step-down module to power the single-chip microcomputer, the temperature sensing module is connected to the single-chip microcomputer, the temperature sensing module is used to collect temperature and output a trigger signal, the single-chip microcomputer is also connected to the heating plate and the cooling plate respectively, and the single-chip microcomputer controls the heating plate or the cooling plate to work after comparing the collected temperature with the preset temperature to adjust the ambient temperature to the preset temperature;

[0086] Based on the above system, the present invention provides a protection circuit and a self-test method for measuring the electrical characteristics of a device under irradiation. Figure 7 As shown, the method and steps include:

[0087] S1: Establish communication between the tester, remote computer and control signal processing unit through remote connection.

[0088] S2: The tester selects avalanche or surge test and controls the opening and closing of the corresponding channels of avalanche and surge by controlling the signal processing unit.

[0089] S3: The system performs avalanche or surge test circuit self-test to detect the avalanche characteristics of the avalanche diode in the avalanche protection circuit or the surge characteristics of the diode in the self-test circuit in the surge test circuit, and sends the result to the self-test comparison unit. By comparing it with the avalanche surge characteristics of known devices, it is determined whether the test system and the protection circuit are damaged.

[0090] S4: The self-test results are transmitted to the control signal processing unit. After that, the tester views the self-test results through a remote computer and selects a normal working test circuit. The device under test is remotely connected to the test circuit through the control signal processing unit to perform avalanche or surge testing.

[0091] S5: When performing an avalanche test, the current flowing through the protection circuit of the avalanche test circuit is detected, and the result is sent to the self-test comparison unit, and it is determined whether the device under test is damaged by comparing it with a preset threshold value.

[0092] S6: The self-test results are transmitted to the control signal processing unit, and then the test personnel view the self-test results through a remote computer. If there is a protection current, it means that the device under test is damaged. Because there is a protection circuit, the overall test system is not damaged. If there is no protection current, it means that the device under test is working normally. At this time, the avalanche or surge test data is saved and recorded.

[0093] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. Only the preferred embodiments of the present invention are expressed. The description is more specific and detailed, but it cannot be understood as limiting the scope of the patent of the present invention. As long as there is no contradiction in the combination of these technical features, they should be considered as the scope recorded in this specification.

[0094] It should be noted that, for those skilled in the art, several modifications and improvements can be made without departing from the concept of the present invention, and these modifications and improvements all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims

1. An experimental system for measuring the electrical characteristics of a device under irradiation environment, characterized in that: It includes a trigger unit, an avalanche test unit, a surge test unit, a control signal processing unit, a self-check comparison unit, a determination unit and a radiation protection unit; The trigger unit is used to generate a test signal and is connected to the avalanche test unit and the surge test unit through a unified test channel; The avalanche test unit is connected to the semiconductor device to be tested through an avalanche test channel, outputs an avalanche test signal and displays test data of the semiconductor device to be tested; The surge test unit is connected to the semiconductor device to be tested through a surge test channel, outputs a surge test signal and displays test data of the device; The control signal processing unit controls the working states of the avalanche test unit and the surge test unit to ensure that the avalanche test channel and the surge test channel are not enabled at the same time, and generates a conversion signal to switch the test circuit; The self-test comparison unit is used to receive the output signals of the avalanche test unit and the surge test unit and perform self-test to determine whether the protection circuit is working normally, and transmit the self-test result to the control signal processing unit; The determination unit is used to compare the output signals of the avalanche test circuit and the surge test circuit, identify abnormal signals therein and drive a red LED light to prompt the operator; The radiation protection unit wraps all the above units with radiation-proof materials and is exposed to the radiation environment.

2. The experimental system for measuring electrical characteristics of a device under irradiation environment according to claim 1, characterized in that: The avalanche test unit includes a power supply, an oscilloscope and an avalanche test circuit. The avalanche test circuit is connected to the trigger unit through a first channel, and is respectively connected to the G end, D end and S end of the semiconductor device to be tested through a second channel, a third channel and a fourth channel. The first channel is used to trigger an avalanche test signal, and the second channel, the third channel and the fourth channel are used to input the test signal into the device to be tested.

3. The experimental system for measuring electrical characteristics of a device under irradiation environment according to claim 2, characterized in that: The avalanche test circuit includes a protection circuit, a control circuit and a test circuit, wherein the protection circuit is used to protect the device under test from being damaged by high current, the control circuit is used to send a self-test signal and transmit the self-test result to a self-test comparison unit, and the test circuit performs an avalanche test operation.

4. The experimental system for measuring electrical characteristics of a device under irradiation environment according to claim 3, characterized in that: The surge test unit includes a power supply, an oscilloscope and a surge test circuit, wherein the surge test circuit is connected to the trigger unit through a fifth channel, and is respectively connected to the G end, the D end and the S end of the semiconductor device to be tested through a sixth channel, a seventh channel and an eighth channel, wherein the fifth channel is used to trigger a surge test signal, and the sixth channel, the seventh channel and the eighth channel are used to input the test signal into the device to be tested.

5. The experimental system for measuring electrical characteristics of a device under irradiation environment according to claim 4, characterized in that: The surge test circuit includes a protection circuit, a control circuit and a test circuit, wherein the protection circuit is used to protect the device under test from damage caused by excessive current, the control circuit is used to send a self-test signal and transmit the self-test result to a self-test comparison unit, and the test circuit performs a surge test operation.

6. The experimental system for measuring electrical characteristics of a device under irradiation environment according to claim 5, characterized in that: The control signal processing unit includes a signal generator, an FPGA and a Bluetooth module. The signal generator is used to control the switching of the test signal input channels of the avalanche test unit and the surge test unit, and to generate a conversion signal to switch the test circuit.

7. The experimental system for measuring electrical characteristics of a device under irradiation environment according to claim 6, characterized in that: The control signal processing unit controls the on and off of the first channel of the avalanche test unit and the fifth channel of the surge test unit through one channel of the signal generator, and the control signal processing unit is used to control the second channel to the fourth channel and the sixth channel to the eighth channel through the second channel of the signal generator; the third channel of the signal generator is used to generate a conversion signal to switch the main test circuit and the backup test circuit.

8. The experimental system for measuring electrical characteristics of a device under irradiation environment according to claim 1, characterized in that: The self-test comparison unit receives the output signals of the avalanche test unit and the surge test unit, and determines the self-test result of the protection circuit. If an abnormality is found in the protection circuit or other test circuits, a fault signal is output to the control signal processing unit, and the control signal processing unit switches the test circuit or sends an alarm signal to a remote computer.

9. The experimental system for measuring electrical characteristics of a device under irradiation environment according to claim 7, characterized in that: The avalanche test unit is provided with a plurality of avalanche test circuits, the surge test unit is provided with a plurality of surge test circuits, and the determination unit comprises a NAND gate, an XOR gate and an SR latch, which are respectively connected to the output ends of the plurality of avalanche test circuits and the surge test circuit, and are used for comparing the output signals and driving a red LED light to display an abnormal output signal different from other signals.

10. The experimental system for measuring electrical characteristics of a device under irradiation environment according to claim 7, characterized in that: The first channel, the second channel, the third channel and the fourth channel include a MEMS switch and an inverter; the fifth channel, the sixth channel, the seventh channel and the eighth channel include a MEMS switch.

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