Chip testing device and chip testing equipment

Abstract

A chip testing device and a chip testing equipment relate to the field of chip testing technology. The chip testing device includes a high and low temperature chuck, a main circuit board and an auxiliary circuit board. The high and low temperature chuck is provided with a bearing surface. The main circuit board is arranged on the bearing surface. A plurality of test areas are divided on one end surface of the main circuit board away from the bearing surface. A spacing area is formed between adjacent test areas. The test area is configured to assemble a chip to be tested. The auxiliary circuit board is arranged in the spacing area and extends in a direction away from the main circuit board. The auxiliary circuit board is configured to provide a test signal to the main circuit board and output the test signal to the chip to be tested through the main circuit board. The designed chip testing device can simplify the structure of the test area on the main circuit board, and then reduce the size of the test area, so that more test areas can be divided on the main circuit board to assemble the chip to be tested, thereby improving the density of the chip to be tested on the main circuit board, effectively improving the test efficiency and reducing the test cost.

Description

Technical Field

[0001] The present application relates to the field of chip testing technology, and in particular to a chip testing device and a chip testing equipment. Background Art

[0002] Usually, when testing, the chip needs to be fixed on the main circuit board. At the same time, other structures or units used to control the chip will be installed on the main circuit board. This will compress or reduce the area of ​​the main circuit board where the chip can be installed, reduce the density of chip installation on the main circuit board, and thus reduce the chip testing efficiency and increase the chip testing cost. Summary of the invention

[0003] The present application provides a chip testing device and a chip testing equipment, the main purpose of which is to improve chip testing efficiency and reduce chip testing costs.

[0004] According to a first aspect of the present application, a chip testing device is provided, comprising:

[0005] High and low temperature chuck with bearing surface;

[0006] A main circuit board is arranged on the carrying surface, and a plurality of test areas distributed in a horizontal and vertical array are divided on an end surface of the main circuit board away from the carrying surface, and a spacing area is formed between adjacent test areas, and the test area is configured to assemble a chip to be tested;

[0007] The auxiliary circuit board is arranged in the spacer area and extends in a direction away from the main circuit board. The auxiliary circuit board is configured to provide a test signal to the main circuit board and output the test signal to the chip to be tested through the main circuit board.

[0008] In one embodiment, the auxiliary circuit board is further configured to provide a power signal and / or a driving signal to the main circuit board.

[0009] In one embodiment, it further includes a plurality of circuit units, each of which is at least partially or completely assembled on the auxiliary circuit board, and each of the circuit units cooperates with each other to output the test signal and / or the power supply signal and / or the drive signal.

[0010] In one embodiment, among the circuit units, at least some of the circuit units are mounted on the auxiliary circuit board, and the remaining circuit units are mounted in the test area; and / or, there is at least one circuit unit mounted on the auxiliary circuit board with a surface area larger than the surface area of ​​any circuit unit mounted in the test area.

[0011] In one embodiment, the auxiliary circuit board is divided into a plurality of bearing areas, and each of the circuit units is at least partially or completely assembled in the bearing area.

[0012] In one embodiment, the test signal is a test signal with a current greater than 10A and a pulse width in nanoseconds; and / or, further comprising a second connector, and the auxiliary circuit board is configured to be electrically connected to an external signal component through the second connector.

[0013] In one embodiment, the auxiliary circuit board is in a sheet or plate shape and is arranged along an extension direction perpendicular to the main circuit board; and / or the auxiliary circuit board is in a sheet or plate shape and is arranged obliquely along an extension direction perpendicular to the main circuit board.

[0014] In one embodiment, the auxiliary circuit board is configured in plurality, and the plurality of test areas form a square array distributed in multiple rows and columns on the main circuit board, and the auxiliary circuit board is fixed on the spacing area between the test areas in adjacent rows or columns.

[0015] In one embodiment, the auxiliary circuit board is in the shape of a sheet or a plate and is arranged along an extension direction perpendicular to the main circuit board. The plurality of auxiliary circuit boards are divided into two groups, and the auxiliary circuit boards in different groups are perpendicular to each other.

[0016] According to a second aspect of the present application, a chip testing device is provided, comprising an external signal component and the above-mentioned chip testing device, wherein the external signal component and the chip testing device are electrically connected, and the external signal component is used to provide a test signal to the auxiliary circuit board.

[0017] According to the chip testing device in the above embodiment, an auxiliary circuit board is provided at one end of the main circuit board away from the bearing surface, the auxiliary circuit board extends in a direction away from the main circuit board, and the auxiliary circuit board is configured to provide a test signal to the main circuit board, and output the test signal to the chip to be tested through the main circuit board. In this way, the structure of the test area on the main circuit board can be effectively simplified, and the size of the test area can be reduced, so that more test areas can be divided on the main circuit board to assemble the chip to be tested, and the density of the chip to be tested on the main circuit board is increased, so that more chips to be tested can be tested in the same batch using the chip testing device, effectively improving the test efficiency and reducing the test cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 This is a schematic diagram of an explosion of a chip testing device in one embodiment of the present application;

[0019] Figure 2 This is a three-dimensional schematic diagram of a chip testing device in an embodiment of the present application;

[0020] Figure 3 This is a schematic diagram of assembling multiple auxiliary circuit boards in one embodiment of the present application;

[0021] Figure 4 This is a three-dimensional schematic diagram of an auxiliary circuit board and a main circuit board in one embodiment of the present application;

[0022] Figure 5 This is a schematic diagram of a circuit unit module in an embodiment of the present application.

[0023] Explanation of the reference numerals: 10. high and low temperature chuck, 11. carrying surface, 20. main circuit board, 21. test area, 22. spacing area, 30. auxiliary circuit board, 31. carrying area, 32. card slot, 40. chip to be tested, 50. circuit unit, 51. driving circuit unit, 52. auxiliary circuit unit, 521. power supply module, 522. signal modulation module, 60. first connector, 70. second connector. DETAILED DESCRIPTION

[0024] The present application is further described in detail below by specific embodiments in conjunction with the accompanying drawings. Wherein similar elements in different embodiments adopt associated similar element numbers. In the following embodiments, many detailed descriptions are intended to enable the present application to be better understood. However, those skilled in the art can easily recognize that some of the features can be omitted in different situations, or can be replaced by other elements, materials, and methods. In some cases, some operations related to the present application are not shown or described in the specification, in order to avoid the core part of the present application being overwhelmed by too much description, and for those skilled in the art, it is not necessary to describe these related operations in detail, and they can fully understand the related operations based on the description in the specification and the general technical knowledge in the art.

[0025] In addition, the features, operations or characteristics described in the specification can be combined in any appropriate manner to form various implementations. At the same time, the steps or actions in the method description can also be interchanged or adjusted in a manner that is obvious to those skilled in the art. Therefore, the various sequences in the specification and the drawings are only for the purpose of clearly describing a certain embodiment and are not meant to be a required sequence, unless otherwise specified that a certain sequence must be followed.

[0026] The serial numbers assigned to the components herein, such as "first", "second", etc., are only used to distinguish the objects described and do not have any order or technical meaning. The "connection" and "coupling" mentioned in this application, unless otherwise specified, include direct and indirect connections (couplings).

[0027] like Figure 1-Figure 5 As shown, a chip testing device is provided in one embodiment of the present application, including: a high and low temperature chuck 10 , a main circuit board 20 and an auxiliary circuit board 30 .

[0028] The high and low temperature chuck 10 is provided with a bearing surface 11 .

[0029] The main circuit board 20 is disposed on the carrying surface 11 . A plurality of test areas 21 distributed in a horizontal and vertical array are divided on one end surface of the main circuit board 20 away from the carrying surface 11 . A spacing area 22 is formed between adjacent test areas 21 . The test area 21 is configured to assemble the chip 40 to be tested.

[0030] The auxiliary circuit board 30 is disposed in the spacing area 22 and extends in a direction away from the main circuit board 20 . The auxiliary circuit board 30 is configured to provide a test signal to the main circuit board 20 and output the test signal to the chip under test 40 through the main circuit board 20 .

[0031] The chip testing device in the above embodiment is used, and an auxiliary circuit board 30 is provided at one end of the main circuit board 20 away from the bearing surface 11, and the auxiliary circuit board 30 extends in a direction away from the main circuit board 20, and the auxiliary circuit board 30 is configured to provide a test signal to the main circuit board 20, and output the test signal to the chip to be tested 40 through the main circuit board 20. In this way, the structure of the test area 21 on the main circuit board 20 can be effectively simplified, and the size of the test area 21 can be reduced, so that more test areas 21 can be divided on the main circuit board 20 to assemble the chip to be tested 40, and the density of the chip to be tested 40 on the main circuit board 20 is improved, so that more chips to be tested 40 can be tested in the same batch by using the chip testing device, which effectively improves the test efficiency and reduces the test cost.

[0032] The test signal may be a test signal with a current greater than 10A and a pulse width in nanoseconds.

[0033] The chip to be tested 40 and the test area 21 are arranged in one-to-one correspondence. The chip to be tested 40 can be a part of the chip testing device, or the chip to be tested 40 can be an independent part relative to the chip testing device. When in use, the chip to be tested 40 can be assembled in the test area 21 of the main circuit board 20, and this application does not impose any specific restrictions.

[0034] The chip to be tested 40 is specifically, for example, a VCSEL to be tested or a VCSEL packaging module to be tested. It can be understood that the VCSEL to be tested refers to an unpackaged die, that is, a bare core, and the packaged VCSEL to be tested is also the VCSEL packaging module to be tested. The VCSEL packaging module to be tested is a separate device, which can be directly assembled in the test area 21 of the main circuit board 20 using a conventional welding process. For unpackaged VCSELs to be tested, corresponding machines are required to assist in assembly. The specific use form of the chip to be tested 40 can be flexibly selected according to actual conditions, and this application does not impose specific restrictions.

[0035] The high and low temperature chuck 10 fixes the main circuit board 20 on the bearing surface 11 by adsorption, for example, by electrostatic adsorption, vacuum airflow adsorption, etc. In addition, the high and low temperature chuck 10 also has the ability to provide high and low temperatures, so as to provide a suitable test temperature for the chip 40 to be tested on the main circuit board 20.

[0036] The number of chips 40 to be tested mounted on the main circuit board 20 is based on the principle of placing the largest number. Figure 1-Figure 2 As shown, taking a circular chuck as an example, the corresponding main circuit board 20 is a corresponding circular sheet structure. At this time, the multiple test areas 21 distributed in a horizontal and vertical array correspond to the multiple rows and columns of test areas 21 formed on the main circuit board 20. The multiple test areas 21 on each row are evenly spaced, and the multiple test areas 21 on each column are evenly spaced. In addition, the spacing area 22 between adjacent test areas 21 on each row can be equal to the spacing area 22 between adjacent test areas 21 on each column. In this way, the multiple test areas 21 can be evenly distributed on the main circuit board 20 as a whole, which is convenient for making full use of the area on the main circuit board 20, and then it is convenient to assemble more chips 40 to be tested, or to increase the density of assembling the chips 40 to be tested on the main circuit board 20.

[0037] The auxiliary circuit board 30 is also configured to provide power signals and / or driving signals to the main circuit board 20. The auxiliary circuit board 30 and the main circuit board 20 can be fixed to each other by welding or connecting parts.

[0038] like Figure 5 As shown, the chip testing device further includes a plurality of circuit units 50, each circuit unit 50 is at least partially or completely assembled on the auxiliary circuit board 30, and each circuit unit 50 cooperates with each other to output a test signal and / or a power signal and / or a drive signal.

[0039] Among the circuit units 50, when at least some of the circuit units 50 are mounted on the auxiliary circuit board 30, the remaining circuit units 50 are mounted on the test area 21; and / or, at least one circuit unit 50 mounted on the auxiliary circuit board 30 has a surface area greater than the surface area of ​​any circuit unit 50 mounted on the test area 21. In this way, the assembly area on the main circuit board 20 can be effectively utilized, which facilitates the assembly of more chips 40 to be tested, improves the density of the chips 40 to be tested on the main circuit board 20, and thus improves the test efficiency and reduces the test cost.

[0040] The auxiliary circuit board 30 is divided into several bearing areas 31, and each circuit unit 50 is at least partially or completely assembled in the bearing area 31. The fixed relationship between the bearing area 31 and the assembled circuit unit 50 can be one-to-one or one-to-many, and there is no specific limitation, as long as the bearing area 31 can be equipped with at least part of the circuit unit 50.

[0041] like Figure 5 As shown, specifically, the circuit unit 50 includes an electrically connected driving circuit unit 51 and an auxiliary circuit unit 52. The auxiliary circuit unit 52 is used to modulate the power signal and the driving signal and send them to the driving circuit unit 51. The driving circuit unit 51 is electrically connected to the chip under test 40. The driving circuit unit 51 is used to convert the signal sent by the auxiliary circuit unit 52 into a large current short pulse signal to drive the chip under test 40 to emit light.

[0042] The auxiliary circuit unit 52 includes a power supply module 521 and a signal modulation module 522 . The power supply module 521 is used to provide a modulated power signal to the driving circuit unit 51 . The signal modulation module 522 is used to modulate the driving signal and send it to the driving circuit unit 51 .

[0043] The chip testing device also includes a first connector 60 and a second connector 70. The first connector 60 is electrically connected to the driving circuit unit 51 and the auxiliary circuit unit 52, respectively. The first connector 60 can enhance the signal stability of the electrical connection between the driving circuit unit 51 and the auxiliary circuit unit 52. A connection port (such as an HDMI port) is fixed on the auxiliary circuit board 30. One end of the second connector 70 is electrically connected to the power supply module 521 and the signal modulation module 522 through the connection port, and the other end of the second connector 70 is electrically connected to an external signal component, such as an external power supply and an external control instrument. The external power supply is used to provide a power signal to the auxiliary circuit board 30, and the external control instrument is used to provide a driving signal to the auxiliary circuit board 30. The second connector 70 facilitates the transmission of the external power signal and the driving signal to the auxiliary circuit unit 52. Among them, the connection port, the external power supply and the external control instrument are not shown in the figure.

[0044] In other implementations, the auxiliary circuit unit 52 may also add or replace other functional modules according to the test item requirements, so as to assist the driving circuit unit 51 to better play its role.

[0045] In some embodiments of the present application, the circuit unit 50 is arranged in a one-to-one correspondence with the chip under test 40. When the circuit unit 50 includes a driving circuit unit 51 and an auxiliary circuit unit 52, the driving circuit unit 51 can be arranged in a one-to-one correspondence with the chip under test 40, and / or the auxiliary circuit unit 52 can be arranged in a one-to-one correspondence with the chip under test 40.

[0046] Specifically, taking the example that the driving circuit unit 51 and the auxiliary circuit unit 52 are both arranged in one-to-one correspondence with the chip to be tested 40, wherein a plurality of carrying areas 31 are divided on the auxiliary circuit board 30, the driving circuit unit 51 is assembled in the test area 21, and the auxiliary circuit unit 52 is assembled in the carrying area 31, or both the driving circuit unit 51 and the auxiliary circuit unit 52 are assembled in the carrying area 31.

[0047] In actual use, the main circuit board 20 is a consumable material, and the structures in the circuit unit 50 are all assembled in the bearing area 31 of the auxiliary circuit board 30, which can not only undertake the structure with a larger occupied area, but also leave sufficient space for the main circuit board 20 to divide the test area 21, so as to increase the density of the chips 40 to be tested assembled on the main circuit board 20, improve the test efficiency of the chips 40 to be tested, and reduce the material cost. For example, in actual testing, only the main circuit board 20 needs to be replaced, and the auxiliary circuit board 30 can continue to be used, without the need to replace the main circuit board 20 and the auxiliary circuit board 30 as a whole.

[0048] If some test situations require that the driving circuit unit 51 be relatively close to the chip to be tested 40, then both the driving circuit unit 51 and the chip to be tested 40 can be assembled in the test area 21 of the main circuit board 20, and the auxiliary circuit unit 52 can be taken out and assembled on the auxiliary circuit board 30, which can also save a part of the assembly area of ​​the test area 21, thereby facilitating the assembly of more chips to be tested 40 on the main circuit board 20.

[0049] The specific circuit structures on the main circuit board 20 and the auxiliary circuit board 30 can be flexibly increased or decreased according to actual conditions, and the layout can be flexibly divided on the main circuit board 20 and the auxiliary circuit board 30. For example, in other embodiments, the driving circuit units 51 and the auxiliary circuit units 52 corresponding to some chips 40 to be tested can be assembled in the bearing area 31 of the auxiliary circuit board 30, and the driving circuit units 51 corresponding to the remaining chips 40 to be tested can be assembled in the test area 21 of the main circuit board 20, and the auxiliary circuit units 52 corresponding to the remaining test pieces can be assembled in the bearing area 31 of the auxiliary circuit board 30. Alternatively, in other embodiments, the circuit unit 50 and the chip 40 to be tested are in a one-to-many relationship, for example, the circuit unit 50 is assembled on the auxiliary circuit board 30, and one circuit unit 50 is used to drive two, three, or six chips 40 to be tested to emit light.

[0050] More preferably, in some embodiments of the present application, the auxiliary circuit board 30 is in the form of a sheet or a plate and is arranged along an extension direction perpendicular to the main circuit board 20, for example Figure 1-Figure 2 shown.

[0051] When the auxiliary circuit board 30 is in a sheet or plate shape and is arranged along the extension direction perpendicular to the main circuit board 20, that is, the auxiliary circuit board 30 and the main circuit board 20 are vertically distributed in space, the auxiliary circuit board 30 can be prevented from blocking the outgoing light path of the chip to be tested 40. When the outgoing light path of the chip to be tested 40 is not blocked, more effective test areas 21 can be divided on the main circuit board 20, and the chips to be tested 40 in the test areas 21 can all be effectively tested.

[0052] In other embodiments, if the number of chips 40 to be tested mounted on the main circuit board 20 is less required, the auxiliary circuit board 30 can be arranged in a sheet or plate shape and tilted along the extension direction perpendicular to the main circuit board 20. For example, two auxiliary circuit boards 30 that are distributed in opposite directions are fixed on the main circuit board 20, and there is no light path obstruction in the test area 21 between the two auxiliary circuit boards 30 that are in opposite directions and close to each other. The main circuit board 20 at this location can make full use of its area to divide more test areas 21, so as to facilitate the assembly of more chips 40 to be tested. The projection of the two auxiliary circuit boards 30 on the side away from each other on the main circuit board 20 will block a part of the main circuit board 20, and correspondingly, the blocked area can avoid not dividing or assembling the chips 40 to be tested.

[0053] like Figure 1-Figure 2 As shown, in some embodiments of the present application, the auxiliary circuit board 30 is configured as a plurality of test areas 21 forming a square array distributed in multiple rows and columns on the main circuit board 20, and the auxiliary circuit board 30 is fixed on the spacing area 22 between adjacent rows or columns of test areas 21. Correspondingly, the length of the auxiliary circuit board 30 is adapted to the total length formed by multiple test areas 21 on the same column or row.

[0054] Multiple auxiliary circuit boards 30 can provide more assembly area, which is convenient for assembling the remaining structures of the test area 21 except the chip to be tested 40, such as the circuit unit 50, so as to simplify the area or size of the test area 21, thereby increasing the density of assembling the chip to be tested 40 on the main circuit board 20.

[0055] Specifically, in some embodiments, a plurality of auxiliary circuit boards 30 are arranged in parallel. Figure 1-Figure 2 As shown, the chip testing device includes two parallel auxiliary circuit boards 30 .

[0056] Specifically, in some other implementations, the plurality of auxiliary circuit boards 30 may be divided into two groups, the auxiliary circuit boards 30 in different groups are perpendicular to each other, and the plurality of auxiliary circuit boards 30 in the same group are parallel to each other.

[0057] All auxiliary circuit boards 30 are perpendicular to the main circuit board 20, and the main circuit board 20 is divided into multiple test areas 21 distributed in horizontal and vertical arrays. At this time, when the auxiliary circuit boards 30 in different groups are perpendicular, the auxiliary circuit boards 30 can be prevented from blocking the chip to be tested 40 on the main circuit board 20, thereby ensuring the test environment of the chip to be tested 40 or ensuring that the chip to be tested 40 is tested smoothly.

[0058] For example Figure 3 As shown, each group includes two parallel auxiliary circuit boards 30, and the two groups of auxiliary circuit boards 30 are adjacently distributed in space, and the two groups of auxiliary circuit boards 30 form a structure similar to a tic-tac-toe. The two groups of auxiliary circuit boards 30 are stacked in space, which can further increase the number of auxiliary circuit boards 30 corresponding to the main circuit board 20, thereby increasing the assembly area of ​​the auxiliary circuit boards 30 that can carry at least part of the circuit unit 50. More preferably, both sides of the auxiliary circuit board 30 are provided with a card slot 32, and the two perpendicular auxiliary circuit boards 30 are connected by the card slot 32. In this way, when the two groups of auxiliary circuit boards 30 are connected, at least the relative position can be fixed by the card slot 32 first, so that other methods can be used for connection, such as fixing the two groups of auxiliary circuit boards 30 after being connected by welding. Among them, the auxiliary circuit board 30 close to the main circuit board 20 has a card slot 32 opened at the bottom, which does not need to be connected to other auxiliary circuit boards 30. However, when soldering is performed between the auxiliary circuit board 30 and the main circuit board 20 through the card slot 32 at this location, the solder contact area can be increased, thereby increasing the connection strength or connection stability between the auxiliary circuit board 30 and the main circuit board 20.

[0059] Another example is Figure 4 As shown, each group includes two parallel auxiliary circuit boards 30, and the auxiliary circuit boards 30 in different groups are perpendicular to each other. However, at this time, the two groups of auxiliary circuit boards 30 are located at the same level or at the same height. For example, the two groups of auxiliary circuit boards 30 form Figure 4 The U-shaped or U-shaped structure shown in FIG. 3 can be fixedly connected between the vertical auxiliary circuit boards 30 in different groups, for example, by welding.

[0060] Alternatively, the plurality of auxiliary circuit boards 30 included in the chip testing device may include Figure 4 The mouth-shaped combination shown in also includes Figure 3 Regarding the number of groups of the plurality of auxiliary circuit boards 30, in addition to the two groups listed, the number can also be increased or decreased according to actual conditions.

[0061] In another embodiment of the present application, a chip testing device is provided, including an external signal component (not shown) and the chip testing device in the above embodiment, the external signal component and the chip testing device are electrically connected, and the external signal component is used to provide a test signal to the auxiliary circuit board 30.

[0062] The external signal component is, for example, an external power supply and an external control instrument, which are electrically connected to the auxiliary circuit board 30 respectively. The external power supply is used to provide a power signal to the auxiliary circuit board 30, and the external control instrument is used to provide a driving signal and / or a test signal to the auxiliary circuit board 30.

[0063] A chip testing device or a chip testing equipment corresponding to the testing method designed in this application is introduced as follows:

[0064] After the various parts of the chip testing device are assembled and connected, the high and low temperature chuck 10 is started. The high and low temperature chuck 10 can adjust and control the temperature of the main circuit board 20 through the bearing surface 11. When the main circuit board 20 reaches the required test temperature, the external power supply is started to provide a power signal, and the external control instrument sends a corresponding drive signal according to the test items of the chip 40 to be tested.

[0065] The power signal provided by the external power supply is transmitted to the power supply module 521 in the auxiliary circuit unit 52 through the second connector 70. The power supply module 521 modulates the power signal and sends it to the driving circuit unit 51 through the first connector 60. For example, the external power supply provides a 10V power signal, and the power supply module 521 modulates the 10V power signal into a 3V power signal that is compatible with the driving circuit unit 51. Alternatively, the power supply module 521 can also perform noise reduction processing on the power signal.

[0066] The driving signal provided by the external control instrument is transmitted to the signal modulation module 522 through the second connector 70, and the signal modulation module 522 modulates the driving signal and sends it to the driving circuit unit 51 through the first connector 60. Among them, the external control instrument is flexibly selected according to the test items of the chip to be tested 40, and this application does not impose specific restrictions.

[0067] The driving circuit unit 51 receives the modulated power signal and driving signal through the first connector 60 , and is used to convert the signal sent by the auxiliary circuit unit 52 into a large current short pulse signal to drive the chip under test 40 to emit light and start the test process.

[0068] By using the chip testing device in the above embodiment and the chip testing equipment containing the chip testing device, it is possible to implement high current short pulse testing in different high and low temperature environments. The auxiliary circuit board 30 can undertake part or all of the circuit units 50 corresponding to the chip to be tested 40 on the main circuit board 20, thereby reducing the size of the test area 21, so that the main circuit board 20 can be divided into more test areas 21, and then more chips to be tested 40 can be assembled, which is convenient for testing more chips to be tested 40 at the same time, improving test efficiency and reducing test costs. In addition, the auxiliary circuit board 30 and the main circuit board 20 are vertically distributed, which can effectively avoid the auxiliary circuit board 30 from blocking the outgoing light path of the chip to be tested 40 on the test area 21, which is convenient for ensuring the area utilization on the main circuit board 20, thereby ensuring test efficiency and test costs. The designed chip testing device has a simple structure, reliability, high feasibility, fast implementation, stable performance, strong versatility, good stability, mass production, and standardization.

[0069] The above specific examples are used to illustrate the present application, which is only used to help understand the present application and is not intended to limit the present application. For technicians in the technical field to which the present application belongs, they can also make some simple deductions, deformations or substitutions based on the ideas of the present application.

Claims

1. A chip testing device, characterized in that: include: High and low temperature chuck with bearing surface; A main circuit board is arranged on the carrying surface, and a plurality of test areas distributed in a horizontal and vertical array are divided on an end surface of the main circuit board away from the carrying surface, and a spacing area is formed between adjacent test areas, and the test area is configured to assemble a chip to be tested; An auxiliary circuit board, the auxiliary circuit board is configured to provide a test signal to the main circuit board, and output the test signal to the chip to be tested through the main circuit board; a plurality of the test areas form a square array distributed in multiple rows and columns on the main circuit board, and the auxiliary circuit board is fixed on the spacing area between the test areas in adjacent rows or columns; the auxiliary circuit boards are configured in multiple pieces, the auxiliary circuit boards are in the shape of sheets or plates and are arranged along an extension direction perpendicular to the main circuit board, and the multiple auxiliary circuit boards are divided into two groups, and the auxiliary circuit boards in different groups are perpendicular to each other.

2. The chip testing device according to claim 1, characterized in that: The auxiliary circuit board is further configured to provide a power signal and / or a driving signal to the main circuit board.

3. The chip testing device according to claim 2, characterized in that: It also includes a plurality of circuit units, each of which is at least partially or completely assembled on the auxiliary circuit board, and each of the circuit units cooperates with each other to output the test signal and / or the power supply signal and / or the drive signal.

4. The chip testing device according to claim 3, characterized in that: Among the circuit units, at least part of the circuit units are mounted on the auxiliary circuit board, and the remaining circuit units are mounted in the test area; and / or, at least one circuit unit mounted on the auxiliary circuit board has a surface area larger than the surface area of ​​any circuit unit mounted in the test area.

5. The chip testing device according to claim 3, characterized in that: The auxiliary circuit board is divided into a plurality of bearing areas, and each of the circuit units is at least partially or completely assembled in the bearing area.

6. The chip testing device according to claim 1, characterized in that: The test signal is a test signal with a current greater than 10A and a pulse width in nanosecond level; and / or, further comprising a second connector, wherein the auxiliary circuit board is configured to be electrically connected to an external signal component through the second connector.

7. A chip testing device, characterized in that: It comprises an external signal component and a chip testing device as claimed in any one of claims 1 to 6, wherein the external signal component is electrically connected to the chip testing device, and the external signal component is used to provide a test signal to the auxiliary circuit board.

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