Display panel and display device
By setting coupled low-frequency signal lines and common electrode traces in the border area of the liquid crystal display panel, and controlling the electrical connection with the switch unit, the problem of poor response speed of the liquid crystal is solved, and efficient heating and display at low temperatures is achieved.
Patent Information
- Application Number
- CN202411996923.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-31
- Publication Date
- 2025-02-28
- Estimated Expiration
- 2044-12-31
AI Technical Summary
The LCD response speed of existing LCD monitors is poor, especially at low temperatures, which affects the display quality.
A gate driving circuit is provided in the frame area of the display panel, including coupling of the low-frequency signal line and the common electrode trace. The switching unit controls the electrical connection and disconnection of the low-frequency signal line and the common electrode trace, and is used as a heating electrode in the heating stage.
By time-sharing multiplexing of the signals provided by the low-frequency signal line, there is no need to add additional heating electrodes and heating signals, the process is simpler and the power consumption is lower, which improves the display speed and display quality of the display panel at low temperatures.
Smart Images

Figure CN119535849A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art
[0002] Most liquid crystal displays (LCDs) are backlight type LCDs, which include a housing, a liquid crystal display panel disposed in the housing, and a backlight module in the housing. The LCD requires a light source provided by the backlight module to display light normally.
[0003] Usually, a liquid crystal display panel is made of two glass substrates (array glass and color filter glass) bonded together, with liquid crystal poured between the two glass substrates. Pixel electrodes and common electrodes are set on the opposite inner sides of the two glass substrates, and the voltage field strength is used to control the rotation direction of the liquid crystal molecules to refract the light from the backlight module to produce a picture.
[0004] LCD has a greater adhesion due to the characteristics of the liquid crystal molecules themselves; due to its poor response speed, especially at low temperatures, its ghosting is more obvious, seriously affecting the display quality. Summary of the invention
[0005] The main technical problem solved by the present application is to provide a display panel and a display device to solve the problem of poor response speed of liquid crystal in the prior art.
[0006] In order to solve the above technical problems, the first technical solution provided by the present application is: to provide a display panel having a display area and a frame area; wherein, the display panel comprises:
[0007] The array substrate includes a gate drive circuit located in the border area; the gate drive circuit includes a low-frequency signal line;
[0008] Common electrode routing, located in the border area;
[0009] The low-frequency signal line is coupled to the common electrode line, so that the common electrode line and the low-frequency signal line serve as heating electrodes during the heating stage.
[0010] Wherein, the array substrate further includes a switch unit, and the switch unit is connected between the low-frequency signal line and the common electrode wiring;
[0011] In the display stage, the switch unit is turned off, and the low-frequency signal line is electrically disconnected from the common electrode wiring;
[0012] In the heating stage, the switch unit is turned on, the low-frequency signal line is electrically connected to the common electrode wiring, and serves as a heating electrode.
[0013] There is at least one low-frequency signal line; there is at least one common electrode line; and each common electrode line is electrically connected to at least one low-frequency signal line;
[0014] When there are multiple common electrode wirings, the multiple common electrode wirings are insulated from each other.
[0015] The low-frequency signal line includes a first low-frequency signal line and a second low-frequency signal line; one of the first low-frequency signal line and the second low-frequency signal line is at a low potential, and the other is at a high potential;
[0016] The switch unit includes a first switch and a second switch;
[0017] The first switch is connected between the first low-frequency signal line and the common electrode line, and the second switch is connected between the second low-frequency signal line and the common electrode line;
[0018] In the display stage, the first switch and the second switch are both closed;
[0019] In the heating stage, the first switch and the second switch are both turned on, and the first low-frequency signal line, the common electrode line and the second low-frequency signal line are connected in sequence to form a closed loop.
[0020] Wherein, the gate drive circuit further includes a ground signal line, and the switch unit includes a first switch and a second switch;
[0021] The first switch is connected between the low-frequency signal line and the common electrode wiring, and the second switch is connected between the ground signal line and the common electrode wiring; the low-frequency signal line is at a high potential;
[0022] In the display stage, the first switch and the second switch are both closed;
[0023] In the heating stage, the first switch and the second switch are both turned on, and the low-frequency signal line, the common electrode line and the ground signal line are connected in sequence to form a closed loop.
[0024] The display panel further includes a color filter substrate and a conductive portion located between the color filter substrate and the array substrate; the conductive portion is located in the frame area;
[0025] The common electrode wiring includes a first common electrode wiring and / or a second common electrode wiring;
[0026] The first common electrode wiring is arranged on the color filter substrate; the switch unit is connected between the conductive part and the low-frequency signal line, and the conductive part is connected between the first common electrode wiring and the switch unit;
[0027] The second common electrode wiring is arranged on the array substrate and at least one side of the display area; the switch unit is connected between the second common electrode wiring and the low-frequency signal line.
[0028] The conductive part is a conductive gold ball or a conductive glue.
[0029] The color film substrate further includes a color film common electrode layer located in the display area.
[0030] in,
[0031] The color film common electrode layer is electrically connected to the first common electrode wiring; the first common electrode wiring is connected to an external power supply in the display stage to load a first common voltage and transmit it to the color film common electrode layer; the color film common electrode layer and the first common electrode wiring are patterned and formed by the same conductive layer, or the color film common electrode layer and the first common electrode wiring are made of different materials;
[0032] or,
[0033] The color film common electrode layer is insulated from the first common electrode wiring and is connected to an external power source in the display stage to load a first common voltage.
[0034] The array substrate further includes an array common electrode layer located in the display area.
[0035] The array common electrode layer is electrically connected to the second common electrode wiring; the second common electrode wiring is connected to an external power supply in the display stage to load a second common voltage and transmit it to the array common electrode layer;
[0036] or,
[0037] The array common electrode layer is insulated from the second common electrode wiring and is connected to an external power source in the display stage to load the second common voltage.
[0038] In order to solve the above technical problem, the second technical solution provided by the present application is: providing a display device, which includes a driving chip and the above display panel;
[0039] The driving chip is electrically connected to the gate driving circuit.
[0040] Beneficial effects of the present application: Different from the prior art, the present application provides a display panel and a display device, wherein the display panel has a display area and a frame area. The display panel includes an array substrate and a common electrode wiring. The array substrate includes a gate drive circuit located in the frame area. The gate drive circuit includes a low-frequency signal line. The common electrode wiring is located in the frame area. Among them, the low-frequency signal line is coupled to the common electrode wiring so that the common electrode wiring and the low-frequency signal line serve as heating electrodes during the heating stage. In the embodiment of the present application, by electrically connecting the common electrode wiring in the frame area with the low-frequency signal line of the gate drive circuit, so that the common electrode wiring and the low-frequency signal line serve as heating electrodes during the heating stage, and time-division multiplexing the signal provided by the low-frequency signal line, there is no need to add additional heating electrodes and heating signals, the process is simpler, and the power consumption is lower; secondly, the liquid crystal can also be heated in a low-temperature environment to improve the display speed and display quality of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS
[0041] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technical workers in this field, other drawings can be obtained based on these drawings without any creative work.
[0042] Figure 1 is a schematic diagram of the connection structure of the first embodiment of the display panel provided by the present application;
[0043] Figure 2 is a schematic diagram of the longitudinal cross-sectional structure of an embodiment of a display panel provided by the present application;
[0044] Figure 3 It is a structural schematic diagram of a first embodiment of common electrode routing provided in an embodiment of the present application;
[0045] Figure 4 It is a structural schematic diagram of a second embodiment of a common electrode routing provided in an embodiment of the present application;
[0046] Figure 5 It is a structural schematic diagram of a third embodiment of common electrode routing provided in an embodiment of the present application;
[0047] Figure 6 is a schematic diagram of the connection structure of the second embodiment of the display panel provided by the present application;
[0048] Figure 7 is a schematic diagram of the connection structure of the third embodiment of the display panel provided by the present application;
[0049] Figure 8 is a schematic diagram of the connection structure of the fourth embodiment of the display panel provided by the present application;
[0050] Fig. 9 is a schematic diagram of the connection structure of the fifth embodiment of the display panel provided by the present application;
[0051] Fig.10 is a schematic diagram of the connection structure of a sixth embodiment of a display panel provided by the present application;
[0052] Fig.11 This is a schematic diagram of the connection structure of the first common electrode wiring according to the first embodiment of the present application;
[0053] Fig.12 This is a schematic diagram of the connection structure of the second embodiment of the first common electrode wiring provided in the embodiment of the present application;
[0054] Fig.13 This is a schematic diagram of the connection structure of the third embodiment of the first common electrode wiring provided in the embodiment of the present application;
[0055] Fig.14 is a structural schematic diagram of an embodiment of a display device provided in an embodiment of the present application;
[0056] Fig.15 It is a structural schematic diagram of another embodiment of the display device provided in the embodiment of the present application.
[0057] Description of Figure Numbers:
[0058] 100, display panel; 101, display area; 102, frame area; 10, array substrate; 11, gate drive circuit; LC, low-frequency signal line; LC1, first low-frequency signal line; LC2, second low-frequency signal line; VSS, ground signal line; S, switch unit; S1, first switch; S2, second switch; 12, array common electrode layer; 20, common electrode wiring; 21, first common electrode wiring; 22, second common electrode wiring; 30, color film substrate; 31, color film common electrode layer; 40, liquid crystal; 50, conductive part; 60, conduction point; 200, driver chip; 300, flexible printed circuit board; 400, flexible substrate; 500, display device. DETAILED DESCRIPTION
[0059] The scheme of the embodiment of the present application is described in detail below in conjunction with the drawings of the specification.
[0060] In the following description, for the purpose of explanation rather than limitation, specific details such as specific system structures, interfaces, and technologies are provided to facilitate a thorough understanding of the present application.
[0061] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technical workers in the field without making creative work are within the scope of protection of this application.
[0062] The terms "first", "second", "third" in this application are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Thus, the features defined as "first", "second", "third" can expressly or implicitly include at least one of the features. In the description of this application, the meaning of "multiple" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined. In the embodiments of this application, all directional indications (such as up, down, left, right, front, back...) are only used to explain the relative position relationship, movement, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication also changes accordingly. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device comprising a series of steps or units is not limited to the steps or units listed, but optionally also includes steps or units that are not listed, or optionally also includes other steps or units inherent to these processes, methods, products or devices.
[0063] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.
[0064] See also Figure 1 and Figure 2 , Figure 1 is a schematic diagram of the connection structure of the first embodiment of the display panel provided by the present application, Figure 2 It is a schematic diagram of the longitudinal cross-sectional structure of an embodiment of a display panel provided in the present application.
[0065] The present application provides a display panel 100. The display panel 100 has a display area 101 and a frame area 102. The display panel 100 includes an array substrate 10 and a common electrode line 20. The array substrate 10 includes a gate drive circuit 11 located in the frame area 102. The gate drive circuit 11 includes a low-frequency signal line LC. The common electrode line 20 is located in the frame area 102. The low-frequency signal line LC is coupled to the common electrode line 20, so that the common electrode line 20 and the low-frequency signal line LC serve as heating electrodes in the heating stage.
[0066] In the embodiment of the present application, the common electrode line 20 of the border area 102 is electrically connected to the low-frequency signal line LC of the gate drive circuit 11, so that the common electrode line 20 and the low-frequency signal line LC are used as heating electrodes in the heating stage, and the signal provided by the low-frequency signal line LC is time-division multiplexed. There is no need to add additional heating electrodes and heating signals, the process is simpler, and the power consumption is lower. Secondly, the liquid crystal 40 can also be heated in a low-temperature environment to improve the display speed and display quality of the display panel 100.
[0067] The frame area 102 is located on at least one side of the display area 101 .
[0068] Exemplarily, the display area 101 is rectangular, and the frame area 102 is disposed around the display area 101 and is located on four sides of the display area 101 .
[0069] In other embodiments, the display area 101 may be in other shapes such as a circle or an ellipse, which is not restricted here and is selected according to actual needs.
[0070] The common electrode wiring 20 is located on at least one side of the display area 101 .
[0071] See also Figures 1 to 5 , Figure 3 is a structural schematic diagram of a first embodiment of a common electrode routing provided in an embodiment of the present application, Figure 4 is a structural schematic diagram of a second embodiment of a common electrode routing provided in an embodiment of the present application, Figure 5 It is a structural schematic diagram of the third embodiment of the common electrode routing provided in the embodiments of the present application.
[0072] The common electrode wiring 20 may be a straight line structure (see Figure 1 ), broken line structure, or other structures, which are not limited here and can be selected according to actual needs.
[0073] For example, the common electrode trace 20 may be a sawtooth fold line structure (see Figure 3 ), or it can be a bow-shaped broken line structure (see Figure 4 ), or a wavy curved structure (see Figure 5 ).
[0074] The number of the gate driving circuit 11 may be one or more.
[0075] When there is one gate driving circuit 11 , it is located at one side of the display area 101 to drive the display panel 100 unilaterally; when there are two gate driving circuits 11 , the display panel 100 can be driven unilaterally or bilaterally.
[0076] There is no restriction on the number and structure of the gate driving circuits 11 and they can be selected according to actual needs.
[0077] Each gate driving circuit 11 includes at least one low-frequency signal line LC. The number of low-frequency signal lines LC depends on the specific circuit design and application requirements of the gate driving circuit 11.
[0078] In some embodiments, when there are multiple low-frequency signal lines LC, some of the low-frequency signal lines LC can be electrically connected to the common electrode wiring 20 so that some of the low-frequency signal lines LC and the common electrode wiring 20 serve as heating electrodes during the heating stage; all of the low-frequency signal lines LC can also be electrically connected to the common electrode wiring 20 so that all of the low-frequency signal lines LC and the common electrode wiring 20 serve as heating electrodes during the heating stage.
[0079] In some embodiments, the array substrate 10 further includes a switch unit S, and the switch unit S is connected between the low-frequency signal line LC and the common electrode wiring 20 .
[0080] In the display stage, the switch unit S is turned off, and the low-frequency signal line LC is electrically disconnected from the common electrode wiring 20 .
[0081] In the heating stage, the switch unit S is turned on, the low-frequency signal line LC is electrically connected to the common electrode wiring 20 and serves as a heating electrode.
[0082] The embodiment of the present application sets a switch unit S to achieve electrical connection and disconnection between the low-frequency signal line LC and the common electrode wiring 20, so that the low-frequency signal line LC and the common electrode wiring 20 serve as heating electrodes during the heating stage without affecting the normal display of the display panel 100; secondly, the structure is simple and easy to implement.
[0083] There is no restriction on the structure and conductivity type of the switch unit S, and it can be selected according to actual needs.
[0084] In some embodiments, there is at least one low-frequency signal line LC. There is at least one common electrode line 20. Each common electrode line 20 is electrically connected to at least one low-frequency signal line LC. When there are multiple common electrode lines 20, the multiple common electrode lines 20 are insulated from each other.
[0085] Exemplarily, when each common electrode line 20 is electrically connected to a low-frequency signal line LC, in the display stage, the switch unit S is turned off, and the low-frequency signal line LC is disconnected from the common electrode line 20. In the heating stage, the switch unit S is turned on, the low-frequency signal line LC is electrically connected to the common electrode line 20, one end of the common electrode line 20 is loaded with a heating signal through the low-frequency signal line LC, and the other end is electrically connected to an external power supply or other signal line to form a closed loop.
[0086] Exemplarily, when each common electrode line 20 is electrically connected to a plurality of low-frequency signal lines LC, in the heating stage, the common electrode line 20 is electrically connected to the corresponding low-frequency signal line LC to form a closed loop.
[0087] The plurality of common electrode wirings 20 are insulated from each other so as to be independently heated during the heating phase, thereby being able to select the amount of heating applied to the liquid crystal 40 .
[0088] In some embodiments, the low frequency signal line LC includes a first low frequency signal line LC1 and a second low frequency signal line LC2. One of the first low frequency signal line LC1 and the second low frequency signal line LC2 is at a low potential, and the other is at a high potential.
[0089] The switch unit S includes a first switch S1 and a second switch S2.
[0090] The first switch S1 is connected between the first low-frequency signal line LC1 and the common electrode line 20 , and the second switch S2 is connected between the second low-frequency signal line LC2 and the common electrode line 20 .
[0091] In the display stage, both the first switch S1 and the second switch S2 are closed.
[0092] In the heating stage, the first switch S1 and the second switch S2 are both turned on, and the first low-frequency signal line LC1, the common electrode line 20 and the second low-frequency signal line LC2 are sequentially connected to form a closed loop.
[0093] It should be noted that, in the embodiment of the present application, the first low-frequency signal line LC1 and the second low-frequency signal line LC2 are both low-frequency signal lines LC, and “first” and “second” are used to distinguish different low-frequency signal lines LC.
[0094] For example, in the embodiment of the present application, the first low-frequency signal line LC1 is at a high potential, and the second low-frequency signal line LC2 is at a low potential.
[0095] Specifically, a first low-frequency signal line LC1 and a second low-frequency signal line LC2 form a low-frequency signal line LC group. There is at least one low-frequency signal line LC group.
[0096] The first low-frequency signal line LC1 and the second low-frequency signal line LC2 in the same low-frequency signal line LC group may be located at the same side of the display area 101 , or may be located at different sides of the display area 101 .
[0097] The first low-frequency signal line LC1 and the second low-frequency signal line LC2 in the same low-frequency signal line LC group are located in the same gate driving circuit 11 .
[0098] Exemplarily, the first low-frequency signal line LC1 and the second low-frequency signal line LC2 in the same low-frequency signal line LC group are located at the same side of the display area 101 .
[0099] In a specific embodiment, if Figure 1 As shown, there are two low-frequency signal line LC groups and two common electrode lines 20. The two common electrode lines 20 are located on the same side of the display area 101. The two low-frequency signal line LC groups are located on opposite sides of the display area 101, and the low-frequency signal line LC group and the common electrode line 20 are located on different sides of the display area 101. Each common electrode line 20 corresponds to a first switch S1 and a second switch S2. One end of each common electrode line 20 is coupled to the first low-frequency signal line LC1 in a low-frequency signal line LC group, and the other end is coupled to the second low-frequency signal line LC2 in another low-frequency signal line LC group to form a closed loop in the heating stage. The first low-frequency signal line LC1, the common electrode line 20 and the second low-frequency signal line LC2 connected in sequence are time-division multiplexed as heating electrodes; and the signals provided by the first low-frequency signal line LC1 and the second low-frequency signal line LC2 are time-division multiplexed as heating signals.
[0100] It should be noted that, in the embodiment of the present application, LC-1 represents a low-frequency signal line LC group (i.e., the first low-frequency signal line LC group), and LC-2 represents another low-frequency signal line LC group (i.e., the second low-frequency signal line LC group). LC1-1 represents the first low-frequency signal line LC1 in the first low-frequency signal line LC group, LC2-1 represents the second low-frequency signal line LC2 in the first low-frequency signal line LC group, LC1-2 represents the first low-frequency signal line LC1 in the second low-frequency signal line LC group, and LC2-2 represents the second low-frequency signal line LC2 in the first low-frequency signal line LC group.
[0101] See also Figures 1 to 10 , Figure 6 is a schematic diagram of the connection structure of the second embodiment of the display panel provided by the present application, Figure 7 is a schematic diagram of the connection structure of the third embodiment of the display panel provided by the present application, Figure 8 is a schematic diagram of the connection structure of the fourth embodiment of the display panel provided by the present application, Fig. 9 is a schematic diagram of the connection structure of the fifth embodiment of the display panel provided by the present application, Fig.10It is a schematic diagram of the connection structure of the sixth embodiment of the display panel provided in the present application.
[0102] In another specific embodiment, Figure 6 As shown, there are two low-frequency signal line LC groups and four common electrode lines 20. The four common electrode lines 20 are located on opposite sides of the display area 101, and two common electrode lines 20 are distributed on each side of the display area 101. The two low-frequency signal line LC groups are located on opposite sides of the display area 101, and the low-frequency signal line LC group and the common electrode lines 20 are located on different sides of the display area 101. Each common electrode line 20 corresponds to a first switch S1 and a second switch S2. One end of each common electrode line 20 is coupled to the first low-frequency signal line LC1 in a low-frequency signal line LC group, and the other end is coupled to the second low-frequency signal line LC2 in another low-frequency signal line LC group to form a closed loop in the heating stage. Each low-frequency signal line LC is connected to two common electrode lines 20. The first low frequency signal line LC1, the common electrode line 20 and the second low frequency signal line LC2 connected in sequence are used as heating electrodes in the heating stage; and the signals provided by the first low frequency signal line LC1 and the second low frequency signal line LC2 are time-division multiplexed as heating signals.
[0103] In another specific embodiment, Figure 7 As shown, there is one low-frequency signal line LC group and one common electrode line 20. The common electrode line 20 is arranged to semi-surround the display area 101, which is conducive to uniform heating of the liquid crystal 40. Specifically, the common electrode line 20 is U-shaped. The low-frequency signal line LC group and the common electrode line 20 are respectively located on different sides of the display area 101. The common electrode line 20 corresponds to a first switch S1 and a second switch S2. One end of the common electrode line 20 is coupled to the first low-frequency signal line LC1 in the low-frequency signal line LC group, and the other end is coupled to the second low-frequency signal line LC2 in the same low-frequency signal line LC group to form a closed loop in the heating stage. The first low-frequency signal line LC1, the common electrode line 20 and the second low-frequency signal line LC2 connected in sequence act as heating electrodes in the heating stage; and the signals provided by the first low-frequency signal line LC1 and the second low-frequency signal line LC2 are time-division multiplexed as heating signals.
[0104] In some embodiments, the gate drive circuit 11 further includes a ground signal line VSS, and the switch unit S includes a first switch S1 and a second switch S2. The first switch S1 is connected between the low-frequency signal line LC and the common electrode line 20, and the second switch S2 is connected between the ground signal line VSS and the common electrode line 20. The low-frequency signal line LC is at a high potential. In the display stage, the first switch S1 and the second switch S2 are both turned off. In the heating stage, the first switch S1 and the second switch S2 are both turned on, and the low-frequency signal line LC, the common electrode line 20 and the ground signal line VSS are sequentially connected to form a closed loop.
[0105] Specifically, each common electrode wiring 20 corresponds to a low-frequency signal line LC and a ground signal line VSS.
[0106] In a specific embodiment, if Figure 7 As shown, there is one low-frequency signal line LC group and one common electrode line 20. The common electrode line 20 is arranged to semi-surround the display area 101. Specifically, the common electrode line 20 is U-shaped. The low-frequency signal line LC group and the common electrode line 20 are respectively located on different sides of the display area 101. The common electrode line 20 corresponds to a first switch S1 and a second switch S2. One end of the common electrode line 20 is coupled to the first low-frequency signal line LC1 in the low-frequency signal line LC group, and the other end is coupled to the ground signal line VSS to form a closed loop in the heating stage. The first low-frequency signal line LC1, the common electrode line 20 and the ground signal line VSS connected in sequence act as heating electrodes in the heating stage; and, the signals provided by the first low-frequency signal line LC1 and the ground signal line VSS are time-division multiplexed as heating signals.
[0107] In other embodiments, the common electrode wiring 20 may be other structures and located at at least one side of the display area 101, for example, Figure 8 As shown, the common electrode wiring 20 is U-shaped and is located at one side of the display area 101 .
[0108] In another specific embodiment, Fig. 9 As shown, there are two low-frequency signal line LC groups and two common electrode lines 20. There are two ground signal lines VSS. The two common electrode lines 20 are located on the same side of the display area 101. The two low-frequency signal line LC groups are located on opposite sides of the display area 101, and the two ground signal lines VSS are located on the same side of the display area 101. A ground signal line VSS and a low-frequency signal line LC group are located on the same side of the display area 101, and another ground signal line VSS and another low-frequency signal line LC group are located on the same side of the display area 101. The low-frequency signal line LC group and the common electrode lines 20 are located on different sides of the display area 101. Each common electrode line 20 corresponds to a high-potential low-frequency signal line LC and a ground signal line VSS. One end of each common electrode line 20 is coupled to a high-potential low-frequency signal line LC in a low-frequency signal line LC group, and the other end is coupled to the ground signal line VSS to form a closed loop in the heating stage. The low frequency signal line LC, the common electrode line 20 and the ground signal line VSS connected in sequence are used as heating electrodes in the heating stage; and the signals provided by the low frequency signal line LC and the ground signal line VSS are time-division multiplexed as heating signals.
[0109] In some embodiments, Fig.10As shown, there is one low-frequency signal line LC group and one common electrode line 20. The low-frequency signal line LC group and the common electrode line 20 are located on different sides of the display area 101. One end of the common electrode line 20 is connected to a low-frequency signal line LC in the low-frequency signal line LC group, and the other end is connected to an external power supply. The low-frequency signal line LC and the common electrode line 20 act as heating electrodes in the heating stage, and the signal provided by the low-frequency signal line LC is time-division multiplexed as a heating signal. The low-frequency signal line LC connected to the common electrode line 20 can be a low potential or a high potential, depending on the potential of the signal provided by the external power supply.
[0110] See also Figures 1 to 13 , Fig.11 is a schematic diagram of the connection structure of the first common electrode wiring according to the first embodiment of the present application, Fig.12 is a schematic diagram of the connection structure of the second embodiment of the first common electrode wiring provided in the embodiment of the present application, Fig.13 It is a schematic diagram of the connection structure of the third embodiment of the first common electrode wiring provided in the embodiment of the present application.
[0111] In some embodiments, the display panel 100 further includes a color filter substrate 30 and a conductive portion 50 located between the color filter substrate 30 and the array substrate 10 . The conductive portion 50 is located in the frame area 102 .
[0112] The common electrode wiring 20 includes a first common electrode wiring 21 and / or a second common electrode wiring 22 .
[0113] The first common electrode wiring 21 is disposed on the color filter substrate 30. The switch unit S is connected between the conductive part 50 and the low-frequency signal line LC, and the conductive part 50 is connected between the first common electrode wiring 21 and the switch unit S.
[0114] The second common electrode wiring 22 is disposed on the array substrate 10 and disposed on at least one side of the display area 101. The switch unit S is connected between the second common electrode wiring 22 and the low-frequency signal line LC.
[0115] It should be noted that, in the embodiment of the present application, the first common electrode wiring 21 and the second common electrode wiring 22 are both common electrode wirings 20 , and “first” and “second” are used to distinguish different common electrode wirings 20 .
[0116] Exemplarily, the conductive part 50 is a conductive gold ball or a conductive glue.
[0117] There are a plurality of conductive parts 50 , and the plurality of conductive parts 50 are insulated from each other to avoid short circuits between the first common electrode wirings 21 .
[0118] The conductive portion 50 is electrically connected to the first common electrode wiring 21 via the conductive point 60 .
[0119] The display panel 100 further includes a liquid crystal 40 located between the color filter substrate 30 and the array substrate 10 . The liquid crystal 40 is located in the display area 101 .
[0120] The color filter substrate 30 further includes a color filter common electrode layer 31 located in the display area 101 .
[0121] In some embodiments, the color filter common electrode layer 31 is electrically connected to the first common electrode wiring 21. The first common electrode wiring 21 is connected to an external power source in the display stage to load a first common voltage and transmit it to the color filter common electrode layer 31. The color filter common electrode layer 31 and the first common electrode wiring 21 are formed by patterning the same conductive layer, or the color filter common electrode layer 31 and the first common electrode wiring 21 are made of different materials.
[0122] Exemplarily, the color filter common electrode layer 31 includes at least one of indium tin oxide (ITO), zinc oxide (ZnO), and gallium-doped zinc oxide (GZO). The color filter common electrode layer 31 is a transparent electrode layer. When the color filter common electrode layer 31 and the first common electrode trace 21 are made of different materials, the first common electrode trace 21 can be a transparent conductive layer or a non-transparent conductive layer.
[0123] Specifically, Fig.11 As shown, in the heating stage, when both ends of the first common electrode wiring 21 are connected to the low-frequency signal line LC (see Figure 1 , Figure 6 , Figure 7 and Figure 8 ), the signal provided by the low-frequency signal line LC is time-division multiplexed as a heating signal, and the low-frequency signal line LC, the first common electrode wiring 21 and the color film common electrode layer 31 are time-division multiplexed as a heating electrode. There is no need to add a heating signal and a heating electrode, the process is simpler, and the power consumption is lower.
[0124] like Fig.12 As shown, in the heating stage, when one end of the first common electrode wiring 21 is electrically connected to the high potential low frequency signal line LC, and the other end is electrically connected to the ground signal line VSS (see Figure 7 , Figure 8 and Fig. 9 ), the signals provided by the ground signal line VSS and the low-frequency signal line LC are time-division multiplexed as heating signals, and the low-frequency signal line LC, the first common electrode wiring 21, the color film common electrode layer 31 and the ground signal line VSS connected in sequence are time-division multiplexed as heating electrodes, without the need to add new heating signals and heating electrodes, the process is simpler and the power consumption is lower.
[0125] like Fig.13As shown, in the heating stage, when one end of the first common electrode wiring 21 is electrically connected to the low-frequency signal line LC and the other end is electrically connected to the external power supply (see Fig.10 ), the external power supply is used to provide the color film common electrode layer 31 with a first common voltage to drive the liquid crystal 40 to deflect, the signal provided by the low-frequency signal line LC is time-division multiplexed as a heating signal, and the low-frequency signal line LC, the first common electrode wiring 21 and the color film common electrode layer 31 connected in sequence are time-division multiplexed as a heating electrode, without the need to add a heating signal and a heating electrode, the process is simpler and the power consumption is lower.
[0126] In the display stage, the switch unit S is disconnected, the color filter common electrode layer 31, the first common electrode wiring 21 and the external power supply are connected in sequence, and the color filter common electrode layer 31 is loaded with the first common voltage through the first common electrode wiring 21 to drive the liquid crystal 40 to deflect.
[0127] The first common voltage is a reference common voltage of the color filter substrate 30 .
[0128] The color filter common electrode layer 31 is connected to the first common electrode wiring 21 so that the color filter common electrode layer 31 can be reused as a heating electrode during the heating stage. Compared with the first common electrode wiring 21, the color filter common electrode layer 31 is arranged closer to the liquid crystal 40 and has a better heating effect on the liquid crystal 40.
[0129] The specific structure of the color filter common electrode layer 31 is not limited here and can be selected according to actual needs.
[0130] In some other embodiments, the color filter common electrode layer 31 is insulated from the first common electrode wiring 21 and is connected to an external power source to load the first common voltage during the display stage.
[0131] Exemplarily, in the display stage, the switch unit S is disconnected, and the color film common electrode layer 31 is connected to an external power source to access the first common voltage.
[0132] In the heating stage, the connection mode of the first common electrode line 21 is similar to the above, except that the first common electrode line 21 is insulated from the color film common electrode layer 31, and the color film common electrode layer 31 is not reused as a heating electrode.
[0133] The array substrate 10 further includes an array common electrode layer 12 located in the display area 101 .
[0134] In some embodiments, the array common electrode layer 12 is electrically connected to the second common electrode wiring 22. The second common electrode wiring 22 is connected to an external power source in the display stage to load the second common voltage and transmit it to the array common electrode layer 12.
[0135] Exemplarily, the array common electrode layer 12 includes at least one of indium tin oxide (ITO), zinc oxide (ZnO), and gallium-doped zinc oxide (GZO). The array common electrode layer 12 is a transparent electrode layer.
[0136] The materials of the array common electrode layer 12 and the second common electrode wiring 22 may be the same or different, as described with reference to the color filter common electrode layer 31 and the first common electrode wiring 21 , which will not be described in detail here.
[0137] Specifically, in the heating stage, when both ends of the second common electrode wiring 22 are connected to the low-frequency signal line LC (see Figure 1 , Figure 6 , Figure 7 and Figure 8 ), the signal provided by the low-frequency signal line LC is time-division multiplexed as a heating signal, and the low-frequency signal line LC, the second common electrode wiring 22 and the array common electrode layer 12 are time-division multiplexed as a heating electrode. There is no need to add a heating signal and a heating electrode, the process is simpler, and the power consumption is lower.
[0138] In the heating stage, when one end of the second common electrode wiring 22 is electrically connected to the high-potential low-frequency signal line LC and the other end is electrically connected to the ground signal line VSS (see Figure 7 , Figure 8 and Fig. 9 ), the signals provided by the ground signal line VSS and the low-frequency signal line LC are time-division multiplexed as heating signals, and the low-frequency signal line LC, the second common electrode wiring 22, the array common electrode layer 12 and the ground signal line VSS connected in sequence are time-division multiplexed as heating electrodes, without the need to add new heating signals and heating electrodes, the process is simpler and the power consumption is lower.
[0139] In the heating stage, when one end of the second common electrode wiring 22 is electrically connected to the low-frequency signal line LC and the other end is electrically connected to the external power supply (see Fig.10 ), an external power supply is used to provide a second common voltage for the array common electrode layer 12, and the signal provided by the low-frequency signal line LC is time-division multiplexed as a heating signal. The low-frequency signal line LC, the second common electrode wiring 22 and the array common electrode layer 12 connected in sequence are time-division multiplexed as heating electrodes. There is no need to add new heating signals and heating electrodes, the process is simpler, and the power consumption is lower.
[0140] The second voltage is a reference common voltage of the array substrate 10 .
[0141] The array common electrode layer 12 is connected to the second common electrode wiring 22 so that the array common electrode layer 12 can be reused as a heating electrode during the heating stage. Compared with the second common electrode wiring 22, the array common electrode layer 12 is arranged closer to the liquid crystal 40 and has a better heating effect on the liquid crystal 40.
[0142] The specific structure of the array common electrode layer 12 is not limited here and can be selected according to actual needs.
[0143] The embodiment of the present application does not limit the connection method between the external power supply and the common electrode wiring 20, and it is selected according to actual needs.
[0144] In some other embodiments, the array common electrode layer 12 is insulated from the second common electrode wiring 22 and is connected to an external power source to load the second common voltage during the display phase.
[0145] Exemplarily, in the display stage, the switch unit S is turned off, and the array common electrode layer 12 is connected to an external power source to access the second common voltage.
[0146] In the heating stage, the connection method of the second common electrode wiring 22 is similar to the above, except that the second common electrode wiring 22 is insulated from the array common electrode layer 12, and the array common electrode layer 12 is not reused as a heating electrode.
[0147] It should be understood that when the common electrode wiring 20 includes the first common electrode wiring 21, the heating electrode (i.e., the first common electrode wiring 21) is disposed on the color filter substrate 30, and does not occupy the wiring space of the frame area 102 in the array substrate 10, which is conducive to the narrow frame design. Secondly, it can also avoid the heating wiring and the wiring in the array substrate 10 from crossing the line setting, which is conducive to improving ESD (Electrostatic Discharge).
[0148] See also Figures 1 to 15 , Fig.14 is a schematic structural diagram of an embodiment of a display device provided in an embodiment of the present application, Fig.15 It is a structural schematic diagram of another embodiment of the display device provided in the embodiment of the present application.
[0149] The embodiment of the present application provides a display device 500. The display device 500 includes a driving chip 200 and the above-mentioned display panel 100. The driving chip 200 is electrically connected to the gate driving circuit 11.
[0150] The driving chip 200 is electrically connected to the low-frequency signal line LC and the ground signal line VSS, respectively, and is used to provide signals to the low-frequency signal line LC and the ground signal line VSS.
[0151] In some embodiments, the driving chip 200 may also be connected between an external power source and the common electrode trace 20 .
[0152] In some embodiments, Fig.14 As shown, the display device 500 further includes a flexible printed circuit board 300, which is electrically connected to the display panel 100 and is used to transmit image data, control signals and power signals to the display panel 100. The driving chip 200 may be disposed on the flexible printed circuit board 300.
[0153] In some other embodiments, the chip on glass (COG) technology is used to directly package the driver chip 200 on the glass substrate of the display panel 100. Specifically, the driver chip 200 is directly packaged on the substrate of the array substrate 10.
[0154] In some other embodiments, Fig.15 As shown, the display device 500 further includes a flexible substrate 400, which is electrically connected to the display panel 100. The driving chip 200 is disposed on the flexible substrate 400 using a chip-on-film (COF) technology. The flexible substrate 400 is used to carry the driving chip 200 and provide functions such as electrical connection and signal transmission.
[0155] The display device 500 may also include one or more of the following components (not shown): memory, power supply component, processing component, multimedia component, audio component, input / output (I / O) interface, sensor component, and communication component. The specific structure and function of these components are the same or similar to the related art, and the details can be found in the related art, which will not be repeated here. The display device 500 can be a computer, a digital broadcast terminal, a message transceiver device, a game console, a medical device, a fitness device, a personal digital assistant, etc. This application does not limit this, and it is selected according to actual needs.
[0156] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.
[0157] The above are only implementation methods of the present application, and are not intended to limit the patent protection scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly used in other related technical fields, are also included in the patent protection scope of the present application.
Claims
1. A display panel having a display area and a frame area; characterized in that: include: An array substrate, comprising a gate drive circuit located in the frame area; the gate drive circuit comprises a low-frequency signal line; Common electrode wiring, located in the border area; The low-frequency signal line is coupled to the common electrode line, so that the common electrode line and the low-frequency signal line serve as heating electrodes during the heating stage.
2. The display panel according to claim 1, characterized in that: The array substrate further comprises a switch unit, wherein the switch unit is connected between the low-frequency signal line and the common electrode wiring; In the display stage, the switch unit is turned off, and the low-frequency signal line is electrically disconnected from the common electrode wiring; In the heating stage, the switch unit is turned on, the low-frequency signal line is electrically connected to the common electrode wiring, and serves as a heating electrode.
3. The display panel according to claim 2, characterized in that: There is at least one low-frequency signal line; there is at least one common electrode line; each of the common electrode lines is electrically connected to at least one low-frequency signal line; When there are multiple common electrode wirings, the multiple common electrode wirings are insulated from each other.
4. The display panel according to claim 3, characterized in that: The low-frequency signal line includes a first low-frequency signal line and a second low-frequency signal line; one of the first low-frequency signal line and the second low-frequency signal line is at a low potential, and the other is at a high potential; The switch unit includes a first switch and a second switch; The first switch is connected between the first low-frequency signal line and the common electrode line, and the second switch is connected between the second low-frequency signal line and the common electrode line; In the display stage, both the first switch and the second switch are closed; In the heating stage, the first switch and the second switch are both turned on, and the first low-frequency signal line, the common electrode line and the second low-frequency signal line are connected in sequence to form a closed loop.
5. The display panel according to claim 3, characterized in that: The gate drive circuit further includes a ground signal line, and the switch unit includes a first switch and a second switch; The first switch is connected between the low-frequency signal line and the common electrode wiring, and the second switch is connected between the ground signal line and the common electrode wiring; the low-frequency signal line is at a high potential; In the display stage, both the first switch and the second switch are closed; In the heating stage, the first switch and the second switch are both turned on, and the low-frequency signal line, the common electrode line and the ground signal line are connected in sequence to form a closed loop.
6. The display panel according to claim 2, characterized in that: The display panel further comprises a color filter substrate and a conductive portion located between the color filter substrate and the array substrate; the conductive portion is located in the frame area; The common electrode wiring includes a first common electrode wiring and / or a second common electrode wiring; The first common electrode wiring is arranged on the color filter substrate; the switch unit is connected between the conductive part and the low-frequency signal line, and the conductive part is connected between the first common electrode wiring and the switch unit; The second common electrode wiring is arranged on the array substrate and at least on one side of the display area; the switch unit is connected between the second common electrode wiring and the low-frequency signal line.
7. The display panel according to claim 6, characterized in that: The conductive part is a conductive gold ball or conductive glue.
8. The display panel according to claim 6, characterized in that: The color film substrate further includes a color film common electrode layer located in the display area. in, The color film common electrode layer is electrically connected to the first common electrode wiring; the first common electrode wiring is connected to an external power supply in a display stage to load a first common voltage and transmit it to the color film common electrode layer; the color film common electrode layer and the first common electrode wiring are patterned and formed by the same conductive layer, or the color film common electrode layer and the first common electrode wiring are made of different materials; or, The color film common electrode layer is insulated from the first common electrode wiring and is connected to an external power source in a display stage to load a first common voltage.
9. The display panel according to claim 6, characterized in that: The array substrate further comprises an array common electrode layer located in the display area. The array common electrode layer is electrically connected to the second common electrode wiring; the second common electrode wiring is connected to an external power supply in the display stage to load a second common voltage and transmit it to the array common electrode layer; or, The array common electrode layer is insulated from the second common electrode wiring and is connected to an external power source in a display stage to load a second common voltage.
10. A display device, characterized in that: A display panel comprising a driving chip and any one of claims 1 to 9; The driving chip is electrically connected to the gate driving circuit.
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