Function test method and device of controller node, upper computer, medium and product

Abstract

The invention relates to the technical field of simulation, in particular to a function test method and device for a controller node, an upper computer, a medium and a product, and the method comprises the steps: obtaining a to-be-tested target function of a real controller node; determining an associated controller node of the real controller node according to the target function; and simulating and generating a virtual controller node associated with the controller node, establishing a communication link between the virtual controller node and the real controller node, and testing the target function of the real controller node based on the communication link. Therefore, the problem that the function verification progress of the controller node to be tested associated with the controller node is influenced by the development progress of other controller nodes due to incomplete functions or uncompleted development of some controller nodes in the development process in the prior art is solved, so that the development efficiency is reduced, and the development cost is reduced. The problems that the test and debugging cost is increased, the development period is prolonged, the test and debugging cost is increased, and the user experience is reduced are solved.

Description

Technical Field

[0001] The present application relates to the field of simulation technology, and in particular to a function testing method, device, host computer, medium and product for a controller node. Background Art

[0002] In automotive R&D, the testing and development verification of a certain function of a controller node requires signal input support from other related controller nodes.

[0003] In the related art, a method of synchronous development of various controller nodes is usually used to implement the testing and development verification of a certain function of the controller node to be tested.

[0004] However, in the related art, due to the limitation of automobile development progress, some controller nodes are incomplete or undeveloped, which may easily lead to their functions being unable to be enabled, and the functions of the controller nodes to be tested associated with them cannot be verified, resulting in the functional verification progress of the controller nodes to be tested being affected by the development progress of other controller nodes, thereby reducing development efficiency, increasing testing and debugging costs, increasing development cycles, increasing testing and debugging costs, and reducing user experience. Summary of the invention

[0005] The present application provides a controller node functional testing method, device, host computer, medium and product to solve the problem that some controller nodes are incomplete or not fully developed during the development process, which usually occurs in the related art, resulting in the functional verification progress of the associated controller nodes to be tested being affected by the development progress of other controller nodes, thereby reducing development efficiency, increasing testing and debugging costs, increasing development cycle, increasing testing and debugging costs, and reducing user experience.

[0006] The first aspect of the present application provides a method for functional testing of a controller node, comprising the following steps: obtaining a target function to be tested of a real controller node; determining an associated controller node of the real controller node based on the target function; simulating and generating a virtual controller node of the associated controller node, establishing a communication link between the virtual controller node and the real controller node, and testing the target function of the real controller node based on the communication link.

[0007] Optionally, in one embodiment of the present application, establishing a communication link between a virtual controller node and a real controller node includes: simulating and generating a virtual bus of the virtual controller node; and establishing a communication link between the virtual bus and a real bus of the real controller node.

[0008] Optionally, in one embodiment of the present application, a target function of a real controller node is tested based on a communication link, including: determining a virtual controller node to generate a function test instruction based on the target function; generating a communication message according to the function test instruction, and sending the communication message to the real controller node, wherein the real controller node responds to the function test instruction; and generating a test result of the target function based on the response result of the real controller node.

[0009] Optionally, in one embodiment of the present application, a virtual controller node is determined to generate a functional test instruction based on a target function, including: determining a sending period, a verification address, and a verification method of a communication signal according to the target function; and generating a functional test instruction according to the test requirements of the target function, the sending period, the verification address, and the verification method of the communication signal.

[0010] Optionally, in an embodiment of the present application, if the type of the communication signal is a regular signal, it is necessary to perform discrete processing on the communication signal.

[0011] The second aspect of the present application provides a functional testing device for a controller node, including: an acquisition module, used to acquire a target function to be tested of a real controller node; a determination module, used to determine an associated controller node of the real controller node according to the target function; a simulation module, used to simulate and generate a virtual controller node of the associated controller node, establish a communication link between the virtual controller node and the real controller node, and test the target function of the real controller node based on the communication link.

[0012] Optionally, in one embodiment of the present application, the simulation module is further used to simulate and generate a virtual bus of the virtual controller node; and establish a communication link between the virtual bus and a real bus of the real controller node.

[0013] Optionally, in one embodiment of the present application, the simulation module is also used to determine the virtual controller node to generate a functional test instruction based on the target function; generate a communication message according to the functional test instruction, and send the communication message to the real controller node, wherein the real controller node responds to the functional test instruction; and generate a test result of the target function based on the response result of the real controller node.

[0014] Optionally, in one embodiment of the present application, the simulation module is also used to determine the sending period, verification address and verification method of the communication signal according to the target function; and generate functional test instructions according to the test requirements of the target function, the sending period, verification address and verification method of the communication signal.

[0015] Optionally, in one embodiment of the present application, the simulation module is further used to perform discrete processing on the communication signal when the type of the communication signal is a regular signal.

[0016] The third aspect of the present application provides a host computer, including: a memory, a processor, and a computer program stored in the memory and executable on the processor, and the processor executes the program to implement a functional testing method for a controller node as described in the above embodiment.

[0017] The fourth aspect of the present application provides a computer-readable storage medium having a computer program or instruction stored thereon. When the computer program or instruction is executed, a functional testing method for a controller node as in the above embodiment is implemented.

[0018] The fifth aspect of the present application provides a computer program product, including a computer program or instructions, which, when executed, implements the functional testing method of the controller node as in the above embodiment.

[0019] Therefore, this application includes the following beneficial effects:

[0020] The embodiment of the present application establishes a virtual simulation node on the upper computer side, simulates the signal input of the associated controller node, and inputs the simulated signal of the associated controller node into the real controller node through the code. The real controller node receives the message to debug and test the target function, thereby realizing the functional test of the controller node, which is not affected by the development progress of other controller nodes, improving the development efficiency, and realizing that the controller development is not affected by factors such as the cycle, functional maturity, and hardware conditions, providing a solid guarantee for software function debugging tests. Therefore, it solves the problem that some controller nodes are incomplete or undeveloped during the development process in the related technology, which causes the functional verification progress of the associated controller node to be tested to be affected by the development progress of other controller nodes, thereby reducing the development efficiency, increasing the testing and debugging costs, increasing the development cycle, increasing the testing and debugging costs, and reducing the user experience.

[0021] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0023] Figure 1 A schematic diagram of a flow chart of a function testing method of a controller node provided according to an embodiment of the present application;

[0024] Figure 2 A schematic diagram of a simulation principle provided according to an embodiment of the present application;

[0025] Figure 3A schematic diagram of a function testing method for a controller node provided according to an embodiment of the present application;

[0026] Figure 4 A schematic diagram of discrete processing of a communication signal provided according to an embodiment of the present application;

[0027] Figure 5 is a block diagram of a functional testing device for a controller node according to an embodiment of the present application;

[0028] Figure 6 Schematic diagram of the structure of the host computer according to the embodiment of the present application. DETAILED DESCRIPTION

[0029] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present application, and should not be construed as limiting the present application.

[0030] The following describes the function test method, device, host computer, medium and product of the controller node of the embodiment of the present application with reference to the accompanying drawings. In view of the situation mentioned in the above background technology that some controller nodes are usually incomplete or not fully developed during the development process, which causes the function verification progress of the controller node to be tested associated with it to be affected by the development progress of other controller nodes, thereby reducing the development efficiency, increasing the test and debugging costs, increasing the development cycle, increasing the test and debugging costs, and reducing the user's experience, the present application provides a function test method for controller nodes, in which the target function of the real controller node to be tested is obtained; the associated controller node of the real controller node is determined according to the target function; the virtual controller node of the associated controller node is simulated and generated, a communication link between the virtual controller node and the real controller node is established, and the target function of the real controller node is tested based on the communication link. Thus, the situation that some controller nodes are usually incomplete or not fully developed during the development process in the related technology is solved, which causes the function verification progress of the controller node to be tested associated with it to be affected by the development progress of other controller nodes, thereby reducing the development efficiency, increasing the test and debugging costs, increasing the development cycle, increasing the test and debugging costs, and reducing the user's experience.

[0031] Specifically, Figure 1 A flowchart of a method for functional testing of a controller node provided in an embodiment of the present application.

[0032] like Figure 1 As shown, the function testing method of the controller node includes the following steps:

[0033] In step S101, a target function to be tested of a real controller node is obtained.

[0034] It should be noted that in the embodiment of the present application, the controller can be an ECU (Electronic Control Unit), which is not specifically limited here; the embodiment of the present application is applicable to all pure electric-driven vehicles, including pure electric vehicles, extended-range electric vehicles, series hybrid electric vehicles and fuel cell vehicles.

[0035] It is understandable that the method of obtaining the target function to be tested of the real controller node in the embodiment of the present application is not specifically limited here, and those skilled in the art can choose according to the actual situation, wherein the target function may include engine control, fault diagnosis, fault light control, sensor control, actuator control, safety control, communication function, etc. .

[0036] In step S102 , an associated controller node of the real controller node is determined according to the target function.

[0037] It can be understood that the associated controller node interacts with the real controller in the real system.

[0038] In step S103, a virtual controller node associated with the controller node is generated by simulation, a communication link between the virtual controller node and the real controller node is established, and a target function of the real controller node is tested based on the communication link.

[0039] It should be noted that the embodiments of the present application can be developed through VECTOR CANoe16.0 SP5 version, and the code can be written based on Vector CANoe-CAPL (Communication Access Programming Language), which is not specifically limited here, and those skilled in the art can make settings according to actual conditions.

[0040] It can be understood that in the embodiment of the present application, the simulation can be performed on a host computer, which can be a computer.

[0041] Therefore, in the embodiment of the present application, the development of the controller node to be tested is no longer limited by the limitations of hardware, the development progress of other related controller nodes, etc., thereby improving the development efficiency.

[0042] Optionally, in one embodiment of the present application, establishing a communication link between a virtual controller node and a real controller node includes: simulating and generating a virtual bus of the virtual controller node; and establishing a communication link between the virtual bus and a real bus of the real controller node.

[0043] It should be noted that the principle of simulation is as follows Figure 2 As shown, in Figure 2 In the figure, the virtual controller nodes are simulated node 1 and simulated node 2 as examples; the virtual bus is a simulated bus; the monitor is a monitor on the host computer, and the type of monitor is not specifically limited here; the real controller node is a real node; the bus can be a CAN (Controller Area Network) bus as an example.

[0044] Specifically, click "file" in Vector CANoe to create a new CAN-500Baud project, set up the corresponding hardware channels to match the connection interaction between the virtual bus and the real bus, and form a communication link between the virtual bus and the real bus of the real controller node, thereby ensuring that the message is sent to the real bus in the correct way.

[0045] In the embodiment of the present application, it is necessary to ensure that the hardware connection is correct and the virtual bus and the real bus can communicate normally.

[0046] Specifically, if Figure 2 As shown, firstly, nodes 1 and 2 of simulated controller simulation are established in the host computer. After the virtual controller node is established, the required message signal sending code is compiled in the node, and the message is sent to the real bus through the virtual bus. The real node on the real bus will execute the simulation command after passing the E2E (End-to-End) verification, thereby realizing the simulation of the functions in the real node. The process can be monitored in real time in the monitor of the host computer synchronously.

[0047] Therefore, in the embodiment of the present application, a virtual simulation environment of a CAN bus is created by using Vector CANoe software and its CAPL language. The main steps include establishing a virtual controller node on the host computer, compiling the required message signal sending code, and sending the message to the real bus through the virtual bus. The controller node on the real bus executes the simulation command after passing the E2E check, thereby realizing the simulation of the function in the real node. The whole process is monitored in real time in the monitor of the host computer.

[0048] Optionally, in one embodiment of the present application, a target function of a real controller node is tested based on a communication link, including: determining a virtual controller node to generate a function test instruction based on the target function; generating a communication message according to the function test instruction, and sending the communication message to the real controller node, wherein the real controller node responds to the function test instruction; and generating a test result of the target function based on the response result of the real controller node.

[0049] Specifically, combined Figure 2 and Figure 3 As shown in the figure, after determining the virtual controller node to generate the function test instruction based on the target function, it is necessary to establish system variables in the project and establish a control panel. The role of the system variable is to connect the real signal in the message with the switch or assignment BOX in the control panel for data transmission. The control panel is used to display the signal in the control panel and change the variable value during the test. Load the Database to parse the message variables and match the controller node signals. After the compilation is completed, the real vehicle debugging is required. Set the simulation setup in the project to the real bus, run the project, observe the response data of the real node, and verify the simulation effect. Before debugging the real vehicle, fully test the virtual simulation environment to ensure that there are no logical errors or data conflicts. After the verification is successful, the virtual communication message encapsulated by the function test instruction can be sent to the real controller node through the communication link. After the real node responds to the data, the simulation requirements can be met. After the real controller node receives the communication message, it performs the corresponding operation and returns the response. The test system evaluates the correctness of its target function based on the response result of the real controller node.

[0050] Optionally, in one embodiment of the present application, a virtual controller node is determined to generate a functional test instruction based on a target function, including: determining a sending period, a verification address, and a verification method of a communication signal according to the target function; and generating a functional test instruction according to the test requirements of the target function, the sending period, the verification address, and the verification method of the communication signal.

[0051] It is understandable that when designing a bus simulation, it is usually performed on certain signals within one or more frames of signals on the bus, and there is no need to simulate all the signals in the message; secondly, during the simulation, it is necessary to first confirm the signal sending cycle, the initial address of the register for E2E verification, and the verification method. The verification method in the embodiment of the present application takes CRC8 redundant verification as an example.

[0052] Optionally, in an embodiment of the present application, if the type of the communication signal is a regular signal, it is necessary to perform discrete processing on the communication signal.

[0053] It is understandable that if the signal is a regular function, the signal needs to be discretized, because the code cannot execute a continuous function and can only send discrete numbers with the message sending cycle as the discrete interval. Taking the torque value as an example, the discrete graph is as follows Figure 4 As shown, if the signal is only a fixed value, there is no need to discretize it.

[0054] Therefore, in the embodiment of the present application, the communication signal of the regular signal is discretely processed to ensure that the communication signal can be sent smoothly in the code.

[0055] According to the functional testing method of the controller node proposed in the embodiment of the present application, a virtual simulation node is established on the upper computer side to simulate the signal input of the associated controller node, and the simulated signal of the associated controller node is input into the real controller node through the code. The real controller node can debug and test the target function after receiving the message, thereby realizing the functional testing of the controller node, which is not affected by the development progress of other controller nodes, improves the development efficiency, realizes that the controller development is not affected by factors such as cycle, function maturity, hardware conditions, etc., and provides a solid guarantee for software function debugging tests.

[0056] Next, a functional testing device for a controller node according to an embodiment of the present application will be described with reference to the accompanying drawings.

[0057] Figure 5 It is a block diagram of a functional testing device for a controller node according to an embodiment of the present application.

[0058] like Figure 5 As shown, the functional testing device 10 of the controller node includes: an acquisition module 100 , a determination module 200 and a simulation module 300 .

[0059] Among them, the acquisition module 100 is used to obtain the target function to be tested of the real controller node; the determination module 200 is used to determine the associated controller node of the real controller node according to the target function; the simulation module 300 is used to simulate and generate a virtual controller node of the associated controller node, establish a communication link between the virtual controller node and the real controller node, and test the target function of the real controller node based on the communication link.

[0060] Optionally, in one embodiment of the present application, the simulation module 300 is further used to simulate and generate a virtual bus of the virtual controller node; and establish a communication link between the virtual bus and a real bus of the real controller node.

[0061] Optionally, in one embodiment of the present application, the simulation module 300 is also used to determine the virtual controller node to generate a functional test instruction based on the target function; generate a communication message according to the functional test instruction, and send the communication message to the real controller node, wherein the real controller node responds to the functional test instruction; and generate a test result of the target function based on the response result of the real controller node.

[0062] Optionally, in one embodiment of the present application, the simulation module 300 is also used to determine the sending period, verification address and verification method of the communication signal according to the target function; and generate functional test instructions according to the test requirements of the target function, the sending period, verification address and verification method of the communication signal.

[0063] Optionally, in one embodiment of the present application, the simulation module 300 is further used to perform discrete processing on the communication signal when the type of the communication signal is a regular signal.

[0064] It should be noted that the above explanation of the embodiment of the function testing method for the controller node is also applicable to the function testing device for the controller node of this embodiment, and will not be repeated here.

[0065] According to the functional testing device for the controller node proposed in the embodiment of the present application, a virtual simulation node is established on the upper computer side to simulate the signal input of the associated controller node, and the simulated signal of the associated controller node is input into the real controller node through the code. The real controller node can debug and test the target function after receiving the message, thereby realizing the functional testing of the controller node, which is not affected by the development progress of other controller nodes, improves the development efficiency, realizes that the controller development is not affected by factors such as cycle, function maturity, hardware conditions, etc., and provides a solid guarantee for software function debugging tests.

[0066] Figure 6 A schematic diagram of the structure of the host computer provided in the embodiment of the present application. The host computer may include:

[0067] A memory 601 , a processor 602 , and a computer program stored in the memory 601 and executable on the processor 602 .

[0068] When the processor 602 executes the program, the function testing method of the controller node provided in the above embodiment is implemented.

[0069] Furthermore, the host computer also includes:

[0070] The communication interface 603 is used for communication between the memory 601 and the processor 602 .

[0071] The memory 601 is used to store computer programs that can be executed on the processor 602 .

[0072] The memory 601 may include a high-speed RAM (Random Access Memory) memory, and may also include a non-volatile memory, such as at least one disk memory.

[0073] If the memory 601, the processor 602 and the communication interface 603 are implemented independently, the communication interface 603, the memory 601 and the processor 602 can be connected to each other through a bus and communicate with each other. The bus can be an ISA (Industry Standard Architecture) bus, a PCI (Peripheral Component Interconnect) bus or an EISA (Extended Industry Standard Architecture) bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 6 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0074] Optionally, in a specific implementation, if the memory 601, the processor 602 and the communication interface 603 are integrated on a chip, the memory 601, the processor 602 and the communication interface 603 can communicate with each other through an internal interface.

[0075] The processor 602 may be a CPU (Central Processing Unit), or an ASIC (Application Specific Integrated Circuit), or one or more integrated circuits configured to implement the embodiments of the present application.

[0076] An embodiment of the present application also provides a computer-readable storage medium on which a computer program or instruction is stored. When the computer program or instruction is executed, the functional testing method of the controller node as described above is implemented.

[0077] An embodiment of the present application also provides a computer program product, including a computer program or instructions, which, when executed, implements the above-mentioned function testing method for a controller node.

[0078] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms are not necessarily directed to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or N embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

[0079] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of this application, "N" means at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0080] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, fragment or portion of code comprising one or N executable instructions for implementing the steps of a custom logical function or process, and the scope of the preferred embodiments of the present application includes alternative implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in reverse order depending on the functions involved, which should be understood by technicians in the technical field to which the embodiments of the present application belong.

[0081] It should be understood that the various parts of the present application can be implemented in hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, the steps or methods can be implemented in software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array, a field programmable gate array, etc.

[0082] A person of ordinary skill in the art may understand that all or part of the steps carried by the method for implementing the above-mentioned embodiment may be completed by instructing related hardware through a program, and the above-mentioned program may be stored in a computer-readable storage medium, which, when executed, includes one of the steps of the method embodiment or a combination thereof.

[0083] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application.

Claims

1. A function test method for a controller node, characterized in that: The following steps are involved: Get the target function to be tested of the real controller node; determining an associated controller node of the real controller node according to the target function; A virtual controller node of the associated controller node is generated by simulation, a communication link between the virtual controller node and the real controller node is established, and a target function of the real controller node is tested based on the communication link.

2. The function testing method of the controller node according to claim 1, characterized in that: The establishing of a communication link between the virtual controller node and the real controller node comprises: Simulating and generating a virtual bus of the virtual controller node; A communication link between the virtual bus and the real bus of the real controller node is established.

3. The function testing method of the controller node according to claim 1, characterized in that: The testing of the target function of the real controller node based on the communication link includes: Determine the virtual controller node to generate a functional test instruction based on the target function; generating a communication message according to the functional test instruction, and sending the communication message to the real controller node, wherein the real controller node responds to the functional test instruction; A test result of the target function is generated according to the response result of the real controller node.

4. The function testing method of the controller node according to claim 3, characterized in that: The step of determining the virtual controller node to generate a function test instruction based on the target function includes: Determine the sending period, verification address and verification method of the communication signal according to the target function; The function test instruction is generated according to the test requirements of the target function, the sending cycle of the communication signal, the verification address and the verification method.

5. The function testing method of the controller node according to claim 4, characterized in that: If the type of the communication signal is a regular signal, it is necessary to perform discrete processing on the communication signal.

6. A functional testing device for a controller node, characterized in that: include: An acquisition module is used to obtain the target function to be tested of the real controller node; A determination module, configured to determine an associated controller node of the real controller node according to the target function; The simulation module is used to simulate and generate a virtual controller node of the associated controller node, establish a communication link between the virtual controller node and the real controller node, and test the target function of the real controller node based on the communication link.

7. According to the functional testing device of the controller node of claim 6, the simulation module is further used for: Simulating and generating a virtual bus of the virtual controller node; A communication link between the virtual bus and the real bus of the real controller node is established.

8. A host computer, characterized in that: include: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the functional testing method for a controller node according to any one of claims 1 to 5.

9. A computer-readable storage medium having a computer program or instruction stored thereon, characterized in that: When the computer program or instruction is executed, the function testing method of the controller node described in any one of claims 1-5 is implemented.

10. A computer program product comprising a computer program or instructions, characterized in that When the computer program or instruction is executed, the function testing method of the controller node described in any one of claims 1-5 is implemented.

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