Current absolute value generating circuit

Abstract

The invention relates to a current absolute value generating circuit, which comprises a current comparison circuit used for generating a first current equal to a difference value between a second current source and a first current source according to the Kirchhoff's law; the flip current comparison circuit is used for generating second current equal to the difference value between the first current source and the second current source according to the Kirchhoff's law, and the current absolute value output circuit is used for outputting the absolute value of the first current or the second current. According to the invention, the difference between the target image pixel measured in real time and the training target pixel can be converted into a current difference value.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor integrated circuits, and in particular to a current absolute value generating circuit. Background Art

[0002] In artificial intelligence and deep learning, computer vision often needs to judge the grayscale level of image pixels. The general processing method is to convert the grayscale of the pixel into the corresponding voltage or current for judgment. In the learning process of the neural network, guided learning is generally used, that is, the training target of the neural network is set in advance and compared with the target image measured in real time to speed up the learning process of the neural network. At this time, it is necessary to calculate the difference between the target image pixel measured in real time and the training target pixel, so a current absolute value generation circuit is urgently needed to achieve this task. Summary of the invention

[0003] The technical problem to be solved by the present invention is to provide a current absolute value generating circuit, which can convert the difference between the target image pixel measured in real time and the training target pixel into the current difference.

[0004] The technical solution adopted by the present invention to solve the technical problem is: to provide a current absolute value generating circuit, comprising:

[0005] a current comparison circuit for generating a first current equal to a difference between the second current source and the first current source according to Kirchhoff's law;

[0006] a flip current comparison circuit, for generating a second current equal to the difference between the first current source and the second current source according to Kirchhoff's law,

[0007] The current absolute value output circuit is used to output the absolute value of the first current or the second current.

[0008] The current comparison circuit includes a first PMOS tube, a gate of the first PMOS tube is connected to the first input end of the current absolute value output circuit, a source of the first PMOS tube is connected to the voltage end, a drain of the first PMOS tube is connected to the gate of the first PMOS tube, an anode of the first current source is connected to the drain of the first PMOS tube, and a cathode is connected to the voltage end; an anode of the second current source is grounded, and a cathode is connected to the drain of the first PMOS tube.

[0009] The flip current comparison circuit includes a second PMOS tube, the gate of the second PMOS tube is connected to the second input end of the current absolute value output circuit, the source of the second PMOS tube is connected to the voltage end, the drain of the second PMOS tube is connected to the gate of the second PMOS tube, the anode of the second current source is connected to the drain of the second PMOS tube, and the cathode is connected to the voltage end; the anode of the first current source is grounded, and the cathode is connected to the drain of the second PMOS tube.

[0010] The current absolute value output circuit includes a third PMOS tube and a fourth PMOS tube, the gate of the third PMOS tube is connected to the current comparison circuit, and forms a mirror current source with the first PMOS tube in the current comparison circuit, the source of the third PMOS tube is connected to the voltage end, and the drain of the third PMOS tube is connected to the drain of the fourth PMOS tube; the gate of the fourth PMOS tube is connected to the flip current comparison circuit, and forms another mirror current source with the second PMOS tube in the flip current comparison circuit, and the source of the fourth PMOS tube is connected to the voltage end.

[0011] Beneficial Effects

[0012] Due to the adoption of the above technical solution, the present invention has the following advantages and positive effects compared with the prior art: the present invention realizes the generation of the absolute value of the current, allowing the system to generate a positive current equal to the difference between two different current sources. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 is a circuit diagram of a current absolute value generating circuit according to an embodiment of the present invention;

[0014] Figure 2 is a schematic diagram of voltage and current waveforms of a current comparison circuit and a flip current comparison circuit that vary with time when the first current source is greater than the second current source;

[0015] Figure 3 is a schematic diagram of voltage and current waveforms of a current comparison circuit and a flip current comparison circuit that vary with time when the second current source is greater than the first current source;

[0016] Figure 4 This is a schematic diagram of the current waveform of the current absolute value output circuit that changes with time. DETAILED DESCRIPTION

[0017] The present invention will be further described below in conjunction with specific embodiments. It should be understood that these embodiments are only used to illustrate the present invention and are not intended to limit the scope of the present invention. In addition, it should be understood that after reading the content taught by the present invention, those skilled in the art can make various changes or modifications to the present invention, and these equivalent forms fall within the scope limited by the appended claims of the application equally.

[0018] The embodiment of the present invention relates to a current absolute value generating circuit, such as Figure 1 As shown, including:

[0019] A current comparison circuit 100, configured to generate a first current equal to a difference between a second current source Iref_2 and a first current source Iref_1 according to Kirchhoff's law;

[0020] The flip current comparison circuit 200 is used to generate a second current equal to the difference between the first current source Iref_1 and the second current source Iref_2 according to Kirchhoff's law,

[0021] The current absolute value output circuit 300 is used to output the absolute value of the first current or the second current.

[0022] In this embodiment, the current comparison circuit 100 includes a first PMOS tube, the gate of the first PMOS tube is connected to the first input end of the current absolute value output circuit, the source of the first PMOS tube is connected to the voltage end, the drain of the first PMOS tube is connected to the gate of the first PMOS tube, the anode of the first current source Iref_1 is connected to the drain of the first PMOS tube, and the cathode is connected to the voltage end; the anode of the second current source Iref_2 is grounded, and the cathode is connected to the drain of the first PMOS tube.

[0023] The current comparison circuit 100 is mainly composed of a first PMOS transistor with a gate and a drain connected, a first current source Iref_1 and a second current source Iref_2. When the current value of the first current source Iref_1 is less than the current value of the second current source Iref_2, the potential of the gate and the drain of the first PMOS transistor is pulled down to a low level state, and its gate potential V PMOS1_gate The voltage waveform that changes with time changes with time as shown in Figure 2 As shown, the first PMOS tube is turned on, and a current I flows through it. PMOS1 The waveform of Figure 2 As shown, according to Kirchhoff's law, the current value flowing through the first PMOS tube is Iref_2-Iref_1; when the current value of the first current source Iref_1 is greater than the current value of the second current source Iref_2, the potential of the gate and drain of the first PMOS tube is raised to a high level state, and its gate potential V PMOS1_gateThe voltage waveform that changes with time changes with time as shown in Figure 3 As shown, the first PMOS tube is turned off and no current flows through it.

[0024] The flip current comparison circuit 200 in this embodiment includes a second PMOS tube, the gate of the second PMOS tube is connected to the second input end of the current absolute value output circuit, the source of the second PMOS tube is connected to the voltage end, the drain of the second PMOS tube is connected to the gate of the second PMOS tube, the anode of the second current source Iref_2 is connected to the drain of the second PMOS tube, and the cathode is connected to the voltage end; the anode of the first current source Iref_1 is grounded, and the cathode is connected to the drain of the second PMOS tube.

[0025] The flip current comparison circuit 200 is composed of a second PMOS transistor with a gate and a drain connected, a first current source Iref_1, and a second current source Iref_2, wherein the first current source Iref_1 and the second current source Iref_2 are the same as the first current source Iref_1 and the second current source Iref_2 in the current comparison circuit. When the current value of the second current source Iref_2 is less than the current value of the first current source Iref_1, the potential of the gate and the drain of the second PMOS transistor is pulled down to a low level state, and its gate potential V PMOS2_gate The voltage waveform that changes with time changes with time as shown in Figure 3 As shown, the second PMOS tube is turned on, and a current I flows through it. PMOS2 The waveform of Figure 3 As shown, according to Kirchhoff's law, the current value flowing through the transistor PMOS2 is Iref_1-Iref_2; when the current value of the second current source Iref_2 is greater than the current value of the first current source Iref_1, the potential of the gate and drain of the second PMOS tube is raised to a high level state, and its gate potential V PMOS2_gate The voltage waveform that changes with time changes with time as shown in Figure 2 As shown, the second PMOS tube is turned off and no current flows through it.

[0026] The current absolute value output circuit includes a third PMOS tube and a fourth PMOS tube, the gate of the third PMOS tube is connected to the current comparison circuit, and forms a mirror current source with the first PMOS tube in the current comparison circuit, the source of the third PMOS tube is connected to the voltage end, and the drain of the third PMOS tube is connected to the drain of the fourth PMOS tube; the gate of the fourth PMOS tube is connected to the flip current comparison circuit, and forms another mirror current source with the second PMOS tube in the flip current comparison circuit, and the source of the fourth PMOS tube is connected to the voltage end.

[0027] The current absolute value output circuit is mainly composed of a third PMOS tube and a fourth PMOS tube, wherein the gate of the third PMOS tube is connected to the gate of the first PMOS tube in the current comparison circuit 100, and the gate of the fourth PMOS tube is connected to the gate of the second PMOS tube in the flip current comparison circuit, so that the current I flowing through the first PMOS tube PMOS1 (i.e. Iref_2-Iref_1) or the current I flowing through the second PMOS tube PMOS2 (i.e., Iref_1-Iref_2) is mirrored to the third PMOS tube or the fourth PMOS tube, and outputted through the drain of the third PMOS tube and the fourth PMOS tube to obtain a current value of |I ref_1 -I ref_2 |The output current waveform is as follows Figure 4 shown.

[0028] It is not difficult to find that the present invention realizes the generation of the absolute value of the current, so that the system generates a positive current equal to the difference between two different current sources.

Claims

1. A current absolute value generating circuit, characterized in that: include: a current comparison circuit for generating a first current equal to a difference between the second current source and the first current source according to Kirchhoff's law; a flip current comparison circuit, for generating a second current equal to the difference between the first current source and the second current source according to Kirchhoff's law, The current absolute value output circuit is used to output the absolute value of the first current or the second current.

2. The current absolute value generating circuit according to claim 1, characterized in that: The current comparison circuit includes a first PMOS tube, a gate of the first PMOS tube is connected to the first input end of the current absolute value output circuit, a source of the first PMOS tube is connected to the voltage end, a drain of the first PMOS tube is connected to the gate of the first PMOS tube, an anode of the first current source is connected to the drain of the first PMOS tube, and a cathode is connected to the voltage end; an anode of the second current source is grounded, and a cathode is connected to the drain of the first PMOS tube.

3. The current absolute value generating circuit according to claim 1, characterized in that: The flip current comparison circuit includes a second PMOS tube, the gate of the second PMOS tube is connected to the second input end of the current absolute value output circuit, the source of the second PMOS tube is connected to the voltage end, the drain of the second PMOS tube is connected to the gate of the second PMOS tube, the anode of the second current source is connected to the drain of the second PMOS tube, and the cathode is connected to the voltage end; the anode of the first current source is grounded, and the cathode is connected to the drain of the second PMOS tube.

4. The current absolute value generating circuit according to claim 1, characterized in that: The current absolute value output circuit includes a third PMOS tube and a fourth PMOS tube, the gate of the third PMOS tube is connected to the current comparison circuit, and forms a mirror current source with the first PMOS tube in the current comparison circuit, the source of the third PMOS tube is connected to the voltage end, and the drain of the third PMOS tube is connected to the drain of the fourth PMOS tube; the gate of the fourth PMOS tube is connected to the flip current comparison circuit, and forms another mirror current source with the second PMOS tube in the flip current comparison circuit, and the source of the fourth PMOS tube is connected to the voltage end.

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