Current monitoring circuit, method, power supply chip, storage medium and electronic device

Abstract

An embodiment of the present application provides a current monitoring circuit, method, power supply chip, storage medium, electronic device and program product. The circuit includes: a plurality of power supply circuits for respectively supplying power to multiple groups of memory modules included in a server, an amplifier and a power supply chip. The non-inverting input terminal of the amplifier is connected to the current input terminal of each first voltage divider device included in the multiple power supply circuits through a first monitoring link, the inverting input terminal of the amplifier is connected to the current output terminal of each first voltage divider device through a second monitoring link, and the output terminal of the amplifier is connected to the power supply chip, and the power supply chip is used to monitor the current of the multiple power supply circuits; the multiple groups of memory modules are distributed on multiple sides of a central processing unit included in the server. In any one of the power supply circuits, the current input terminal of the first voltage divider device is connected to the input voltage, and the current output terminal of the first voltage divider device is connected to a group of memory modules.

Description

Technical Field

[0001] Embodiments of the present application relate to the field of computers, and more particularly, to a current monitoring circuit, method, power supply chip, storage medium, electronic device, and program product. Background Art

[0002] In a computer motherboard, the space and traces in the power supply area of the server memory are usually very tight. In the related art, since a single power supply circuit is usually used to supply power to multiple memory modules around the server central processing unit, the power supply circuit needs to pass through the side area of the central processing unit, resulting in problems such as a long power supply circuit path and a large occupied trace space. Summary of the Invention

[0003] Embodiments of the present application provide a current monitoring circuit, method, power supply chip, storage medium, electronic device, and program product to at least solve the problems of a long path and a large occupied trace space existing in the power supply circuit in the related art.

[0004] According to an embodiment of the present application, a current monitoring circuit is provided, including: a plurality of power supply circuits for respectively supplying power to multiple groups of memory modules included in a server, an amplifier, and a power supply chip, wherein the non-inverting input terminal of the amplifier is connected to the current input terminal of each first voltage divider included in the plurality of power supply circuits through a first monitoring link, the inverting input terminal of the amplifier is connected to the current output terminal of each first voltage divider through a second monitoring link, the output terminal of the amplifier is connected to the power supply chip, and the power supply chip is used to monitor the current of the plurality of power supply circuits; the multiple groups of memory modules are distributed on multiple sides of a central processing unit included in the server, and in any one of the power supply circuits, the current input terminal of the first voltage divider is connected to an input voltage, and the current output terminal of the first voltage divider is connected to a group of memory modules.

[0005] In an exemplary embodiment, the current monitoring circuit further includes: a plurality of filtering circuits respectively used for filtering interference signals on each first monitoring link and each second monitoring link.

[0006] In an exemplary embodiment, for any one of the plurality of filtering circuits included in the plurality of filtering circuits: the filtering circuit includes a capacitor and a second voltage divider, wherein the second voltage divider is located in the monitoring link connected to the first voltage divider included in the corresponding power supply circuit, and the capacitor is connected in parallel between the first monitoring link and the second monitoring link connected to the first voltage divider included in the corresponding power supply circuit.

[0007] In an exemplary embodiment, the second voltage divider device is located in the first monitoring link to which the first voltage divider device included in the corresponding power supply circuit is connected; or, the second voltage divider device is located in the second monitoring link to which the first voltage divider device included in the corresponding power supply circuit is connected; or, the number of the second voltage divider devices is multiple, and some of the second voltage divider devices are located in the first monitoring link to which the first voltage divider device included in the corresponding power supply circuit is connected, and the remaining second voltage divider devices are located in the second monitoring link to which the first voltage divider device included in the corresponding power supply circuit is connected.

[0008] In an exemplary embodiment, the first end of the capacitor is connected to the current input end of the first voltage divider device included in the corresponding power supply circuit; the second end of the capacitor is connected to the current output end of the first voltage divider device included in the corresponding power supply circuit.

[0009] In an exemplary embodiment, the first end of the capacitor is connected to the non-inverting input terminal of the amplifier; the second end of the capacitor is connected to the inverting input terminal of the amplifier.

[0010] In an exemplary embodiment, the first voltage divider device is arranged at a position where the sum of the physical path distances from each memory module included in the corresponding memory module group is the smallest.

[0011] In an exemplary embodiment, the first voltage divider device includes: a current detection resistor; the amplifier includes: an operational amplifier, a variable gain amplifier, a differential amplifier. Wherein, when the amplifier is the variable gain amplifier, the gain of the variable gain amplifier is determined according to the current range to be monitored by the current monitoring circuit and the maximum input voltage range of the power supply chip.

[0012] In an exemplary embodiment, the current monitoring circuit further includes: a plurality of overvoltage protection circuits respectively used for overvoltage protection of each first voltage divider device. For any one of the plurality of overvoltage protection circuits included: one end of the overvoltage protection circuit is connected to the current input end of the corresponding first voltage divider device, the other end of the overvoltage protection circuit is connected to the current output end of the first voltage divider device, and the overvoltage protection circuit includes at least one of the following: a Zener diode, a transient voltage suppression diode.

[0013] In an exemplary embodiment, the second voltage divider device includes: a voltage divider device with adjustable resistance; a heat dissipation device is provided on the first voltage divider device and / or the second voltage divider device.

[0014] According to another embodiment of the present application, a current monitoring method is provided, which is applied to the above-mentioned current monitoring circuit and includes: obtaining a target voltage signal output by the amplifier, where the voltage signal is determined by the amplifier based on the initial voltage signals input through the first monitoring link and the second monitoring link; performing analog-to-digital conversion on the target voltage signal to obtain a target voltage value; and performing magnification conversion on the target voltage value to obtain the sum of the currents of multiple power supply circuits.

[0015] According to still another embodiment of the present application, a power supply chip is further provided. The power supply chip is located in the current monitoring circuit, and the current monitoring circuit further includes: multiple power supply circuits and an amplifier for respectively supplying power to multiple groups of memory modules included in the server. The non-inverting input terminal of the amplifier is connected to the current input terminal of each first voltage divider included in the multiple power supply circuits through a first monitoring link, the inverting input terminal of the amplifier is connected to the current output terminal of each first voltage divider through a second monitoring link, the output terminal of the amplifier is connected to the power supply chip, and the power supply chip is used to monitor the currents of the multiple power supply circuits; the multiple groups of memory modules are distributed on multiple sides of the central processing unit included in the server. In any one of the power supply circuits, the current input terminal of the first voltage divider is connected to the input voltage, and the current output terminal of the first voltage divider is connected to a group of memory modules; the power supply chip includes: an acquisition module for acquiring a target voltage signal output by the amplifier, where the voltage signal is determined by the amplifier based on the initial voltage signals input through the first monitoring link and the second monitoring link; a first conversion module for performing analog-to-digital conversion on the target voltage signal to obtain a target voltage value; and a second conversion module for performing magnification conversion on the target voltage value to obtain the sum of the currents of multiple power supply circuits.

[0016] According to still another embodiment of the present application, a computer-readable storage medium is further provided. A computer program is stored in the computer-readable storage medium, where the computer program is configured to execute the steps in any one of the above method embodiments when running.

[0017] According to still another embodiment of the present application, an electronic device is further provided, including a memory and a processor. A computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0018] According to still another embodiment of the present application, a computer program product is further provided, including a computer program, where the computer program realizes the steps in any one of the above method embodiments when executed by a processor.

[0019] Through this application, by separately powering multiple groups of memory modules located on multiple sides of the central processing unit of the server based on multiple power supply circuits, it is possible to solve the problems of the relatively long path and large occupied routing space existing in the power supply circuits in the related art, achieving the effects of shortening the length of the power path and saving the routing space. Description of the Drawings

[0020] Figure 1 is a schematic diagram of a current monitoring circuit according to an embodiment of the present application Figure 1 ;

[0021] Figure 2 is a schematic diagram of a current monitoring circuit according to an embodiment of the present application Figure 2 ;

[0022] Figure 3 is a hardware structure block diagram of a server device for a current monitoring method according to an embodiment of the present application;

[0023] Figure 4 is a flowchart of a current monitoring method according to an embodiment of the present application;

[0024] Figure 5 is a structure block diagram of a power supply chip according to an embodiment of the present application. Detailed Embodiment

[0025] In the following, embodiments of the present application will be described in detail with reference to the drawings and in conjunction with the embodiments.

[0026] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and do not necessarily have to be used to describe a specific order or sequence.

[0027] In this embodiment, a current monitoring circuit is provided. Figure 1 is a schematic diagram of a current monitoring circuit according to an embodiment of the present application Figure 1 , as Figure 1 shown, the current monitoring circuit includes: multiple power supply circuits that respectively power multiple groups of memory modules included in the server, an amplifier, and a power supply chip. Among them, the non-inverting input terminal of the amplifier is connected to the current input terminal of each first voltage divider component included in the multiple power supply circuits through a first monitoring link, the inverting input terminal of the amplifier is connected to the current output terminal of each first voltage divider component through a second monitoring link, the output terminal of the amplifier is connected to the power supply chip, and the power supply chip is used to monitor the current of the multiple power supply circuits; the multiple groups of memory modules are distributed on multiple sides of the central processing unit included in the server. In any one of the power supply circuits, the current input terminal of the first voltage divider component is connected to the input voltage, and the current output terminal of the first voltage divider component is connected to a group of memory modules.

[0028] In the above current monitoring circuit, by way of example, the power supply chip includes but is not limited to: an analog-to-digital conversion chip, a microcontroller, a digital signal processor, a field programmable gate array, a sensor chip, and other chips that can implement the analog-to-digital conversion function, etc. By way of example, the analog-to-digital conversion chip includes but is not limited to: a successive approximation analog-to-digital converter chip, a ΔΣ analog-to-digital converter chip, etc.

[0029] The multiple groups of memory modules include but are not limited to being distributed on both sides of the central processing unit included in the server, or being distributed around the central processing unit included in the server, etc., as Figure 1 shown. By way of example, taking the multiple groups of memory modules being distributed on both sides of the central processing unit as an example, the power supply monitoring circuit in the present application is described by way of example: as Figure 1 shown, the power supply monitoring circuit includes two power supply circuits. Among them, the first voltage divider components included in the power supply circuits for respectively powering the memory modules located on both sides of the CPU are all current detection resistors. Since the voltage drop across the current measurement resistor is much smaller than the input voltage of the power supply circuit, therefore, the input voltage of the power supply circuit (i.e., the 12V_Input shown in the figure) is directly regarded as the input voltage of the memory module (12V_DIMM1), as Figure 1 shown, the non-inverting input terminal of the amplifier is connected to the current entering end of the current detection resistor, the inverting input terminal of the amplifier is connected to the current flowing out end of the current detection resistor, and the power supply chip determines the current value of the memory module in the server according to the voltage output by the amplifier. In the above embodiment, when the ratio of the input voltage of the power supply circuit to the voltage drop across the first voltage divider component is greater than a predetermined threshold, the input voltage of the power supply circuit can be regarded as the input voltage of the memory module. The predetermined threshold includes but is not limited to 20, 50, 100, etc., and the predetermined threshold can be adjusted according to the application scenario.

[0030] In the current monitoring circuit of this embodiment, by respectively powering multiple groups of memory modules located on multiple sides of the central processing unit of the server based on multiple power supply circuits, the problems in the related art that when using one power supply circuit to power the memory modules on multiple sides of the central processing unit, the power supply circuit path is long and the occupied routing space is large due to passing through the side area of the central processing unit are solved, the length of the power supply path is shortened, and the routing space is saved.

[0031] In an optional embodiment, the current monitoring circuit further includes: multiple filtering circuits respectively used for filtering interference signals on each of the first monitoring link and each of the second monitoring link.

[0032] In the above embodiments, exemplarily, the filtering circuit is determined in the following ways: Step 1, determine the types of interference signals on the first monitoring link and the second monitoring link; Step 2, determine the type of the filtering circuit according to the type of the interference signal to be excluded. For example, when the interference signal is mainly high-frequency noise, a low-pass filter is selected to form the power supply circuit. The low-pass filter can allow the normal current signal of low frequency to pass through while filtering out the high-frequency noise signal. When the interference signal includes components in a specific frequency range, a band-stop filter can be selected to form the power supply circuit. The band-stop filter can prevent the signals in the specific frequency range from passing through while allowing the signals of other frequencies to be transmitted normally; Step 3, determine the parameters of the filtering circuit of this type. For example, when a low-pass filter is selected to form the power supply circuit, the cut-off frequency of the low-pass filter is set according to the frequency range of the current signal of the current monitoring circuit. For example, when the frequency of the current signal at the current output end of the voltage divider device is about 50 Hz, the cut-off frequency of the low-pass filter can be set at about 100 Hz, so as to filter out the interference signal while ensuring the transmission of the normal current signal. When a band-stop filter is selected to form the power supply circuit, the stop-band frequency range of the band-stop filter is set according to the frequency range of the interference signal. For example, when the frequency range of the interference signal is 1 kHz - 2 kHz, the stop-band frequency range of the band-stop filter is set to 1 kHz - 2 kHz. At the same time, it is also necessary to determine whether the suppression degree of the interference signal by the attenuation degree of the filter in the stop-band frequency range can meet the threshold. For example, the attenuation of the interference signal in the stop-band frequency range reaches 40 dB, so as to ensure that the interference signal is fully suppressed while not having a great impact on the current measurement result. Exemplarily, the filtering circuit is arranged near the signal source close to the monitoring link (for example, the current output end of the first voltage divider device). The filter included in the filtering circuit can be one or more. When there are multiple filters, the multiple filters are connected in a cascade manner, for example. When the interference signal includes high-frequency components and components in a specific frequency range, the low-pass filtering circuit included in the filtering circuit can be first connected to the monitoring link to preliminarily filter out the high-frequency interference, and then the band-stop filtering circuit included in the filtering circuit is connected to the output end of the low-pass filtering circuit to further filter out the interference signals in the specific frequency range, so as to achieve a more effective filtering effect.

[0033] In the above embodiments, by adding a filtering circuit to each monitoring link, the interference signal can be effectively removed and the accuracy of current measurement can be improved.

[0034] In an optional embodiment, for any one of the multiple filter circuits: the filter circuit includes a capacitor and a second voltage divider component, wherein the second voltage divider component is located in the monitoring link connected to the first voltage divider component included in the corresponding power supply circuit, and the capacitor is connected in parallel between the first monitoring link and the second monitoring link connected to the first voltage divider component included in the corresponding power supply circuit.

[0035] In the above embodiment, Figure 2 is a schematic diagram of a current monitoring circuit according to an embodiment of the present application Figure 2 , as Figure 2 shown, the power supply monitoring circuit includes two power supply circuits. In the power supply circuit where the first voltage divider component is R1 shown in the figure, the SENSE1_P signal of the current Sense1 loop flowing through R1 at node 101, and the SENSE1_N signal of the current Sense1 loop flowing through R1 at node 102. In the power supply circuit where the first voltage divider component is R2 shown in the figure, the SENSE2_P signal of the current Sense1 loop flowing through R1 at node 201, and the SENSE2_N signal of the current Sense1 loop flowing through R1 at node 202. Node 151 is the combined signal of node 101 and node 201, and node 151 is connected to the non-inverting input terminal of the amplifier (U1 shown in the figure). Node 152 is the combined signal of node 102 and node 202, and node 152 is connected to the inverting input terminal of the amplifier. The output signal flowing through the amplifier at node 103 is output to the analog-to-digital conversion receiving terminal of the power supply chip. In the power supply circuit where R1 is located, C1 is the capacitor, and R4 and R6 are the second voltage divider components. C1, R4, and R6 form a filter to reduce the influence of interference signals on current Sense1. In the power supply circuit where R2 is located, C2 is the capacitor, and R3 and R5 are the second voltage divider components. C2, R3, and R5 form a filter to reduce the influence of interference signals on current Sense2.

[0036] In the above embodiment, by adding a capacitor and a second voltage divider component in the monitoring link, the filtering effect is enhanced and the accuracy of current monitoring is improved.

[0037] In an alternative embodiment, the second voltage divider device is located in the first monitoring link to which the first voltage divider device included in the corresponding power supply circuit is connected; or, the second voltage divider device is located in the second monitoring link to which the first voltage divider device included in the corresponding power supply circuit is connected; or, the number of the second voltage divider devices is multiple, and some of the second voltage divider devices are located in the first monitoring link to which the first voltage divider device included in the corresponding power supply circuit is connected, and the remaining second voltage divider devices are located in the second monitoring link to which the first voltage divider device included in the corresponding power supply circuit is connected.

[0038] In the above embodiment, as Figure 2 shown, by way of example, taking the power supply circuit where R1 is located as an example, the distribution manner of the second voltage divider device is described by way of example. The second voltage divider device includes, but is not limited to: only including R4 shown in the figure, only including R6 shown in the figure, and including both R4 and R6 shown in the figure.

[0039] In the above embodiment, when including multiple voltage divider devices in the second voltage divider device, by deploying some of the second voltage divider devices in the first monitoring link and the remaining second voltage divider devices in the second monitoring link, two-stage filtering of signals is achieved, which helps to reduce signal fluctuations and improve the stability and accuracy of current monitoring.

[0040] In an alternative embodiment, the first end of the capacitor is connected to the current input end of the first voltage divider device included in the corresponding power supply circuit; the second end of the capacitor is connected to the current output end of the first voltage divider device included in the corresponding power supply circuit.

[0041] In the above embodiment, as Figure 2 shown, by way of example, taking the power supply circuit where R1 shown in the figure is located as an example, when only R4 shown in the figure is included in the voltage divider device, the first end of the capacitor includes, but is not limited to, being located between node 101 and R4, and the second end of the capacitor includes, but is not limited to, being located between node 102 and node 152; when only R6 shown in the figure is included in the voltage divider device, the first end of the capacitor includes, but is not limited to, being located between node 101 and node 151, and the second end of the capacitor includes, but is not limited to, being located between node 102 and R6; when both R4 and R6 shown in the figure are included in the voltage divider device, the first end of the capacitor includes, but is not limited to, being located between node 101 and R4, and the second end of the capacitor includes, but is not limited to, being located between node 102 and R6.

[0042] In an alternative embodiment, the first end of the capacitor is connected to the non-inverting input terminal of the amplifier; the second end of the capacitor is connected to the inverting input terminal of the amplifier.

[0043] In the above embodiments, as Figure 2 shown, for example, taking the power supply circuit where R1 is located in the figure as an example, when only R4 shown in the figure is included in the voltage divider device, the first end of the capacitor includes but is not limited to being located between node 151 and R4, and the second end of the capacitor includes but is not limited to being located between node 102 and node 152; when only R6 shown in the figure is included in the voltage divider device, the first end of the capacitor includes but is not limited to being located between node 101 and node 151, and the second end of the capacitor includes but is not limited to being located between node 152 and R6; when both R4 and R6 shown in the figure are included in the voltage divider device, the first end of the capacitor includes but is not limited to being located between node 151 and R4, and the second end of the capacitor includes but is not limited to being located between node 152 and R6.

[0044] In an alternative embodiment, the first voltage divider device is disposed at a position where the sum of the physical path distances from each memory module included in the corresponding memory module group is minimized.

[0045] In this embodiment, by disposing the first voltage divider device at a position where the sum of the physical path distances from each memory module in its corresponding memory module group is minimized, the path length of the power supply circuit for the memory module is minimized, saving wiring space.

[0046] In an alternative embodiment, the first voltage divider device includes: a current sensing resistor; the amplifier includes: an operational amplifier, a variable gain amplifier, a differential amplifier, wherein, when the amplifier is the variable gain amplifier, the gain of the variable gain amplifier is determined according to the current range to be monitored by the current monitoring circuit and the maximum input voltage range of the power supply chip.

[0047] In the above embodiments, the current detection resistors in the multiple power supply circuits may be the same or different. Exemplarily, the current detection resistors include, but are not limited to: externally attached current detection resistors, internally attached current detection resistors, metal foil-based resistors, foil resistors, electron beam welded resistors, etc. The resistance values of the current detection resistors include, but are not limited to: 0.1 mΩ to 1 mΩ, 0.2 mΩ to 5 mΩ, etc. The type and resistance value of the current monitoring resistor can be selected separately according to different application scenarios. Exemplarily, the type and resistance value of the current monitoring resistor can be determined based on the following factors: maximum current, the maximum current expected to flow through the current detection resistor is the primary factor in selecting the current detection resistor, and the voltage drop generated by the resistance value of the shunt resistor at the maximum current must be within the measurement range of the voltage of the power supply chip; power consumption and thermal management, since the current detection resistor consumes power and generates heat during operation, therefore, the selection of the current detection resistor needs to consider power consumption and thermal management to avoid overheating of the resistor and affecting the stability and lifespan of the circuit; accuracy requirements, the selection of the current detection resistor needs to consider the accuracy requirements of current detection. For example, a resistor with a lower resistance value is selected in the case of higher accuracy requirements; system noise, the resistance value is determined according to the noise level in the environment where the server memory module is located. For example, a lower resistance value is selected in the case of a higher noise level in the environment; cost and availability; gain of the current detection amplifier; ambient temperature, etc.

[0048] In the above embodiments, by using a variable gain amplifier in the current monitoring circuit, it is possible to flexibly adjust the measurable current range according to the monitoring requirements, so as to adapt to different monitoring requirements, improve the accuracy of current monitoring. At the same time, by precisely controlling the gain of the amplifier, signal distortion during the amplification process can be reduced, and the measurement accuracy can be improved.

[0049] In an alternative embodiment, the current monitoring circuit further includes: a plurality of overvoltage protection circuits respectively for overvoltage protection of each of the first voltage divider components. For any one of the overvoltage protection circuits included in the plurality of overvoltage protection circuits: one end of the overvoltage protection circuit is connected to the current input end of the corresponding first voltage divider component, the other end of the overvoltage protection circuit is connected to the current output end of the first voltage divider component, and the overvoltage protection circuit includes at least one of the following: a Zener diode, a transient voltage suppression diode.

[0050] In the above embodiments, exemparily, in the case where the Zener diode is included in the overvoltage protection circuit, the Zener voltage of the Zener diode is higher than the input voltage of the first voltage divider component. Exemplarily, when the input voltage of the first voltage divider component is 12V, the Zener voltage of the Zener diode is 13V, 14V, 15V, etc.

[0051] In the above embodiments, by providing an overvoltage protection circuit on each first voltage divider device, damage to circuit components caused by overvoltage can be effectively prevented. Specifically, by deploying a Zener diode and a transient voltage suppression diode in the overvoltage protection circuit, it can be achieved that under normal operating voltage, the Zener diode and the TVS diode included in the overvoltage protection circuit have no impact on the normal operation of the circuit, and when the voltage exceeds the preset value, they conduct rapidly to clamp the excessive voltage within a safe range, thereby protecting the first voltage divider device from damage and improving the stability of the circuit under abnormal conditions.

[0052] In an alternative embodiment, the second voltage divider device includes: a voltage divider device with adjustable resistance; a heat dissipation device is provided on the first voltage divider device and / or the second voltage divider device.

[0053] In the above embodiments, the voltage divider device with adjustable resistance includes, but is not limited to: a potentiometer, an adjustable resistor, etc. The heat dissipation device includes, but is not limited to: a metal heat sink, a heat pipe, a thermal pad, a liquid cooling system, a fan, a water cooling plate, etc. The heat dissipation device can be determined according to the application scenario and the heat dissipation requirements of the first voltage divider device and the second voltage divider device. Exemplarily, when the density of the component arrangement in the server is relatively high, the heat sink is selected as the heat dissipation device.

[0054] In the above embodiments, by installing the heat dissipation device on the first voltage divider device and the second voltage divider device, the problem of device damage caused by the increase in temperature of the voltage divider device due to long-term load operation can be avoided, damage to the device caused by excessive temperature can be avoided, the stability of the voltage divider device is improved, and the service life of the voltage divider device is extended.

[0055] The current monitoring circuit in the present application will be exemplarily described below in conjunction with specific embodiments:

[0056] As Figure 2As shown, in this embodiment, by way of example, the power supply monitoring circuit includes two power supply circuits. In the power supply circuit where the first voltage divider component is R1 shown in the figure, the SENSE1_P signal of the current Sense1 loop flowing through R1 at node 101, and the SENSE1_N signal of the current Sense1 loop flowing through R1 at node 102. In the power supply circuit where the first voltage divider component is R2 shown in the figure, the SENSE2_P signal of the current Sense1 loop flowing through R1 at node 201, and the SENSE2_N signal of the current Sense1 loop flowing through R1 at node 202. Node 151 is the combined signal of node 101 and node 201, and node 151 is connected to the non-inverting input terminal of the amplifier (U1 shown in the figure). Node 152 is the combined signal of node 102 and node 202, and node 152 is connected to the inverting input terminal of the amplifier. The output signal flowing through node 103 is output to the analog-to-digital conversion receiving terminal of the power supply chip. By way of example, in this embodiment, , , , taking the multiple of the amplifier as as an example, the process of measuring the sum of the currents of multiple said power supply circuits by the power supply chip is specifically described as follows:

[0057] The current flowing through and the voltage difference on both sides of are calculated as follows:

[0058] (Formula 1)

[0059] Wherein, is the voltage at node 101, is the voltage at node 102;

[0060] The current flowing through and the voltage difference on both sides of are calculated as follows:

[0061] (Formula 2)

[0062] Wherein, is the voltage at node 201, is the voltage at node 202;

[0063] The total current flowing through the memory module, the calculation formula of the total current is as follows:

[0064] (Formula 3)

[0065] The voltage of Node 151 is the average voltage of Node 101 and Node 201, and its calculation formula is as follows:

[0066] (Formula Four)

[0067] The voltage of Node 152 is the average voltage of Node 102 and Node 202, and its calculation formula is as follows:

[0068] (Formula Five)

[0069] The voltage of the output node 103 of the amplifier and its calculation formula is as follows:

[0070] (Formula Six)

[0071] The voltage output from node 103 received by the power supply chip is subjected to analog-to-digital conversion, and the converted voltage value is subjected to a magnification conversion process (i.e., multiplied by 2 / ( *R)), so as to obtain the total current of the converted power supply circuit , and its calculation formula is as follows:

[0072] (Formula Seven)

[0073] (Formula Eight)

[0074] As can be seen from the above, in this embodiment, the total current determined by the power supply chip is equal to the sum of the currents on both sides of the output CPU of the memory module (i.e., the sum of the currents of the power supply circuits of the memory modules), so as to effectively calculate the current of the memory without adding operational amplifiers and power supply chips.

[0075] In this embodiment, a current monitoring method is also provided. The method embodiments provided in the embodiments of the present application can be executed in a server device or a similar computing device. Taking the operation on a server device as an example, Figure 3 is a hardware structure block diagram of a server device according to the current monitoring method of the embodiments of the present application. As Figure 3 shown, the server device may include one or more ( Figure 3Only one processor 302 (the processor 302 may include, but is not limited to, a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 304 for storing data are shown. Among them, the above server device may further include a transmission device 306 for communication functions and an input / output device 308. Those of ordinary skill in the art can understand that Figure 3 The structure shown is only schematic and does not limit the structure of the above server device. For example, the server device may further include more or fewer components than Figure 3 shown in, or have a different configuration from Figure 3 shown.

[0076] The memory 304 can be used to store computer programs. For example, software programs and modules of application software, such as the computer program corresponding to the current monitoring method in the embodiments of the present application. The processor 302 executes various functional applications and data processing by running the computer program stored in the memory 304, that is, implements the above method. The memory 304 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memories, or other non-volatile solid-state memories. In some instances, the memory 304 may further include a memory remotely provided with respect to the processor 302, and these remote memories can be connected to the server device through a network. Examples of the above network include, but are not limited to, the Internet, an enterprise intranet, a local area network, a mobile communication network, and combinations thereof.

[0077] The transmission device 306 is used to receive or send data via a network. Specific examples of the above network may include a wireless network provided by the communication provider of the server device. In one instance, the transmission device 306 includes a network adapter (abbreviated as NIC), which can be connected to other network devices through a base station and thus communicate with the Internet. In one instance, the transmission device 306 may be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0078] In this embodiment, a current monitoring method is provided, which is applied to the above current monitoring circuit. Figure 4 is a flowchart of the current monitoring method according to the embodiments of the present application, as Figure 4 shown, and the process includes the following steps:

[0079] Step S402, obtain the target voltage signal output by the amplifier, where the voltage signal is determined by the amplifier based on the initial voltage signals input by the first monitoring link and the second monitoring link;

[0080] Step S404: Perform analog-to-digital conversion on the target voltage signal to obtain a target voltage value;

[0081] Step S406: Perform magnification conversion on the target voltage value to obtain the sum of currents of multiple said power supply circuits.

[0082] The execution subject of the above steps includes but is not limited to an analog-to-digital conversion device, a chip equipped with an analog-to-digital conversion device, etc. In the above steps, by determining the target voltage value based on the target voltage signal output by the amplifier and determining the sum of currents of the power supply circuit based on the target voltage value, accurate measurement of current is achieved.

[0083] In an optional embodiment, the method further includes: determining the power consumption and distribution mode of each memory module among multiple memory modules in the server; determining the first average value of the power consumption of multiple memory modules; dividing multiple said memory modules into multiple groups of memory modules based on the power consumption of each said memory module and the distribution mode, wherein the absolute value of the difference between the average value of the power consumption of each group of said memory modules and the first average value is less than a first threshold, and the sum of the power consumption of each group of said memory modules is less than a second threshold; respectively determining the power supply circuits of each group of said memory modules.

[0084] The first threshold and the second threshold can be preset, and the first threshold and the first threshold can be adjusted according to different application scenarios. The distribution mode includes but is not limited to: the position of each memory module, the positional relationship between each memory module and other memory modules, and the positional relationship between each memory module and the central processing unit.

[0085] Exemplarily, the execution entities of the above steps include but are not limited to: server management systems, automated test equipment, and other terminal devices that can execute the above module grouping method. Specifically, the server management system can collect the power consumption data of each memory module and its location information in the server through built-in hardware monitoring tools or dedicated management software. For example, use the Intelligent Platform Management Interface (IPMI) or similar interfaces to obtain this data. The server management system analyzes the collected power consumption data and calculates the average value of the power consumption of all memory modules. The power consumption data can be automatically collected at a predetermined period. According to the collected power consumption data and distribution method, the server management system can automatically divide the memory modules into multiple groups to ensure that the difference between the average power consumption of each group and the overall average value is within the set threshold. Exemplarily, the division of memory modules can be achieved through optimization algorithms (such as genetic algorithms, simulated annealing algorithms, etc.) deployed in the server management system. Specifically, the Automated Test Equipment (ATE) can perform power consumption tests and location marking on each memory module during the production stage, so as to accurately record the power consumption and location information of each memory module. The test equipment automatically calculates the average power consumption of all tested memory modules, uploads the results to the central database, and automatically divides the memory module groups according to the preset algorithm to ensure that the power consumption of each group meets the quality control standards.

[0086] In the above steps, by reasonably grouping the memory modules based on the power consumption and distribution method of each memory module, it can ensure that the power consumption of each group of memory modules is within a controllable range, thereby avoiding problems such as system overload, overheating, or power instability caused by excessive power consumption of single or multiple memory modules, and improving the stability and reliability of the entire server system. Specifically, by dividing the memory modules into multiple groups and ensuring that the difference between the average power consumption of each group and the overall average value is within the set threshold, more refined power management can be achieved, ensuring more uniform power distribution, avoiding power overload in certain areas, while improving power utilization efficiency and reducing energy waste. At the same time, it can achieve dividing the memory modules with higher power consumption into different groups, thereby avoiding local overheating, improving the heat dissipation efficiency of the entire system, helping to extend the service life of the memory modules, and reducing system failures caused by high temperature.

[0087] Through the description of the above embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be implemented by means of software plus a necessary general hardware platform. Of course, it can also be implemented by hardware, but in many cases, the former is a better implementation method. Based on such an understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. The computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes several instructions for causing a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in various embodiments of the present application.

[0088] In this embodiment, a power supply chip is further provided. The power supply chip is used to implement the above embodiments and preferred implementation manners, and those that have been described will not be repeated. As used hereinafter, the term "module" may be a combination of software and / or hardware that can implement a predetermined function. Although the power supply chip described in the following embodiments is preferably implemented in software, implementation in hardware, or a combination of software and hardware is also possible and contemplated.

[0089] Figure 5 is a structural block diagram of a power supply chip according to an embodiment of the present application. The power supply chip is located in a current monitoring circuit. The current monitoring circuit further includes: a plurality of power supply circuits and an amplifier for respectively supplying power to multiple groups of memory modules included in the server. Among them, the non-inverting input terminal of the amplifier is connected to the current input terminal of each first voltage divider included in the multiple power supply circuits through a first monitoring link, the inverting input terminal of the amplifier is connected to the current output terminal of each first voltage divider through a second monitoring link, and the output terminal of the amplifier is connected to the power supply chip. The power supply chip is used to monitor the current of the multiple power supply circuits; the multiple groups of memory modules are distributed on multiple sides of a central processing unit included in the server. In any one of the power supply circuits, the current input terminal of the first voltage divider is connected to an input voltage, and the current output terminal of the first voltage divider is connected to a group of memory modules; as Figure 5 shown, the power supply chip includes: an acquisition module 52, configured to acquire a target voltage signal output by the amplifier, where the voltage signal is determined by the amplifier based on the initial voltage signals input through the first monitoring link and the second monitoring link; a first conversion module 54, configured to perform analog-to-digital conversion on the target voltage signal to obtain a target voltage value; a second conversion module 56, configured to perform magnification conversion on the target voltage value to obtain the sum of the currents of multiple power supply circuits.

[0090] It should be noted that the above-mentioned various modules can be implemented by software or hardware. For the latter, it can be implemented in the following ways, but not limited to: the above-mentioned modules are all located in the same processor; or, the above-mentioned various modules are respectively located in different processors in any combination form.

[0091] An embodiment of the present application also provides a computer-readable storage medium, in which a computer program is stored. Wherein, the computer program is set to execute the steps in any one of the above method embodiments when running.

[0092] In an exemplary embodiment, the above computer-readable storage medium may include but is not limited to: various media such as USB flash drives, read-only memories (abbreviated as ROM), random access memories (abbreviated as RAM), mobile hard disks, magnetic disks or optical discs that can store computer programs.

[0093] An embodiment of the present application also provides an electronic device, including a memory and a processor. A computer program is stored in the memory, and the processor is set to run the computer program to execute the steps in any one of the above method embodiments.

[0094] In an exemplary embodiment, the above electronic device may further include a transmission device and an input / output device. Wherein, the transmission device is connected to the above processor, and the input / output device is connected to the above processor.

[0095] An embodiment of the present application also provides a computer program product. The above computer program product includes a computer program, and the steps in any one of the above method embodiments are implemented when the computer program is executed by a processor.

[0096] The specific examples in this embodiment may refer to the examples described in the above embodiments and exemplary embodiments, and will not be repeated here.

[0097] Obviously, those skilled in the art should understand that the above-mentioned various modules or steps of the present application can be implemented by a general-purpose computing device. They can be concentrated on a single computing device, or distributed on a network composed of multiple computing devices. They can be implemented by program codes executable by the computing device. Thus, they can be stored in a storage device and executed by the computing device. And in some cases, the steps shown or described can be executed in a different order than here, or they can be separately made into individual integrated circuit modules, or multiple modules or steps among them can be made into a single integrated circuit module to implement. In this way, the present application is not limited to any specific combination of hardware and software.

[0098] The above are only the preferred embodiments of the present application and are not intended to limit the present application. For those skilled in the art, the present application can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the principle of the present application shall be included within the protection scope of the present application.

Claims

1. A current monitoring circuit, characterized in that it includes: a plurality of power supply circuits, an amplifier, and a power supply chip for respectively powering multiple groups of memory modules included in the server. Among them, the non-inverting input terminal of the amplifier is connected to the current input end of each first voltage divider component included in the multiple power supply circuits through a first monitoring link, the inverting input terminal of the amplifier is connected to the current output end of each first voltage divider component through a second monitoring link, the output terminal of the amplifier is connected to the power supply chip, and the power supply chip is used to monitor the current of the multiple power supply circuits; the multiple groups of memory modules are distributed on multiple sides of the central processing unit included in the server. In any one of the power supply circuits, the current input end of the first voltage divider component is connected to the input voltage, and the current output end of the first voltage divider component is connected to a group of memory modules; the first voltage divider component is arranged at a position where the sum of the physical path distances from each memory module included in the corresponding memory module group is the smallest.

2. The current monitoring circuit according to claim 1, characterized in that it further includes: a plurality of filter circuits respectively used for filtering interference signals on each of the first monitoring link and the second monitoring link.

3. The current monitoring circuit according to claim 2, characterized in that for any one of the plurality of filter circuits included: the filter circuit includes a capacitor and a second voltage divider component, where the second voltage divider component is located in the monitoring link connected to the first voltage divider component included in the corresponding power supply circuit, and the capacitor is connected in parallel between the first monitoring link and the second monitoring link connected to the first voltage divider component included in the corresponding power supply circuit.

4. The current monitoring circuit according to claim 3, characterized in that the second voltage divider component is located in the first monitoring link connected to the first voltage divider component included in the corresponding power supply circuit; or, the second voltage divider component is located in the second monitoring link connected to the first voltage divider component included in the corresponding power supply circuit; or, the number of the second voltage divider components is multiple, part of the second voltage divider components are located in the first monitoring link connected to the first voltage divider component included in the corresponding power supply circuit, and the remaining part of the second voltage divider components are located in the second monitoring link connected to the first voltage divider component included in the corresponding power supply circuit.

5. The current monitoring circuit according to claim 3, characterized in that the first end of the capacitor is connected to the current input end of the first voltage divider component included in the corresponding power supply circuit; the second end of the capacitor is connected to the current output end of the first voltage divider component included in the corresponding power supply circuit.

6. The current monitoring circuit according to claim 3, characterized in that the first end of the capacitor is connected to the non-inverting input terminal of the amplifier; the second end of the capacitor is connected to the inverting input terminal of the amplifier.

7. The current monitoring circuit according to claim 1, characterized in that The first voltage divider device includes: a current detection resistor; The amplifier includes: an operational amplifier, a variable gain amplifier, and a differential amplifier. Wherein, when the amplifier is the variable gain amplifier, the gain of the variable gain amplifier is determined according to the current range to be monitored by the current monitoring circuit and the maximum input voltage range of the power supply chip.

8. The current monitoring circuit according to claim 1, characterized in that It further includes: a plurality of overvoltage protection circuits respectively used for overvoltage protection of each of the first voltage divider devices. For any one of the overvoltage protection circuits included in the plurality of overvoltage protection circuits: One end of the overvoltage protection circuit is connected to the current input end of the corresponding first voltage divider device, the other end of the overvoltage protection circuit is connected to the current output end of the first voltage divider device, and the overvoltage protection circuit includes at least one of the following: a Zener diode, a transient voltage suppression diode.

9. The current monitoring circuit according to claim 3, characterized in that The second voltage divider device includes: a voltage divider device with adjustable resistance; A heat dissipation device is provided on the first voltage divider device and / or the second voltage divider device.

10. A current monitoring method, characterized in that Applied to the current monitoring circuit according to any one of claims 1 to 9, it includes: Obtaining a target voltage signal output by the amplifier, wherein the voltage signal is determined by the amplifier based on the initial voltage signals input through the first monitoring link and the second monitoring link; Performing analog-to-digital conversion on the target voltage signal to obtain a target voltage value; Performing magnification conversion on the target voltage value to obtain the sum of the currents of multiple power supply circuits, wherein the magnification conversion includes multiplying the target voltage value by a first parameter, and the first parameter includes 2 / (β*R), where β is used to indicate the multiple of the amplifier, and R is used to indicate the resistance of the first voltage divider device or the second voltage divider device.

11. A power supply chip, characterized in that The power supply chip is located in a current monitoring circuit, and the current monitoring circuit further includes: a plurality of power supply circuits respectively supplying power to multiple memory module groups included in a server and an amplifier. The non-inverting input terminal of the amplifier is connected to the current input end of each first voltage divider device included in the plurality of power supply circuits through a first monitoring link, the inverting input terminal of the amplifier is connected to the current output end of each first voltage divider device through a second monitoring link, the output terminal of the amplifier is connected to the power supply chip, and the power supply chip is used to monitor the currents of the multiple power supply circuits; the multiple memory module groups are distributed on multiple sides of a central processing unit included in the server. In any one of the power supply circuits, the current input end of the first voltage divider device is connected to an input voltage, and the current output end of the first voltage divider device is connected to a group of memory modules; the first voltage divider device is arranged at a position where the sum of the physical path distances from each memory module included in the corresponding memory module group is the smallest The power supply chip includes: An acquisition module, configured to acquire a target voltage signal output by an amplifier, where the voltage signal is determined by the amplifier based on an initial voltage signal input through a first monitoring link and a second monitoring link; A first conversion module, configured to perform analog-to-digital conversion on the target voltage signal to obtain a target voltage value; A second conversion module, configured to perform magnification conversion on the target voltage value to obtain the sum of currents of multiple power supply circuits, where the magnification conversion includes multiplying the target voltage value by a first parameter, and the first parameter includes 2 / (β*R), where β is used to indicate the multiple of the amplifier, and R is used to indicate the resistance of a first voltage divider or the resistance of a second voltage divider.

12. A computer-readable storage medium, characterized in that a computer program is stored in the computer-readable storage medium, where, when the computer program is executed by a processor, the steps of the method described in claim 10 are implemented.

13. An electronic device, comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, characterized in that when the processor executes the computer program, the steps of the method described in claim 10 are implemented.

14. A computer program product, comprising a computer program, characterized in that when the computer program is executed by a processor, the steps of the method described in claim 10 are implemented.

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