Display device, pixel circuit and driving method thereof

Abstract

The invention provides a display device, a pixel circuit and a driving method thereof, and the method comprises the steps: a first initialization circuit which is connected with a first node, a first scanning signal end, a first voltage end, a first control signal end, and an input end of a driving circuit; the data write-in circuit is connected with a data line, a first node and a second scanning signal end; the light-emitting control circuit is connected with the driving circuit, a second control signal end and the light-emitting unit; the driving circuit is connected with the first node, the second node, the first initialization circuit and the light emitting control circuit; and the compensation auxiliary circuit is connected with the second node, a third scanning signal end and a second voltage end, and is used for writing a threshold voltage for the first node and a second voltage provided by the second voltage end and writing the second voltage for the second node under the control of a third scanning signal provided by the third scanning signal end. According to the pixel circuit, the threshold voltage of the driving transistor is compensated, so that the display stability and consistency of the pixel circuit are improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display device, a pixel circuit and a driving method thereof. Background Art

[0002] Low-temperature polysilicon active-matrix organic light-emitting diodes (LTPS AMOLEDs) are popular in the market for their high performance in small-size devices. However, with the growing market demand for large-size, high-resolution display panels, traditional LTPS AMOLED technology faces a series of challenges. Uniformity issues, high equipment costs, complex production processes, and high costs for equipment upgrades in large-size applications of LTPS AMOLEDs have limited their further expansion in the large-size display market.

[0003] Oxide thin film transistors (Oxide TFT) have better uniformity, better stability, lower leakage current and simpler production process than LTPS. In particular, some processes of Oxide TFT and amorphous silicon thin film transistor (a-Si TFT) can be used in common, and the cost of equipment upgrade is lower. At the same time, Oxide TFT has good uniformity and can be used for high-generation, large-size flat panel displays. However, Oxide TFT also faces some technical difficulties, such as negative threshold voltage (Vth) and insufficient carrier migration rate, which affect its application effect in AMOLED pixel drive circuits. Summary of the invention

[0004] In view of this, the purpose of the present application is to provide a display device, a pixel circuit and a driving method thereof to solve or partially solve the above problems.

[0005] As one aspect of the present application, a pixel circuit is provided for a display device, wherein the pixel circuit comprises:

[0006] a first initialization circuit connected to the first node, the first scan signal terminal, the first voltage terminal, the first control signal terminal and the input terminal of the driving circuit, and configured to provide an initialization voltage for the first node under the control of a first scan signal provided by the first scan signal terminal, a first voltage provided by the first voltage terminal and a first control signal provided by the first control signal terminal;

[0007] a data writing circuit connected to the data line, the first node and the second scanning signal terminal, and configured to write a data signal provided by the data line to the first node under the control of a second scanning signal provided by the second scanning signal terminal;

[0008] A light emitting control circuit, connected to the driving circuit, the second control signal terminal and the light emitting unit, and used for controlling the on and off of the driving circuit and the light emitting unit under the control of the second control signal provided by the second control signal terminal;

[0009] The driving circuit is connected to the first node, the second node, the first initialization circuit and the light emitting control circuit, and is used to drive the light emitting unit to emit light;

[0010] A compensation auxiliary circuit is connected to the second node, the third scan signal terminal and the second voltage terminal, and is used to write the threshold voltage of the driving transistor in the driving circuit and the second voltage provided by the second voltage terminal to the first node under the control of the third scan signal provided by the third scan signal terminal, and to write the second voltage to the second node.

[0011] As a second aspect of the present application, a driving method of a pixel circuit is provided, which is applied to the pixel circuit, and includes:

[0012] In the first stage, an initialization circuit is used to provide an initialization voltage to the first node under the control of a first scan signal provided by the first scan signal terminal, a first voltage provided by the first voltage terminal, and a first control signal provided by the first control signal terminal;

[0013] In the second stage, under the control of the third scan signal provided by the third scan signal terminal, a threshold voltage and a second voltage provided by the second voltage terminal are written into the first node and the second voltage is written into the second node by using the data writing circuit and the initialization circuit;

[0014] In the third stage, the data signal provided by the data line is written into the first node by using the data writing circuit under the control of the second scanning signal provided by the second scanning signal terminal;

[0015] In the fourth stage, under the control of the first control signal provided by the first control signal terminal and the second control signal provided by the second control signal terminal, the driving circuit is used to drive the light-emitting unit to emit light.

[0016] As a third aspect of the present application, a display device is provided, comprising the pixel circuit.

[0017] As can be seen from the above, the display device, pixel circuit and driving method thereof provided by the present application, the pixel circuit includes a first initialization circuit, a data writing circuit, a light emitting control circuit, a driving circuit and a compensation auxiliary circuit. In the initialization stage, the first initialization circuit can provide an initialization voltage to ensure that the pixel circuit is in an initialization state at the beginning of each display cycle, and then, the threshold voltage is written to the first node and the initialization voltage is written to the second node through the compensation auxiliary circuit. In the data writing stage, the data signal is written to the first node through the data writing circuit. The driving circuit realizes compensation for the threshold voltage of the driving transistor according to the voltage of the first node and the second node. In the light emitting stage, the light emitting control circuit adjusts the brightness or switching state of the light emitting unit according to the driving current provided by the driving circuit, which solves the problem of poor display effect caused by different threshold voltages, thereby improving the display stability and consistency of the pixel circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the present application or related technologies, the drawings required for use in the embodiments or related technical descriptions are briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0019] Figure 1 A schematic diagram of the structure of a pixel circuit provided in an embodiment of the present application;

[0020] Figure 2 A schematic diagram of the structure of another pixel circuit provided in an embodiment of the present application;

[0021] Figure 3 A working timing diagram of a pixel circuit provided in an embodiment of the present application;

[0022] Figure 4A A schematic diagram of the structure of another pixel circuit provided in an embodiment of the present application;

[0023] Figure 4B A schematic diagram of the structure of another pixel circuit provided in an embodiment of the present application;

[0024] Figure 4C A schematic diagram of the structure of another pixel circuit provided in an embodiment of the present application;

[0025] Figure 4D A schematic diagram of the structure of another pixel circuit provided in an embodiment of the present application;

[0026] Figure 5 A schematic diagram of the structure of another pixel circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0027] In order to make the purpose, technical solutions and advantages of the present application more clearly understood, the present application is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0028] It should be noted that, in the embodiments of the present application, words such as "exemplarily" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplarily" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplarily" or "for example" is intended to present related concepts in a concrete way. Unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present application should have the usual meaning understood by people with ordinary skills in the field to which the present application belongs.

[0029] It should be noted that, in the absence of conflict, the embodiments in the present application and the features in the embodiments can be combined with each other. The present application will be described in detail below with reference to the drawings and in combination with the embodiments. Also, the transistors used in all the embodiments of the present disclosure can be thin film transistors or field effect transistors or other devices with the same characteristics. According to the role in the circuit, the transistors used in the embodiments of the present disclosure are mainly switching transistors. Since the source and drain of the switching transistor used here are symmetrical, the source and drain are interchangeable. In the embodiments of the present disclosure, the source is referred to as the signal input terminal, and the drain is referred to as the signal output terminal. According to the form in the accompanying drawings, the middle end of the transistor is defined as the control electrode, which can also be called the gate, the first electrode is the source, and the second electrode is the drain. In addition, the switching transistor used in the embodiments of the present disclosure may include any one of a P-type switching transistor and an N-type switching transistor, wherein the P-type switching transistor is turned on when the gate is at a low level and is turned off when the gate is at a high level (that is, for the P-type transistor, it is turned on when the potential of the signal received by the gate is a low potential, and is turned off when the potential of the signal received by the gate is a high potential, that is, the low potential is the effective potential, and the high potential is the invalid potential), and the N-type switching transistor is turned on when the gate is at a high level and is turned off when the gate is at a low level (that is, for the N-type transistor, it is turned on when the potential of the signal received by the gate is a high potential, and is turned off when the potential of the signal received by the gate is a low potential, that is, the high potential is the effective potential, and the low potential is the invalid potential).

[0030] Figure 1 Schematic diagram of a pixel circuit provided in an embodiment of the present application. Figure 1As shown, in some embodiments, the pixel circuit may include: a first initialization circuit 01, a data writing circuit 02, a light emitting control circuit 03, a driving circuit 04, a compensation auxiliary circuit 05, a light emitting unit 06, a storage unit 07, and a second initialization circuit 08. Optionally, the light emitting unit 06 may be a light emitting diode (LED), an organic light emitting diode (OLED), a quantum dot light emitting diode (QLED), etc. Exemplarily, the light emitting unit 06 may be an OLED.

[0031] In some embodiments, the first initialization circuit 01 is connected to the first node N1, the first scan signal terminal S1, the first voltage terminal Vdd, the first control signal terminal EM1 and the input terminal of the driving circuit 04, and is used to provide an initialization voltage for the first node N1 under the control of the first scan signal provided by the first scan signal terminal S1, the first voltage provided by the first voltage terminal Vdd and the first control signal provided by the first control signal terminal EM1.

[0032] Optionally, the first initialization circuit 01 further includes: a compensation sub-circuit, connected to the first node N1, the first scan signal terminal S1 and the input terminal of the driving circuit 04, and used to write the threshold voltage of the driving transistor M1 in the driving circuit 04 to the first node N1 under the control of the first scan signal provided by the first scan signal terminal S1; a light-emitting control sub-circuit, connected to the first voltage terminal Vdd and the input terminal of the driving circuit 04, and used to control the on-off of the first voltage terminal Vdd and the input terminal of the driving circuit 04 under the control of the first control signal provided by the first control signal terminal EM1.

[0033] Optionally, the compensation sub-circuit includes a first transistor T1, the control end of the first transistor T1 is connected to the first scan signal end S1, the first end of the first transistor T1 is connected to the first node N1, and the second end of the first transistor T1 is connected to the input end of the drive circuit 04; the light-emitting control sub-circuit includes a second transistor T2, the control end of the second transistor T2 is connected to the first control signal end EM1, the first end of the second transistor T2 is connected to the first voltage end Vdd, and the second end of the second transistor T2 is connected to the input end of the drive circuit 04.

[0034] In some embodiments, the data writing circuit 02 is connected to the data line DATA, the first node N1 and the second scan signal terminal S2, and is used to write the data signal provided by the data line DATA to the first node under the control of the second scan signal provided by the second scan signal terminal S2.

[0035] Optionally, the data writing circuit 02 includes a third transistor T3, a control end of the third transistor T3 is connected to the second scan signal end S2, a first end of the third transistor T3 is connected to the data line DATA, and a second end of the third transistor T3 is connected to the first node N1.

[0036] In some embodiments, the light emitting control circuit 03 is connected to the driving circuit 04, the second control signal terminal EM2 and the light emitting unit 06, and is used to control the on and off of the driving circuit 04 and the light emitting unit 06 under the control of the second control signal provided by the second control signal terminal EM2.

[0037] Optionally, the light emitting control circuit 03 includes a fourth transistor T4 , a control end of the fourth transistor T4 is connected to the second control signal end EM2 , a first end of the fourth transistor T4 is connected to the output end of the driving circuit 04 , and a second end of the fourth transistor T4 is connected to the light emitting unit 06 .

[0038] In some embodiments, the driving circuit 04 is connected to the first node N1, the second node N2, the first initialization circuit 01 and the light emitting control circuit 03, and is used to drive the light emitting unit 06 to emit light.

[0039] Optionally, the driving circuit 04 includes a driving transistor M1 , a control terminal of the driving transistor M1 is connected to the first node N1 , a first terminal of the driving transistor M1 is connected to the first initialization circuit 01 , and a second terminal of the driving transistor M1 is connected to the light emitting control circuit 03 .

[0040] In some embodiments, the compensation auxiliary circuit 05 is connected to the second node N2, the third scan signal terminal S3 and the second voltage terminal Vd, and is used to write the threshold voltage Vth of the driving transistor M1 and the second voltage provided by the second voltage terminal Vd to the first node N1 under the control of the third scan signal provided by the third scan signal terminal S3, and to write the second voltage to the second node N2.

[0041] Optionally, the compensation auxiliary circuit 05 includes a fifth transistor T5, a control end of the fifth transistor T5 is connected to the third scan signal end S3, a first end of the fifth transistor T5 is connected to the second node N2, and a second end of the fifth transistor T5 is connected to the second voltage end Vd.

[0042] In some embodiments, the storage circuit 07 is connected to the first node N1 and the second voltage terminal Vd, and is used to store the potential of the first node N1.

[0043] In some embodiments, the output end of the light-emitting control circuit 03 is connected to the third node N3; the pixel circuit also includes: a second initialization circuit 08, connected to the third node N3, the third scan signal terminal S3 and the second initialization signal terminal Vinit1, and used to write the second initialization signal provided by the second initialization signal terminal Vinit1 to the third node N3 under the control of the second scan signal provided by the second scan signal terminal S2.

[0044] Optionally, the second initialization circuit 08 includes a sixth transistor T6, a control end of the sixth transistor T6 is connected to the second scan signal end S2, a first end of the sixth transistor T6 is connected to the third node N3, and a second end of the sixth transistor T6 is connected to the second initialization signal end Vinit1.

[0045] In some embodiments, in combination Figure 2 It can be seen from another pixel circuit shown that the first initialization circuit 01 can further include: an initialization subcircuit connected to the first node N1, the first initialization signal terminal Vinit2, the second scanning signal terminal S2 and the compensation subcircuit T1, and used to write the first initialization signal provided by the first initialization signal terminal Vinit2 to the first node N1 under the control of the second scanning signal provided by the second scanning signal terminal S2. In this way, when the threshold voltage Vth of the driving transistor M1 is negatively biased, the voltage magnitude and timing of the first initialization signal can be adjusted according to actual conditions, thereby improving the problem of poor display caused by the negative bias of the threshold voltage Vth of the driving transistor M1.

[0046] Alternatively, if Figure 2 As shown, the initialization sub-circuit may further include a seventh transistor T7, the control end of the seventh transistor T7 is connected to the second scan signal end S2, the first end of the seventh transistor T7 is connected to the first initialization signal end Vinit2, and the second end of the seventh transistor T7 is connected to the first node N1. And it is not limited by the Vdd voltage. In this way, the first voltage is isolated by the seventh transistor T7, so that the initialization of the first node N1 is not limited by the first voltage, and the first initialization signal can be used to adjust the initialization voltage of the first node N1. When the threshold voltage Vth of the driving transistor M1 is negatively biased, it can improve the display problem caused by the negative bias of the threshold voltage Vth of the driving transistor M1.

[0047] In some embodiments, Figure 2 As shown, the driving circuit 04 includes a first control terminal and a second control terminal, the first control terminal is connected to the first node N1, the second control terminal is connected to the third control signal terminal VBG, and the third control signal terminal VBG is used to provide a third control signal to the driving circuit 04 to improve the carrier mobility of the driving transistor M1. In this way, by adding a third control signal to the driving circuit 04, the carrier mobility of the driving transistor M1 can be improved by adjusting the control voltage provided by the third control signal to the driving circuit 04.

[0048] Optionally, the driving transistor M1 is a dual-gate structure, and the two gates of the dual-gate structure are used to provide the first control terminal and the second control terminal respectively. In this way, by adopting the dual-gate structure, the carrier mobility of the driving transistor M1 can be more easily adjusted by changing the control voltage of the second control terminal. In particular, when the driving transistor M1 adopts an oxide transistor, this method can improve the carrier mobility of the oxide transistor, making it more suitable for large-size display devices.

[0049] As an optional embodiment, the dual-gate driving transistor M1 can set the newly added gate as the back gate of the driving transistor M1, that is, the original gate of the driving transistor M1 is a top gate, and the newly added back gate is located on the side of the active layer of the driving transistor M1 opposite to the top gate. Such a design allows the control signal to be applied from both sides of the active layer, thereby further improving the carrier mobility.

[0050] In some embodiments, at least one of the driving transistor M1 and the first transistor T1 to the seventh transistor T7 may be connected in parallel with one or more auxiliary transistors, so as to improve the response rate of the pixel circuit.

[0051] In summary, the embodiment of the present disclosure provides a pixel circuit, which includes a first initialization circuit, a data writing circuit, a light emitting control circuit, a driving circuit, and a compensation auxiliary circuit. In the initialization stage, the first initialization circuit can provide an initialization voltage to ensure that the pixel circuit is in an initialization state at the beginning of each display cycle. Then, the threshold voltage is written to the first node and the initialization voltage is written to the second node through the compensation auxiliary circuit. In the data writing stage, the data signal is written to the first node through the data writing circuit. The driving circuit realizes compensation for the threshold voltage of the driving transistor according to the voltage of the first node and the second node. In the light emitting stage, the light emitting control circuit adjusts the brightness or switching state of the light emitting unit according to the driving current provided by the driving circuit, which solves the problem of poor display effect caused by different threshold voltages, thereby improving the display stability and consistency of the pixel circuit.

[0052] Combine the following Figure 3 The working timing diagram of the pixel circuit shown is Figure 1 The working process of the pixel circuit in is described in detail, wherein, taking the above-mentioned transistor as an N-type transistor as an example, the conduction level is a high level.

[0053] like Figure 4A and Figure 3 As shown, in stage 1: a high level signal is input to the first control signal terminal EM1 and the first scan signal terminal S1, and a low level signal is input to the second control signal terminal EM2, the second scan signal terminal S2 and the third scan signal terminal S3.

[0054] In some embodiments, in the first stage, an initialization circuit is used to provide an initialization voltage to the first node N1 under the control of a first scan signal provided by the first scan signal terminal S1, a first voltage provided by the first voltage terminal Vdd, and a first control signal provided by the first control signal terminal EM1. At this time, the first node is charged to the first voltage terminal Vdd.

[0055] like Figure 4B and Figure 3 As shown, in stage 2: a high level signal is input to the first scan signal terminal S1 and the third scan signal terminal S3, and a low level signal is input to the first control signal terminal EM1, the second control signal terminal EM2 and the second scan signal terminal S2.

[0056] In some embodiments, in the second stage, under the control of the third scan signal provided by the third scan signal terminal S2, a threshold voltage and a second voltage provided by the second voltage terminal Vd are written to the first node N1 and a second voltage is written to the second node N2 using a data writing circuit and an initialization circuit, that is, at this time the first node voltage is Vd+Vth, and the second node voltage is Vd. At the same time, under the control of the second scan signal provided by the second scan signal terminal S2, the second initialization signal provided by the second initialization signal terminal Vinit1 is written to the third node N3.

[0057] like Figure 4C and Figure 3 As shown, in stage 3: a high level signal is input to the second scan signal terminal S2 and the third scan signal terminal S3, and a low level signal is input to the first scan signal terminal S1, the first control signal terminal EM1 and the second control signal terminal EM2.

[0058] In some embodiments, in the third stage, under the control of the second scan signal provided by the second scan signal terminal S2, a data signal provided by the data line DATA is written to the first node using a data writing circuit. At this time, the first node voltage is Vd+Vth+Vdata, the second node voltage is Vd, and the voltage difference from the gate to the source of the driving transistor M1 (Vgs voltage) is the voltage difference between the N1 and N2 nodes, that is, Vgs=(Vdata+Vth+Vd)-Vd=Vdata+Vth.

[0059] like Figure 4D and Figure 3 As shown, in stage 4: a high level signal is input to the first control signal terminal EM1 and the second control signal terminal EM2, and a low level signal is input to the first scan signal terminal S1, the second scan signal terminal S2 and the third scan signal terminal S3.

[0060] In some embodiments, in the fourth stage, under the control of the first control signal provided by the first control signal terminal EM1 and the second control signal provided by the second control signal terminal EM2, the driving circuit is used to drive the light-emitting unit to emit light, and Vgs is stabilized. Since the driving current is:

[0061]

[0062] Among them, K is a parameter related to transistor mobility.

[0063] Substituting the Vgs voltage in stage 3, the drive current is:

[0064]

[0065] It can be seen that Vth has been offset in the calculation formula of the driving current, that is, the light emitting brightness of the light emitting unit will no longer be affected by the change of the threshold voltage of the driving transistor.

[0066] The disclosed embodiment provides a pixel circuit, which includes a first initialization circuit, a data writing circuit, a light emitting control circuit, a driving circuit, and a compensation auxiliary circuit. In the initialization stage, the first initialization circuit can provide an initialization voltage to ensure that the pixel circuit is in a known state at the beginning of each display cycle. Then, the threshold voltage is written to the first node and the initialization voltage is written to the second node through the compensation auxiliary circuit. In the data writing stage, the data signal is written to the first node through the data writing circuit. The driving circuit realizes compensation for the threshold voltage of the driving transistor according to the voltage of the first node and the second node. In the light emitting stage, the light emitting control circuit adjusts the brightness or switching state of the light emitting unit according to the driving current provided by the driving circuit, which solves the problem of poor display effect caused by different threshold voltages, thereby improving the display stability and consistency of the pixel circuit.

[0067] In some embodiments, Figure 1 The first initialization circuit in can also be as follows Figure 2 As shown in part ①, an initialization sub-circuit is added to the first initialization circuit, which can write the first initialization signal provided by the first initialization signal terminal Vinit2 to the first node N1 under the control of the second scan signal provided by the second scan signal terminal S2, that is, apply an initialization voltage to the first node, wherein the voltage size and timing of the first initialization signal terminal can be adjusted according to actual conditions and are not limited by the voltage of the first voltage terminal Vdd. In other words, when the negative bias of Vth is serious, the first node can be initialized by adjusting the first initialization signal terminal Vinit2 to improve the negative bias problem.

[0068] In some embodiments, Figure 1 The drive circuit in can also be Figure 2As shown in part ②, a back gate structure is added to the driving transistor M1, that is, the driving transistor M1 is a double-gate structure, thereby introducing an additional third control signal terminal VBG, which can improve the carrier mobility of the driving transistor M1 by increasing the gate voltage of the driving circuit.

[0069] In some embodiments, Figure 5 As shown, the transistors in any pixel circuit provided by the present application may be connected in parallel with one or more transistors (for example, Figure 5 The fourth transistor T4 is connected in parallel with an auxiliary transistor) to increase the response rate.

[0070] It should be noted that the above describes some embodiments of the present application. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the above embodiments and still achieve the desired results. In addition, the processes depicted in the accompanying drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0071] Based on the same inventive concept, corresponding to any of the above-mentioned embodiments and methods, the present application also provides a display device, including the pixel circuit described in any of the above-mentioned embodiments.

[0072] Optionally, the display device provided in the embodiment of the present disclosure may include: a display, a mobile phone, a television, a laptop computer and / or a navigator, etc. Other essential components of the display device should be understood by ordinary technicians in the field and will not be elaborated herein.

[0073] It should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly indicate the number of technical features indicated. Thus, features defined as "first" and "second" may explicitly or implicitly include one or more of the features.

[0074] Those skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of the present application (including the claims) is limited to these examples. In line with the concept of the present application, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of the different aspects of the embodiments of the present application as described above, which are not provided in detail for the sake of simplicity.

[0075] The embodiments of the present application are intended to cover all such substitutions, modifications and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present application should be included in the scope of protection of the present application.

Claims

1. A pixel circuit for a display device, characterized in that: The pixel circuit comprises: A first initialization circuit (01) is connected to a first node (N1), a first scan signal terminal (S1), a first voltage terminal (Vdd), a first control signal terminal (EM1) and an input terminal of a driving circuit, and is used to provide an initialization voltage for the first node (N1) under the control of a first scan signal provided by the first scan signal terminal (S1), a first voltage provided by the first voltage terminal (Vdd) and a first control signal provided by the first control signal terminal (EM1); A data writing circuit (02) connected to a data line (DATA), the first node (N1) and a second scanning signal terminal (S2), and used for writing a data signal provided by the data line (DATA) into the first node under the control of a second scanning signal provided by the second scanning signal terminal (S2); A light emitting control circuit (03) connected to the driving circuit, the second control signal terminal (EM2) and the light emitting unit (06), and used for controlling the on and off of the driving circuit (04) and the light emitting unit (06) under the control of a second control signal provided by the second control signal terminal (EM2); The driving circuit (04) is connected to the first node (N1), the second node (N2), the first initialization circuit and the light emitting control circuit, and is used to drive the light emitting unit (06) to emit light; A compensation auxiliary circuit (05) is connected to the second node (N2), a third scan signal terminal (S3) and a second voltage terminal (Vd), and is used to write the threshold voltage of the driving transistor (M1) in the driving circuit (04) and the second voltage provided by the second voltage terminal (Vd) into the first node (N1) under the control of a third scan signal provided by the third scan signal terminal (S3), and to write the second voltage into the second node (N2).

2. The pixel circuit according to claim 1, characterized in that: The first initialization circuit further comprises: a compensation subcircuit connected to the first node (N1), the first scan signal terminal (S1) and the input terminal of the driving circuit, and used for writing the threshold voltage of the driving transistor (M1) in the driving circuit to the first node (N1) under the control of the first scan signal provided by the first scan signal terminal (S1); The light emitting control subcircuit is connected to the first voltage terminal (Vdd) and the input terminal of the driving circuit, and is used to control the on and off of the first voltage terminal (Vdd) and the input terminal of the driving circuit under the control of the first control signal provided by the first control signal terminal (EM1).

3. The pixel circuit according to claim 1, characterized in that: The first initialization circuit further includes: An initialization subcircuit is connected to the first node (N1), the first initialization signal terminal (Vinit2), the second scan signal terminal (S2) and the compensation subcircuit, and is used to write the first initialization signal provided by the first initialization signal terminal (Vinit2) to the first node (N1) under the control of the second scan signal provided by the second scan signal terminal (S2).

4. The pixel circuit according to claim 1, characterized in that: The driving circuit (04) comprises a first control terminal and a second control terminal, the first control terminal is connected to the first node (N1), the second control terminal is connected to a third control signal terminal (VBG), and the third control signal terminal (VBG) is used to provide a third control signal to the driving circuit to improve the carrier mobility of the driving transistor (M1).

5. The pixel circuit according to claim 4, characterized in that: The driving transistor (M1) is a double-gate structure, and the double-gate structure provides the first control terminal and the second control terminal.

6. The pixel circuit according to claim 1, characterized in that: The pixel circuit further includes: A storage circuit (07) is connected to the first node (N1) and the second voltage terminal (Vd), and is used to store the potential of the first node (N1).

7. The pixel circuit according to claim 1, characterized in that: The output end of the light emitting control circuit (03) is connected to a third node (N3); The pixel circuit further includes: A second initialization circuit (08) is connected to the third node (N3), the third scan signal terminal (S3) and the second initialization signal terminal (Vinit1), and is used to write the second initialization signal provided by the second initialization signal terminal (Vinit1) to the third node (N3) under the control of the second scan signal provided by the second scan signal terminal (S2).

8. The pixel circuit according to claim 2, characterized in that: The compensation subcircuit comprises a first transistor (T1), a control terminal of the first transistor (T1) is connected to the first scanning signal terminal (S1), a first terminal of the first transistor (T1) is connected to the first node (N1), and a second terminal of the first transistor (T1) is connected to an input terminal of the driving circuit (04); and / or The light emitting control subcircuit comprises a second transistor (T2), a control end of the second transistor (T2) is connected to the first control signal end (EM1), a first end of the second transistor (T2) is connected to the first voltage end (Vdd), and a second end of the second transistor (T2) is connected to an input end of the driving circuit (04).

9. The pixel circuit according to claim 1, characterized in that: The data writing circuit (02) comprises a third transistor (T3), a control end of the third transistor (T3) is connected to the second scanning signal end (S2), a first end of the third transistor (T3) is connected to the data line (DATA), and a second end of the third transistor (T3) is connected to the first node (N1); and / or The light emitting control circuit (03) comprises a fourth transistor (T4), a control end of the fourth transistor (T4) is connected to the second control signal end (EM2), a first end of the fourth transistor (T4) is connected to the output end of the driving circuit (04), and a second end of the fourth transistor (T4) is connected to the light emitting unit (06); and / or The driving circuit comprises the driving transistor (M1), the control end of the driving transistor (M1) is connected to the first node (N1), the first end of the driving transistor (M1) is connected to the first initialization circuit (01), and the second end of the driving transistor (M1) is connected to the light emitting control circuit (03); and / or The compensation auxiliary circuit (05) comprises a fifth transistor (T5), a control end of the fifth transistor (T5) is connected to the third scanning signal end (S3), a first end of the fifth transistor (T5) is connected to the second node (N2), and a second end of the fifth transistor (T5) is connected to the second voltage end (Vd).

10. The pixel circuit according to claim 7, characterized in that: The second initialization circuit (08) comprises a sixth transistor (T6), a control end of the sixth transistor (T6) is connected to the second scan signal end (S2), a first end of the sixth transistor (T6) is connected to the third node (N3), and a second end of the sixth transistor (T6) is connected to the second initialization signal end (Vinit1).

11. The pixel circuit according to claim 3, characterized in that: The initialization sub-circuit comprises a seventh transistor (T7), a control end of the seventh transistor (T7) is connected to the second scanning signal end (S2), a first end of the seventh transistor (T7) is connected to the first initialization signal end (Vinit2), and a second end of the seventh transistor (T7) is connected to the first node (N1).

12. The pixel circuit according to any one of claims 1 to 11, characterized in that: The pixel circuit includes a plurality of transistors, and the pixel circuit further includes one or more auxiliary transistors arranged in parallel with at least one of the plurality of transistors.

13. A method for driving a pixel circuit, characterized in that: Applied to the pixel circuit according to any one of claims 1 to 12, the method comprising: In the first stage, an initialization circuit is used to provide an initialization voltage for a first node (N1) under the control of a first scan signal provided by a first scan signal terminal (S1), a first voltage provided by a first voltage terminal (Vdd), and a first control signal provided by a first control signal terminal (EM1); In the second stage, under the control of the third scan signal provided by the third scan signal terminal (S3), the threshold voltage and the second voltage provided by the second voltage terminal (Vd) are written to the first node (N1) and the second voltage is written to the second node (N2) by using the data writing circuit and the initialization circuit; In the third stage, the data signal provided by the data line (DATA) is written into the first node using the data writing circuit under the control of the second scanning signal provided by the second scanning signal terminal (S2); In the fourth stage, under the control of the first control signal provided by the first control signal terminal (EM1) and the second control signal provided by the second control signal terminal (EM2), the driving circuit is used to drive the light-emitting unit to emit light.

14. A display device, characterized in that: The pixel circuit comprises the pixel circuit described in any one of claims 1 to 12.

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