All-solid-state battery

Abstract

The invention relates to an all-solid-state battery in the technical field of lithium battery production. The all-solid-state battery comprises a negative plate, a positive plate and a solid electrolyte membrane arranged between the negative plate and the positive plate, the negative plate comprises a negative electrode layer; the negative electrode layer comprises silicon particles, and the weight ratio of the silicon particles in the negative electrode layer is more than 90%; more than 90% of the silicon particles are provided with through holes; according to the all-solid-state battery, the silicon particles with the through hole structure are selected as the negative electrode active material, the through hole structure provides a volume expansion space after silicon is embedded with lithium, and the cycle performance of the all-solid-state battery can be improved.

Description

Technical Field

[0001] The present invention relates to the technical field of lithium battery production, and in particular to an all-solid-state battery. Background Art

[0002] Silicon material has become one of the most promising negative electrode materials for next-generation lithium-ion batteries because of its ultra-high theoretical specific capacity (4200mAh / g) and low lithium insertion potential. However, during repeated charge and discharge, silicon negative electrode materials undergo huge volume changes (expansion can reach 300%) due to the continuous insertion and extraction of lithium ions, causing the silicon material to crack, pulverize, and even fall off from the current collector, resulting in a sharp decline in capacity and cycle life.

[0003] Existing technology has reported that by adjusting the pores of the negative electrode, a high silicon negative electrode with a silicon content greater than 70% can be achieved. The high silicon negative electrode effectively reduces the amount of electrolyte used and reduces costs. In addition, the electrochemical sintering between silicon particles requires pressure on silicon and electrolyte, but the means of adjusting the pores are too single. Therefore, it is very important to regulate the pore structure to improve the performance of high silicon negative electrode batteries. Summary of the invention

[0004] In order to solve the above problems, the present invention discloses an all-solid-state battery, and the technical solution of the present invention is implemented as follows:

[0005] The present invention provides an all-solid-state battery, the all-solid-state battery comprising a negative electrode sheet, a positive electrode sheet and a solid electrolyte membrane disposed between the negative electrode sheet and the positive electrode sheet, the negative electrode sheet comprising a negative electrode layer, and the negative electrode layer comprising silicon particles;

[0006] Taking the weight of the negative electrode layer as 100%, the weight of the silicon particles accounts for 90% to 100%;

[0007] Taking the weight of the silicon particles as 100%, the weight of the silicon particles having a porous structure accounts for 90% to 100%;

[0008] The through hole penetrates the silicon particle.

[0009] In some embodiments, based on the weight of the negative electrode layer being 100%, the weight of the silicon particles accounts for 98% to 100%;

[0010] Taking the weight of the silicon particles as 100%, the weight of the silicon particles having a porous structure accounts for 95% to 100%;

[0011] The through hole penetrates the silicon particle.

[0012] In some embodiments, the porosity of the negative electrode layer is The porosity formed by the pore structure of the silicon particles The void ratio formed by stacking between the silicon particles

[0013] In some preferred embodiments, the porosity With the void ratio The ratio is (0.1~2):1.

[0014] In some preferred embodiments,

[0015] In some preferred embodiments,

[0016] In some preferred embodiments,

[0017] In some more preferred embodiments,

[0018] In some embodiments, in the negative electrode layer, the void ratio formed by the stacking of the silicon particles is It is 18% to 35%.

[0019] In some embodiments, the porosity of the negative electrode layer is It is 10% to 70%.

[0020] In some preferred embodiments, the porosity of the negative electrode layer is It is 40% to 60%.

[0021] In some embodiments, the pore size of the silicon particles is 50 nm to 500 nm.

[0022] In some embodiments, the silicon particles have a particle size of 1 μm to 5 μm.

[0023] In some embodiments, the silicon particles have a coating layer on their surfaces, and the coating layer has pores.

[0024] In some embodiments, the negative electrode layer does not include a conductive agent.

[0025] In some embodiments, the negative electrode layer does not include a solid electrolyte.

[0026] The advantages of the present invention are as follows:

[0027] The present application selects silicon particles with a through-hole structure as the negative electrode active material. The through-hole structure provides space for the volume expansion of silicon after lithium embedding, which is beneficial to improving the cycle performance of the all-solid-state battery. The pores formed by the pore structure cooperate with the gaps formed by the accumulation of particles to avoid the fracture caused by the expansion of silicon particles.

[0028] Furthermore, the porosity of the silicon particles The porosity of the silicon layer formed by the accumulation of silicon particles The synergistic effect can not only effectively ensure that sufficient space is reserved for silicon volume expansion, but also ensure good contact between silicon particles and good ion and electron transmission between silicon particles.

[0029] Although the stacking voids can provide expansion space for the silicon negative electrode, if the stacking voids are too high, it will affect the contact between the silicon particles, which will in turn affect the battery performance. Therefore, by introducing the internal pore structure of the particles, the upper limit of the porosity of the negative electrode plate can be further increased. By using the method of the present invention, the total porosity of the plate can be increased to 70%, and for the same system, under the same D50 and pressing pressure, a higher plate porosity can be provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only one embodiment of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0031] The same parts are denoted by the same reference numerals. It should be noted that the words "front", "rear", "left", "right", "upper" and "lower" used in the following description refer to directions in the drawings, and the words "bottom" and "top", "inner" and "outer" refer to directions toward or away from the geometric center of a specific component, respectively.

[0032] Figure 1 This is a cross-sectional SEM image of the negative electrode layer in Example 1 of the present invention. As the only accompanying drawing of the present invention, this drawing is also designated as the abstract drawing. DETAILED DESCRIPTION

[0033] The technical solution of the present invention will be clearly and completely described below in conjunction with the embodiments of the present invention and the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0034] Unless otherwise defined, all technical and scientific terms used in the present invention have the same meanings as those commonly understood by technicians in the technical field to which the present invention belongs; the terms used in the specific implementation methods are only for the purpose of describing specific embodiments and are not intended to limit the present invention; the terms "including" and "having" in the specification and claims of the present invention and the above-mentioned figure descriptions and any variations thereof are intended to cover non-exclusive inclusions.

[0035] In the description of the specific implementation methods of the present invention, the technical terms "first", "second", etc. are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present invention, the meaning of "multiple" is more than two, unless otherwise clearly and specifically defined.

[0036] Reference to "embodiments" in the present invention means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present invention. The appearance of the phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described in the present invention may be combined with other embodiments.

[0037] In the description of the embodiments of the present invention, the term "and / or" is only a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in the present invention generally indicates that the associated objects before and after are in an "or" relationship.

[0038] Throughout the present invention, numerical values ​​represent approximate measures or limits of ranges to cover minor deviations from given values ​​as well as embodiments with about the values ​​mentioned and embodiments with the exact values ​​mentioned. Except for the working examples provided at the end of the detailed description, all numerical values ​​of parameters (e.g., amounts or conditions) in this specification (including the appended claims) should be understood to be modified by the term "about" in all cases, regardless of whether "about" actually appears before the numerical value. "About" indicates that the stated numerical value allows some minor imprecision (close to the exact value of the value to some extent; approximately or reasonably close to the value; almost). If the imprecision provided by "about" is not otherwise understood in this ordinary sense in the art, "about" as used in the present invention at least indicates the variation that can be produced by the ordinary methods of measuring and using such parameters. For example, "about" may include a variation of less than or equal to 5%, optionally less than or equal to 4%, optionally less than or equal to 3%, optionally less than or equal to 2%, optionally less than or equal to 1%, optionally less than or equal to 0.5%, and in some aspects, optionally less than or equal to 0.1%.

[0039] Additionally, disclosure of ranges includes disclosure of all values ​​within the entire range and further divided ranges, including endpoints and sub-ranges given for such ranges.

[0040] Silicon material has become one of the most promising negative electrode materials for next-generation lithium-ion batteries because of its ultra-high theoretical specific capacity (4200mAh / g) and low lithium insertion potential. However, during repeated charge and discharge, silicon negative electrode materials undergo huge volume changes (expansion can reach 300%) due to the continuous insertion and extraction of lithium ions, causing the silicon material to crack, pulverize, and even fall off from the current collector, resulting in a sharp decline in capacity and cycle life.

[0041] In order to solve the above problem, the present invention proposes a technical solution.

[0042] The present invention proposes an all-solid-state battery, the all-solid-state battery comprising a negative electrode sheet, a positive electrode sheet and a solid electrolyte membrane disposed between the negative electrode sheet and the positive electrode sheet, the negative electrode sheet comprising a negative electrode layer, the negative electrode layer comprising silicon particles; the silicon particles are used as negative electrode active materials, and the weight of the silicon particles accounts for 90% to 100% based on the weight of the negative electrode layer being 100%;

[0043] Taking the weight of the silicon particles as 100%, the weight of the silicon particles having through holes accounts for 90% to 100%;

[0044] The through hole penetrates the silicon particle.

[0045] Compared with only controlling the rolling pressure and pressing pressure during the preparation of the negative electrode sheet to regulate the gaps between the silicon particles to provide space for the volume expansion of silicon, it is difficult to control the pressing pressure, and if the porosity is too high, it will affect the contact between the silicon particles. This application uses silicon particles with a through-hole structure as the negative electrode active material. The through-hole structure provides space for the volume expansion of silicon after lithium is embedded, which is beneficial to improve the cycle performance of all-solid-state batteries. Therefore, combined with the higher compaction density and the porosity of the pore structure of porous silicon itself, it will not affect the contact of the material, and by creating pores between the particles, the particles are still a whole, taking into account both the contact of material particles and the volume buffer space.

[0046] In specific applications, based on the weight of the negative electrode layer as 100%, the weight proportion of the silicon particles can be 90%, 91%, 92%, 94%, 95%, 98%, 99%, 99.9%, 100%, etc.; based on the weight of the silicon particles as 100%, the mass proportion of the silicon particles with through holes can be 90%, 91%, 92%, 94%, 95%, 98%, 99%, 100%, etc. The above values ​​are only examples and are not limiting.

[0047] In some preferred embodiments, based on the weight of the negative electrode layer being 100%, the weight of the silicon particles accounts for 98% to 100%;

[0048] Taking the weight of the silicon particles as 100%, the weight of the silicon particles having through holes accounts for 95% to 100%; and the through holes penetrate the silicon particles.

[0049] By increasing the mass proportion of silicon particles, the capacity performance and energy density of the battery can be effectively improved. By increasing the proportion of porous silicon in silicon particles, it is beneficial to increase the reserved silicon volume expansion space, which can effectively overcome the problem of increased expansion and deterioration of cycle performance caused by the increase of silicon particles in the negative electrode layer.

[0050] In some embodiments, the porosity of the negative electrode layer is The porosity formed by the pore structure of the silicon particles and the void ratio formed by stacking the silicon particles

[0051] The porosity With the void ratio The ratio is (0.1~2):1;

[0052] In some preferred embodiments,

[0053] In some preferred embodiments,

[0054] In some preferred embodiments,

[0055] In some more preferred embodiments,

[0056] Porosity formed by the pore structure of the silicon particles themselves The void ratio formed by the accumulation of silicon particles The synergistic effect can not only effectively ensure that sufficient space is reserved for silicon volume expansion, but also ensure good contact between silicon particles and good ion and electron transmission between silicon particles.

[0057] In a specific application, the porosity With the void ratio The ratio can be 0.1:1, 0.25:1, 0.5:1, 0.6:1, 0.75:1, 1:1, 1.25:1, 1.5:1, 1.75:1, 2:1. The above is only an example and is not limiting.

[0058] In some embodiments, in the negative electrode layer, the void ratio formed by the stacking of the silicon particles is The ratio of the silicon particles to the silicon particles is 18% to 35%, which can not only reserve space for the volume expansion of the silicon particles, but also ensure good contact between the silicon particles.

[0059] In a specific application, the porosity It can be 18%, 20%, 25%, 30%, 35%, etc. The above are only examples and are not limiting.

[0060] In some embodiments, the porosity of the negative electrode layer is It is 10% to 70%.

[0061] In a specific application, the porosity of the negative electrode layer You can choose 10%, 20%, 30%, 40%, 50%, 60%, 70%, etc. The above values ​​are only examples and are not limiting.

[0062] In some preferred embodiments, the porosity of the negative electrode layer is It is 40 to 60%.

[0063] In some embodiments, the silicon particles have a coating layer, and the coating layer has pores.

[0064] In some embodiments, the porosity of the negative electrode layer is The porosity of the coating layer is also included

[0065] In some embodiments, the coating layer includes a first solid electrolyte. Exemplarily, the first solid electrolyte may be a sulfide solid electrolyte and / or an oxide solid electrolyte.

[0066] It is understandable that the first solid electrolyte in the coating layer is the same as or different from the solid electrolyte in the solid electrolyte membrane of the all-solid-state battery, and the conventional selection based on the matching of the solid electrolyte and the battery system should be within the scope of protection of the present invention.

[0067] In some embodiments, the coating layer has a thickness of 10 to 500 nm.

[0068] In some embodiments, the ratio of the coating area of ​​the coating layer to the surface area of ​​the silicon particles is 75% to 100%.

[0069] In some embodiments, the pore size of the silicon particles is 50-500 nm.

[0070] In specific applications, the pore size of the silicon particles can be selected to be 50 nm, 100 nm, 150 nm / 200 nm, 220 nm, 250 nm, 280 nm, 300 nm, 350 nm, 400 nm, 450 nm, 500 nm, etc. The above are only examples and are not limiting.

[0071] In some preferred embodiments, the pore size of the silicon particles is 200-350 nm.

[0072] In some embodiments, the silicon particles have a particle size of 1 μm to 5 μm.

[0073] In specific applications, the particle size of the silicon particles may be 1.0 μm, 1.5 μm, 2.0 μm, 2.5 μm, 3.0 μm, 3.5 μm, 4.0 μm, 4.5 μm, 5.0 μm, etc. The above are only examples and are not limiting.

[0074] It is understood that regulating the particle size of the silicon particles and the predetermined pressure of the pressing to regulate the stacking gaps between the silicon particles can effectively regulate the porosity of the entire negative electrode layer. The present invention has no special requirements for the manner of regulating the stacking gaps between the silicon particles. In the schematic example process, the negative electrode active material layer can be obtained by adding silicon powder to a solvent and dispersing it to prepare a slurry, applying the slurry to a suitable negative electrode collector and drying it. At the same time, a predetermined pressure of, for example, about 300-500 MPa can be applied to adjust the thickness and porosity after drying. The porosity can be appropriately adjusted to the above level.

[0075] In some embodiments, the negative electrode layer does not include a carbonaceous conductive material, which may cause the solid electrolyte to decompose and produce byproducts with poor ionic conductivity at the interface between the negative electrode and the solid electrolyte membrane, thereby causing the cycle performance and rate performance of the all-solid-state battery to deteriorate. Exemplarily, the carbonaceous conductive material includes acetylene black (AB), Ketjen black (KB) and other particulate carbon materials, carbon fibers, carbon nanotubes (CNTs), carbon nanofibers (CNFs), vapor-grown carbon fibers (VGCFs) and other fibrous carbon materials.

[0076] In some embodiments, the negative electrode layer includes a conductive agent, and based on the weight of the negative electrode layer being 100%, the weight of the conductive agent accounts for <1%.

[0077] For example, the conductive agent can be a metal oxide, a conductive polymer, etc., such as titanium dioxide, aluminum oxide, zinc oxide, polyaniline, polythiophene, etc. Those skilled in the art can select a combination of two or more based on the understanding of the prior art, or select a single conductive agent. The present invention does not impose any limitation on this.

[0078] In some embodiments, the negative electrode layer does not include a conductive agent.

[0079] In some embodiments, the negative electrode layer includes a solid electrolyte, and the weight of the negative electrode layer is 100%, and the proportion of the solid electrolyte is <1%. It can be understood that the solid electrolyte here refers to a solid electrolyte that exists in a blended manner with the active material, rather than a first solid electrolyte coated on the surface of the active material.

[0080] In some embodiments, the negative electrode layer does not include a solid electrolyte.

[0081] Understandably,

[0082] In some embodiments, the negative electrode layer includes a binder. Based on the weight of the negative electrode layer being 100%, the binder accounts for less than 1%.

[0083] Exemplarily, the binder includes at least one of materials such as polyvinylidene fluoride (PVDF), polytetrafluoroethylene (PTFE), styrene-butadiene rubber (SBR), sodium carboxymethyl cellulose (CMC), and polyacrylic acid (PAA).

[0084] In some embodiments, the compaction density of the all-solid-state battery is 0.8 g / cm 3 ~1.5g / cm 3 .

[0085] In a specific application, the compaction density of the all-solid-state battery can be selected from the end point of the above range of 0.8 g / cm 3 , 1.5g / cm 3In addition, any value within the above range can be selected. For example, 0.9g / cm 3 , 1.0g / cm 3 , 1.2g / cm 3 , 1.4g / cm 3 The above values ​​are only examples, and the present invention does not impose any limitation on them.

[0086] In some embodiments, the positive electrode includes a positive electrode layer.

[0087] In some preferred embodiments, the positive electrode layer does not include carbonaceous conductive material.

[0088] In some embodiments, the cathode layer includes a solid electrolyte.

[0089] In some preferred embodiments, the type of the solid electrolyte of the positive electrode layer is the same as the type of the solid electrolyte forming the solid electrolyte membrane.

[0090] It is understandable that the present invention does not specifically limit the source of the pore structure of the silicon particles, but as a preferred method, rather than a necessary choice, the silicon particles having a pore structure can be prepared by the following method:

[0091] S1, 400-800 mesh magnesium powder and 0.1 μm-5 μm average particle size silicon powder are mixed and ground evenly in a mass ratio of 1: (1-11.5) and then put into a crucible;

[0092] S2, placing the crucible into a tube furnace and performing an alloying reaction under vacuum to obtain a mixed product of silicon and silicon-magnesium alloy;

[0093] The alloying reaction temperature is 500-700°C, the heating rate is 5°C / min-10°C / min, and the alloying reaction time is 2h-5h;

[0094] S3, cooling the mixed product of silicon and silicon-magnesium alloy to room temperature at a rate of 2.5°C / min to 5°C / min;

[0095] S4, introducing 10% to 20% oxygen / argon mixed gas, raising the temperature to 700° C. to 900° C. to heat treat the mixed product of silicon and silicon-magnesium alloy, so that the magnesium silicide alloy undergoes a re-decomposition reaction;

[0096] S5, rinsing the product obtained in step S4 with hydrochloric acid having a concentration of 0.5 mol / L to 2 mol / L for 2 to 4 hours and then taking it out;

[0097] S6, washing the product of step S5 in deionized water for 10 min to 30 min;

[0098] S7, centrifugal;

[0099] S8, rinsing with hydrofluoric acid with a mass fraction of 0.5% to 1.5% for 20 minutes to 50 minutes;

[0100] S9, washing the reaction product of step S8 by centrifugation with deionized water for 3 to 5 times;

[0101] S10, vacuum drying at 60℃~100℃;

[0102] S11, a porous silicon material having a porous structure, a particle size of 3 μm to 5 μm, and a pore size of 50 nm to 500 nm is obtained through a crushing process; the porous silicon material is the negative electrode active material.

[0103] It is known that a silicon / magnesium silicide alloy mixture is prepared by incompletely alloying silicon particles with metallic magnesium powder in an inert atmosphere, then changing the reaction atmosphere and heat treatment temperature to cause the magnesium silicide alloy to undergo a re-decomposition reaction, and finally removing impurities such as magnesium oxide and silicon-magnesium alloy through hydrochloric acid treatment to obtain a porous silicon nanomaterial with a porous structure. The porous silicon provides space for volume expansion after lithium insertion and has advantages in circulation.

[0104] Metal silicon powder and magnesium powder react under vacuum conditions (Si+Mg→Mg2Si), and the reaction is accompanied by a dealloying side reaction (Mg2Si→MgSi+Mg, 2MgSi→Mg2Si+Mg). Therefore, the reaction is an incomplete alloying reaction, and the reaction product is silicon / silicon-magnesium alloy. In addition, the composition of the reaction product is sensitive to temperature. When the temperature is too high (above 700°C), the magnesium element in magnesium silicide is easy to volatilize, and the synthesized magnesium silicide decomposes again; when the temperature is too low (below 500°C), the magnesium powder has low activity and cannot effectively produce an alloying reaction with silicon;

[0105] Metal silicon powder and magnesium powder with moderate particle size are conducive to the uniform mixing during grinding, thereby improving the degree of alloying reaction and finally obtaining porous silicon with smaller particle size. This reaction can control the degree of corrosion of magnesium metal on bulk silicon, that is, the content of magnesium silicide alloy generated, by adjusting the mass ratio of magnesium powder and silicon powder, reaction temperature and time.

[0106] The mechanism of generating porous silicon by the above method is: within a certain range, the higher the oxygen content in the heat treatment atmosphere, the easier it is to capture the magnesium element in the silicon-magnesium alloy, which promotes the deepening of the decomposition reaction, and the oxidation degree of the silicon particles is correspondingly aggravated; the magnesium silicide alloy undergoes a decomposition reaction at a certain temperature. As the temperature rises, the rate at which magnesium volatilizes and combines with oxygen accelerates, and the oxidation degree of the silicon particles is correspondingly aggravated; the magnesium silicide alloy undergoes a decomposition reaction at a certain temperature. As the reaction time increases, the decomposition degree of magnesium silicide becomes more thorough, and the oxidation degree of the silicon particles is correspondingly aggravated.

[0107] In specific applications, the magnesium powder in step S1 can be selected from 400 mesh, 500 mesh, 600 mesh, 700 mesh, 800 mesh, etc.; the mass ratio of the magnesium powder to the silicon powder can be selected from 1:1, 1:3, 1:4, 1:7, 1:9, 1:11.5, etc.

[0108] In step S2, the alloying reaction temperature can be selected from 500°C, 550°C, 600°C, 650°C, 700°C, etc.; the heating rate can be selected from 5°C / min, 6°C / min, 7°C / min, 8°C / min, 9°C / min, 10°C / min, etc.; the alloying reaction time can be selected from 2h, 3h, 4h, 5h, etc.

[0109] In step S3, the cooling rate can be selected from 2.5°C / min, 3°C / min, 3.5°C / min, 4°C / min, 4.5°C / min, 5°C / min, etc.

[0110] In step S4, the heating temperature can be selected from 700°C, 750°C, 800°C, 850°C, 900°C, etc.

[0111] In step S5, the hydrochloric acid concentration can be selected from 0.5 mol / L, 1 mol / L, 4.5 mol / L, 2 mol / L, etc.; the hydrochloric acid rinsing time can be selected from 2 h, 2.5 h, 3 h, 3.5 h, 4 h, etc.

[0112] In step S6, the cleaning time can be selected as 10 min, 15 min, 20 min, 25 min, 30 min, etc.

[0113] In step S8, the mass fraction of hydrofluoric acid can be selected to be 0.5%, 0.8%, 1%, 1.2%, 1.5%, etc.; the rinsing time can be selected to be 20 min, 30 min, 40 min, 50 min, etc.

[0114] In step S10, the drying temperature can be selected from 60°C, 70°C, 80°C, 90°C, 100°C, etc.

[0115] All the above listed values ​​or ratios are only examples and do not represent limitations of the present invention. Without exceeding the scope of understanding of those skilled in the art, those skilled in the art can freely implement any value that appears above or any value that does not appear but is included in the above range.

[0116] Hereinafter, embodiments of the present invention will be described in more detail by way of examples.

[0117] It should be noted that the embodiments of the present invention are not limited to these examples.

[0118] Example 1

[0119] 1. Preparation of negative electrode active materials

[0120] S1, 400 mesh magnesium powder and silicon powder with an average particle size of 5 μm are mixed and ground evenly in a mass ratio of 1:4 and then put into a crucible;

[0121] S2, placing the crucible into a tube furnace and performing an alloying reaction under vacuum to obtain a mixed product of silicon and silicon-magnesium alloy;

[0122] The alloying reaction temperature is 500°C, the heating rate is 5°C / min, and the alloying reaction time is 5h;

[0123] S3, cooling the mixed product of silicon and silicon-magnesium alloy to room temperature at a rate of 2.5°C / min;

[0124] S4, introducing 15% oxygen / argon mixed gas, raising the temperature to 800° C. to heat treat the mixed product of silicon and silicon-magnesium alloy, so that the magnesium silicide alloy undergoes a re-decomposition reaction;

[0125] S5, rinsing the product obtained in step S4 with 1 mol / L hydrochloric acid for 3 hours and then taking it out;

[0126] S6, washing the product of step S5 in deionized water for 20 minutes;

[0127] S7, centrifugal;

[0128] S8, rinse with 1% hydrofluoric acid for 30 min;

[0129] S9, washing the reaction product of step S8 by centrifugation with deionized water three times;

[0130] S10, vacuum drying at 80°C;

[0131] S11, a porous silicon material having a porous structure and a particle size of 5 μm is obtained through a crushing process; the porous silicon material is the negative electrode active material.

[0132] 2. Material selection for negative electrode layer

[0133] The porous silicon powder prepared in step 1 is used in the negative electrode layer, the negative electrode layer does not contain carbon conductive material and does not contain solid electrolyte material. The weight of the negative electrode layer is 100%, and the weight of the binder accounts for 1%. The binder is PVDF.

[0134] 3. Preparation of negative electrode sheet

[0135] The porous silicon powder (particle size 5 μm) selected in step 2 is added to the N-methyl-2-pyrrolidone solution of PVDF and mixed to form a slurry, wherein the weight ratio of the porous silicon powder to the PVDF is 99:1.

[0136] The slurry is coated on copper foil, dried, and pressed to obtain a negative electrode sheet.

[0137] At the same time, a cross-sectional SEM image of the negative electrode layer was taken. Figure 1 shown.

[0138] 4. Preparation of positive electrode

[0139] NCM811, Li6PS5Cl, polyaniline and polytetrafluoroethylene (PTFE) were mixed in a weight ratio of 78:19.5:2:0.5 and fiberized and then roll-pressed to obtain the positive electrode.

[0140] 5. Preparation of solid electrolyte membrane

[0141] LiPSCl and polytetrafluoroethylene (PTFE) were mixed at a weight ratio of 99:1 and dry-blended in a heated mortar, and then hot-rolled using a stainless steel cylinder to adjust the thickness. It was cut into a suitable shape to obtain a solid electrolyte membrane.

[0142] 6. Preparation of all-solid-state batteries

[0143] 1. Lay the positive electrode sheet prepared in step 4 on one side of the solid electrolyte membrane prepared in step 5, and affix the positive electrode current collector with a tab welded thereon on the other side of the positive electrode sheet;

[0144] 2. Paste the negative electrode sheet prepared in step 3 on the other side of the solid electrolyte membrane, and weld a current collector with a tab on the negative electrode sheet to form a battery cell;

[0145] 3. The battery cell is vacuum packaged in an aluminum-plastic film and densified by isostatic pressing technology to obtain a silicon-based all-solid-state soft-pack battery.

[0146] The compaction density of the battery is 1.5g / cm 3 , Porosity of porous silicon mesoporous structure (through pores) The porosity of the silicon layer formed by the accumulation of silicon particles is 20%. The negative electrode porosity is 32%. It is 52%.

[0147] Total porosity of negative electrode sheet = porosity of pore structure + porosity of negative electrode layer. The calculation method of the following embodiments is the same, so it will not be repeated here.

[0148] Comparative Example 1

[0149] The difference between Comparative Example 1 and Example 1 is that silicon particles without a pore structure are used as the negative electrode active material.

[0150] Performance Test:

[0151] 1. About the Porosity of the Negative Electrode Layer It is usually determined by the Barrett-Joyner-Halenda (BJH) method according to ISO 15901-2:2006.

[0152] 2. About porosity Calculation of: First, a cross-sectional SEM image of the negative electrode layer is obtained. From the obtained SEM image, image analysis software is used to identify voids and calculate the area.

[0153] Void ratio (Area of ​​voids in region A) / (Area of ​​region A).

[0154] 3. Porosity of porous structures Calculation:

[0155] Under the same compaction density and D50 conditions, the porosity of the negative electrode layer of the non-porous silicon particles was tested The porosity of the negative electrode layer of porous silicon after pore formation Porosity of pore structure

[0156] Cyclic performance test under 1C condition:

[0157] In a 45°C constant temperature box, charge at a constant current of 1C to 4.2V, then switch to constant voltage charging to a cutoff current of 0.05C, and then discharge at a constant current of 1C to 3.0V. Stop the test when the capacity retention rate reaches 80%. Record the number of cycles for all samples and take the average. Round up if the number is less than 1.

[0158] The test results and porosity distribution of each embodiment are shown in the following table:

[0159]

[0160]

[0161] It can be seen from the above table:

[0162] By selecting silicon particles with a through-hole structure as the negative electrode active material, the through-hole structure provides space for the volume expansion of silicon after lithium is embedded, which is beneficial to improving the cycle performance of the all-solid-state battery.

[0163] It can be seen from the above examples that the method of the present application can increase the total porosity of the negative electrode to 70%, while if the porosity formed by the accumulation of pure silicon particles is too high (the accumulation porosity is above 35%), it will cause serious interface problems and affect the performance of the battery. Therefore, the method of the present application can effectively increase the porosity to a maximum of 70%, and when the total porosity of the negative electrode sheet reaches about 50%, it has better overall performance.

[0164] It should be pointed out that the above is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. An all-solid-state battery, comprising a negative electrode sheet, a positive electrode sheet and a solid electrolyte membrane disposed between the negative electrode sheet and the positive electrode sheet, wherein the negative electrode sheet comprises a negative electrode layer, characterized in that: The negative electrode layer includes silicon particles; Taking the weight of the negative electrode layer as 100%, the weight of the silicon particles accounts for 90% to 100%; Taking the weight of the silicon particles as 100%, the weight of the silicon particles having through holes accounts for 90% to 100%; The through hole penetrates the silicon particle.

2. The all-solid-state battery according to claim 1, characterized in that: Taking the weight of the negative electrode layer as 100%, the weight of the silicon particles accounts for 98% to 100%; Taking the weight of the silicon particles as 100%, the weight of the silicon particles having through holes accounts for 95% to 100%; The through hole penetrates the silicon particle.

3. The all-solid-state battery according to claim 1, characterized in that: The porosity φ of the negative electrode layer includes the porosity φ1 formed by the pore structure of the silicon particles and the porosity φ2 formed by the stacking of the silicon particles; The ratio of the porosity φ1 to the void ratio φ2 is (0.1-2):1; Preferably, (φ 1+ φ2) / φ≥80%; Preferably, (φ 1+ φ2) / φ≥90%; More preferably, (φ 1+ φ2) / φ≥95%; Particularly preferably, (φ 1+ φ2) / φ≥99%.

4. The all-solid-state battery according to claim 1, characterized in that: In the negative electrode layer, the void ratio φ2 formed by the accumulation of the silicon particles is 18% to 35%.

5. The all-solid-state battery according to claim 1, characterized in that: The silicon particles have a coating layer on their surfaces, and the coating layer has pores.

6. The all-solid-state battery according to any one of claims 1 or 5, characterized in that: The porosity φ of the negative electrode layer is 10% to 70%; Preferably, the porosity φ of the negative electrode layer is 40-60%.

7. The all-solid-state battery according to any one of claims 1 to 3, characterized in that: The particle size of the silicon particles is 1 μm to 5 μm.

8. The all-solid-state battery according to any one of claims 1 to 3, characterized in that: The pore diameter of the silicon particles is 50nm to 500nm.

9. The all-solid-state battery according to claim 1, characterized in that: The negative electrode layer does not include a conductive agent.

10. The all-solid-state battery according to claim 1, characterized in that: The negative electrode layer does not include a solid electrolyte.

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