Single-chip microcomputer key circuit, key detection method and system and electronic equipment

Abstract

The invention provides a single-chip microcomputer key circuit, a key detection method and electronic equipment, the key circuit comprises a matrix keyboard module and an independent keyboard module, the i-th port of a single-chip microcomputer is coupled to the first end of the N-i-th matrix keyboard unit, and the i-th port of the single-chip microcomputer is coupled to the second end of the N-i-th matrix keyboard unit; the first end of each matrix keyboard unit is correspondingly coupled to the (i + 1) th port to the Nth port of the single chip microcomputer in sequence through a plurality of switches; n ports of the single-chip microcomputer are respectively coupled to N switches of the first independent keyboard unit and N switches of the second independent keyboard unit through a current-limiting resistor, the N switches of the first independent keyboard unit are respectively grounded through pull-down resistors, and the N switches of the second independent keyboard unit are respectively coupled to a power supply voltage through pull-up resistors; therefore, the states of the switches in the two key modules can be monitored respectively by periodically switching the working modes of the single-chip microcomputer under the condition that the number of IO pins is small, and the key circuit of the single-chip microcomputer is simplified while the number of keys is increased.

Description

Technical Field

[0001] The present invention relates to the field of single-chip microcomputer technology, and in particular to a single-chip microcomputer key circuit, a single-chip microcomputer key detection method, a single-chip microcomputer, a single-chip microcomputer system and electronic equipment. Background Art

[0002] Currently commonly used single-chip microcomputer keys include: independent key structure, matrix keyboard, etc., which are widely used in single-chip microcomputer devices and systems.

[0003] In the actual use of single-chip microcomputer equipment, the single-chip microcomputer often needs more buttons. At this time, it is necessary to expand the number of buttons of the single-chip microcomputer. If an independent button structure is used, a large number of IO pins of the single-chip microcomputer will be occupied. If a matrix keyboard is used, its structure is more complicated and a button polling method is required to identify each button. When the number of buttons is large, a large amount of IO resources of the single-chip microcomputer will be occupied.

[0004] Therefore, how to expand the number of microcontroller buttons and simplify the microcontroller button circuit when the number of IO pins is small has become a technical problem that the industry urgently needs to solve. Summary of the invention

[0005] The present invention provides a single-chip computer key circuit, a single-chip computer key detection method and an electronic device to solve the problem of how to expand the number of single-chip computer keys and simplify the single-chip computer key circuit when the number of IO pins is small.

[0006] According to a first aspect of the present invention, there is provided a single-chip computer key circuit for expanding the number of keys of a single-chip computer, wherein the single-chip computer includes N ports; the single-chip computer key circuit includes a matrix keyboard module and an independent keyboard module, wherein the matrix keyboard module includes i matrix keyboard units, and the independent keyboard module includes a first independent keyboard unit and a second independent keyboard unit, wherein N is an integer greater than or equal to 2;

[0007] The i-th port of the single-chip microcomputer is coupled to the first end of the Ni-th matrix keyboard unit, and the first end of each matrix keyboard unit is also coupled to the i+1-th port to the N-th port of the single-chip microcomputer in sequence through a plurality of switches, wherein the number of switches in the i-th matrix keyboard unit is less than the number of switches in the i+1-th matrix keyboard unit, and the number of switches in each matrix keyboard unit is less than or equal to i, wherein i is a positive integer, and i≤N-1;

[0008] The N ports of the single-chip computer are respectively coupled to the first ends of the N switches of the first independent keyboard unit and the first ends of the N switches of the second independent keyboard unit through a current limiting resistor, the second ends of the N switches of the first independent keyboard unit are respectively grounded through a pull-down resistor, and the second ends of the N switches of the second independent keyboard unit are respectively coupled to a power supply voltage through a pull-up resistor;

[0009] The microcontroller is configured as:

[0010] The working mode is switched periodically, and the working mode includes a first mode and a second mode, wherein:

[0011] If the working mode is the first mode, the N ports are configured to be in a floating input mode to monitor the state of the switch in the independent keyboard module;

[0012] If the working mode is the second mode, the state of the switch in the matrix keyboard unit corresponding to each port is confirmed in turn to poll the state of the switch in the matrix keyboard module.

[0013] Optionally, the state of the switch in the matrix keyboard unit corresponding to each port is confirmed in turn, specifically:

[0014] The mth port is sequentially configured to be in input pull-down mode according to a predetermined order, and the remaining ports are all configured to be in input pull-up mode, where m is a positive integer and m≤N.

[0015] Optionally, the state of the switch in the matrix keyboard unit corresponding to each port is confirmed in turn, specifically:

[0016] The mth port is configured to be in input pull-up mode in sequence according to a predetermined order, and the remaining ports are configured to be in input pull-down mode, where m is a positive integer and m≤N.

[0017] Optionally, the number of switches in the first matrix keyboard unit is 1, and the number of switches in the i-th matrix keyboard unit is N-1.

[0018] Optionally, the switch is a push button switch.

[0019] According to a second aspect of the present invention, a single-chip computer key detection method is provided, which uses the single-chip computer key circuit provided by any one of the first aspects of the present invention to perform key detection, and the method comprises:

[0020] Determining the working mode of the single chip microcomputer, wherein the working mode includes the first mode and the second mode;

[0021] If the working mode is the first mode, the N ports are configured to be in a floating input mode to monitor the states of the 2N switches in the independent keyboard module;

[0022] If the working mode is the second mode, the state of the switch in the matrix keyboard unit corresponding to each port is confirmed in turn to poll the state of the switch in the matrix keyboard module.

[0023] According to a third aspect of the present invention, there is provided a single-chip microcomputer, comprising the single-chip microcomputer key circuit provided by any one of the first aspects of the present invention.

[0024] According to a fourth aspect of the present invention, there is provided a single-chip computer system, comprising the single-chip computer provided by any one of the third aspects of the present invention.

[0025] According to a fifth aspect of the present invention, there is provided an electronic device, comprising the single chip microcomputer key circuit provided by any one of the first aspects of the present invention.

[0026] In the single-chip computer key circuit, single-chip computer key detection method, single-chip computer, single-chip computer system and electronic equipment provided by the present invention, the key circuit includes a matrix keyboard module and an independent keyboard module, the i-th port of the single-chip computer is coupled to the first end of the Ni-th matrix keyboard unit, and the first end of each matrix keyboard unit is also respectively coupled to the i+1-th to N-th ports of the single-chip computer in sequence through a plurality of switches; the N ports of the single-chip computer are respectively coupled to the N switches of the first independent keyboard unit and the N switches of the second independent keyboard unit through a current limiting resistor, the N switches of the first independent keyboard unit are respectively grounded through a pull-down resistor, and the N switches of the second independent keyboard unit are respectively coupled to a power supply voltage through a pull-up resistor; thereby, when the number of IO pins is small, the working mode of the single-chip computer can be periodically switched to monitor the states of the switches in the two key modules respectively, and the single-chip computer key circuit is simplified while the number of keys is expanded. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0028] Figure 1 The schematic diagram of the structure of the single chip key circuit in the embodiment of the present invention is Figure 1 ;

[0029] Figure 2 The schematic diagram of the structure of the single chip key circuit in the embodiment of the present invention is Figure 2 ;

[0030] Figure 31 is a flow chart of a single chip computer key detection method in an embodiment of the present invention;

[0031] Description of reference numerals:

[0032] 11-Matrix keyboard module;

[0033] 12-Independent keyboard module;

[0034] 121-a first independent keyboard unit;

[0035] 122 - second independent keyboard unit;

[0036] R11 - pull-down resistor;

[0037] R12 - pull-up resistor;

[0038] IO-ports. DETAILED DESCRIPTION

[0039] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0040] The terms "first", "second", "third", "fourth", etc. (if any) in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0041] The technical solution of the present invention is described in detail with specific embodiments below. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.

[0042] In view of the problem that it is difficult to ensure that the number of microcontroller keys is expanded and the microcontroller key circuit is simplified when the number of IO pins is small in the prior art. The present invention provides a microcontroller key circuit, a microcontroller key detection method, a microcontroller, a microcontroller system and an electronic device, wherein the key circuit includes a matrix keyboard module and an independent keyboard module, the i-th port of the microcontroller is coupled to the first end of the Ni-th matrix keyboard unit, and the first end of each matrix keyboard unit is also respectively coupled to the i+1-th to N-th ports of the microcontroller through a plurality of switches in sequence; the N ports of the microcontroller are respectively coupled to the N switches of the first independent keyboard unit and the N switches of the second independent keyboard unit through a current limiting resistor, the N switches of the first independent keyboard unit are respectively grounded through a pull-down resistor, and the N switches of the second independent keyboard unit are respectively coupled to a power supply voltage through a pull-up resistor; thereby, when the number of IO pins is small, the working mode of the microcontroller can be periodically switched to monitor the states of the switches in the two key modules respectively, and the microcontroller key circuit is simplified while the number of keys is expanded.

[0043] Please refer to Figure 1 The embodiment of the present invention provides a single-chip microcomputer key circuit for expanding the number of keys of the single-chip microcomputer, characterized in that the single-chip microcomputer includes N ports IO; the single-chip microcomputer key circuit includes a matrix keyboard module 11 and an independent keyboard module 12, wherein the matrix keyboard module 11 includes i matrix keyboard units, and the independent keyboard module 12 includes a first independent keyboard unit 121 and a second independent keyboard unit 122, wherein N is an integer greater than or equal to 2;

[0044] The i-th port IO of the single-chip microcomputer is coupled to the first end of the Ni-th matrix keyboard unit, and the first end of each matrix keyboard unit is also coupled to the i+1-th port IO to the N-th port IO of the single-chip microcomputer in sequence through a plurality of switches, wherein the number of switches in the i-th matrix keyboard unit is less than the number of switches in the i+1-th matrix keyboard unit, and the number of switches in each matrix keyboard unit is less than or equal to i, wherein i is a positive integer, and i≤N-1;

[0045] The N ports IO of the single chip microcomputer are respectively connected through a current limiting resistor ( Figure 1 In the example of the embodiment, the resistors R1 to R10 are coupled to the first ends of the N switches of the first independent keyboard unit 121 and the first ends of the N switches of the second independent keyboard unit 122, the second ends of the N switches of the first independent keyboard unit 121 are respectively connected to the ground through the pull-down resistor R11, and the second ends of the N switches of the second independent keyboard unit 122 are respectively coupled to a supply voltage through the pull-up resistor R12;

[0046] The microcontroller is configured as:

[0047] The working mode is switched periodically, and the working mode includes a first mode and a second mode, wherein:

[0048] If the working mode is the first mode, the N ports IO are configured to be in a floating input mode to monitor the state of the switch in the independent keyboard module 12;

[0049] If the working mode is the second mode, the state of the switch in the matrix keyboard unit corresponding to each port IO is confirmed in turn to poll the state of the switch in the matrix keyboard module 11.

[0050] Through the above-mentioned circuit structure, the present invention combines the matrix keyboard module 11 and the independent keyboard module 12 by multiplexing the IO port of the single-chip microcomputer without adding additional circuits. By periodically switching the working mode of the single-chip microcomputer, the states of the switches in the matrix keyboard module 11 and the independent keyboard module 12 can be monitored without interfering with each other, thereby expanding the number of keys of the single-chip microcomputer.

[0051] The number of switches in the matrix keyboard unit is at least 1 and at most N-1. To ensure maximum utilization of the IO ports of the single-chip microcomputer, in one implementation, the number of switches in the first matrix keyboard unit is 1, and the number of switches in the i-th matrix keyboard unit is N-1.

[0052]

[0053] in, is the number of switches in the matrix keyboard unit, and 2N is the number of switches in the independent keyboard module 12.

[0054] In one example, the switch is a push button switch. It should be understood that the present invention is not limited to the specific type of the switch, which may be a knob switch, etc., and those skilled in the art may select different elements as needed.

[0055] Please refer to Figure 1 , now we will further explain the situation that the microcontroller has 10 IO ports:

[0056] exist Figure 1In the example, the N ports IO of the single-chip microcomputer are IO1 to IO10, the matrix keyboard module 11 includes 9 matrix keyboard units, which include a total of 45 switches (i.e., KEY1-KEY45 in the figure), and the independent keyboard module 12 includes a first independent keyboard unit 121 and a second independent keyboard unit 122, and the first independent keyboard unit 121 and the second independent keyboard unit 122 each include 10 switches (i.e., KEY46-KEY85 in the figure).

[0057] When the working mode of the single chip microcomputer is the first mode, a scanning time interval can be set, and the switch is scanned once every the scanning time interval to monitor the switch of the first independent keyboard unit 121 and the second independent keyboard unit 122 .

[0058] exist Figure 1 In the example shown, if any switch in the first independent keyboard unit 121 is closed, the corresponding port IO is pulled down to a low level, or if any N switches in the second independent keyboard unit 122 are closed, the corresponding port IO is pulled up to a high level. The specific voltage value of the low level or the high level can be set by a person skilled in the art as needed, and the present invention is not limited thereto. As long as the single-chip microcomputer can recognize that the port IO becomes a high level or a low level in the first mode, and then recognizes the closing or disconnection of the corresponding switch, it does not depart from the protection scope of the present invention.

[0059] When the working mode of the single chip microcomputer is the second mode, in one implementation mode, it sequentially confirms the state of the switch in the matrix keyboard unit corresponding to each port IO, specifically:

[0060] The mth port IOm is sequentially configured to be in input pull-down mode according to a predetermined order, and the remaining ports IO are all in input pull-up mode, where m is a positive integer and m≤N.

[0061] In one example, the N ports IO of the microcontroller can be configured to be in input pull-down mode in sequence according to the number of switches in the matrix keyboard unit, for example, the first port IO1 to the tenth port IO10 can be set in input pull-down mode in sequence.

[0062] Specifically, please refer to Figure 2 If the third port IO3 of the microcontroller is set to the input pull-down mode and the remaining port IOs are all set to the input pull-up mode, the switches KEY6, KEY9, KEY13, KEY18, KEY24, KEY31 and KEY39 in the third column (as framed by the dotted box) will be detected. When any switch in the 4th to 10th rows is closed, the level of the port IO corresponding to the row will be pulled low, so that the microcontroller can detect the position of the switch.

[0063] In another implementation, the mth port IOm may be configured in sequence according to a predetermined order to be in input pull-up mode, and the remaining ports IO may be configured to be in input pull-down mode, where m is a positive integer and m≤N.

[0064] Similar, please refer to Figure 2 , the N ports IO of the microcontroller can be configured in input pull-up mode in sequence according to the number of switches in the matrix keyboard unit, for example, the first port IO1 to the tenth port IO10 are set in input pull-up mode in sequence. If the third port IO3 of the microcontroller is set in input pull-up mode, and the remaining ports IO are all in input pull-down mode, the switches KEY6, KEY9, KEY13, KEY18, KEY24, KEY31 and KEY39 in the third column (as framed by the dotted box) will be detected. When any switch in the 4th to 10th rows is closed, the level of the port IO corresponding to the row will be pulled high, so that the microcontroller can detect the position of the switch.

[0065] The detection method of the switches in other columns is similar to the above, and will not be described here for brevity.

[0066] In other examples, the N ports IO of the microcontroller may be configured in sequence according to the port IO addresses of the microcontroller IO ports to be in input pull-up mode or input pull-down mode, and those skilled in the art may flexibly configure as needed.

[0067] In addition, the present invention also provides a single chip computer key detection method, using Figure 1 or Figure 2 The single chip microcomputer key circuit shown in the figure performs key detection, and the method includes:

[0068] Determining the working mode of the single chip microcomputer, wherein the working mode includes the first mode and the second mode;

[0069] If the working mode is the first mode, the N ports IO are configured to be in floating input mode to monitor the states of the 2N switches in the independent keyboard module 12;

[0070] If the working mode is the second mode, the state of the switch in the matrix keyboard unit corresponding to each port IO is confirmed in turn to poll the state of the switch in the matrix keyboard module.

[0071] As a specific implementation, please refer to Figure 3 In actual use, the embodiments of the present invention provide Figure 1 The single chip microcomputer key circuit shown in the figure is controlled by the following steps:

[0072] S21: Power on;

[0073] Specifically, the single-chip microcomputer and the single-chip microcomputer key circuit work normally;

[0074] S22: Determine the working mode of the single chip microcomputer. If it is the first mode, enter S23; if it is the second mode, enter S24;

[0075] Specifically, the working mode of the single-chip microcomputer is judged by the internal storage state of the register of the single-chip microcomputer. If it is the first mode, enter S23; if it is the second mode, enter S24; wherein the internal storage state of the register is periodically switched to the first state or the second state, wherein the first state represents the first mode of the single-chip microcomputer, and the second state represents the second mode of the single-chip microcomputer;

[0076] S23: configure the N ports IO to be in floating input mode to monitor the states of the 2N switches in the independent keyboard module 12; and return to S22;

[0077] Specifically, configure the N ports IO to be in floating input mode, scan the states of the 2N switches in the independent keyboard module 12 once every scanning time interval to monitor the states of the 2N switches in the independent keyboard module 12; and return to S22;

[0078] S24: confirming the state of the switch in the matrix keyboard unit corresponding to each port IO in turn, to poll the state of the switch in the matrix keyboard module 11, and returning to S22;

[0079] Specifically, the mth port IO is configured to be in input pull-down mode (or input pull-up mode) in sequence according to a predetermined order, and the remaining ports IO are all in input pull-up mode (or input pull-down mode), and the state of the switch in the matrix keyboard unit corresponding to each port IO is confirmed in turn to poll the state of the switch in the matrix keyboard module 11, where m is a positive integer and m≤N; and return to S22.

[0080] In addition, the embodiment of the present invention further provides a single chip microcomputer, including the single chip microcomputer key circuit. As an example, the single chip microcomputer key circuit can be applied to STM32 single chip microcomputers, etc., and of course, it can also be applied to other types of single chip microcomputers.

[0081] In addition, the embodiment of the present invention further provides a single chip microcomputer system, including the above-mentioned single chip microcomputer. As an example, the single chip microcomputer system can be a keyboard using a single chip microcomputer, etc., and of course it can also be other single chip microcomputer systems.

[0082] In addition, an embodiment of the present invention further provides an electronic device, including the above-mentioned single-chip key circuit. As an example, the electronic device can be a landline, a key combination lock, etc., and of course can also be other devices requiring multiple keys.

[0083] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A single-chip microcomputer key circuit, used to expand the number of keys of a single-chip microcomputer, characterized in that: The single-chip microcomputer includes N ports; the single-chip microcomputer key circuit includes a matrix keyboard module and an independent keyboard module, wherein the matrix keyboard module includes i matrix keyboard units, and the independent keyboard module includes a first independent keyboard unit and a second independent keyboard unit, wherein N is an integer greater than or equal to 2; The i-th port of the single-chip microcomputer is coupled to the first end of the Ni-th matrix keyboard unit, and the first end of each matrix keyboard unit is also coupled to the i+1-th port to the N-th port of the single-chip microcomputer in sequence through a plurality of switches, wherein the number of switches in the i-th matrix keyboard unit is less than the number of switches in the i+1-th matrix keyboard unit, and the number of switches in each matrix keyboard unit is less than or equal to i, wherein i is a positive integer, and i≤N-1; The N ports of the single-chip computer are respectively coupled to the first ends of the N switches of the first independent keyboard unit and the first ends of the N switches of the second independent keyboard unit through a current limiting resistor, the second ends of the N switches of the first independent keyboard unit are respectively grounded through a pull-down resistor, and the second ends of the N switches of the second independent keyboard unit are respectively coupled to a power supply voltage through a pull-up resistor; The microcontroller is configured as: The working mode is switched periodically, and the working mode includes a first mode and a second mode, wherein: If the working mode is the first mode, the N ports are configured to be in a floating input mode to monitor the state of the switch in the independent keyboard module; If the working mode is the second mode, the state of the switch in the matrix keyboard unit corresponding to each port is confirmed in turn to poll the state of the switch in the matrix keyboard module.

2. The single chip computer key circuit according to claim 1, characterized in that: Confirm the status of the switches in the matrix keyboard unit corresponding to each port in turn, specifically: The mth port is sequentially configured to be in input pull-down mode according to a predetermined order, and the remaining ports are all configured to be in input pull-up mode, where m is a positive integer and m≤N.

3. The single chip computer key circuit according to claim 1, characterized in that: Confirm the status of the switches in the matrix keyboard unit corresponding to each port in turn, specifically: The mth port is configured to be in input pull-up mode in sequence according to a predetermined order, and the remaining ports are configured to be in input pull-down mode, where m is a positive integer and m≤N.

4. The single chip computer key circuit according to any one of claims 2 or 3, characterized in that: The number of switches in the first matrix keyboard unit is 1, and the number of switches in the i-th matrix keyboard unit is N-1.

5. The single chip computer key circuit according to claim 1, characterized in that: The switch is a push button switch.

6. A single chip computer key detection method, characterized in that: Using the single-chip computer key circuit as described in any one of claims 1 to 5 to perform key detection, the method comprises: Determining the working mode of the single chip microcomputer, wherein the working mode includes the first mode and the second mode; If the working mode is the first mode, the N ports are configured to be in a floating input mode to monitor the states of the 2N switches in the independent keyboard module; If the working mode is the second mode, the state of the switch in the matrix keyboard unit corresponding to each port is confirmed in turn to poll the state of the switch in the matrix keyboard module.

7. A single chip microcomputer, comprising the single chip microcomputer key circuit according to any one of claims 1 to 5.

8. A single-chip computer system, comprising the single-chip computer according to claim 7.

9. An electronic device, characterized in that: It comprises the single chip computer key circuit as described in any one of claims 1 to 5.

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