Data transmission method, apparatus, device and system, and readable storage medium

Abstract

The invention discloses a data transmission method, device, equipment and system and a readable storage medium. The data transmission method comprises the following steps: a first module acquires at least one path of first data coded by adopting a first FEC (Forward Error Correction); the at least one path of first data is converted to obtain at least one path of second data, and the rate sum of the at least one path of second data is not smaller than the rate sum of the at least one path of first data; and transmitting the obtained at least one path of second data. According to the method, the at least one path of first data is converted to obtain the at least one path of second data of which the rate sum is not less than the rate sum of the at least one path of first data, so that data transmission can be carried out at a relatively high rate.

Description

[0001] This application is a divisional application. The application number of the original application is 202111278595.3, and the original application date is October 30, 2021. The entire contents of the original application are incorporated into this application by reference. Technical Field

[0002] The embodiments of the present application relate to the field of communication technology, and in particular, to a method, apparatus, device, system and readable storage medium for data transmission. Background Art

[0003] As the demand for data transmission continues to increase, the requirements for transmission rate continue to increase. For example, for scenarios requiring low-latency transmission such as data centers, data transmission needs to be performed at a higher transmission rate. Therefore, a data transmission method is urgently needed to achieve a higher transmission rate. Summary of the invention

[0004] The present application proposes a data transmission method, apparatus, device, system and readable storage medium for improving the data transmission rate.

[0005] In a first aspect, a method for data transmission is provided, the method comprising: a first module acquires at least one first data encoded by a first forward error correction code (FEC); converts the at least one first data to obtain at least one second data, the sum of the rates of the at least one second data being not less than the sum of the rates of the at least one first data; and transmits the at least one second data obtained.

[0006] The method converts at least one channel of first data to obtain at least one channel of second data whose sum of rates is not less than the sum of rates of at least one channel of first data, thereby enabling data transmission at a higher rate.

[0007] In a possible implementation, the first module transforms at least one first data to obtain at least one second data, including: the first module aligns at least one first data and obtains multiple first code words according to the alignment result; decodes the multiple first code words and obtains at least one second data according to the decoding result.

[0008] In a possible implementation, obtaining at least one second data according to the decoding result includes: encoding the decoding result according to the second FEC code type to obtain multiple second code words; and obtaining at least one second data according to the multiple second code words. For decoding results obtained based on different first data, the first module can encode the decoding results using the same or different second FEC code types to flexibly adapt to transmission scenarios and transmission requirements.

[0009] In a possible implementation, obtaining at least one path of second data according to the plurality of second code words includes: interleaving the plurality of second code words, and obtaining at least one path of second data according to the interleaving result.

[0010] In one possible implementation, the first data includes an alignment mark AM, and AM is used to align at least one channel of first data; the decoding result is encoded according to a second FEC code type to obtain multiple second code words, including: deleting AM in the decoding result, and encoding the decoding result after deleting AM according to the second FEC code type to obtain multiple second code words.

[0011] In a possible implementation, the decoding result after deleting AM is encoded according to the second FEC code type to obtain multiple second code words, including: merging the decoding results after deleting AM into one path of third data in a sequential manner, encoding the one path of third data, and obtaining multiple second code words; or, converting the decoding results after deleting AM into at least two paths of third data, encoding at least two paths of third data, and obtaining multiple second code words.

[0012] In a possible implementation, converting the decoding result after AM is deleted into at least two paths of third data includes: merging the decoding result after AM is deleted into one path of fourth data, and converting the one path of fourth data into at least two paths of third data.

[0013] In a possible implementation, encoding one channel of third data to obtain multiple second codewords includes: encoding one channel of third data as a whole according to the second FEC code type to obtain multiple second codewords; or, converting one channel of third data into at least two channels of fifth data, encoding at least two channels of fifth data respectively according to the second FEC code type to obtain multiple second codewords, wherein the rate of the fifth data is less than the rate of the third data. The method can encode the third data in different ways to obtain multiple second codewords, so that the transmission scenarios and transmission requirements applicable to the method are more flexible. In addition, in the case where the number of channels of the third data is multiple, the number of channels of the third data and the second FEC code type used to encode the third data can be flexibly set to be applicable to different transmission scenarios and transmission requirements.

[0014] In a possible implementation, encoding at least two paths of third data to obtain multiple second code words includes: encoding at least two paths of third data as a whole according to the second FEC code type to obtain multiple second code words; or encoding at least two paths of third data separately according to the second FEC code type to obtain multiple second code words.

[0015] In a possible implementation, at least two paths of third data are respectively encoded according to the second FEC code type to obtain multiple second code words, including: at least two paths of third data are respectively encoded as a whole according to the second FEC code type to obtain multiple second code words; or, at least two paths of third data are respectively converted into at least two paths of sixth data, and at least two paths of sixth data are respectively encoded according to the second FEC code type to obtain multiple second code words, wherein the rate of the sixth data is less than the rate of the third data.

[0016] In a possible implementation, obtaining at least one second data according to the decoding result includes: marking an error code block among a plurality of code blocks included in the decoding result, and obtaining at least one second data according to the marked decoding result. Since the first module can mark the error code block in the decoding result, when the subsequent receiving side module receives the second data obtained based on the decoding result, it can effectively correct the data based on the marked error code block, so as to improve the error correction performance and the quality of data transmission.

[0017] In a possible implementation, the first module transforms at least one first data to obtain at least one second data, including: the first module aligns at least one first data and obtains multiple first code words according to the alignment result; and obtains at least one second data according to the multiple first code words.

[0018] In a possible implementation, obtaining at least one path of second data according to the plurality of first code words includes: combining the plurality of first code words, and obtaining at least one path of second data according to the combination result.

[0019] In a possible implementation, multiple first codewords are combined to obtain at least one path of second data according to the combination result, including: combining multiple first codewords into one path of second data in a sequential manner; or combining multiple first codewords into at least two paths of second data.

[0020] In a possible implementation, at least one path of first data is interleaved data, and obtaining multiple first codewords according to an alignment result includes: deinterleaving the alignment result, and obtaining multiple first codewords according to the deinterleaving result.

[0021] In a possible implementation, the first module converts at least one first data to obtain at least one second data, including: the first module encodes at least one first data according to the second FEC code type to obtain multiple third code words; the first module obtains at least one second data according to the multiple third code words. Since the first module can encode the first data encoded by the first FEC code type again through the second FEC code type, the second data has a higher coding gain, and when transmitted in a channel prone to code errors, the data with code errors can be effectively corrected, thereby improving the quality of data transmission.

[0022] In a possible implementation, obtaining at least one path of second data according to a plurality of third code words includes: interleaving the plurality of third code words, and obtaining at least one path of second data according to an interleaving result.

[0023] In a possible implementation, the first module encodes at least one first data according to the second FEC code type to obtain multiple third code words, including: merging at least one first data into one seventh data in a sequential manner, encoding the one seventh data, and obtaining multiple third code words; or, converting at least one first data into at least two seventh data, encoding at least two seventh data, and obtaining multiple third code words. The method can encode the seventh data in different ways to obtain multiple third code words, so that the transmission scenarios and transmission requirements applicable to the method are more flexible. In addition, in the case where the number of seventh data is multiple, the number of seventh data and the second FEC code type used to encode the seventh data can be flexibly set to be applicable to different transmission scenarios and transmission requirements.

[0024] In a possible implementation, converting at least one path of first data into at least two paths of seventh data includes: merging at least one path of first data into one path of eighth data, and converting one path of eighth data into at least two paths of seventh data.

[0025] In one possible implementation, encoding one path of seventh data to obtain multiple third code words includes: encoding one path of seventh data as a whole according to a second FEC code type to obtain multiple third code words; or converting one path of seventh data into at least two paths of ninth data, encoding at least two paths of ninth data separately according to the second FEC code type to obtain multiple third code words, wherein the rate of the ninth data is less than the rate of the seventh data.

[0026] In one possible implementation, encoding at least two paths of seventh data to obtain multiple third code words includes: encoding at least two paths of seventh data as a whole according to the second FEC code type to obtain multiple third code words; or encoding at least two paths of seventh data separately according to the second FEC code type to obtain multiple third code words.

[0027] In a possible implementation, at least two paths of seventh data are respectively encoded according to the second FEC code type to obtain multiple third code words, including: at least two paths of seventh data are respectively encoded as a whole according to the second FEC code type to obtain multiple third code words; or, at least two paths of seventh data are respectively converted into at least two paths of tenth data, and at least two paths of tenth data are respectively encoded according to the second FEC code type to obtain multiple third code words, wherein the rate of the tenth data is less than the rate of the seventh data.

[0028] In a possible implementation, the first module transmits at least one channel of second data, including: the first module inserts synchronization data into the at least one channel of second data, and transmits the data after the synchronization data is inserted.

[0029] In a possible implementation, the first module inserts synchronization data into at least one second data channel, including: determining an AM corresponding to each second data channel in the at least one second data channel; and inserting the AM corresponding to each second data channel as synchronization data into each second data channel.

[0030] In a possible implementation, the AM corresponding to each channel of second data is obtained by adjusting the AM included in the corresponding first data; or, the AM corresponding to each channel of second data is all the content in the AM included in the corresponding first data; or, the AM corresponding to each channel of second data is part of the AM included in the corresponding first data.

[0031] In a second aspect, a method for data transmission is provided, the method comprising: a third module acquires at least one second data, the at least one second data is data obtained by converting at least one first data, the sum of the rates of the at least one second data is not less than the sum of the rates of the at least one first data, and the first data is data encoded using a first forward error correction code FEC code type; the third module converts the at least one second data to obtain at least one first data.

[0032] In a third aspect, a data transmission device is provided, the device is applied to a first module, and the device includes:

[0033] An acquisition unit, used for acquiring at least one channel of first data, where the first data is data encoded using a first forward error correction code FEC code type;

[0034] A conversion unit, used for performing conversion processing on at least one first data to obtain at least one second data, wherein the sum of the rates of the at least one second data is not less than the sum of the rates of the at least one first data;

[0035] The transmission unit is used to transmit at least one channel of second data.

[0036] In a possible implementation, the conversion unit is configured to align at least one first data channel and obtain multiple first code words according to the alignment result; and decode the multiple first code words and obtain at least one second data channel according to the decoding result.

[0037] In a possible implementation manner, the conversion unit is configured to encode the decoding result according to the second FEC code type to obtain a plurality of second code words; and obtain at least one channel of second data according to the plurality of second code words.

[0038] In a possible implementation, the conversion unit is configured to interleave the plurality of second code words, and obtain at least one channel of second data according to the interleaving result.

[0039] In a possible implementation, the first data includes an alignment mark AM, and AM is used to align at least one first data; the conversion unit is used to delete AM in the decoding result, and encode the decoding result after deleting AM according to the second FEC code type to obtain multiple second code words.

[0040] In one possible implementation, the conversion unit is used to merge the decoding results after deleting AM into one path of third data in a sequentially transmitted manner, encode the one path of third data, and obtain multiple second code words; or, convert the decoding results after deleting AM into at least two paths of third data, encode the at least two paths of third data, and obtain multiple second code words.

[0041] In a possible implementation manner, the conversion unit is configured to merge the decoding results after AM is deleted into one path of fourth data, and convert the one path of fourth data into at least two paths of third data.

[0042] In one possible implementation, the conversion unit is used to encode one path of third data as a whole according to a second FEC code type to obtain multiple second code words; or, to convert one path of third data into at least two paths of fifth data, and to encode at least two paths of fifth data separately according to the second FEC code type to obtain multiple second code words, wherein the rate of the fifth data is less than the rate of the third data.

[0043] In a possible implementation, the conversion unit is configured to encode at least two paths of third data as a whole according to the second FEC code type to obtain multiple second code words; or to encode at least two paths of third data separately according to the second FEC code type to obtain multiple second code words.

[0044] In one possible implementation, the conversion unit is used to respectively encode at least two paths of third data as a whole according to a second FEC code type to obtain a plurality of second code words; or, to respectively convert at least two paths of third data into at least two paths of sixth data, and to respectively encode at least two paths of sixth data according to a second FEC code type to obtain a plurality of second code words, wherein a rate of the sixth data is less than a rate of the third data.

[0045] In a possible implementation, the conversion unit is used to mark an erroneous code block among the multiple code blocks included in the decoding result, and obtain at least one channel of second data according to the marked decoding result.

[0046] In a possible implementation, the conversion unit is configured to align at least one channel of first data, obtain multiple first code words according to the alignment result, and obtain at least one channel of second data according to the multiple first code words.

[0047] In a possible implementation, the conversion unit is configured to combine multiple first codewords and obtain at least one channel of second data according to the combination result.

[0048] In a possible implementation, the conversion unit is configured to combine the multiple first codewords into one path of second data in a manner of sending them in sequence; or combine the multiple first codewords into at least two paths of second data.

[0049] In a possible implementation, the conversion unit is configured to deinterleave the alignment result, and obtain a plurality of first codewords according to the deinterleaving result.

[0050] In a possible implementation, the conversion unit is configured to encode at least one channel of first data according to a second FEC code type to obtain a plurality of third code words; and obtain at least one channel of second data according to the plurality of third code words.

[0051] In a possible implementation, the conversion unit is configured to interleave the plurality of third code words, and obtain at least one channel of second data according to the interleaving result.

[0052] In one possible implementation, the conversion unit is used to merge at least one first data into one seventh data in a sequentially transmitted manner, encode the one seventh data, and obtain multiple third code words; or, convert at least one first data into at least two seventh data, encode the at least two seventh data, and obtain multiple third code words.

[0053] In a possible implementation, the conversion unit is used to merge at least one path of first data into one path of eighth data, and convert one path of eighth data into at least two paths of seventh data.

[0054] In one possible implementation, the conversion unit is used to encode one path of seventh data as a whole according to the second FEC code type to obtain multiple third code words; or, to convert one path of seventh data into at least two paths of ninth data, and to encode at least two paths of ninth data separately according to the second FEC code type to obtain multiple third code words, wherein the rate of the ninth data is less than the rate of the seventh data.

[0055] In a possible implementation, the conversion unit is used to encode at least two paths of seventh data as a whole according to the second FEC code type to obtain multiple third code words; or to encode at least two paths of seventh data separately according to the second FEC code type to obtain multiple third code words.

[0056] In one possible implementation, the conversion unit is used to respectively encode at least two paths of seventh data as a whole according to the second FEC code type to obtain multiple third code words; or, to convert at least two paths of seventh data into at least two paths of tenth data respectively, and to respectively encode at least two paths of tenth data according to the second FEC code type to obtain multiple third code words, wherein the rate of the tenth data is less than the rate of the seventh data.

[0057] In a possible implementation, the transmission unit is used to insert the synchronization data into at least one channel of second data, and transmit the data after the synchronization data is inserted.

[0058] In a possible implementation, the transmission unit is used to determine the AM corresponding to each path of the at least one path of second data; and insert the AM corresponding to each path of the second data as synchronization data into each path of the second data.

[0059] In a possible implementation, the AM corresponding to each channel of second data is obtained by adjusting the AM included in the corresponding first data; or, the AM corresponding to each channel of second data is all the content in the AM included in the corresponding first data; or, the AM corresponding to each channel of second data is part of the AM included in the corresponding first data.

[0060] In a fourth aspect, a data transmission device is provided, the device is applied to the third module, and the device includes:

[0061] an acquisition unit, configured to acquire at least one channel of second data, wherein the at least one channel of second data is data obtained by converting the at least one channel of first data, the sum of the rates of the at least one channel of second data is not less than the sum of the rates of the at least one channel of first data, and the first data is data encoded using a first forward error correction code FEC pattern;

[0062] The conversion unit is used to perform conversion processing on at least one channel of second data to obtain at least one channel of first data.

[0063] In a fifth aspect, a device for data transmission is provided, the device comprising: a processor, the processor being coupled to a memory, the memory storing at least one program instruction or code, the at least one program instruction or code being loaded and executed by the processor, so that the device implements a method for data transmission as described in any one of the first aspect or the second aspect.

[0064] In a sixth aspect, a system for data transmission is provided, the system comprising: a first data transmission device for executing the first aspect or any method described in the first aspect, and a second data transmission device for executing the second aspect or any method described in the second aspect.

[0065] In the seventh aspect, a computer-readable storage medium is provided, which stores at least one program instruction or code. When the program instruction or code is loaded and executed by a processor, the computer implements the method for data transmission as described in any one of the first aspect or the second aspect.

[0066] Another communication device is provided, the device comprising: a communication interface, a memory and a processor. The memory and the processor communicate with each other through an internal connection path, the memory is used to store instructions, and the processor is used to execute the instructions stored in the memory to control the communication interface to receive data and control the communication interface to send data, and when the processor executes the instructions stored in the memory, the processor executes the method in the first aspect or any possible implementation of the first aspect, or executes the method in the second aspect or any possible implementation of the second aspect.

[0067] Illustratively, there are one or more processors and one or more memories.

[0068] For example, the memory may be integrated with the processor, or the memory may be provided separately from the processor.

[0069] In the specific implementation process, the memory can be a non-transitory memory, such as a read-only memory (ROM), which can be integrated with the processor on the same chip or can be set on different chips. This application does not limit the type of memory and the setting method of the memory and the processor.

[0070] A computer program (product) is provided, the computer program (product) comprising: a computer program code, when the computer program code is executed by a computer, the computer is enabled to execute the methods in the above aspects.

[0071] A chip is provided, comprising a processor, for calling and executing instructions stored in a memory from the memory, so that a device equipped with the chip executes the methods in the above aspects.

[0072] Another chip is provided, comprising: an input interface, an output interface, a processor and a memory, wherein the input interface, the output interface, the processor and the memory are connected via an internal connection path, the processor is used to execute the code in the memory, and when the code is executed, the processor is used to execute the methods in the above aspects.

[0073] A device is provided, comprising a chip as described in any one of the above solutions.

[0074] A device is provided, comprising the first module described in any one of the above solutions, and / or the third module described in any one of the above solutions. BRIEF DESCRIPTION OF THE DRAWINGS

[0075] Figure 1 It is a schematic diagram of an implementation scenario of a data transmission method provided in an embodiment of the present application;

[0076] Figure 2 This is a flow chart of a method for data transmission provided by an embodiment of the present application;

[0077] Figure 3 is a schematic diagram of first data and second data provided in an embodiment of the present application;

[0078] Figure 4 is a schematic diagram of another type of first data and second data provided in an embodiment of the present application;

[0079] Figure 5 This is a schematic diagram of a process for obtaining at least one second data provided by an embodiment of the present application;

[0080] Figure 6 is another schematic diagram of a process for obtaining at least one second data provided by an embodiment of the present application;

[0081] Figure 7 This is a schematic diagram of a process for marking an error code block provided by an embodiment of the present application;

[0082] Figure 8 This is another schematic diagram of a process for marking error code blocks provided in an embodiment of the present application;

[0083] Fig. 9 This is another schematic diagram of a process for marking error code blocks provided in an embodiment of the present application;

[0084] Fig.10 This is another schematic diagram of a process for marking error code blocks provided in an embodiment of the present application;

[0085] Fig.11 is a schematic diagram of a process of merging into third data provided by an embodiment of the present application;

[0086] Fig.12 is a schematic diagram of another type of first data and second data provided in an embodiment of the present application;

[0087] Fig.13 is a schematic diagram of another type of first data and second data provided in an embodiment of the present application;

[0088] Fig.14 It is a schematic diagram of an implementation environment of an application scenario provided by an embodiment of the present application;

[0089] Fig.15 It is a schematic diagram of an implementation environment of another application scenario provided by an embodiment of the present application;

[0090] Fig.16 It is a schematic diagram of an implementation environment of another application scenario provided by an embodiment of the present application;

[0091] Fig.17 It is a schematic diagram of an implementation environment of another application scenario provided by an embodiment of the present application;

[0092] Fig.18 is a flow chart of another method for data transmission provided by an embodiment of the present application;

[0093] Fig.19 It is a structural schematic diagram of a data transmission device provided in an embodiment of the present application;

[0094] Fig. 20 is a schematic diagram of the structure of another data transmission device provided in an embodiment of the present application;

[0095] Fig.21 It is a structural diagram of another data transmission device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0096] The terms used in the implementation mode of the present application are only used to explain the embodiments of the present application, and are not intended to limit the present application. The embodiments of the present invention are described below in conjunction with the accompanying drawings.

[0097] In the field of communication technology, as the demand for data transmission continues to increase, the requirements for transmission rate continue to increase, and the current transmission rate is gradually unable to meet the requirements. For example, for scenarios such as data centers that require low-latency transmission, 200 Gigabit Ethernet (GE) / 400GE is gradually unable to meet the latency requirements, and a higher transmission rate is required for data transmission, such as 800GE / 1.6T terabit Ethernet (TE).

[0098] In this regard, an embodiment of the present application provides a method for data transmission, which converts at least one first data to obtain at least one second data, and the sum of the rates of the at least one second data is not less than the sum of the rates of the at least one first data, thereby enabling data transmission at a higher rate. The method provided in the embodiment of the present application can be applied to any FEC architecture of an end-to-end forward error correction (FEC) architecture, a segmented (segment-by-segment) architecture, and a cascaded (concatenated) FEC architecture. Moreover, for the segmented FEC architecture and the cascaded FEC architecture, the method of the embodiment of the present application can reuse the current module to save optical fiber, module and device overhead.

[0099] Figure 1 The embodiment of the present application shows an implementation scenario of a data transmission method, which includes multiple modules, and each module can exchange information to achieve data transmission. Figure 1 As shown, data can be transmitted between the first module 101 and the second module 102, and between the first module 101 and the third module 103. Figure 1 The implementation scenario shown may include N modules, where N is a positive integer greater than or equal to 2. Figure 1 In the example, only three modules are used for illustration. In addition, each module may be located in the same chip or in different chips.

[0100] Combination Figure 1 In the implementation scenario shown, the data transmission method provided by the embodiment of the present application is as follows Figure 2 As shown, including but not limited to S201 to S203.

[0101] S201, a first module obtains at least one channel of first data, where the first data is data encoded using a first FEC code type.

[0102] The embodiments of the present application do not limit the rate of the first data. In some embodiments, the rate of the first data is 50 Gb / s, 100 Gb / s, 200 Gb / s, 400 Gb / s, 800 Gb / s, 1.6 Tb / s, 3.2 Tb / s, 6.4 Tb / s or any other non-standard rate. Exemplarily, when the first data is multi-channel, the rates of the multi-channel first data may be the same or different. For example, Figure 3 As shown, the first module obtains four channels of first data, and the rate of the four channels of first data is 200GE. Figure 4 As shown, the first module obtains four channels of first data, and the rates of the four channels of first data are 100GE, 100GE, 200GE and 400GE respectively.

[0103] In addition, at least one first data is data encoded using the same or different first FEC code types. The embodiment of the present application does not limit the first FEC code type. Exemplarily, the first FEC code type is any one of a Reed-Solomon (RS) code, a Bose-Chaudhuri-Hocquenghem (BCH) code, a Fire code, a turbo code, a turbo product code (TPC), a staircase code, and a low-density parity-check (LDPC) code.

[0104] The embodiment of the present application does not limit the manner in which the first module obtains at least one first data. Exemplarily, the first module and the second module can transmit data, and the first module receives at least one first data sent by the second module. For example, the first module is located in the first chip, the second module is located in the second chip, and the first module receives at least one first data sent by the second module, including but not limited to the first module receiving the first data sent by the second module through the channel of the attachment unit interface (AUI).

[0105] In addition to being encoded using the first FEC code type, the first data may also be subjected to other processing. The embodiment of the present application does not limit the processing method of other processing of the first data except for the first FEC code type encoding. For example, the first data is data encoded using the first FEC code type and distributed through the physical medium attachment sublayer (PMA), or the first data is data encoded using the first FEC code type and subjected to interleaving processing and PMA distribution, etc.

[0106] S202: The first module performs conversion processing on at least one first data to obtain at least one second data, and the sum of the rates of the at least one second data is not less than the sum of the rates of the at least one first data.

[0107] The embodiment of the present application does not limit the rate of the second data. In order to achieve data transmission at a higher rate, the sum of the rates of the converted second data is not less than the sum of the rates of the first data before the conversion, that is, the sum of the rates of all the first data before the conversion is not greater than the sum of the rates of all the second data after the conversion. In some embodiments, the rate of the second data is any one of 400Gb / s, 800Gb / s, 1.6Tb / s, 3.2Tb / s, 6.4Tb / s or other non-standard rates. Exemplarily, when the second data is multi-channel, the rates of the multi-channel second data may be the same or different.

[0108] Exemplarily, the first module performs conversion processing on at least one channel of first data to obtain at least one channel of second data, including but not limited to the following three situations.

[0109] Case 1: For the Segment-by-Segment FEC architecture, the first module converts and processes at least one first data to obtain at least one second data, including: the first module aligns at least one first data, and obtains multiple first codewords according to the alignment result; decodes the multiple first codewords, and obtains at least one second data according to the decoding result.

[0110] Exemplarily, the first module aligns at least one first data, including but not limited to aligning at least one first data separately. For example, the first module converts at least one first data into at least one first sub-data, and aligns at least one first sub-data belonging to the same first data.

[0111] In some embodiments, the first data includes an alignment marker (AM), and the AM is used to align at least one channel of the first data. For example, in the case where the first data includes AM, the alignment of at least one channel of the first data includes but is not limited to AM locking and de-skew. Among them, AM locking is used to find the codeword boundary, that is, to align at least one channel of the first data. After finding the codeword boundary, de-skew can be performed in a manner defined by a standard, such as various versions or future versions of IEEE802.3, to obtain multiple first codewords. In some embodiments, the first module aligns at least one channel of the first data, including: the first module converts at least one channel of the first data into at least one channel of first sub-data, and performs AM locking and de-skew on at least one channel of the first sub-data. Exemplarily, the alignment of at least one channel of the first data can refer to Figure 5 and Figure 6 The AM locking / deskewing steps are shown.

[0112] Exemplarily, the alignment result of aligning at least one first data includes at least one first codeword sequence, and one first codeword sequence corresponds to one first data. Exemplarily, when at least one first data is non-interleaved data, multiple first codewords are obtained according to the alignment result, including but not limited to obtaining multiple first codewords according to the code length interval for each first codeword sequence in at least one first codeword sequence. Exemplarily, when at least one first data is interleaved data, multiple first codewords are obtained according to the alignment result, including but not limited to de-interleaving the alignment result, and obtaining multiple first codewords according to the de-interleaving result. For example, de-interleaving is performed for each first codeword sequence in at least one first codeword sequence, and multiple first codewords are obtained according to the de-interleaving result. Regarding the interleaving method of at least one first data, the present application does not limit this. For example, the interleaving method of at least one first data includes but is not limited to at least one of codeword interleaving or lane interleaving. When the alignment result is deinterleaved, corresponding deinterleaving is performed according to the interleaving method of at least one first data. Exemplarily, the step of obtaining multiple first codewords can refer to Figure 5 and Figure 6 The steps of obtaining FEC1 (first FEC code type) codeword are shown.

[0113] After obtaining the multiple first code words, the first module decodes the multiple first code words to obtain decoding results. Figure 5 and Figure 6 In some embodiments, decoding the multiple first code words to obtain the decoding results includes but is not limited to decoding the multiple first code words, discarding the check bits of the multiple first code words, and obtaining the decoding results. That is, the decoding result may include the information bits of the multiple first code words and does not include the check bits of the multiple first code words. Exemplarily, when the first module decodes the multiple first code words, the multiple first code words are decoded according to the first FEC code type.

[0114] In some embodiments, at least one second data is obtained according to the decoding result, including but not limited to S1 - 1 and S1 - 2 .

[0115] S1-1, encode the decoding result according to the second FEC code type to obtain multiple second code words.

[0116] The embodiment of the present application does not limit the second FEC code type. Exemplarily, the second FEC code type is any one of an RS code, a BCH code, a Fire code, a turbo code, a turbo product code, a ladder code, and an LDPC code. Exemplarily, the decoding result includes decoding results obtained based on each path of first data, respectively. When the decoding result is encoded according to the second FEC code type, the decoding results obtained based on different first data can be encoded using the same or different second FEC code types. The embodiment of the present application does not limit this.

[0117] In some embodiments, when the first data includes AM, encoding the decoding result according to the second FEC code type to obtain multiple second code words includes: deleting AM in the decoding result, and encoding the decoding result after deleting AM according to the second FEC code type to obtain multiple second code words. The embodiment of the present application does not limit the method of deleting AM in the decoding result. For example, when the code word boundary is obtained by AM locking, the position of AM is obtained, so that AM can be deleted according to the position of AM.

[0118] In some embodiments, obtaining at least one second data according to the decoding result includes: marking an error code block among the multiple code blocks included in the decoding result, and obtaining at least one second data according to the marked decoding result. In a possible implementation, the multiple code blocks included in the decoding result are inverted, and the error code blocks among the multiple code blocks obtained by the inversion code are marked, and the at least one second data is obtained according to the multiple code blocks marked with the error code blocks. For example, Figure 7 and Figure 8 As shown, the decoding result includes n 257-bit code block streams, the multiple 257-bit code block streams are inverted to obtain n 66-bit code block streams, the error code blocks in the n 66-bit code block streams are marked, and at least one second data is obtained based on the n 66-bit code block streams marked with error code blocks.

[0119] In another possible implementation, multiple code blocks included in the decoding result are inverted, error code blocks among the multiple code blocks obtained by inverting are marked, the multiple code blocks marked with error code blocks are transcoded, and at least one second data is obtained according to the multiple code blocks obtained by transcoding. Fig. 9 and Fig.10 As shown, the decoding result includes n 257-bit code block streams, the n 257-bit code block streams are inverted to obtain n 66-bit code block streams, the error code blocks in the n 66-bit code block streams are marked, the n 66-bit code block streams marked with error code blocks are transcoded to obtain n 257-bit code block streams, and at least one second data is obtained based on the n 257-bit code block streams.

[0120] Optionally, the operation of marking the error code block can be performed based on the decoding result after AM is deleted. That is, after AM in the decoding result is deleted, the error code block in the decoding result after AM is deleted is marked, and at least one second data is obtained according to the decoding result after AM is deleted and the error code block is marked. By marking the error code block, the error introduced by AUI transmission, system noise, etc. can be dealt with.

[0121] Exemplarily, the decoding result after AM is deleted is encoded according to the second FEC code type to obtain multiple second code words, including but not limited to the following two methods.

[0122] A first method for obtaining a plurality of second code words is to combine the decoding results after AM is deleted into one channel of third data by sending them in sequence, and encode the one channel of third data to obtain a plurality of second code words.

[0123] Since the decoding results after deleting AM are merged into a third data in a sequential manner, the decoding results after deleting AM based on each path of the first data included in the third data can appear periodically. For example, the decoding result after deleting AM includes n 257-bit code block streams, and the n 257-bit code block streams are sent sequentially, so that the data belonging to the n 257-bit code block streams in the merged third data appear periodically. The embodiment of the present application does not limit the granularity of sequential transmission, including but not limited to 5440-bit, 5140-bit, 257-bit, 66-bit, 10-bit, 2-bit or 1-bit.

[0124] Exemplarily, in the case where the decoding results after deleting AM corresponding to multiple first data are included after deleting AM, the decoding results after deleting AM corresponding to each first data are sent in sequence and merged into one third data. For example, the decoding result after deleting AM includes four code block streams, namely code block stream A, code block stream B, code block stream C and code block stream D, wherein code block stream A includes code blocks A.1, A.2, A.3, A.4, A.5, A.6, A.7, etc., code block stream B includes code blocks B.1, B.2, B.3, B.4, B.5, B.6, B.7, etc., code block stream C includes code blocks C.1, C.2, C.3, C.4, C.5, C.6, C.7, etc., and code block stream D includes code blocks D.1, D.2, D.3, D.4, D.5, D.6, D.7, etc. In some embodiments, when the decoding results after AM is deleted are combined into one path of third data in a sequential manner, the code blocks of each code block stream included in the path of third data are as follows: Fig.11As shown in (a), the order of code blocks included in the third data is A.1, B.1, C.1, D.1, A.2, B.2, C.2, D.2, A.3 and so on.

[0125] In some embodiments, the decoding results after deleting AM are merged into a third data in a sequential manner, including but not limited to: the decoding results after deleting AM are merged into a third data of a reference rate in a sequential manner. For example, in response to the sum of the rates of the acquired first data being less than the reference rate, the decoding results after deleting AM are merged with the first reference data into a third data of a reference rate. If the sum of the acquired first data rates is 400GE and the reference rate is 800GE, the decoding results after deleting AM are merged with the first reference data of 400GE into a third data of 800GE. The first reference data can be idle data and can be set based on the application scenario. The embodiment of the present application does not limit the content of the first reference data. Among them, the reference rate can be set according to experience or actual needs, and the embodiment of the present application does not limit this. The embodiment of the present application does not limit the manner in which the decoding results after deleting AM are merged with the first reference data into a third data of a reference rate. For example, the decoding result after deleting AM and the first reference data are combined into a third data of a reference rate by sending them sequentially, or the decoding result after deleting AM is combined, and the combined data is combined with the first reference data by sending them sequentially into a third data of a reference rate.

[0126] In some embodiments, in view of the situation where after deleting AM, the decoding results after deleting AM include the decoding results corresponding to multiple first data, the decoding results after deleting AM are merged into a third data of a reference rate in a sequential manner, including: the decoding results after deleting AM corresponding to each first data and the padding data blocks are sent in sequence and merged into a third data. For example, still taking the example that the decoding results after deleting AM include code block stream A, code block stream B, code block stream C and code block stream D, the padding data block can be meaningless data, such as pseudo-random binary sequence (PRBS) data, or it can be meaningful overhead. The embodiments of the present application do not limit the content of the padding data block, and can be flexibly set based on the application scenario. In some embodiments, when the decoding results after deleting AM and the padding data blocks are merged into a third data in a sequential manner, the code blocks of each code block stream included in the third data are as follows: Fig.11 As shown in (b), the order of the code blocks included in the third data is A.1, B.1, C.1, D.1, A.2, padding data block, B.2, C.2, D.2, A.3 and so on.

[0127] In some embodiments, the decoding results after AM deletion are combined into a third data in a sequential manner, including but not limited to interleaving the decoding results after AM deletion, and combining the interleaved decoding results after AM deletion into a third data in a sequential manner. This application does not limit the interleaving method of the decoding results after AM deletion. Exemplarily, the method of combining the decoding results after AM deletion into a third data can refer to Figure 5 The steps of data interleaving and distribution are shown.

[0128] Exemplarily, encoding one channel of third data to obtain multiple second codewords includes, but is not limited to: encoding one channel of third data as a whole according to the second FEC code type to obtain multiple second codewords; or, converting one channel of third data into at least two channels of fifth data, encoding at least two channels of fifth data separately according to the second FEC code type to obtain multiple second codewords, wherein the rate of the fifth data is less than the rate of the third data. For example, the third data is one channel of 800GE data, and the third data is encoded as a whole according to the second FEC code type to obtain multiple second codewords; or, converting the third data into two channels of 400GE fifth data, and encoding the two channels of fifth data separately according to the second FEC code type to obtain multiple second codewords. Exemplarily, the overall encoding is used to encode the data to be encoded as one channel of data. The present application does not limit the method of converting one channel of third data into at least two channels of fifth data. For example, converting one channel of third data into at least two channels of fifth data in a sequential manner. The step of encoding one channel of third data to obtain multiple second codewords can refer to Figure 5 The FEC2 (second FEC code type) encoding and processing steps are shown.

[0129] The overall encoding means combining multiple data channels into one data channel for encoding, or the overall encoding is used to encode the data to be encoded as one data channel. Therefore, the overall encoding of one third data channel according to the second FEC code type means encoding one third data channel as one data channel.

[0130] A second method for obtaining a plurality of second code words is to convert the decoding result after AM is deleted into at least two paths of third data, and encode the at least two paths of third data to obtain a plurality of second code words.

[0131] Exemplarily, the rate of the third data can be a reference rate, and the number of paths and the reference rate of the third data can be set according to experience or actual needs, and are not limited in the embodiments of the present application. In some embodiments, the decoding result after deleting AM is converted into at least two paths of third data in a sequential manner. Exemplarily, the decoding result after deleting AM is converted into at least two paths of third data, including but not limited to interleaving the decoding result after deleting AM, and converting the interleaved decoding result after deleting AM into at least two paths of third data. The present application does not limit the interleaving method of the decoding result after deleting AM. Exemplarily, the method of converting the decoding result after deleting AM into at least two paths of third data can refer to Figure 6 The steps of data interleaving and distribution are shown.

[0132] Exemplarily, when the sum of the rates of at least one first data is less than the sum of the rates of at least two third data, the decoding result after deleting AM and the second reference data are converted together into third data of at least two reference rates. For example, the rates of the four first data obtained are 400GE, 400GE, 400GE and 200GE, and the reference rate is 800GE. The decoding result after deleting AM and the second reference data of 200GE are converted together into two third data of 800GE. For another example, the rate of one first data obtained is 1.6TE, and the reference rate is 800GE. The decoding result after deleting AM and the second reference data of 1.6TE are converted together into four third data of 800GE. The second reference data can be idle data, which can be set based on the application scenario. The embodiment of the present application does not limit the content of the second reference data. Exemplarily, the second reference data can include multiple padding data blocks. The embodiment of the present application does not limit the situation of the padding data blocks included in each of the at least two third data.

[0133] Exemplarily, when the sum of the rates of at least one first data path is equal to the sum of the rates of at least two third data paths, the decoding result after AM is deleted is converted into at least two third data paths. Fig.12 As shown, the rates of the four first data channels are all 400GE, and the decoding results after deleting AM are converted into two third data channels with a rate of 800GE. Fig.13 As shown, the rate of the first data obtained is 1.6TE, and the decoding result after deleting AM is converted into two 800GE third data.

[0134] In some embodiments, in the case where there are multiple paths of the first data, for any one of the at least two paths of the third data, the third data may include only the decoding results after AM is deleted from part of the first data, or include the decoding results after AM is deleted from each path of the first data. For example, still taking the example that the decoding results after AM is deleted include code block stream A, code block stream B, code block stream C, and code block stream D. In some embodiments, when the decoding results after AM are deleted are combined into two paths of the third data in a sequential manner, the code blocks of each code block stream included in the two paths of the third data are as follows: Fig.11 As shown in (c), the order of the code blocks included in one path of the third data is A.1, C.1, A.2, C.2, A.3, C.3, A.4, C.4, A.5, etc., and the order of the code blocks included in the other path of the third data is B.1, D.1, B.2, D.2, B.3, D.3, B.4, D.4, B.5, etc. It should be noted that Fig.11 (c) is only used to illustrate the example of merging code block stream A and code block stream C into one path of third data, and merging code block stream B and code block stream D into one path of third data, but it is not used to limit the implementation method. Each path of third data can be the aggregation of any two code block streams.

[0135] In some other embodiments, when the decoding results after AM is deleted are combined into two paths of third data in a sequentially transmitted manner, the code blocks of each code block stream included in the two paths of third data are as follows: Fig.11 As shown in (d), the order of the code blocks included in one path of the third data is A.1, B.1, C.1, D.1, A.3, B.3, C.3, D.3, A.5 and so on, and the order of the code blocks included in another path of the third data is A.2, B.2, C.2, D.2, A.4, B.4, C.4, D.4, A.6 and so on.

[0136] In addition, the above Fig.11 In the process of merging to obtain the third data, the methods (a), (c) and (d) may also include sending the padding data block and the data to be merged in sequence. For the specific process, please refer to Fig.11 Optionally, the padding data blocks are not necessarily sent periodically, but may be sent at different intervals, for example, sending a padding data block after a certain number of data, or inserting multiple padding data blocks after a certain number of data.

[0137] Exemplarily, converting the decoding result after deleting AM into at least two paths of third data includes: merging the decoding result after deleting AM into one path of fourth data, and converting the one path of fourth data into at least two paths of third data. For example, the four paths of first data obtained are all 400GE data, and the decoding results after deleting AM are merged into one path of 1.6TE fourth data, and the one path of 1.6TE fourth data is converted into two paths of 800GE third data.

[0138] When encoding at least two paths of third data, the method of overall encoding or separate encoding may also be adopted. Exemplarily, encoding at least two paths of third data to obtain multiple second code words includes: encoding at least two paths of third data as a whole according to the second FEC code type to obtain multiple second code words; or encoding at least two paths of third data separately according to the second FEC code type to obtain multiple second code words. The step of encoding at least two paths of third data to obtain multiple second code words can refer to Figure 6 The FEC2 (second FEC code type) encoding and processing steps are shown.

[0139] In some embodiments, encoding at least two paths of third data respectively according to the second FEC code type to obtain multiple second code words includes: encoding at least two paths of third data respectively as a whole according to the second FEC code type to obtain multiple second code words; or converting at least two paths of third data into at least two paths of sixth data respectively, encoding at least two paths of sixth data respectively according to the second FEC code type to obtain multiple second code words, wherein the rate of the sixth data is less than the rate of the third data. The process of converting at least two paths of third data respectively into at least two paths of sixth data and encoding at least two paths of sixth data respectively according to the second FEC code type is the same as the related process principle of converting one path of third data into at least two paths of fifth data and encoding at least two paths of fifth data respectively according to the second FEC code type in the above-mentioned method of obtaining multiple second code words, and will not be repeated here. Among them, overall encoding refers to merging multiple paths of data into one path of data for encoding, or overall encoding is used to encode the data to be encoded as one path of data. Therefore, overall encoding of at least two paths of third data according to the second FEC code type refers to encoding all third data in at least two paths of third data as one path of data.

[0140] The method provided in the embodiment of the present application can encode the third data in different ways to obtain multiple second code words, so that the transmission scenarios and transmission requirements applicable to the method are more flexible. In addition, when the number of paths of the third data is multiple, the number of paths of the third data and the second FEC code type used to encode the third data can be flexibly set to be applicable to different transmission scenarios and transmission requirements.

[0141] S1-2, obtaining at least one channel of second data according to the plurality of second code words.

[0142] Exemplarily, obtaining at least one path of second data according to the plurality of second codewords includes but is not limited to interleaving the plurality of second codewords, and obtaining at least one path of second data according to the interleaving result. The embodiment of the present application does not limit the manner of interleaving the plurality of second codewords, for example, performing at least one of codeword interleaving or lane interleaving on the plurality of second codewords.

[0143] In case 2, the first module aligns at least one channel of first data, and obtains a plurality of first code words according to the alignment result; and obtains at least one channel of second data according to the plurality of first code words.

[0144] Among them, the first module aligns at least one channel of first data, and the method of obtaining multiple first codewords according to the alignment result is the same as the relevant process principle in the above-mentioned method 1, which will not be repeated here.

[0145] Exemplarily, obtaining at least one second data according to the plurality of first codewords includes: merging the plurality of first codewords and obtaining at least one second data according to the merging result. For example, merging the plurality of first codewords and obtaining at least one second data according to the merging result includes but is not limited to the following two methods.

[0146] In a first merging method, a plurality of first code words are merged into one channel of second data by sending them in sequence.

[0147] Since the multiple first code words are combined into one channel of second data by sequentially sending, the multiple first code words obtained based on each channel of first data included in the second data may appear periodically. The method of combining the multiple first code words into one channel of second data by sequentially sending is the same as the related process principle of combining the decoding results after AM deletion into one channel of third data by sequentially sending, and will not be repeated here.

[0148] The second merging method is to merge multiple first code words into at least two paths of second data.

[0149] Exemplarily, the method of combining multiple first codewords into at least two second data is the same as the principle of the above-mentioned related process of converting the decoding result after deleting AM into at least two third data, which will not be repeated here.

[0150] It should be noted that, no matter which of the above-mentioned merging methods is used, the second data may be interleaved data, and the embodiment of the present application does not limit the interleaving method.

[0151] In case three, the first module encodes at least one channel of first data according to the second FEC code type to obtain multiple third code words; the first module obtains at least one channel of second data according to the multiple third code words.

[0152] Exemplarily, the first module encodes at least one channel of first data according to the second FEC code type to obtain multiple third code words, including but not limited to the following two methods.

[0153] Method one for obtaining multiple third code words is to combine at least one channel of first data into one channel of seventh data by sending them in sequence, and encode the one channel of seventh data to obtain multiple third code words.

[0154] In some embodiments, at least one first data is combined into a seventh data in a manner of being sent sequentially, including but not limited to the first module aligning at least one first data, obtaining multiple first codewords according to the alignment result, and combining the multiple first codewords into the seventh data in a manner of being sent sequentially. The embodiments of the present application do not limit the granularity of sequential transmission, including but not limited to 5440-bit, 5140-bit, 257-bit, 66-bit, 10-bit, 2-bit or 1-bit. The first module aligns at least one first data, and the manner of obtaining multiple first codewords according to the alignment result is the same as the relevant process principle in the above-mentioned method one, and will not be repeated here.

[0155] In some embodiments, at least one first data is merged into a seventh data in a sequential manner, including but not limited to: at least one first data is merged into a seventh data of a reference rate in a sequential manner. For example, in response to the sum of the rates of the acquired first data being less than the reference rate, at least one first data is merged with the third reference data into a seventh data of a reference rate. If the sum of the acquired first data rates is 400GE and the reference rate is 800GE, at least one first data is merged with the third reference data of 400GE into a seventh data of 800GE, and the third reference data can be idle data. The embodiment of the present application does not limit the content of the third reference data, for example, the third reference data is determined based on the application scenario. It should be noted that the reference rate can be set according to experience or actual needs, and the embodiment of the present application does not limit this. The embodiment of the present application also does not limit the method of merging at least one first data and the third reference data into the seventh data of a reference rate. For example, at least one first data and third reference data are combined into a seventh data of a reference rate by sending them sequentially, or at least one first data is combined, and the combined data is combined with the third reference data by sending them sequentially into a seventh data of a reference rate.

[0156] Exemplarily, encoding one path of seventh data to obtain multiple third codewords includes, but is not limited to: encoding one path of seventh data as a whole according to the second FEC code type to obtain multiple third codewords; or, converting one path of seventh data into at least two paths of ninth data, encoding at least two paths of ninth data respectively according to the second FEC code type to obtain multiple third codewords, wherein the rate of the ninth data is less than the rate of the seventh data. For example, the seventh data is one path of 800GE data, and the seventh data is encoded as a whole according to the second FEC code type to obtain multiple third codewords; or, converting the seventh data into two paths of 400GE ninth data, and encoding the two paths of ninth data respectively according to the second FEC code type to obtain multiple third codewords. Exemplarily, the overall encoding is used to encode the data to be encoded as one path of data. The present application does not limit the method of converting one path of seventh data into at least two paths of ninth data, for example, converting one path of first data into at least two paths of ninth data in a sequential manner.

[0157] A second method for obtaining a plurality of third code words is to convert at least one path of first data into at least two paths of seventh data, and encode the at least two paths of seventh data to obtain a plurality of third code words.

[0158] Exemplarily, the rate of the seventh data can be a reference rate, and the number of paths and the reference rate of the seventh data can be set according to experience or actual needs, which is not limited in the embodiments of the present application. In some embodiments, at least one path of the first data is converted into at least two paths of the seventh data in a sequentially transmitted manner.

[0159] Exemplarily, when the sum of the rates of at least one first data is less than the sum of the rates of at least two seventh data, the at least one first data and the fourth reference data are converted into at least two seventh data of the reference rate. For example, the rates of the four first data obtained are 400GE, 400GE, 400GE and 200GE, and the reference rate is 800GE, and the at least one first data and the fourth reference data of 200GE are converted into two seventh data of 800GE. For another example, the rate of the first data obtained is 1.6TE, and the reference rate is 800GE, and the at least one first data and the fourth reference data of 1.6TE are converted into four seventh data of 800GE.

[0160] Exemplarily, when the sum of the rates of at least one path of first data is equal to the sum of the rates of at least two paths of seventh data, the at least one path of first data is converted into at least two paths of seventh data.

[0161] In some embodiments, in the case where there are multiple paths of the first data, for any one path of the at least two paths of the seventh data, the any one path of the seventh data may include only part of the data of the first data or include the data of each path of the first data.

[0162] Exemplarily, converting at least one path of first data into at least two paths of seventh data includes: merging at least one path of first data into one path of eighth data, and converting one path of eighth data into at least two paths of seventh data. For example, if the four paths of first data obtained are all 400GE data, the four paths of first data are merged into one path of 1.6TE eighth data, and the one path of 1.6TE eighth data is converted into two paths of 800GE seventh data.

[0163] When encoding at least two paths of the seventh data, the whole encoding or the separate encoding method may also be adopted. Exemplarily, encoding at least two paths of the seventh data to obtain a plurality of third code words includes: encoding at least two paths of the seventh data as a whole according to the second FEC code type to obtain a plurality of third code words; or encoding at least two paths of the seventh data separately according to the second FEC code type to obtain a plurality of third code words.

[0164] In some embodiments, encoding at least two paths of seventh data respectively according to the second FEC code type to obtain multiple third code words includes: encoding at least two paths of seventh data respectively as a whole according to the second FEC code type to obtain multiple third code words; or converting at least two paths of third data respectively into at least two paths of tenth data, encoding at least two paths of tenth data respectively according to the second FEC code type, and obtaining multiple third code words, wherein the rate of the tenth data is less than the rate of the seventh data. The process of converting at least two paths of seventh data respectively into at least two paths of tenth data, and encoding at least two paths of tenth data respectively according to the second FEC code type is the same as the related process of converting one path of seventh data into at least two paths of ninth data, and encoding at least two paths of ninth data respectively according to the second FEC code type in the above-mentioned method 1 of obtaining multiple third code words, and will not be repeated here.

[0165] Exemplarily, obtaining at least one path of second data according to multiple third codewords includes but is not limited to interleaving multiple third codewords, and obtaining at least one path of second data according to the interleaving result. The embodiment of the present application does not limit the manner of interleaving multiple third codewords, for example, at least one of codeword interleaving or lane interleaving is performed on multiple third codewords.

[0166] The method provided in the embodiment of the present application can encode the seventh data in different ways to obtain multiple third code words, so that the transmission scenarios and transmission requirements applicable to the method are relatively flexible. In addition, when the number of paths of the seventh data is multiple, the number of paths of the seventh data and the second FEC code type used to encode the seventh data can be flexibly set to be applicable to different transmission scenarios and transmission requirements.

[0167] S203, the first module transmits at least one channel of second data.

[0168] Exemplarily, the first module transmits at least one second data, including: the first module inserts synchronization data into at least one second data, and transmits the data after the synchronization data is inserted. The synchronization data includes but is not limited to at least one of AM, coherent digital signal processing (DSP) frame header, training symbol or pilot symbol.

[0169] In some embodiments, the first module inserts synchronization data into at least one second data, including: determining the AM corresponding to each second data in at least one second data; inserting the AM corresponding to each second data as synchronization data into each second data. Exemplarily, the AM corresponding to each second data is obtained by adjusting the AM included in the corresponding first data; or, the AM corresponding to each second data is the entire content of the AM included in the corresponding first data; or, the AM corresponding to each second data is part of the AM included in the corresponding first data. Adjusting the AM included in the corresponding first data includes but is not limited to adjusting the AM content or length according to different granularities.

[0170] In some embodiments, when the acquired first data is multiple channels of first data, the AM included in any channel of the multiple channels of first data can be used as the AM corresponding to any channel of second data. It should be noted that the AMs corresponding to the channels of second data can be the same or different. For example, the AMs of the channels of second data can be determined separately according to actual needs.

[0171] Exemplarily, when the first module transmits at least one second data, other processing may also be performed, such as multiplexing (mux), training sequence (TS) / pilot symbol (pilot symbol) insertion, frequency adjustment, optical modulation, etc., and transmitting at least one second data after processing. Regardless of whether the data transmitted by the first module is data after the synchronization data is inserted, or data that has undergone other processing, the multiplexing granularity used by the first module when transmitting data includes but is not limited to FEC codewords, 257-bit, 66-bit, 10-bit or 1-bit, and the embodiments of the present application do not limit this.

[0172] The method provided in the embodiment of the present application converts at least one first data to obtain at least one second data whose sum of rates is not less than the sum of rates of at least one first data, thereby enabling data transmission at a higher rate. In addition, since the first module can encode the first data obtained by using the first FEC code pattern again through the second FEC code pattern, the second data has a higher coding gain, and when transmitted in a channel prone to bit errors, the data with bit errors can be effectively corrected, thereby improving the quality of data transmission.

[0173] Next, combining the above Figure 2 The method flow shown takes the first module located in the first chip and the second module located in the second chip, and takes the following scenarios as examples to illustrate the data transmission method provided in the embodiments of the present application.

[0174] Scenario 1: The first chip and the second chip are applied to a segmented FEC architecture.

[0175] For example, the scene corresponds to Figure 2 The implementation environment of this scenario can be as follows: Fig.14 As shown, the process of data transmission is as follows.

[0176] The second chip transmits eight channels of first data to the first chip through AUI, and the media access control (MAC) rate of the first data is 100Gb / s, and the first data are all data encoded by RS (544, 514) FEC code type. The second chip transmits one channel of first data through one AUI, and the transmission rate is 106.25Gb / s. The first chip includes eight processing units, each of which is used to process one channel of first data. After receiving the eight channels of first data, the first chip performs AM locking on each channel of first data respectively to align the first data to obtain multiple first code words. Since the first data is data encoded by RS (544, 514) FEC code type, the multiple first code words are code words encoded by RS (544, 514) FEC code type. Exemplarily, when the first data is data obtained by interleaving, the first chip performs AM locking on the first data, and after obtaining the alignment result, the alignment result is deinterleaved, and multiple first code words are obtained according to the deinterleaving. After obtaining multiple first code words, the first chip decodes the multiple first code words. In a possible implementation, the first chip interleaves the decoding results and obtains at least one second data according to the interleaved decoding results. After the first chip obtains the decoding results, the AM in the decoding results is deleted, wherein the AM can be used to determine the AM corresponding to each second data in the at least one second data. It should be noted that the first chip can process each first data at the same time or first process a certain first data and then process other first data, which is not limited in the embodiments of the present application.

[0177] Furthermore, the first chip performs data merging on the decoding results after AM is deleted. For example, the decoding results after AM is deleted are merged into one 800GE third data in a sequential manner, or the decoding results after AM is deleted are converted into at least two 800GE third data. The first chip performs data processing on the third data, for example, encodes the third data to obtain multiple second codewords, and obtains at least one second data according to the multiple second codewords.

[0178] Finally, the first chip inserts AM as synchronization data into at least one second data channel; performs transmitter (TX) DSP on the data after the synchronization data is inserted to obtain 800G coherent light.

[0179] In another possible implementation, the implementation environment of the scenario is as follows: Fig.15 As shown, the process of data transmission is as follows.

[0180] The second chip transmits a first data to the first chip through AUI, the MAC rate of the first data is 1.6Tb / s, and the first data is 2xRS (544, 514) FEC code type coded interleaved data. The second chip transmits a first data through 16 AUIs, wherein one AUI is used for a first sub-data, and the transmission rate is 106.25Gb / s. After receiving the first data, the first chip performs AM locking / deskewing on the first data to align the first data to obtain a plurality of first code words. Since the first data is data encoded using the RS (544, 514) FEC code type, the plurality of first code words are code words encoded using the RS (544, 514) FEC code type. Exemplarily, in the case where the first data is data obtained through interleaving, the first chip performs AM locking on the first data, and after obtaining the alignment result, deinterleaving the alignment result, and obtaining a plurality of first code words according to the deinterleaving. After obtaining the plurality of first code words, the first chip decodes the plurality of first code words. In a possible implementation, the first chip interleaves the decoding result and obtains at least one second data according to the interleaved decoding result. After obtaining the decoding result, the first chip deletes the AM in the decoding result, wherein the AM can be used to determine the AM corresponding to each second data in the at least one second data.

[0181] Furthermore, the first chip distributes the decoding result after deleting the AM. For example, the decoding result after deleting the AM is converted into two 800GE third data. The first chip processes the two third data, for example, encodes the two third data to obtain multiple second code words, and obtains two second data according to the multiple second code words. It should be noted that the processing of the two third data can be the same or different.

[0182] Afterwards, the first chip inserts AM as synchronization data into the two second data channels, performs TX DSP on the data after the synchronization data is inserted, and obtains two 800G coherent lights. The processing of the two second data channels can be the same or different, so that the wavelengths of the obtained two 800G coherent lights can be the same or different.

[0183] In scenario two, the first chip and the second chip are applied to an end-to-end FEC architecture.

[0184] For example, the second scenario corresponds to Figure 2 The implementation environment of this scenario is as follows: Fig.16 As shown, the process of data transmission is as follows.

[0185] The second chip transmits eight channels of first data to the first chip through AUI, and the MAC rate of the first data is 100Gb / s, and the first data are all data encoded by RS(544,514)FEC code type. The second chip transmits one channel of first data through one AUI, and the transmission rate is 106.25Gb / s. The first chip includes eight processing units, each of which is used to process one channel of first data. After receiving the eight channels of first data, the first chip performs AM locking on each channel of first data respectively to align the first data to obtain multiple first code words. Since the first data is data encoded by RS(544,514)FEC code type, multiple first code words are code words encoded by RS(544,514)FEC code type. Exemplarily, when the first data is data obtained by interleaving, the first chip performs AM locking on the first data, and after obtaining the alignment result, deinterleaves the alignment result, and obtains multiple first code words according to the deinterleaving. The first chip may process the first data of each path simultaneously or may first process the first data of a certain path and then process the first data of other paths, which is not limited in the embodiments of the present application.

[0186] Furthermore, the first chip combines multiple first codewords for data. For example, multiple first codewords are combined into one 800GE second data in a sequential manner, or multiple first codewords are converted into at least two 800GE second data. Finally, the first chip performs TX DSP on at least one second data to obtain 800G coherent light.

[0187] Scenario three: the first chip and the second chip are applied to a cascaded FEC architecture.

[0188] Exemplarily, the scenario three corresponds to Figure 2 The implementation environment of this scenario is as follows: Fig.17 As shown, the process of data transmission is as follows.

[0189] The second chip transmits eight channels of first data to the first chip through AUI, and the MAC rate of the first data is 100Gb / s, and the first data are all data encoded by RS(544,514)FEC code type. The second chip transmits one channel of first data through one AUI, and the transmission rate is 106.25Gb / s. The first chip includes eight processing units, each of which is used to process one channel of first data. After receiving the eight channels of first data, the first chip performs AM locking on each channel of first data respectively to align the first data to obtain multiple first code words. Since the first data is data encoded by RS(544,514)FEC code type, the multiple first code words are code words encoded by RS(544,514)FEC code type. Exemplarily, when the first data is data obtained by interleaving, the first chip performs AM locking on the first data, and after obtaining the alignment result, deinterleaves the alignment result, and obtains multiple first code words according to the deinterleaving. The first chip may process the first data of each path simultaneously or may first process the first data of a certain path and then process the first data of other paths, which is not limited in the embodiments of the present application.

[0190] Further, the first chip combines multiple first codewords obtained based on each path of first data. For example, multiple first codewords are combined into one path of 800GE seventh data, or multiple first codewords are converted into at least two paths of 800GE seventh data. The first chip processes the seventh data, for example, encodes the seventh data to obtain multiple third codewords, and obtains at least one path of second data according to the multiple third codewords.

[0191] Afterwards, the first chip performs TX DSP on at least one channel of second data to obtain 800G coherent light.

[0192] The above describes the method of data transmission by taking the first module as an example. Next, after the first module transmits at least one second data, the third module describes the process of data transmission. Fig.18 As shown, the data transmission method includes the following steps.

[0193] S1801, the third module obtains at least one second data, the at least one second data is data obtained by converting at least one first data, the sum of the rates of the at least one second data is not less than the sum of the rates of the at least one first data, and the first data is data encoded using a first FEC code type.

[0194] Combination Figure 1 In the implementation environment shown, the third module obtains at least one second data sent by the first module. Figure 2In the embodiment shown, there are many ways for the first module to obtain at least one second data, which will not be described in detail in the embodiment of the present application. Figure 2 The content of the illustrated embodiment.

[0195] S1802: The third module performs conversion processing on at least one channel of second data to obtain at least one channel of first data.

[0196] Since there are multiple ways for the first module to obtain at least one second data, there are also multiple situations of the second data. For different situations of the second data, the third module can process them in different situations. For example, if the second data is data encoded using the second FEC code type, the third module decodes the second data according to the second FEC code type to obtain decoded data.

[0197] Afterwards, the third module may further process the decoded data, and the embodiment of the present application does not limit the processing method of the third module on the second data. For example, the decoded data is continued to be sent to other modules. In addition, the third module may be located in the third chip, the first module is located in the first chip, and the third module receives at least one second data sent by the first module through the AUI.

[0198] The method provided in the embodiment of the present application converts at least one channel of second data to obtain at least one channel of first data whose sum of rates is not greater than the sum of rates of at least one channel of second data, thereby enabling data transmission at a higher rate. In addition, since the second data may be data encoded using the first FEC code type and the second FEC code type, it is decoded by the second FEC code type, and when transmitted in a channel prone to bit errors, effective error correction can be performed on the data with bit errors, thereby improving the quality of data transmission.

[0199] The embodiment of the present application also provides a device for data transmission. Fig.19 Schematic diagram of a data transmission device provided in an embodiment of the present application. Fig.19 The following multiple units are shown, Fig.19 The data transmission device shown can perform all or part of the operations performed by the first module. It should be understood that the device may include more additional units than the units shown or omit some of the units shown, and the embodiments of the present application are not limited to this. Fig.19 As shown, the device comprises:

[0200] The acquisition unit 1901 is used to acquire at least one channel of first data, where the first data is data encoded using a first forward error correction code FEC code type;

[0201] The conversion unit 1902 is used to convert the at least one first data to obtain at least one second data, wherein the sum of the rates of the at least one second data is not less than the sum of the rates of the at least one first data;

[0202] The transmission unit 1903 is used to transmit at least one channel of second data.

[0203] In a possible implementation, the conversion unit 1902 is configured to align at least one channel of first data and obtain multiple first codewords according to the alignment result; and decode the multiple first codewords and obtain at least one channel of second data according to the decoding result.

[0204] In a possible implementation, the conversion unit 1902 is configured to encode the decoding result according to the second FEC code type to obtain a plurality of second code words; and obtain at least one channel of second data according to the plurality of second code words.

[0205] In a possible implementation, the conversion unit 1902 is configured to interleave the multiple second codewords and obtain at least one channel of second data according to the interleaving result.

[0206] In one possible implementation, the first data includes an alignment mark AM, and AM is used to align at least one first data channel; the conversion unit 1902 is used to delete AM in the decoding result, and encode the decoding result after deleting AM according to the second FEC code type to obtain multiple second code words.

[0207] In one possible implementation, the conversion unit 1902 is used to merge the decoding results after deleting AM into one path of third data in a sequentially transmitted manner, encode the one path of third data, and obtain multiple second code words; or, convert the decoding results after deleting AM into at least two paths of third data, encode at least two paths of third data, and obtain multiple second code words.

[0208] In a possible implementation manner, the conversion unit 1902 is configured to merge the decoding results after AM is deleted into one path of fourth data, and convert the one path of fourth data into at least two paths of third data.

[0209] In one possible implementation, the conversion unit 1902 is used to encode one path of third data as a whole according to the second FEC code type to obtain multiple second code words; or, to convert one path of third data into at least two paths of fifth data, and to encode at least two paths of fifth data separately according to the second FEC code type to obtain multiple second code words, wherein the rate of the fifth data is less than the rate of the third data.

[0210] In a possible implementation, the conversion unit 1902 is configured to encode at least two paths of third data as a whole according to the second FEC code type to obtain multiple second code words; or to encode at least two paths of third data separately according to the second FEC code type to obtain multiple second code words.

[0211] In one possible implementation, the conversion unit 1902 is used to respectively encode at least two paths of third data as a whole according to the second FEC code type to obtain multiple second code words; or, to convert at least two paths of third data into at least two paths of sixth data respectively, and to respectively encode at least two paths of sixth data according to the second FEC code type to obtain multiple second code words, wherein the rate of the sixth data is less than the rate of the third data.

[0212] In a possible implementation, the conversion unit 1902 is configured to mark an erroneous code block among the multiple code blocks included in the decoding result, and obtain at least one channel of second data according to the marked decoding result.

[0213] In a possible implementation, the conversion unit 1902 is configured to align at least one channel of first data, obtain multiple first code words according to the alignment result, and obtain at least one channel of second data according to the multiple first code words.

[0214] In a possible implementation, the conversion unit 1902 is configured to combine multiple first codewords and obtain at least one channel of second data according to the combination result.

[0215] In a possible implementation, the conversion unit 1902 is configured to combine multiple first codewords into one path of second data in a sequentially transmitted manner; or combine multiple first codewords into at least two paths of second data.

[0216] In a possible implementation, the conversion unit 1902 is configured to deinterleave the alignment result, and obtain a plurality of first codewords according to the deinterleaving result.

[0217] In a possible implementation, the conversion unit 1902 is configured to encode at least one channel of first data according to the second FEC code type to obtain a plurality of third code words; and obtain at least one channel of second data according to the plurality of third code words.

[0218] In a possible implementation, the conversion unit 1902 is configured to interleave the plurality of third codewords, and obtain at least one channel of second data according to the interleaving result.

[0219] In one possible implementation, the conversion unit 1902 is used to merge at least one first data into one seventh data in a sequentially transmitted manner, encode the one seventh data, and obtain multiple third code words; or, convert at least one first data into at least two seventh data, encode the at least two seventh data, and obtain multiple third code words.

[0220] In a possible implementation, the conversion unit 1902 is configured to merge at least one path of first data into one path of eighth data, and convert one path of eighth data into at least two paths of seventh data.

[0221] In one possible implementation, the conversion unit 1902 is used to encode one path of seventh data as a whole according to the second FEC code type to obtain multiple third code words; or, to convert one path of seventh data into at least two paths of ninth data, and to encode at least two paths of ninth data separately according to the second FEC code type to obtain multiple third code words, wherein the rate of the ninth data is less than the rate of the seventh data.

[0222] In a possible implementation, the conversion unit 1902 is used to encode at least two paths of seventh data as a whole according to the second FEC code type to obtain multiple third code words; or to encode at least two paths of seventh data separately according to the second FEC code type to obtain multiple third code words.

[0223] In one possible implementation, the conversion unit 1902 is used to respectively encode at least two paths of seventh data as a whole according to the second FEC code type to obtain multiple third code words; or, to convert at least two paths of seventh data into at least two paths of tenth data respectively, and to respectively encode at least two paths of tenth data according to the second FEC code type to obtain multiple third code words, wherein the rate of the tenth data is less than the rate of the seventh data.

[0224] In a possible implementation, the transmission unit 1903 is configured to insert the synchronization data into at least one channel of second data, and transmit the data after the synchronization data is inserted.

[0225] In a possible implementation, the transmission unit 1903 is configured to determine an AM corresponding to each path of second data in at least one path of second data; and insert the AM corresponding to each path of second data as synchronization data into each path of second data.

[0226] In a possible implementation, the AM corresponding to each channel of second data is obtained by adjusting the AM included in the corresponding first data; or, the AM corresponding to each channel of second data is all the content in the AM included in the corresponding first data; or, the AM corresponding to each channel of second data is part of the AM included in the corresponding first data.

[0227] Fig. 20Schematic diagram of a data transmission device provided in an embodiment of the present application. Fig. 20 The following multiple units are shown, Fig. 20 The data transmission device shown can perform all or part of the operations performed by the third module. It should be understood that the device may include more additional units than the units shown or omit some of the units shown, and the embodiments of the present application are not limited to this. Fig. 20 As shown, the device comprises:

[0228] An acquisition unit 2001 is used to acquire at least one channel of second data, where the at least one channel of second data is data obtained by converting at least one channel of first data, a sum of rates of the at least one channel of second data is not less than a sum of rates of the at least one channel of first data, and the first data is data encoded using a first forward error correction code FEC pattern;

[0229] The conversion unit 2002 is used to perform conversion processing on at least one channel of second data to obtain at least one channel of first data.

[0230] It should be understood that the above Fig.19 , Fig. 20 When the device provided realizes its functions, only the division of the above-mentioned functional modules is used as an example. In practical applications, the above-mentioned functions can be assigned to different functional units as needed, that is, the internal structure of the device is divided into different functional units to complete all or part of the functions described above. In addition, the device and method embodiments provided in the above embodiments belong to the same concept, and their specific implementation process is detailed in the method embodiment, which will not be repeated here.

[0231] An embodiment of the present application provides a device for data transmission, the device comprising: a processor, the processor is coupled to a memory, the memory stores at least one program instruction or code, the at least one program instruction or code is loaded and executed by the processor, so that the data transmission device implements the method in the above method embodiment.

[0232] See also Fig.21 , Fig.21 A schematic structural diagram of a data transmission device 1100 provided by an exemplary embodiment of the present application is shown. The data transmission device 1100 is a sending side / receiving side device. Fig.21 The data transmission device 1100 shown is used to perform the above Figure 2Operations involved in the method for data transmission shown. The data transmission device 1100 is, for example, a network device such as a switch, a router, and other devices that include this chip cascading mode (such as a server, a PC, etc.). The hardware structure of the data transmission device 1100 includes a communication interface 1101 and a processor 1102. Optionally, the communication interface 1101 and the processor 1102 are connected via a bus 1104. Among them, the communication interface 1101 is used to obtain the first data and transmit the second data, and the processor may store instructions or program codes, and execute the functions performed by the above-mentioned first module or the functions performed by the third module by calling the instructions or program codes. Optionally, the network device also includes a memory 1103, in which instructions or program codes are stored, and the processor 1102 is used to call the instructions or program codes in the memory 1103 so that the network device executes the relevant processing steps of the first module in the above-mentioned method embodiment. In a specific embodiment, the data transmission device 1100 of the embodiment of the present application may include the first module in each of the above-mentioned method embodiments, and the processor 1102 in the data transmission device 1100 reads the instructions or program codes in the memory 1103, so that Fig.21 The data transmission device 1100 shown can execute all or part of the operations executed by the first module.

[0233] In a specific embodiment, the data transmission device 1100 of the embodiment of the present application includes the third module in each of the above method embodiments, and the processor 1102 in the data transmission device 1100 reads the instruction or program code in the memory 1103, so that Fig.21 The data transmission device 1100 shown can execute all or part of the operations executed by the third module.

[0234] Exemplarily, the processor 1102 is, for example, a general-purpose central processing unit (CPU), a digital signal processor (DSP), a network processor (NP), a graphics processing unit (GPU), a neural-network processing units (NPU), a data processing unit (DPU), a microprocessor, or one or more integrated circuits for implementing the solution of the present application. For example, the processor 1102 includes an application-specific integrated circuit (ASIC), a programmable logic device (PLD) or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. PLD is, for example, a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL), or any combination thereof. It can implement or execute various logic blocks, modules, and circuits described in conjunction with the disclosure of the embodiments of the present invention. The processor can also be a combination that implements a computing function, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, and the like.

[0235] Optionally, the data transmission device 1100 further includes a bus. The bus is used to transmit information between the components of the data transmission device 1100. The bus can be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Fig.21 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus. Fig.21 In addition to being connected by a bus, the components of the data transmission device 1100 may also be connected in other ways, and the embodiment of the present invention does not limit the connection method of the components.

[0236] The memory 1103 is, for example, a read-only memory (ROM) or other types of static storage devices that can store static information and instructions, or a random access memory (RAM) or other types of dynamic storage devices that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical disc, laser disc, optical disc, digital versatile disc, Blu-ray disc, etc.), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory 1103 is, for example, independent and connected to the processor 1102 via a bus. The memory 1103 can also be integrated with the processor 1102.

[0237] The communication interface 1101 uses any transceiver-like device to communicate with other devices or communication networks, and the communication network can be Ethernet, a radio access network (RAN) or a wireless local area network (WLAN), etc. The communication interface 1101 may include a wired communication interface and may also include a wireless communication interface. Specifically, the communication interface 1101 may be an Ethernet interface, a fast Ethernet (FE) interface, a gigabit Ethernet (GE) interface, an asynchronous transfer mode (ATM) interface, a wireless local area network (WLAN) interface, a cellular network communication interface or a combination thereof. The Ethernet interface may be an optical interface, an electrical interface or a combination thereof. In an embodiment of the present application, the communication interface 1101 may be used for the data transmission device 1100 to communicate with other devices.

[0238] In a specific implementation, as an embodiment, the processor 1102 may include one or more CPUs. Each of these processors may be a single-core (single-CPU) processor or a multi-core (multi-CPU) processor. The processor here may refer to one or more devices, circuits, and / or processing cores for processing data (such as computer program instructions).

[0239] In a specific implementation, as an embodiment, the data transmission device 1100 may include multiple processors. Each of these processors may be a single-core processor (single-CPU) or a multi-core processor (multi-CPU). The processor here may refer to one or more devices, circuits, and / or processing cores for processing data (such as computer program instructions).

[0240] In a specific implementation, as an embodiment, the data transmission device 1100 may also include an output device and an input device. The output device communicates with the processor 1102 and may display information in a variety of ways. For example, the output device may be a liquid crystal display (LCD), a light emitting diode (LED) display device, a cathode ray tube (CRT) display device, or a projector. The input device communicates with the processor 1102 and may receive user input in a variety of ways. For example, the input device may be a mouse, a keyboard, a touch screen device, or a sensor device.

[0241] In some embodiments, the memory 1103 is used to store the program code for executing the solution of the present application, and the processor 1102 can execute the program code stored in the memory 1103. That is, the data transmission device 1100 can implement the data transmission method provided by the method embodiment through the processor 1102 and the program code in the memory 1103. The program code may include one or more software modules. Optionally, the processor 1102 itself may also store the program code or instruction for executing the solution of the present application.

[0242] In a specific embodiment, the data transmission device 1100 of the embodiment of the present application may include the first chip in each of the above method embodiments, and the processor 1102 in the data transmission device 1100 reads the program code in the memory 1103 or the program code or instruction stored in the processor 1102 itself, so that Fig.21 The data transmission device 1100 shown can execute all or part of the operations executed by the first module.

[0243] In a specific embodiment, the data transmission device 1100 of the embodiment of the present application may include the third module in each of the above method embodiments, and the processor 1102 in the data transmission device 1100 reads the program code in the memory 1103 or the program code or instruction stored in the processor 1102 itself, so that Fig.21 The data transmission device 1100 shown can execute all or part of the operations executed by the third module.

[0244] The data transmission device 1100 may also correspond to the above Fig.19 , 20 The device shown, Fig.19 , 20 Each functional unit in the device shown is implemented using software of the data transmission device 1100. In other words, Fig.19 , 20 The functional units included in the apparatus shown are generated after the processor 1102 of the data transmission device 1100 reads the program code stored in the memory 1103 .

[0245] in, Figure 2-18 Each step of the data transmission method shown is completed by an integrated logic circuit of hardware or software instructions in the processor of the data transmission device 1100. The steps of the method disclosed in conjunction with the embodiment of the present application can be directly embodied as a hardware processor, or a combination of hardware and software modules in the processor. The software module can be located in a mature storage medium in the art such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory or an electrically erasable programmable memory, a register, etc. The storage medium is located in the memory, and the processor reads the information in the memory, and completes the steps of the above method in conjunction with its hardware. To avoid repetition, it is not described in detail here.

[0246] The embodiment of the present application also provides a data transmission system, which includes: a first data transmission device and a second data transmission device; the first data transmission device is used to perform Figure 2 The method executed by the first module shown, the second data transmission device is used to execute Fig.18 The method executed by the third module shown.

[0247] The functions of the first data transmission device and the second data transmission device of the system can be referred to above. Figure 2 and Fig.18 The relevant descriptions shown will not be repeated here one by one.

[0248] It should be understood that the processor may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor, etc. It is worth noting that the processor may be a processor supporting the advanced RISC machines (ARM) architecture.

[0249] Further, in an optional embodiment, the memory may include a read-only memory and a random access memory, and provide instructions and data to the processor. The memory may also include a non-volatile random access memory. For example, the memory may also store information about the device type.

[0250] The memory may be a volatile memory or a nonvolatile memory, or may include both volatile and nonvolatile memory. Among them, the nonvolatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example but not limitation, many forms of RAM are available. For example, static RAM (SRAM), dynamic random access memory (DRAM), synchronous DRAM (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link DRAM (SLDRAM) and direct memory bus random access memory (DR RAM).

[0251] A computer-readable storage medium is also provided, wherein the storage medium stores at least one program instruction or code, which, when loaded and executed by a processor, enables the computer to implement the above Figure 2-18 The method of data transmission is shown.

[0252] The present application provides a computer program. When the computer program is executed by a computer, a processor or a computer can be enabled to execute the corresponding steps and / or processes in the above method embodiments.

[0253] A chip is provided, comprising a processor, for calling and executing instructions stored in a memory, so that a device equipped with the chip executes the methods in the above aspects.

[0254] Another chip is provided, comprising: an input interface, an output interface, a processor and a memory, wherein the input interface, the output interface, the processor and the memory are connected via an internal connection path, the processor is used to execute the code in the memory, and when the code is executed, the processor is used to execute the methods in the above aspects.

[0255] A device is provided, comprising a chip according to any one of the above solutions.

[0256] A device is provided, comprising the first chip of any one of the above solutions, and / or the third chip of any one of the above solutions.

[0257] In some embodiments, Figure 14-17 In some embodiments, the first chip may be a transmitting side device, such as a PHY chip in a router, a switch, or a server, and the third chip may be an interface of a receiving side device, such as a chip in an optical module or a CDR / retimer chip. In some embodiments, the first chip may be a transmitting side device, such as a PHY chip in a router, a switch, or a server, and the third chip may be an interface of a receiving side device, such as a chip in an optical module or a CDR / retimer chip. The PHY chip may be a chip located on a single board of a computing device, and the chip may be one of a CPU, a network processor (NP), a neural network processing unit (NPU), a field programmable gate array (FPGA), a programmable logic controller (PLC), etc., or any combination thereof.

[0258] In some embodiments, the first chip communicates with the second chip via AUI; in some embodiments, the third chip communicates with the first chip via AUI.

[0259] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on the computer, the process or function according to the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from a website site, computer, server or data center to another website site, computer, server or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line) or wireless (e.g., infrared, wireless, microwave, etc.) mode. The computer-readable storage medium can be any available medium that can be accessed by the computer or a data storage device such as a server or data center that contains one or more available media integration. The available medium can be a magnetic medium (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid state hard disk, solid state disk), etc.

[0260] The above specific implementation methods further illustrate the purpose, technical solutions and beneficial effects of the present application in detail. It should be understood that the above are only specific implementation methods of the present application and are not used to limit the protection scope of the present application. Any modifications, equivalent substitutions, improvements, etc. made on the basis of the technical solutions of the present application should be included in the protection scope of the present application.

[0261] Those of ordinary skill in the art will appreciate that, in conjunction with the various method steps and modules described in the embodiments disclosed herein, they can be implemented in software, hardware, firmware, or any combination thereof. In order to clearly illustrate the interchangeability of hardware and software, the steps and components of each embodiment have been generally described in terms of function in the above description. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Those of ordinary skill in the art may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0262] A person skilled in the art will understand that all or part of the steps to implement the above embodiments may be accomplished by hardware or by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a disk or an optical disk, etc.

[0263] When software is used for implementation, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer program instructions. As an example, the method of the embodiment of the present application can be described in the context of a machine executable instruction, and the machine executable instruction is such as included in the program module executed in the device on the real or virtual processor of the target. Generally speaking, a program module includes a routine, a program, a library, an object, a class, a component, a data structure, etc., which performs a specific task or realizes a specific abstract data structure. In various embodiments, the function of the program module can be merged or divided between the described program modules. The machine executable instruction for the program module can be executed in a local or distributed device. In a distributed device, the program module can be located in both a local and a remote storage medium.

[0264] The computer program code for realizing the method for the embodiment of the present application can be written in one or more programming languages. These computer program codes can be provided to the processor of a general-purpose computer, a special-purpose computer or other programmable data processing device, so that the program code, when executed by a computer or other programmable data processing device, causes the function / operation specified in the flow chart and / or block diagram to be implemented. The program code can be executed completely on a computer, partially on a computer, as an independent software package, partially on a computer and partially on a remote computer or completely on a remote computer or server.

[0265] In the context of the embodiments of the present application, computer program codes or related data may be carried by any appropriate carrier to enable a device, apparatus or processor to perform the various processes and operations described above. Examples of carriers include signals, computer readable media, and the like.

[0266] Examples of signals may include electrical, optical, radio, acoustic or other forms of propagated signals, such as carrier waves, infrared signals, etc.

[0267] A machine-readable medium may be any tangible medium that contains or stores a program for or related to an instruction execution system, apparatus, or device. A machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination thereof. More detailed examples of machine-readable storage media include an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical storage device, a magnetic storage device, or any suitable combination thereof.

[0268] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and modules described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0269] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the module is only a logical function division. There may be other division methods in actual implementation, such as multiple modules or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or modules, or it can be an electrical, mechanical or other form of connection.

[0270] The modules described as separate components may or may not be physically separated, and the components displayed as modules may or may not be physical modules, that is, they may be located in one place or distributed on multiple network modules. Some or all of the modules may be selected according to actual needs to achieve the purpose of the embodiments of the present application.

[0271] In addition, each functional module in each embodiment of the present application can be integrated into one processing module, or each module can exist physically separately, or two or more modules can be integrated into one module. The above integrated modules can be implemented in the form of hardware or software functional modules.

[0272] If the integrated module is implemented in the form of a software function module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk and other media that can store program code.

[0273] The term "at least one" in this application means one or more, and the term "multiple" in this application means two or more, for example, multiple second messages means two or more second messages. The terms "system" and "network" are often used interchangeably herein.

[0274] It should be understood that the terms used in the description of the various examples herein are only for describing specific examples and are not intended to be limiting. As used in the description of the various examples and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0275] It should also be understood that the term “comprise” (also known as “includes,” “including,” “comprises” and / or “comprising”) when used in this specification specifies the presence of stated features, integers, steps, operations, elements, and / or components, but does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0276] It should also be understood that the terms "if" and "if" may be interpreted to mean "when" or "upon" or "in response to determining" or "in response to detecting." Similarly, the phrases "if it is determined that ..." or "if [a stated condition or event] is detected" may be interpreted to mean "upon determining that ..." or "in response to determining that ..." or "upon detecting [a stated condition or event]" or "in response to detecting [a stated condition or event]," depending on the context.

[0277] It should be understood that determining B based on A does not mean determining B only based on A. B can also be determined based on A and / or other information.

[0278] It should also be understood that the references to "one embodiment", "an embodiment", or "a possible implementation" throughout the specification mean that specific features, structures, or characteristics related to the embodiment or implementation are included in at least one embodiment of the present application. Therefore, the references to "in one embodiment" or "in an embodiment", or "a possible implementation" throughout the specification do not necessarily refer to the same embodiment. In addition, these specific features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

Claims

1. A method for data transmission, characterized in that: The method comprises: Acquire at least two paths of first data, where the at least two paths of first data are respectively data encoded using a first forward error correction (FEC) code type; Aligning the at least two paths of first data respectively, and obtaining a plurality of first codewords corresponding to the at least two paths of first data respectively; Decoding the plurality of first code words corresponding to the at least two paths of first data respectively; Merging the decoded at least two paths of first data to obtain third data; Encoding the third data according to a second FEC code type to obtain a plurality of second code words; Obtain at least one channel of second data according to the plurality of second code words; The at least one second data is transmitted.

2. The method according to claim 1, characterized in that The first FEC code type is a Reed-Solomon RS code, and the second FEC code type is a turbo product code TPC.

3. The method according to claim 1 or 2, characterized in that: The acquiring of at least two paths of first data comprises: the first module receiving the at least two paths of first data sent by the second module through the accessory unit interface AUI.

4. The method according to claim 3, characterized in that The first module is located in the first chip, and the second module is located in the second chip.

5. The method according to any one of claims 1 to 4, characterized in that: The aligning the at least two paths of first data respectively comprises: At least one path of sub-data corresponding to each of the first data is obtained respectively, and at least one path of sub-data belonging to the same path of first data is aligned respectively.

6. The method according to any one of claims 1 to 5, characterized in that: The aligning the at least two paths of first data respectively comprises: AM locking and de-skew are performed on the at least two paths of first data respectively.

7. The method according to any one of claims 1 to 6, characterized in that: The aligning the at least two paths of first data respectively to obtain a plurality of first codewords corresponding to the at least two paths of first data respectively comprises: Aligning the at least two paths of first data respectively, and deinterleaving the alignment results; A plurality of first code words corresponding to the at least two paths of first data are respectively obtained according to the deinterleaving result.

8. The method according to any one of claims 1 to 7, characterized in that: The transmitting the at least one second data comprises: Inserting a training sequence and / or a pilot symbol into the at least one channel of second data, and transmitting the at least one channel of second data into which the training sequence and / or the pilot symbol is inserted.

9. The method according to any one of claims 1 to 8, characterized in that: The first data includes an alignment mark AM, and the AM is used to align at least one path of the first data. Before merging the decoded at least two paths of the first data to obtain the third data, the method further includes: AM in the decoded data is deleted.

10. The method according to any one of claims 1 to 9, characterized in that: The obtaining at least one path of second data according to the plurality of second code words comprises: The second codeword is interleaved to obtain the at least one channel of second data.

11. The method according to claim 10, characterized in that Interleaving the second codeword to obtain the at least one second data includes: The second codeword is interleaved or inter-lane interleaved to obtain the at least one channel of second data.

12. The method according to any one of claims 1 to 11, characterized in that: The rate of the first data is 400 Gb / s or 200 Gb / s or 100 Gb / s, and the rate of the second data is 800 Gb / s or 1.6 Terabit / s.

13. The method according to any one of claims 1 to 11, characterized in that: The at least two paths of first data include 8 paths of 100 Gb / s data.

14. A method for data transmission, characterized in that: The method comprises: Acquire at least one path of second data, where the at least one path of second data is data obtained by converting at least two paths of first data, and the first data is data encoded using a first forward error correction code FEC code type; Performing conversion processing on the at least one channel of second data to obtain the at least one channel of first data; The at least one second data is data obtained by converting at least two first data and includes: Aligning the at least two paths of first data respectively, and obtaining a plurality of first codewords corresponding to the at least two paths of first data respectively; Decoding the plurality of first code words corresponding to the at least two paths of first data respectively; Merging the decoded at least two paths of first data to obtain third data; Encoding the decoded third data according to a second FEC code type to obtain a plurality of second code words; At least one channel of second data is obtained according to the multiple second code words.

15. The method according to claim 14, characterized in that The obtaining at least one path of second data according to the plurality of second code words comprises: The second codeword is interleaved to obtain the at least one channel of second data.

16. A data transmission device, characterized in that: The device is used to perform the method according to any one of claims 1 to 13.

17. A data transmission device, characterized in that: The device is used to perform the method according to claim 14 or 15.

18. An optical module, characterized in that: The optical module is used to perform the method according to any one of claims 1 to 15.

19. A data transmission system, characterized in that: The data transmission system includes a first data transmission device and a second data transmission device, wherein the first data transmission device is used to execute the method according to any one of claims 1 to 13, and the second data transmission device is used to execute the method according to claim 14 or 15.

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