Method and device for quickly synchronizing OLT (Optical Line Terminal) main board and OLT standby board

Abstract

The invention discloses a rapid synchronization method and device for an OLT (Optical Line Terminal) main board and an OLT standby board, and the method comprises the following steps: mounting a memory on a preset mainboard, and writing configuration data into the memory; when the preset mainboard is abnormal, switching the memory and mounting the memory on a pre-equipment board; and completing synchronization between the preset mainboard and the pre-equipment board according to the configuration data. According to the invention, the synchronization efficiency of the OLT main and standby boards can be improved.

Description

Technical Field

[0001] The present invention relates to the field of optical fiber access communication, and in particular to a method and device for fast synchronization of an OLT main and standby board. Background Art

[0002] In the application of PON (Passive Optical Network) technology, OLT (Optical Line Terminal) equipment is an important local-end equipment, and its functions are:

[0003] 1. Connect to the front-end (aggregation layer) switch with a network cable, convert it into an optical signal, and interconnect it with the optical splitter at the user end with a single optical fiber.

[0004] 2. Realize functions such as control, management, and ranging of user-end equipment ONU.

[0005] In existing OLT equipment, active-standby switching is a common OLT uplink protection solution. The idea is to perform redundant backup of the active OLT and the standby OLT. When the active OLT fails or communication is interrupted, the traffic is automatically switched to the standby OLT to ensure network continuity. The existing active-standby switching can be achieved in two ways: static switching and dynamic switching.

[0006] Static switching means that the main and backup OLTs are configured in advance, and the equipment monitors the status of the main OLT in real time through the monitoring system. Once a fault is found, the switching operation is immediately triggered to switch the traffic to the backup OLT. Although this method is simple, it requires manual configuration and operation, and has high technical requirements for network maintenance personnel.

[0007] Dynamic switching means that the OLT device automatically senses the failure of the main OLT and triggers the switching operation. In dynamic switching, the system will monitor the status of the main OLT in real time through heartbeat packets or other methods. Once an abnormality is detected in the main OLT, it will immediately switch to the backup OLT. Dynamic switching can reduce manual intervention and improve system reliability and availability.

[0008] However, although dynamic switching can improve the efficiency of switching to a certain extent, the existing OLT master-slave synchronization method still has the following disadvantages:

[0009] 1. Efficiency issue: Network synchronization is easily affected by fluctuations in the network environment. In particular, network synchronization cannot be performed when there is a power outage or when the network cannot be connected.

[0010] 2. Security issues: Information configured via network protocols may contain sensitive data, such as API keys or passwords. Without encryption, there may be a risk of leakage;

[0011] 3. Performance overhead: Network synchronization operations take a certain amount of time to upload and download configurations, which may affect work efficiency, especially when the configuration file is large. Summary of the invention

[0012] In order to overcome the defects of the prior art, the present invention provides a method and device for fast synchronization of an OLT master and standby boards, which can improve the synchronization efficiency of the OLT master and standby boards.

[0013] An embodiment of the present invention provides a method for fast synchronization of an OLT master and standby board, comprising the following steps:

[0014] Mounting a memory on a preset mainboard and writing configuration data into the memory;

[0015] When an abnormal situation occurs in the preset mainboard, the memory is switched and mounted to the pre-equipment board;

[0016] According to the configuration data, synchronization between the preset main board and the pre-equipment board is completed.

[0017] Furthermore, the configuration data is specifically necessary data for the operation of the OLT device, including but not limited to: service configuration of the optical network unit, working status of the optical network unit, user configuration and authority, and matching rule configuration of the switching chip.

[0018] Furthermore, the abnormal conditions include: the fluctuation range of the power supply exceeds the preset stable range, the optical fiber connection line and the power line are not properly connected or are damaged, the OLT device temperature exceeds the preset temperature threshold, firmware errors, software errors, and attacks by abnormal messages.

[0019] Furthermore, the switching and mounting of the memory to the pre-device board specifically includes:

[0020] When an abnormality occurs in the preset mainboard, the interface of the memory is switched from the preset mainboard to the pre-equipment board through the CPLD;

[0021] After the interface of the memory is switched to the pre-device board, the memory is mounted on the pre-device board through a hot-swap driver.

[0022] Further, completing the synchronization of the preset main board and the pre-equipment board according to the configuration data specifically includes:

[0023] The configuration data is input from the memory into the pre-equipment board to complete the configuration and status synchronization between the preset main board and the pre-equipment board.

[0024] Preferably, while switching the interface of the memory from the preset main board to the pre-equipment board through CPLD, it also includes:

[0025] By configuring the master-slave identification bit of the CPLD, the preset main board and the pre-equipment board are inverted, so that the preset main board is converted into a new spare board, and the pre-equipment board is converted into a new main board.

[0026] Preferably, after the inversion is completed, the method further comprises:

[0027] The abnormality of the new spare board is repaired, and the abnormality of the new main board is monitored in real time. When an abnormality occurs in the new main board, the memory is switched and mounted on the new spare board.

[0028] Another embodiment of the present invention provides a fast synchronization device for an OLT master and standby board, comprising: a configuration module, a switching module, and a synchronization module;

[0029] The configuration module is used to mount a memory on a preset mainboard and write configuration data into the memory;

[0030] The switching module is used to switch and mount the memory to the pre-equipment board when an abnormal situation occurs in the preset main board;

[0031] The synchronization module is used to complete the synchronization between the preset main board and the pre-equipment board according to the configuration data.

[0032] Furthermore, the switching module is used to switch and mount the memory to the pre-device board when an abnormal situation occurs in the preset main board, specifically including:

[0033] When an abnormality occurs in the preset mainboard, the interface of the memory is switched from the preset mainboard to the pre-equipment board through the CPLD;

[0034] After the interface of the memory is switched to the pre-device board, the memory is mounted on the pre-device board through a hot-swap driver.

[0035] Further, the synchronization module is used to complete the synchronization between the preset main board and the pre-equipment board according to the configuration data, specifically including:

[0036] The configuration data is input from the memory into the pre-equipment board to complete the configuration and status synchronization between the preset main board and the pre-equipment board.

[0037] Compared with the prior art, the beneficial effects of this application are:

[0038] By switching the memory interface through hardware to achieve the synchronization of the master and standby boards of the OLT device, it is not dependent on the network connection, so that the synchronization method described in the present application can still work normally in an environment where the network is unstable or cannot be connected, thereby reducing the network performance cost of synchronization and improving the efficiency of the master and standby board synchronization. In addition, due to the non-volatile characteristics of the memory, the present application also has certain advantages in data security compared with the prior art. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 A schematic flow chart of a method for rapid synchronization of an OLT master and standby boards provided in one embodiment of the present invention.

[0040] Figure 2 This is a hardware diagram of an OLT device provided in this embodiment when it is working normally.

[0041] Figure 3 A hardware schematic diagram of a FLASH memory after switching from a main board to a standby board provided in this embodiment.

[0042] Figure 4 A schematic structural diagram of a fast synchronization device for an OLT master and standby board provided in another embodiment of the present invention. DETAILED DESCRIPTION

[0043] The drawings are for illustrative purposes only and should not be construed as limiting the present patent;

[0044] It is understandable to those skilled in the art that some well-known structures and their descriptions may be omitted in the drawings.

[0045] The technical solution of the present invention is further described below in conjunction with the accompanying drawings and embodiments.

[0046] Reference Figure 1 , is a flow chart of a method for rapid synchronization of an OLT master and standby board provided by an embodiment of the present invention, comprising the following steps:

[0047] S1: Mounting a memory on a preset mainboard and writing configuration data into the memory;

[0048] S2: When an abnormality occurs to the preset mainboard, the memory is switched and mounted to the pre-equipment board;

[0049] S3: According to the configuration data, the synchronization between the preset main board and the pre-equipment board is completed.

[0050] For step S1, specifically, the configuration data is the necessary data for the operation of the OLT device, including but not limited to: service configuration of the optical network unit, working status of the optical network unit, user configuration and authority, and matching rule configuration of the switching chip.

[0051] In a preferred embodiment, referring to Figure 2 , is a hardware schematic diagram of an OLT device provided in this embodiment when it is working normally. Figure 2 It can be seen that when the preset mainboard of the OLT device works normally, a FLASH memory will be mounted on the preset mainboard, and the necessary data for operation such as configuration and operation status, i.e., the configuration data, will be written into the memory. For example, the service configuration of the ONU (Optical Network Unit) on the OLT, the working status of the ONU, and other information, as well as the user configuration and authority of the management protocol on the OLT, the matching rule configuration of the switching chip, etc., can all be mapped to the FLASH memory through memory.

[0052] In addition to writing to the FLASH memory, configuration data can also be written to the database, as well as other similar practices for placing data in the process space.

[0053] For step S2, specifically, the abnormal conditions include: the fluctuation range of the power supply exceeds the preset stable range, the optical fiber connection line and the power line are not properly connected or are damaged, the OLT device temperature exceeds the preset temperature threshold, firmware error, software error and being attacked by abnormal messages.

[0054] In a preferred embodiment, abnormal situations often occur during the active and standby work of the OLT. Common abnormal situations include:

[0055] 1) Power supply abnormality: The OLT equipment is not powered on normally and the power supply is unstable.

[0056] 2) Connection abnormality: The physical connection, including the optical fiber connection and the power cord, is not connected correctly or is damaged.

[0057] 3) Overheating anomalies: OLT equipment may overheat during operation due to insufficient cooling, resulting in random restarts, speed restrictions, and abnormal behavior.

[0058] 4) Firmware Errors: Errors in the firmware may cause connection interruptions, authentication failures, and other issues.

[0059] 5) Software error: Work abnormality caused by non-standard code and lack of consideration.

[0060] 6) Network attack: The network device OLT may be attacked by abnormal messages, such as SNMP trap attacks, which may cause the OLT to be out of control or the main control panel to hang.

[0061] For step S2, further, switching and mounting the memory to the pre-device board specifically includes:

[0062] When an abnormality occurs in the preset mainboard, the interface of the memory is switched from the preset mainboard to the pre-equipment board through the CPLD;

[0063] After the interface of the memory is switched to the pre-device board, the memory is mounted on the pre-device board through a hot-swap driver.

[0064] In a preferred embodiment, CPLD (Complex Programmable Logic Device) is an integrated circuit that allows users to construct logic functions according to their needs. CPLD consists of a programmable interconnect matrix unit surrounded by programmable logic macro units. These macro units have a complex structure and a complex I / O unit interconnection structure. Users can generate specific circuit structures according to their needs to complete certain functions.

[0065] The working principle of CPLD is based on programming technologies such as CMOS EPROM, EEPROM, flash memory and SRAM, forming a high-density, high-speed and low-power programmable logic device. They are usually used to implement large-scale combinational logic. Due to its continuous wiring structure, the timing delay of CPLD is uniform and predictable, which makes CPLD very useful in applications that require stable timing.

[0066] CPLD development usually involves designing logic circuits using hardware description languages ​​such as Verilog or VHDL, which are then compiled, simulated, and programmed using an integrated development environment such as Quartus II or ISE. The programming information of a CPLD can be stored in an EEPROM or FLASH memory, which prevents the programming information from being lost when the system is powered off, and the CPLD can be programmed up to 10,000 times.

[0067] By controlling the interface switching of the FLASH memory at the hardware level through CPLD, the actual effect achieved is similar to transferring the disk of one PC to another PC in a very short time. At this time, the system on the motherboard is equivalent to uninstalling the FLASH file system and cannot write data again, and only runs in the existing process data state.

[0068] At the same time, the system on the standby board detects the access to the FLASH memory and mounts it so that the program can run normally after reading the configuration data. In Linux systems, mounting is a process of associating storage devices (such as hard disks, partitions, USB drives, CD-ROMs, etc.) with file system structures. In this way, users can access and use data on storage devices. The following are some common Linux mounting methods:

[0069] Temporary mount: Use the mount command to temporarily mount a device. For example: sudo mount / dev / sdb1 / mnt.

[0070] Permanent mount: Permanent mount can be achieved by modifying the / etc / fstab file. Add a line of configuration in / etc / fstab to specify the device, mount point, file system type, mount options, etc.

[0071] The mounting mode does not affect the performance, so in this preferred embodiment, the hot-swap mode is selected to mount the FLASH memory.

[0072] For step S3, specifically, completing the synchronization of the preset main board and the pre-equipment board according to the configuration data specifically includes:

[0073] The configuration data is input from the memory into the pre-equipment board to complete the configuration and status synchronization between the preset main board and the pre-equipment board.

[0074] In a preferred embodiment, referring to Figure 3 , is a hardware schematic diagram of a FLASH memory after switching from a main board to a standby board provided in this embodiment. Figure 3 It can be seen that when the FLASH memory interface is switched and the standby board completes the mounting of the FLASH memory, the configuration data originally written in the FLASH memory can be input into the standby board, so that the standby board can continue to operate the OLT device according to the configuration data. Thus, the main and standby boards complete the synchronization of configuration and status.

[0075] Further preferably, while switching the interface of the memory from the preset main board to the pre-device board through CPLD, it also includes:

[0076] By configuring the master-slave identification bit of the CPLD, the preset main board and the pre-equipment board are inverted, so that the preset main board is converted into a new spare board, and the pre-equipment board is converted into a new main board.

[0077] In a preferred embodiment, by configuring the master-slave identification bit on the CPLD, the master and standby boards can be inverted, that is, the original main board becomes the standby board, and the original standby board becomes the main board. The original main board program checks the master-slave identification bit and runs the code logic of the standby board, for example, no longer allowing customers to add new configurations.

[0078] Further preferably, after the inversion is completed, the method further comprises:

[0079] The abnormality of the new spare board is repaired, and the abnormality of the new main board is monitored in real time. When an abnormality occurs in the new main board, the memory is switched and mounted on the new spare board.

[0080] In a preferred embodiment, when the main and standby boards are inverted, the new main board continues to monitor abnormalities in real time, and after an abnormality occurs on the new main board, the fast synchronization method of the OLT main and standby boards described in this application is re-executed to switch the FLASH memory and mount it on the new standby board. The premise of the switching is that the abnormality of the new standby board has been eliminated.

[0081] Reference Figure 4 , is a structural diagram of a fast synchronization device of an OLT master and standby board provided by another embodiment of the present invention, comprising: a configuration module 101, a switching module 102 and a synchronization module 103;

[0082] The configuration module 101 is used to mount a memory on a preset mainboard and write configuration data into the memory;

[0083] The switching module 102 is used to switch and mount the memory to the pre-equipment board when an abnormal situation occurs in the preset main board;

[0084] The synchronization module 103 is used to complete the synchronization between the preset main board and the pre-equipment board according to the configuration data.

[0085] Furthermore, the switching module 102 is used to switch and mount the memory to the pre-device board when an abnormal situation occurs in the preset main board, specifically including:

[0086] When an abnormality occurs in the preset mainboard, the interface of the memory is switched from the preset mainboard to the pre-equipment board through the CPLD;

[0087] After the interface of the memory is switched to the pre-device board, the memory is mounted on the pre-device board through a hot-swap driver.

[0088] Further, the synchronization module 103 is used to complete the synchronization between the preset main board and the pre-equipment board according to the configuration data, specifically including:

[0089] The configuration data is input from the memory into the pre-equipment board to complete the configuration and status synchronization between the preset main board and the pre-equipment board.

[0090] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the embodiments here. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the claims of the present invention.

Claims

1. A fast synchronization method for an OLT master and standby board, characterized in that: The steps include: Mounting a memory on a preset mainboard and writing configuration data into the memory; When an abnormal situation occurs in the preset mainboard, the memory is switched and mounted to the pre-equipment board; According to the configuration data, synchronization between the preset main board and the pre-equipment board is completed.

2. The fast synchronization method of the OLT master and standby boards according to claim 1, characterized in that: The configuration data is specifically necessary data for the operation of the OLT device, including but not limited to: service configuration of the optical network unit, working status of the optical network unit, user configuration and authority, and matching rule configuration of the switching chip.

3. The fast synchronization method of the OLT master and standby boards according to claim 1, characterized in that: The abnormal conditions include: the fluctuation range of the power supply exceeds the preset stable range, the optical fiber connection line and the power line are not properly connected or are damaged, the OLT device temperature exceeds the preset temperature threshold, firmware errors, software errors, and attacks by abnormal messages.

4. The fast synchronization method of the OLT master and standby boards according to claim 1, characterized in that: The switching and mounting of the memory to the pre-device board specifically includes: When an abnormality occurs in the preset mainboard, the interface of the memory is switched from the preset mainboard to the pre-equipment board through the CPLD; After the interface of the memory is switched to the pre-device board, the memory is mounted on the pre-device board through a hot-swap driver.

5. The fast synchronization method of the OLT master and standby boards according to claim 1, characterized in that: The step of completing synchronization between the preset main board and the pre-equipment board according to the configuration data specifically includes: The configuration data is input from the memory into the pre-equipment board to complete the configuration and status synchronization between the preset main board and the pre-equipment board.

6. The fast synchronization method of the OLT master and standby boards according to claim 4, characterized in that: While switching the interface of the memory from the preset main board to the pre-equipment board through the CPLD, the method further includes: By configuring the master-slave identification bit of the CPLD, the preset main board and the pre-equipment board are inverted, so that the preset main board is converted into a new spare board, and the pre-equipment board is converted into a new main board.

7. The fast synchronization method of the OLT master and standby boards according to claim 6, characterized in that: After the inversion is completed, it also includes: The abnormality of the new spare board is repaired, and the abnormality of the new main board is monitored in real time. When an abnormality occurs in the new main board, the memory is switched and mounted on the new spare board.

8. A fast synchronization device for an OLT master and standby board, characterized in that: include: Configuration module, switching module and synchronization module; The configuration module is used to mount a memory on a preset mainboard and write configuration data into the memory; The switching module is used to switch and mount the memory to the pre-equipment board when an abnormal situation occurs in the preset main board; The synchronization module is used to complete the synchronization between the preset main board and the pre-equipment board according to the configuration data.

9. The fast synchronization device of the OLT master and standby boards according to claim 8, characterized in that: The switching module is used to switch and mount the memory to the pre-device board when an abnormal situation occurs in the preset main board, and specifically includes: When an abnormality occurs in the preset mainboard, the interface of the memory is switched from the preset mainboard to the pre-equipment board through the CPLD; After the interface of the memory is switched to the pre-device board, the memory is mounted on the pre-device board through a hot-swap driver.

10. The fast synchronization device of the OLT master and standby boards according to claim 8, characterized in that: The synchronization module is used to complete the synchronization between the preset main board and the pre-equipment board according to the configuration data, specifically including: The configuration data is input from the memory into the pre-equipment board to complete the configuration and status synchronization between the preset main board and the pre-equipment board.

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