Method, system and apparatus for intra prediction

Abstract

Methods, systems, and apparatus for intra prediction are disclosed. The prediction method applied to the video decoder comprises the following steps: decoding an intra-frame prediction mode from a bit stream; and performing intra fusion prediction on the current block to obtain a prediction block, where the intra fusion prediction includes predicting the current block based on the plurality of reference sample rows and the intra prediction mode. A prediction method applied to a video encoder includes: performing intra fusion prediction on a current block to obtain a prediction block, where the intra fusion prediction includes predicting the current block based on a plurality of reference sample rows and an intra prediction mode; and encoding the intra prediction mode into the bitstream.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to U.S. Provisional Application No. 63 / 369,057, filed on July 21, 2022, entitled “INTRA FUSION FOR VIDEO CODING,” which is incorporated herein by reference in its entirety. Technical Field

[0003] The present disclosure relates to the field of augmented reality (AR) and / or video technology, and more specifically, to a method, system, and apparatus for intra-frame prediction, which can provide at least one improvement for intra-frame fusion used for video coding (including video encoding and / or video decoding). Background Art

[0004] A video is a collection of points in a three-dimensional space. These points may correspond to points on an object in the three-dimensional space. Therefore, a video can be used to represent the physical content of the three-dimensional space. Videos may be useful in various situations. For example, a video may be used in the case of an autonomous vehicle to represent the position of an object on a road. In another example, a video may be used to represent the physical content of an environment to locate virtual objects in an augmented reality (AR) application or a mixed reality (MR) application. Video compression is the process of encoding and decoding (including encoding and / or decoding) a video. Encoding a video can reduce the amount of data required for the storage and transmission of the video.

[0005] In the prior art, intra-frame fusion may use a first reference line and a second reference to generate a first prediction block and a second prediction block, respectively, which may bring additional burden to the decoder. The second reference line is farther from the current block, which may require an additional line buffer. In addition, two prediction blocks (i.e., a first prediction block and a second prediction block) are first generated using two reference lines (i.e., a first reference line and a second reference line) and the same given intra-frame mode, and then fused. Generating prediction blocks based on reference lines is a complex operation because interpolation filtering may be required when sample values ​​at non-integer positions in the reference line are required. The need for two prediction blocks significantly increases the complexity. In addition, there is no intra-frame fusion for chroma blocks, and the overall encoding and decoding performance needs to be further improved. Therefore, a method, system, and apparatus for intra-frame prediction are needed, which can provide at least one improvement in intra-frame fusion for video encoding and decoding (including video encoding and / or video decoding). Summary of the invention

[0006] The purpose of the present disclosure is to propose a method, system and apparatus for intra-frame prediction, which can provide at least one improvement in intra-frame fusion for video coding and decoding (including video encoding and / or video decoding), improve the burden on a decoder (such as a video decoding device or a video decoder), and / or improve coding and decoding performance.

[0007] In a first aspect of the present disclosure, a prediction method applied to a video decoder includes: decoding an intra-frame prediction mode from a bit stream, and performing intra-frame fusion prediction on a current block to obtain a prediction block, wherein the intra-frame fusion prediction includes predicting the current block based on multiple reference sample rows and the intra-frame prediction mode.

[0008] In a second aspect of the present disclosure, a prediction method applied to a video encoder includes: performing intra-frame fusion prediction on a current block to obtain a prediction block, wherein the intra-frame fusion prediction includes predicting the current block based on multiple reference sample rows and an intra-frame prediction mode; and encoding the intra-frame prediction mode into a bitstream.

[0009] In a third aspect of the present disclosure, a prediction method applied to a video codec includes: performing intra-frame fusion prediction on a current block to obtain a prediction block, wherein the intra-frame fusion prediction includes predicting the current block based on multiple reference sample rows and an intra-frame prediction mode; and encoding the intra-frame prediction mode into a bitstream or decoding the intra-frame prediction mode from the bitstream.

[0010] In a fourth aspect of the present disclosure, a video decoder includes: a decoder configured to decode an intra-frame prediction mode from a bit stream; and a prediction circuit configured to perform intra-frame fusion prediction on a current block to obtain a prediction block, wherein the intra-frame fusion prediction includes predicting the current block based on multiple reference sample rows and the intra-frame prediction mode.

[0011] In a fifth aspect of the present disclosure, a video encoder comprises: a prediction circuit configured to perform intra-frame fusion prediction on a current block to obtain a prediction block, wherein the intra-frame fusion prediction comprises predicting the current block based on multiple reference sample rows and an intra-frame prediction mode; and an encoder configured to encode the intra-frame prediction mode into a bitstream.

[0012] In a sixth aspect of the present disclosure, a video codec includes: a prediction circuit configured to perform intra-frame fusion prediction on a current block to obtain a prediction block, wherein the intra-frame fusion prediction includes predicting the current block based on multiple reference sample rows and an intra-frame prediction mode; and a codec configured to encode the intra-frame prediction mode into a bitstream or decode the intra-frame prediction mode from the bitstream.

[0013] In a seventh aspect of the present disclosure, a video decoding device includes a memory, a transceiver, and a processor coupled to the memory and the transceiver. The processor is configured to execute the above-mentioned video decoding method.

[0014] In an eighth aspect of the present disclosure, a video encoding device includes a memory, a transceiver, and a processor coupled to the memory and the transceiver. The processor is configured to execute the above-mentioned video encoding method.

[0015] In a ninth aspect of the present disclosure, a video coding and decoding device includes a memory, a transceiver, and a processor coupled to the memory and the transceiver. The processor is configured to execute the above-mentioned video coding and decoding method.

[0016] In a tenth aspect of the present disclosure, a non-transitory machine-readable storage medium stores instructions, which, when executed by a computer, prompt the computer to execute the above method.

[0017] In an eleventh aspect of the present disclosure, a chip includes a processor configured to call and run a computer program stored in a memory to prompt a device equipped with the chip to execute the above method.

[0018] In a twelfth aspect of the present disclosure, a computer-readable storage medium stores a computer program for causing a computer to execute the above method.

[0019] In a thirteenth aspect of the present disclosure, a computer program product includes a computer program, and the computer program causes a computer to execute the above method.

[0020] In a fourteenth aspect of the present disclosure, a computer program causes a computer to execute the above method. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the embodiments of the present disclosure or related technologies, the following drawings to be described in the embodiments are briefly introduced. Obviously, these drawings are only some embodiments of the present disclosure, and ordinary technicians in this field can obtain other drawings based on these drawings without paying any prerequisites.

[0022] Figure 1 is a schematic block diagram showing an example of a geometry video coding (G-PCC) system configured to implement some embodiments presented herein.

[0023] Figure 2 is a schematic block diagram showing an example of a G-PCC encoder configured to implement some embodiments presented herein.

[0024] Figure 3 is a schematic block diagram showing an example of a G-PCC decoder configured to implement some embodiments presented herein.

[0025] Figure 4 is a schematic structural diagram of an octree structure of a G-PCC and a corresponding digital representation according to some embodiments of the present disclosure.

[0026] Figure 5 is a schematic structural diagram of the structure of a cube and its relationship with adjacent cubes according to some embodiments of the present disclosure.

[0027] Figure 6 is a block diagram illustrating an example of a video encoder configured to implement some embodiments presented herein.

[0028] Figure 7 is a block diagram illustrating an example of a video decoder configured to implement the embodiments presented herein.

[0029] Figure 8 Depicted are examples of coding tree unit partitioning of images in a video according to some embodiments of the present disclosure.

[0030] Fig. 9 Depicted are examples of coding unit partitioning of a coding tree unit (CTU) according to some embodiments of the present disclosure.

[0031] Fig.10 Depicted are examples of a current block and reconstructed samples that are spatially adjacent and non-adjacent to the current block according to some embodiments of the present disclosure.

[0032] Fig.11 Examples of angular mode and wide-angle intra prediction (WAIP) mode are depicted according to some embodiments of the present disclosure.

[0033] Fig.12 is a block diagram showing an example of a video codec according to an embodiment of the present application.

[0034] Fig.13 is a block diagram showing an example of a coding and decoding device according to an embodiment of the present disclosure.

[0035] Fig.14 is a flowchart of an example of a prediction method applied to a video codec according to an embodiment of the present disclosure.

[0036] Fig.15 is a block diagram showing an example of a video encoder according to an embodiment of the present application.

[0037] Fig.16 is a block diagram of an example of an encoding device according to an embodiment of the present disclosure.

[0038] Fig.17 is a flowchart of an example of a prediction method applied to a video encoder according to an embodiment of the present disclosure.

[0039] Fig.18 is a block diagram showing an example of a video decoder according to an embodiment of the present application.

[0040] Fig.19 is a block diagram of an example of a decoding device according to an embodiment of the present disclosure.

[0041] Fig. 20 is a flowchart of an example of a prediction method applied to a video decoder according to an embodiment of the present disclosure.

[0042] Fig.21 is a block diagram of an example of a computing device according to an embodiment of the present disclosure.

[0043] Fig. 22 is a block diagram of a communication system according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0044] The following is a detailed description of the embodiments of the present disclosure in terms of technical content, structural features, achieved goals and effects with reference to the accompanying drawings. Specifically, the terms in the embodiments of the present disclosure are only for the purpose of describing specific embodiments and do not limit the present disclosure.

[0045] In some embodiments of the present disclosure, coding refers to encoding and / or decoding, and more specifically, refers to a coding and / or decoding method, system or device.

[0046] Various embodiments may provide quantization for video coding. More and more video data is being generated, stored and transmitted. It is advantageous to improve the codec performance of video coding technology, so that less data is used to represent the video without compromising the visual quality of the decoded video. One aspect of improving codec performance in some embodiments is to improve the quantization scheme of video coding. Recent video coding standards (such as versatile video coding (VVC)) have adopted quantization techniques. Some embodiments improve codec performance by providing some intra-frame fusion methods for intra-frame prediction of video coding. The methods proposed in some embodiments may be used in future video coding standards. Through the implementation of the methods proposed in some embodiments, it is considered to modify the bitstream structure, syntax, constraints and mapping used to generate decoded images for standardization. These techniques may be effective coding tools in future video coding standards.

[0047] Geometric video codec (G-PCC) is widely used in virtual reality / augmented reality / mixed reality (VR / AR / MR) for entertainment applications and industrial applications (for example, light detection and ranging (LiDAR) scanning compression for cars or robots and high definition (HD) maps for navigation). The Moving Picture Experts Group (MPEG) has released the first version of the G-PCC standard, and the audio video coding standard (AVS) is also developing the G-PCC standard. In order to efficiently compress video data, the geometric structure of the video is first compressed, and the corresponding attributes are compressed based on the geometric information, and the corresponding attributes include color and / or reflectivity, etc. Figure 1 A geometric video coding and decoding (G-PCC) system 100 is shown in FIG. 1 , which includes a G-PCC encoder 200 and / or a G-PCC decoder 300 .

[0048] Figure 1 An overview of a G-PCC system 100 is provided, which includes a G-PCC encoder 200 and / or a G-PCC decoder 300 configured to implement some embodiments presented herein. The G-PCC system 100 is configured to implement some embodiments of the present disclosure. Figure 2A G-PCC encoder 200 is provided that is configured to implement some embodiments presented herein. The G-PCC encoder 200 is configured to implement some embodiments of the present disclosure. Figure 3 A G-PCC decoder 300 is provided which is configured to implement some embodiments presented herein. The G-PCC decoder 300 is configured to implement some embodiments of the present disclosure. Figure 1 , Figure 2 ,as well as Figure 3 The modules shown in are logical. Some embodiments of the present disclosure may be implemented as a G-PCC system 100, a G-PCC encoder 200, and / or a G-PCC decoder 300 using any appropriately configured hardware and / or software. In both the G-PCC encoder 200 and the G-PCC decoder 300, the video position is first encoded and decoded. The attribute encoding and decoding depends on the geometric structure of the decoding. At least one module (such as Figure 1 and Figure 2 The analysis surface approximation of the G-PCC encoder shown and / or RAHT (region adaptive hierarchical transform), and / or Figure 1 and Figure 3 The synthetic surface approximation and / or RAHT of the G-PCC decoder shown is an option for Category 1 data. At least one module (such as Figure 1 and Figure 2 The G-PCC encoder shown generates LOD (level of detail) and / or lifts, and / or Figure 1 and Figure 3 The G-PCC decoder shown generates LOD and / or inverse lifting) is an option for type 3 data. All other modules are common between type 1 and type 3.

[0049] For type 3 data, the compressed geometry can be represented as an octree from the root down to the leaf level for each voxel. For type 1 data, the compressed geometry can be represented by a pruned octree (i.e., an octree from the root down to the leaf level for blocks larger than a voxel) plus a model that approximates the surfaces within each leaf of the pruned octree. In this way, both type 1 and type 3 data share the octree codec mechanism, while type 1 data can additionally utilize a surface model to approximate the voxels within each leaf. The surface model used is a triangulation with 1 to 10 triangles per block, resulting in a triangle soup. Therefore, the type 1 geometry codec is called the Trisoup geometry codec, while the type 3 geometry codec is called the Octree geometry codec.

[0050] There are 3 attribute codec methods in G-PCC: Region Adaptive Hierarchical Transform (RAHT) codec, interpolation-based hierarchical nearest neighbor prediction (prediction transform), and interpolation-based hierarchical nearest neighbor prediction with an update / lifting step (lifting transform). RAHT and lifting are used for type 1 data, while prediction is used for type 3 data. However, any method can be used for any data, just like with the geometry codec in G-PCC, and users have the option to choose which of the 3 attribute codecs they want to use.

[0051] The axis-aligned bounding box of the cube consists of two extreme points (0,0,0) and (2 d ,2 d ,2 d ), where d is the maximum size of a given video along the x, y, or z direction. The points of a video can be recorded as Figure 4 The points shown in . All points are included in the defined cube. The cube is divided into eight child cubes, creating an octree structure that allows one parent cube to have 8 child cubes. The 7 sibling cubes of a given cube are cubes of the same size and share at least one common face / edge / point with the given cube. The volume of a cube is 1 / 8 of the volume of its parent cube. A cube can contain more than one point, and the number of points in a cube depends on the size and position of the cube. For a given video, the size of the smallest cube is predefined. As an example, a minimum cube can be defined. For a given point, the parent cube of the given point is defined as the cube of the smallest size that contains the given point. The sibling points of a given point are defined as those points that have the same parent cube as the given point.

[0052] Figure 4 The octree structure of G-PCC and the corresponding digital representation are demonstrated. An octree is a recursive data structure that can be used to describe a three-dimensional space in which each internal cube has exactly eight sub-cubes. The space is recursively subdivided into eight octants until a point (the smallest element that is not further subdivided), where the resolution of the sub-cube is equal to the size of the point. To represent the cube, an 8-bit binary code following a space-filling zigzag pattern (Hilbert, Morton) is used, and each sub-cube is assigned a value of "1" or "0" to indicate whether the space in the sub-cube has any points associated with the sub-cube, or whether the sub-cube is empty. Only occupied sub-cubes are further subdivided. The process of subdividing the parent cube terminates when the size of the sub-cube becomes equal to the size of the indivisible element (i.e., the spatial resolution of the video, or simply, the size of the point).

[0053] Figure 5 shows the structure of the cube and its relationship to neighboring cubes. Depending on the current position of the cube, a cube may have up to six cubes of the same size that share a face, such as Figure 5 As shown. In addition, the current cube may also have some neighboring cubes that share rows or points with the current cube. Similarly, the parent cube of the current cube also has at most six neighboring cubes, which are the same size as the parent cube and share a face with the parent cube. The parent cube of the current cube also has at most twelve neighboring cubes, which are the same size as the parent cube and share edges. The parent cube of the current cube also has at most eight neighboring cubes, which are the same size as the parent cube and share points with the parent cube.

[0054] Octree-based geometric information can be encoded and decoded using context-based arithmetic coding. There may also be some corresponding attribute information of the video (including color, reflectivity, etc.) that needs to be compressed. Since neighboring points in the video may have a strong correlation, prediction-based coding methods have been developed and used to synthesize and codec video attributes. More specifically, predictions are formed based on neighboring coded attributes. Further, the difference between the current attribute and the prediction is encoded and decoded.

[0055] Figure 6 is a block diagram illustrating an example of a video encoder 600 configured to implement the embodiments presented herein. Figure 6 In some examples shown in , the video encoder 600 includes a partition module 612, a transform module 614, a quantization module 615, an inverse quantization module 618, an inverse transform module 619, an in-loop filter module 620, an intra-frame prediction module 626, an inter-frame prediction module 624, a motion estimation module 622, a decoded image buffer 630, and an entropy coding module 616.

[0056] The input of the video encoder 600 is an input video 602 containing a sequence of pictures (also referred to as frames or images). In a block-based video encoder, for each of a plurality of pictures, the video encoder 600 uses a partitioning module 612 to partition the picture into blocks 604, and each block contains a plurality of pixels. These blocks can be macroblocks, coding tree units, coding units, prediction units, and / or prediction blocks. An image can include blocks of different sizes, and the block partitioning of different pictures of the video may also be different. Each block can be encoded using different predictions (such as intra-frame prediction, or inter-frame prediction, or mixed intra-frame and inter-frame prediction).

[0057] The first image of the video signal may be an intra-predicted image, and the first image may be encoded using only intra-prediction. In intra-prediction mode, blocks of the image may be predicted using only data from the same image. The intra-predicted image may be decoded without requiring information from other images. To perform intra-prediction, Figure 6 The video encoder 600 shown may employ an intra prediction module 626. The intra prediction module 626 is configured to generate an intra prediction block (prediction block 634) using reconstructed samples in a reconstruction block 636 of a neighboring block of the same image. Intra prediction is performed according to an intra prediction mode selected for the block. The video encoder 600 then calculates the difference between the block 604 and the intra prediction block 634. The difference is referred to as a residual block 606.

[0058] To further remove redundancy from the block, the residual block 606 is transformed into a transform domain by applying a transform to the samples in the block through a transform module 614. Examples of transforms may include, but are not limited to, a discrete cosine transform (DCT) or a discrete sine transform (DST). The transformed values ​​may be referred to as transform coefficients, which represent the residual block in the transform domain. In some examples, the residual block may be directly quantized without being transformed through the transform module 614. This is referred to as a transform skip mode.

[0059] The video encoder 600 may also quantize the transform coefficients using a quantization module 615 to obtain quantized coefficients. Quantization includes dividing the sample by the quantization step size and then performing subsequent rounding. In some examples, inverse quantization involves multiplying the quantized value by the quantization step size. Such a quantization process is referred to as scalar quantization. Quantization is used to reduce the dynamic range of (transformed or untransformed) video samples so that fewer bits are used to represent the video samples.

[0060] The quantization of coefficients / samples within a block can be done independently, and this quantization method is used in some current video compression standards (such as H.264 and high efficiency video coding (HEVC). For N by M blocks, the 2D (2-dimensional) coefficients of the block can be converted into a 1D (1-dimensional) array using a specific scan order for coefficient quantization and encoding and decoding. The quantization of coefficients within a block can utilize scan order information. For example, the quantization of a given coefficient in a block can depend on the state of the previous quantized value along the scan order. To further improve the encoding and decoding efficiency, more than one quantizer can be used. Which quantizer is used to quantize the current coefficient depends on the information that precedes the current coefficient in the encoding / decoding scan order. This type of quantization method is called correlated quantization.

[0061] The quantization step size can be used to adjust the degree of quantization. For example, for scalar quantization, different quantization step sizes can be applied to achieve finer or coarser quantization. A smaller quantization step size corresponds to finer quantization, while a larger quantization step size corresponds to coarser quantization. The quantization step size can be indicated by a quantization parameter (QP). The quantization parameter is provided in the encoded bitstream of the video so that the video decoder can apply the same quantization parameter for decoding.

[0062] Then, the quantized samples are encoded by the entropy coding module 616 to further reduce the size of the video signal. The entropy coding module 616 is configured to apply an entropy coding algorithm to the quantized samples. Examples of entropy coding algorithms include, but are not limited to, variable length coding (VLC) schemes, context adaptive VLC schemes (CAVLC), arithmetic coding schemes, binarization, context adaptive binary arithmetic coding (CABAC), syntax-based context-adaptive binary arithmetic coding (SBAC), probability interval partitioning entropy (PIPE) coding or other entropy coding techniques. The entropy coded data is added to the bitstream of the output coded video 632.

[0063] A reconstructed block 636 from a neighboring block is used in intra prediction of a block of an image. Generating a reconstructed block 636 of a block involves calculating a reconstructed residual of the block. The reconstructed residual can be determined by applying inverse quantization and inverse transform to the quantized residual of the block. The inverse quantization module 618 is configured to apply inverse quantization to the quantized samples to obtain inverse quantized coefficients. The inverse quantization module 618 applies the inverse of the quantization scheme applied by the quantization module 615 by using the same quantization step size as the quantization module 615. The inverse transform module 619 is configured to apply the inverse transform (such as inverse DCT or inverse DST) of the transform applied by the transform module 614 to the inverse quantized samples. The output of the inverse transform module 619 is the reconstructed residual of the block in the pixel domain. The reconstructed residual can be added to the prediction block 634 of the block to obtain the reconstructed block 636 in the pixel domain. For blocks where the transform is skipped, the inverse transform module 619 is not applied to these blocks. The inverse quantized samples are the reconstructed residuals of these blocks.

[0064] Blocks in subsequent images following the first intra-predicted image may be encoded and decoded using inter-prediction or intra-prediction. In inter-prediction, predictions of blocks in an image are based on one or more previously encoded video images. To perform inter-prediction, the video encoder 600 uses an inter-prediction module 624. The inter-prediction module 624 is configured to perform motion compensation on the blocks based on the motion estimate provided by the motion estimation module 622.

[0065] The motion estimation module 622 compares the current block 604 of the current image with the decoded reference image 608 for motion estimation. The decoded reference image 608 is stored in the decoded image buffer 630. The motion estimation module 622 selects a reference block that best matches the current block from the decoded reference image 608. The motion estimation module 622 also identifies the offset between the position (e.g., x coordinate, y coordinate) of the reference block and the position of the current block. The offset is called a motion vector (MV) and is provided to the inter-frame prediction module 624. In some cases, multiple reference blocks are identified for the block in multiple decoded reference images 608. Therefore, multiple motion vectors are generated and provided to the inter-frame prediction module 624.

[0066] The inter prediction module 624 uses the motion vector(s) and other inter prediction parameters together to perform motion compensation to generate a prediction of the current block (i.e., the inter prediction block 634). For example, based on the motion vector(s), the inter prediction module 624 can locate the prediction block(s) pointed to by the motion vector(s) in the corresponding reference image(s). If there is more than one prediction block, the prediction blocks are combined with some weights to generate the prediction block 134 of the current block.

[0067] For an inter-frame prediction block, the video encoder 600 can subtract the inter-frame prediction block 634 from the block 604 to generate a residual block 606. The residual block 606 can be transformed, quantized, and entropy encoded in the same manner as the residual of the intra-frame prediction block discussed above. Similarly, by inverse quantizing, inverse transforming, and then combining the residual with the corresponding prediction block 634, a reconstructed block 636 of the inter-frame prediction block can be obtained.

[0068] To obtain a decoded image 608 for motion estimation, the reconstructed block 636 is processed by an in-loop filter module 620. The in-loop filter module 620 is configured to smooth pixel transitions, thereby improving video quality. The in-loop filter module 620 may be configured to implement one or more in-loop filters (such as a deblocking filter, or a sample-adaptive offset (SAO) filter, or an adaptive loop filter (ALF), etc.).

[0069] Figure 7 An example of a video decoder 700 configured to implement the embodiments presented herein is depicted. The video decoder 700 processes the encoded video 702 in a bitstream and generates a decoded image 708. Figure 7 In some examples shown in , the video decoder 700 includes an entropy decoding module 716, an inverse quantization module 718, an inverse transform module 719, an in-loop filter module 720, an intra-frame prediction module 726, an inter-frame prediction module 724, and a decoded image buffer 730.

[0070] The entropy decoding module 716 is configured to perform entropy decoding on the encoded video 702. The entropy decoding module 716 decodes the quantized coefficients, the encoding and decoding parameters including the intra-frame prediction parameters and the inter-frame prediction parameters, and other information. The entropy decoded coefficients are then inversely quantized by the inverse quantization module 718 and then inversely transformed to the pixel domain by the inverse transform module 719. The inverse quantization module 718 and the inverse transform module 719 are respectively similar to those described above with respect to Figure 6 The inverse quantization module 618 and the inverse transform module 619 operate similarly. The inverse transformed residual block can be added to the corresponding prediction block 734 to generate a reconstructed block 736. For blocks that skipped the transform, the inverse transform module 719 is not applied to these blocks. The inverse quantized samples generated by the inverse quantization module 618 are used to generate the reconstructed block 736.

[0071] A prediction block 734 of a specific block is generated based on the prediction mode of the specific block. If the codec parameters of the block indicate that the block is intra-predicted, a reconstructed block 736 of a reference block in the same image may be fed into the intra-prediction module 726 to generate the prediction block 734 of the block. If the codec parameters of the block indicate that the block is inter-predicted, the prediction block 734 is generated by the inter-prediction module 724. The intra-prediction module 726 and the inter-prediction module 724 are respectively connected to Figure 6 The intra prediction module 626 and the inter prediction module 624 operate similarly.

[0072] Inter-frame prediction involves one or more reference images. The video decoder 700 generates a decoded image 708 of the reference image by applying the in-loop filter module 720 to the reconstructed block of the reference image. The decoded image 708 is stored in a decoded image buffer 730 for use and output by the inter-frame prediction module 724.

[0073] Reference Figure 8 , Figure 8 Depicted is an example of coding tree unit partitioning of an image in a video according to some embodiments of the present disclosure. Figure 6 and Figure 7 As discussed, in order to encode an image of a video, the image is divided into blocks, such as CTU (Coding Tree Unit) 802 in VVC, as shown in FIG. Figure 8 As shown in Figure 8. Similar to other video codecs such as HEVC, VVC is a block-based hybrid spatial and temporal prediction codec. During encoding and decoding, the input image is first divided into square blocks called CTU 802, as shown in Figure 8. Figure 8 For example, CTU 802 may be a block of 128×128 pixels.

[0074] In order (such as Figure 8 In some examples, each CTU 802 in the image may be partitioned into one or more CUs (coding units) 902, such as Fig. 9 As shown, one or more CUs 902 may be used for prediction and transformation. Depending on the coding scheme, CTU 802 may be partitioned into CUs 802 differently. For example, unlike HEVC, in VVC, CU 902 may be rectangular or square and may be encoded without further partitioning into prediction units or transformation units. Fig. 9 As shown, each CU 902 can be as large as its root CTU 802, or a subdivision of the root CTU 802 as small as 4×4 blocks. Figure 8 As shown, in VVC, the division of CTU802 into CU902 may be quadtree division, binary tree division or ternary tree division. Fig. 9In FIG, the solid line indicates a quadtree partition, and the dashed line indicates a binary tree partition.

[0075] Related Quantification

[0076] As mentioned above about Figure 6 and Figure 7 As discussed, quantization is used to reduce the dynamic range of elements of blocks in a video signal so that fewer bits are used to represent the video signal. In some examples, before quantization, the elements at specific positions of the block are referred to as coefficients. After quantization, the quantized value of the coefficient is referred to as the quantization level or level. Quantization usually consists of dividing by the quantization step size and then rounding, while inverse quantization consists of multiplying by the quantization step size. This type of quantization process is also called scalar quantization. The quantization of coefficients within a block can be performed independently, and this independent quantization method is used in some existing video compression standards (such as H.264, HEVC, etc.). In other examples (such as in VVC), correlated quantization is used.

[0077] VVC can be employed with a number of new coding and decoding tools, details of which are described in some embodiments.

[0078] 1) Angular intra prediction with 65 angles and 4-tap interpolation filter: Angular intra prediction with 65 different directions is enabled. In the prediction generation, two types of 4-tap interpolation and smoothing filters are used.

[0079] 2) Wide-angle intra prediction (WAIP): For the newly added non-square / rectangular intra block shapes, in addition to the prediction modes enabled for square blocks, an angular intra prediction mode with a wider prediction angle is added.

[0080] 3) Position dependent prediction combination (PDPC): filtering with spatially varying weights is applied to blocks using planar mode and DC mode as well as certain angular modes.

[0081] 4) Multiple reference line (MRL) prediction: Reconstructed samples used as reference samples in angular prediction mode and DC prediction mode can be obtained based on samples of two or three rows located on the left and above the block.

[0082] 5) Intra subpartition (ISP) mode: Intra prediction blocks can be subdivided horizontally or vertically into smaller blocks called subpartitions. On each subpartition, prediction and transform coding operations are performed separately, but intra modes are shared across all subpartitions.

[0083] 6) Matrix-Based Intra Prediction (MIP): Intra prediction samples may be generated by a mode that performs downsampling on reference samples, matrix-vector multiplication, and upsampling on the results.

[0084] 7) Cross component linear model (CCLM): The chrominance components of a block can be predicted based on the parallel reconstructed luminance samples through a linear model, and the parameters of the linear model are derived from the reconstructed luminance samples and chrominance samples adjacent to the block.

[0085] 8) Intra-mode encoding and decoding with 6 MPMs: Planar mode is a most probable mode (MPM) and is encoded and decoded first by a separate flag. Direct current (DC) mode and angular mode are encoded and decoded using a list of the remaining five MPMs derived from the intra-modes of neighboring blocks.

[0086] Intra-frame prediction and enhanced compression model (ECM) in VVC

[0087] For an intra CU, the current block can be predicted using spatially neighboring reconstructed samples, and the intra mode is signaled once for the entire CU. Intra prediction and transform coding and decoding are performed at the transform block (TB) level. Each CU consists of a single TB, except for the intra sub-partitioning (ISP) mode and implicit partitioning. For the luma CU, the maximum side length of the TB is 64, and the minimum side length is 4. In addition, the luma TB is further specified as a W×H rectangular block with a width of W and a height of H, where W, H∈{4,8,16,32,64}. For the chroma CU, the maximum TB side length is 32, and the chroma TB is a rectangular W×H block with a width of W and a height of H. Here, W, H∈{2,4,8,16,32}, but blocks of 2×H and 4×2 shapes are excluded to address storage architecture and throughput requirements.

[0088] In VVC, reference samples are used to generate intra-frame prediction samples for the current block. The reference samples are obtained from reconstructed samples of neighboring blocks. For a W×H block, the reference samples are spatially adjacent to the current block and consist of a vertical row of 2·H reconstructed samples extending downward to the left of the block, a reconstructed sample to the upper left, and a horizontal row of 2·W reconstructed samples extending to the right above the current block. In the present disclosure, this "L"-shaped sample set may be referred to as a "reference row". The reference row directly adjacent to the current block is Fig.10 is shown as the row with index 0. Fig.10 Depicted are examples of a current block and reconstructed samples that are spatially adjacent and non-adjacent to the current block according to some embodiments of the present disclosure. Fig.10 , shows the current CU block and reconstructed samples that are spatially adjacent and non-adjacent to the current block, where numbers 0, 1, 2, etc. are indexes of pixel rows.

[0089] Fig.11 Examples of angle modes and wide-angle intra prediction (WAIP) modes according to some embodiments of the present disclosure are depicted. Similar to advanced video coding (AVC) and HEVC, VVC also supports angle intra prediction modes. AVC may refer to a video codec in which a video sequence is encoded as a base layer and one or more scalable enhancement layers. Angular intra prediction is a directional intra prediction method. Compared to HEVC, the angle intra prediction of VVC is modified by improving the prediction accuracy and adapting to the new partition framework. The former is achieved by increasing the number of angle prediction directions and by a more accurate interpolation filter, while the latter is achieved by introducing a wide-angle intra prediction mode. In VVC, the number of directional modes available for a given block is increased from 33 HEVC directions to 65 directions. Fig.11 The angular modes of VVC are depicted in . Directions with even indices between 2 and 66 are equivalent to the directions of the angular modes supported in HEVC. For square-shaped blocks, the same number of angular modes are assigned to the top and left side of the block. On the other hand, rectangular-shaped intra blocks, which do not exist in HEVC, are a central part of VVC's partitioning scheme, where additional intra prediction directions are assigned to the longer edges of the block. Since the additional modes assigned along the longer edges correspond to prediction directions with an angle greater than 45 degrees with respect to the horizontal or vertical modes, the additional modes assigned along the longer edges are called WAIP modes. A WAIP mode for a given mode index is defined by mapping the original directional mode to a mode with the opposite direction and an index offset equal to one, as Fig.11 For a given rectangular block, the aspect ratio (ie, the ratio of width to height) is used to determine which angle modes will be replaced by the corresponding wide-angle modes.

[0090] For square-shaped blocks in VVC, each pair of horizontally or vertically adjacent prediction samples is predicted based on a pair of adjacent reference samples. In contrast, WAIP extends the angular range of directional prediction to more than 45 degrees, so that for coding blocks predicted using WAIP mode, adjacent prediction samples can be predicted based on non-adjacent reference samples.

[0091] In addition to the directly adjacent rows of neighboring samples, Fig.10One of the two non-adjacent reference lines (line 1 and line 2) depicted in FIG may comprise an input for intra prediction in VVC. For the enhanced compression model (ECM), more non-adjacent reference lines may be used. The use of adjacent and non-adjacent reference samples is called multiple reference line (MRL) prediction.

[0092] The intra modes that can be used for MRL are direct current (DC) mode and angular prediction mode. However, not all of these modes can be combined with MRL for a given block. The MRL mode is combined with the most probable mode (MPM) in VVC. This combination means that if non-adjacent reference lines are used, the intra prediction mode is one of multiple MPMs. The motivation for the design of such MPM-based MRL prediction modes lies in the observation that non-adjacent reference lines mainly favor texture patterns with sharp and strongly directional edges. In these cases, MPM is selected more frequently because there is usually a strong correlation between the texture pattern of the neighboring blocks and the texture pattern of the current block. On the other hand, the selection of non-MPM for intra prediction indicates that the edges are not uniformly distributed in the neighboring blocks, so the MRL prediction mode is not expected to be of much use in this case. In addition, it has been observed that MRL does not provide additional coding gain when the intra prediction mode is planar mode because the mode is used for smooth areas.

[0093] Therefore, MRL excludes planar modes, which are one type of MPM. The angular or DC prediction process in MRL is very similar to the case of directly adjacent reference lines. However, for angular modes with non-integer slopes, a DCT-based interpolation filter is always used. This design choice is both validated by experimental results and matches empirical observations, namely, that MRL is most beneficial for sharp and strongly directional edges, among which the discrete cosine transform (DCT) interpolation filter (DCTIF) is more suitable because it retains more high frequencies than the smoothing interpolation filter (SIF).

[0094] From a hardware design perspective, applying multiple reference lines as proposed in the initial approach comes at the cost of additional line buffers that are used to hold the additional reference lines. In current hardware designs, line buffers are part of the on-chip memory architecture for image and video codecs, and minimizing their on-chip area is critical. To address this issue, MRL is disabled for coding units attached to the top boundary of the CTU and is not signaled. In this way, the additional buffers used to hold non-adjacent reference lines are bounded by 128, which is the width of the maximum unit size.

[0095] An intra prediction fusion method is proposed to improve the accuracy of intra prediction. More specifically, if the current block is a luminance block and the current block is encoded and decoded using a non-integer tilt angle mode instead of an ISP mode, and the block size (width*height) is greater than 16, then the two prediction blocks generated from two different reference lines will be "fused", where the fusion is a weighted sum of the two prediction blocks. More specifically, the first reference line at index i (line i ) is specified using the current signaling method in the bitstream, and the prediction block generated from this reference line using the selected intra prediction mode is denoted as p(line i ), where p(·) represents the operation of generating a prediction block based on a reference line using a given intra prediction mode. i+1 is implicitly selected as the second reference line. That is, the second reference line is located at an index position farther from the current block than the first reference line. Similarly, the prediction block generated based on the second reference line is represented as p(line i+1 ). The weighted sum of the two prediction blocks is obtained as follows and used as the prediction value of the current block.

[0096] p fusion =w 0 *p(line i )+w 1 *p(line i+1 ), where p fusion represents the fused prediction, w 0 and w 1 are two weighting factors and are set to 3 / 4 and 1 / 4 respectively in the experiments.

[0097] Some embodiments of the present disclosure propose methods, systems and devices for video coding and decoding, which can provide at least one improvement for intra-frame fusion, thereby providing improved coding and decoding performance for video coding and decoding. At least one proposed solution, method, system and device of some embodiments of the present disclosure can be used for current and / or new / future video coding and decoding standards. Compatible products follow at least one proposed solution, method, system and device of some embodiments of the present disclosure. The proposed solutions, methods, systems and devices are widely used in video coding and decoding products and / or video compression related products. By implementing at least one proposed solution, method, system and device of some embodiments of the present disclosure, at least one modification to the bitstream structure, syntax, constraints and mapping used to generate decoded video is considered for standardization.

[0098] Technical Solutions

[0099] In some embodiments of the present disclosure, some technical solutions / improvements are proposed to improve intra-frame fusion. Intra-frame fusion in the following solution can be as follows: For intra-frame CU, spatial neighboring reconstructed samples can be used to predict the current block, and the intra-frame mode is signaled once for the entire CU. Intra-frame prediction and transform coding and decoding can be performed at the transform block (TB) level.

[0100] Forming a decoding end: The prediction method applied to the video decoder includes: decoding an intra-frame prediction mode from a bit stream; and performing intra-frame fusion prediction on a current block to obtain a prediction block, wherein the intra-frame fusion prediction includes predicting the current block based on multiple reference sample rows and the intra-frame prediction mode.

[0101] Forming an encoding end: A prediction method applied to a video encoder includes: performing intra-frame fusion prediction on a current block to obtain a prediction block, wherein the intra-frame fusion prediction includes predicting the current block based on multiple reference sample rows and an intra-frame prediction mode; and encoding the intra-frame prediction mode into a bitstream.

[0102] Forming a codec end (including encoding and / or decoding): A prediction method applied to a video codec includes: performing intra-frame fusion prediction on a current block to obtain a prediction block, wherein the intra-frame fusion prediction includes predicting the current block based on multiple reference sample rows and an intra-frame prediction mode; and encoding the intra-frame prediction mode into a bit stream or decoding the intra-frame prediction mode from the bit stream.

[0103] Solution 1

[0104] In some examples, intra-frame fusion can be used for integer tilt angle mode (or integer tilt mode). That is, the intra-frame prediction mode includes an integer tilt mode. In some examples, when the intra-frame prediction mode indicates an integer tilt prediction direction, intra-frame fusion prediction is enabled. In addition, in some examples, intra-frame fusion using integer tilt may be subject to some block size restrictions, for example, only allowing the block size (width * height) to be less than N or greater than N. In some examples, N can be equal to 16. In some examples, when the width of the current block, the height of the current block and / or the block size of the current block are within a range of values, intra-frame fusion prediction is enabled based on multiple reference sample rows and intra-frame prediction modes.

[0105] Solution 2

[0106] In some examples, when a first reference line line is specified in a bitstream representing a video by signaling i If it is not the row at index 0, you can select the reference row line i-1 As the second reference line instead of line i+1As a second reference line. The advantage of this solution is that the second reference line is not further away from the block of the video, which may require additional buffering in current technology. The second reference line can be spatially adjacent to the current block. In some examples, the second reference line is spatially closer to the block than the first reference line.

[0107] Then, the fused predictions can be obtained as follows.

[0108] p fusion =w 0 *p(line i )+w 1 p(line i-1 )

[0109] p fusion represents the fused prediction, w 0 and w 1 is the weighting factor, p(line i ) indicates that intra-frame fusion is used according to the reference line i The operation of generating the first prediction block, and p(line i-1 ) indicates that intra-frame fusion is used according to the reference line i-1 The operation of generating the second prediction block. 0 is set to 3 / 4, and w 1 is set to 1 / 4. The fusion can be a weighted sum of multiple prediction blocks.

[0110] In some examples, p fusion Use the line from the first block (such as p(line i )) and at least one sample from a second block (such as p(line i-1 )) to generate a block. The first block p(line i ) uses the line from the first reference line i At least one sample of the second block (line i-1 ) using the second reference line i-1 In some examples, if i is equal to 2, then the reference index of the first reference row is equal to 2 and the reference index of the second reference row is equal to 1.

[0111] In some examples, if the reference index of the first reference row is equal to 0, then the reference index of the second reference row is equal to 1.

[0112] In some examples, predicting the current block based on multiple reference sample rows and intra prediction modes further includes: determining multiple prediction blocks by performing predictions based on multiple reference sample rows, respectively, so that each prediction block is determined based on each reference sample row, wherein the multiple reference sample rows are spatially adjacent to each other; and fusing the multiple prediction blocks into the current block. The fusion may be a weighted sum of the multiple prediction blocks.

[0113] Solution 3:

[0114] Instead of using a fusion of two prediction blocks generated from two given reference lines using a given intra prediction mode, in the present solution a fusion of the reference lines is first performed and then the fused reference lines are used to generate a prediction block using a given intra prediction mode. fusion Denotes the fused reference row. Generating a prediction block from reference rows is an expensive operation as it may involve interpolation filtering. The advantage of this solution is that the generation of a prediction block from the fused reference rows is performed only once, no matter how many reference rows are fused.

[0115] As an example, line fusion =w 0 *line i +w 1 *line i+1 As another example, line fusion =w 0 *line i +w 1 *line i-1 As another example, line fusion =w 0 *line i +w 1 *line i+1 +w 2 *line i-1 .

[0116] line fusion represents the reference line of the fusion, and w 0 、w 1 and w 2 is the weighting factor.

[0117] Some examples use reference lines from Fusion fusion At least one sample is used to generate a block, and the reference line of the fusion fusion Use samples from multiple reference lines. In some examples, the fused reference line fusion is spatially adjacent to the block, and all multiple reference lines i and line i-1) is spatially adjacent to the block. In some examples, the fused reference line fusion is spatially adjacent to the block and one of the reference lines i-1 ) is spatially far away from the block.

[0118] In some examples, predicting the current block based on multiple reference sample rows and intra prediction modes further includes: fusing the multiple reference sample rows into a fused reference sample row; and predicting the current block based on the fused reference sample row. The fusion may be a weighted sum of the multiple reference sample rows.

[0119] Solution 4

[0120] When the chroma is not encoded or decoded according to CCCM (convolutional cross-component model) or CCLM mode, it can be used Fig.11 The DC mode, planar mode or angle mode shown in the figure is used for encoding and decoding. The present solution proposes to use the intra-frame prediction fusion method for the chroma block as well. More specifically, if the current chroma block is encoded and decoded using a non-integer tilt angle mode, and the block size (width * height) is greater than N, for example, N is 16, the intra-frame fusion method can be used to predict the current chroma block. In addition, the above solution 1, solution 2 and solution 3 can also be used individually or jointly to encode and decode the current chroma block. In addition, the enabling of the intra-frame fusion method for encoding and decoding intra-frame luminance / chroma can be jointly or individually signaled at different levels (for example, sequence parameter set (SPS) level, picture header (PH) level, picture parameter set (PPS) level and slice header (SH) level).

[0121] Fig.12An example of a video codec 1200 according to an embodiment of the present application is shown. The video codec 1200 is configured to implement some embodiments of the present disclosure. Any suitably configured hardware and / or software may be used to implement some embodiments of the present disclosure in the video encoder 1200. The video encoder 1200 includes a prediction circuit 1201 and a codec 12052, the prediction circuit being configured to perform intra-frame fusion prediction of a current block to obtain a prediction block, wherein the intra-frame fusion prediction includes predicting the current block based on multiple reference sample rows and an intra-frame prediction mode, and the codec is configured to encode the intra-frame prediction mode into a bitstream or decode the intra-frame prediction mode from a bitstream. This can provide at least one improvement for intra-frame fusion for video coding and decoding, improve the burden on a decoder (such as a video decoding device or a video decoder), and / or improve coding and decoding performance.

[0122] Fig.13An example of a video codec device 1300 according to an embodiment of the present disclosure is shown. The video codec device 1300 is configured to implement some embodiments of the present disclosure. Some embodiments of the present disclosure may be implemented in the codec device 1300 using any suitably configured hardware and / or software. The video codec device 1300 may include a memory 1301, a transceiver 1302, and a processor 1303 coupled to the memory 1301 and the transceiver 1302. The processor 1303 may be configured to implement the proposed functions, processes and / or methods described in this specification. The layers of the wireless interface protocol may be implemented in the processor 1303. The memory 1301 is operatively coupled to the processor 1303 and stores various information to operate the processor 1303. The transceiver 1302 is operatively coupled to the processor 1303, and the transceiver 1302 sends and / or receives wireless signals. The processor 1303 may include an application-specific integrated circuit (ASIC), other chipsets, logic circuits and / or data processing devices. The memory 1301 may include a read-only memory (ROM), a random access memory (RAM), a flash memory, a memory card, a storage medium and / or other storage devices. The transceiver 1302 may include a baseband circuit for processing a radio frequency signal. When the embodiment is implemented in software, the technology described herein may be implemented using modules (e.g., programs, functions, etc.) that perform the functions described herein. These modules may be stored in the memory 1301 and executed by the processor 1303. The memory 1301 may be implemented within the processor 1303, or implemented outside the processor 1303, in which case the memory 1301 may be communicatively coupled to the processor 1303 by various means known in the art.

[0123] In some embodiments, the processor 1303 is configured to: perform intra-frame fusion prediction on the current block to obtain a prediction block, wherein the intra-frame fusion prediction includes predicting the current block based on multiple reference sample rows and an intra-frame prediction mode; and encode the intra-frame prediction mode into a bitstream or decode the intra-frame prediction mode from the bitstream. This can provide at least one improvement for intra-frame fusion for video coding and decoding, improve the burden on a decoder (such as a video decoding device or a video decoder), and / or improve coding and decoding performance.

[0124] Fig.14is an example of a prediction method 1400 applied to a video codec according to an embodiment of the present disclosure. The prediction method 1400 applied to a video codec is configured to implement some embodiments of the present disclosure. Any suitably configured hardware and / or software may be used to implement some embodiments of the present disclosure in the prediction method 1400 applied to a video codec. In some embodiments, the prediction method 1400 applied to a video codec includes: operation 1402, performing intra-frame fusion prediction of a current block to obtain a prediction block, wherein the intra-frame fusion prediction includes predicting the current block based on multiple reference sample rows and an intra-frame prediction mode; and operation 1404, encoding the intra-frame prediction mode into a bitstream or decoding the intra-frame prediction mode from a bitstream. This can provide at least one improvement for intra-frame fusion for video coding and decoding, improve the burden on a decoder (such as a video decoding device or a video decoder), and / or improve coding and decoding performance.

[0125] In some embodiments, the intra prediction mode includes an integer oblique mode. In some embodiments, when the intra prediction mode indicates an integer oblique prediction direction, intra fusion prediction is enabled. In some embodiments, when the width of the current block, the height of the current block, and / or the block size of the current block are within a range of values, intra fusion prediction is enabled based on multiple reference sample rows and the intra prediction mode.

[0126] In some embodiments, predicting the current block based on multiple reference sample rows and the intra prediction mode further includes: determining multiple prediction blocks by performing predictions based on multiple reference sample rows respectively, so that each prediction block is determined based on each reference sample row, wherein the multiple reference sample rows are spatially adjacent to each other; and fusing the multiple prediction blocks into the current block. In some examples, the fusion may be a weighted sum of the multiple prediction blocks. In some embodiments, the method further includes: encoding information into a bitstream or decoding information from a bitstream, wherein the information indicates an index of a reference sample row in the multiple reference sample rows. In some embodiments, the one reference sample row in the multiple reference sample rows is spatially more adjacent to the current block than another reference sample row in the multiple reference sample rows. In some embodiments, the one reference sample row in the multiple reference sample rows is spatially adjacent to the current block, and another reference sample row in the multiple reference sample rows is spatially adjacent to the current block. In some embodiments, another reference sample row in the multiple reference sample rows is spatially more adjacent to the current block than the one reference sample row in the multiple reference sample rows. In some embodiments, another reference sample row of the plurality of reference sample rows is spatially adjacent to the current block, and the one reference sample row of the plurality of reference sample rows is spatially adjacent to the current block. In some embodiments, the plurality of reference sample rows are spatially adjacent to the current block.

[0127] In some examples, the plurality of reference sample rows include a first reference sample row and a second reference sample row, and the method further includes: decoding information from a bitstream or encoding information into a bitstream, wherein the information indicates an index of the first reference sample row. In some examples, if the index is equal to 0, the second reference sample row is a reference sample that is spatially adjacent to the first reference sample row and far from the current block. In some examples, if the index is greater than 0, the second reference sample row is a reference sample that is spatially adjacent to the first reference sample row and close to the current block.

[0128] In some embodiments, predicting the current block based on multiple reference sample rows and the intra prediction mode further includes: fusing the multiple reference sample rows into a fused reference sample row; and predicting the current block based on the fused reference sample row. In some examples, the fusion may be a weighted sum of the multiple reference sample rows.

[0129] In some embodiments, the method further includes: enabling intra-frame fusion prediction for encoding and decoding the luminance component and / or chrominance component of the current block based on the information; and encoding the information into the bitstream or decoding the information from the bitstream. In some embodiments, enabling intra-frame fusion prediction for encoding and decoding the luminance component and / or chrominance component of the current block is performed at at least one level. In some embodiments, when intra-frame fusion is used, information for indicating the enabling of intra-frame fusion is set. In some embodiments, the information is encoded at at least one level. In some embodiments, at least one level includes a sequence parameter set (SPS) level, a picture header (PH) level, a picture parameter set (PPS) level, and / or a slice header (SH) level. In some embodiments, the current block includes a chrominance block and / or at least one luminance block.

[0130] Fig.15 An example of a video encoder 1500 according to an embodiment of the present application is shown. The video encoder 1500 is configured to implement some embodiments of the present disclosure. Any suitably configured hardware and / or software may be used to implement some embodiments of the present disclosure in the video encoder 1500. The video encoder 1500 includes a prediction circuit 1501 and an encoder 1502, the prediction circuit being configured to perform intra-frame fusion prediction of a current block to obtain a prediction block, wherein the intra-frame fusion prediction includes predicting the current block based on multiple reference sample rows and an intra-frame prediction mode, and the encoder is configured to encode the intra-frame prediction mode into a bitstream. This can provide at least one improvement for intra-frame fusion for video coding, improve the burden on a decoder (such as a video decoding device or a video decoder), and / or improve coding performance.

[0131] Fig.16An example of a coding device 1600 according to an embodiment of the present disclosure is shown. The coding device 1600 is configured to implement some embodiments of the present disclosure. Some embodiments of the present disclosure may be implemented in the coding device 1600 using any suitably configured hardware and / or software. The coding device 1600 may include a memory 1601, a transceiver 1602, and a processor 1603 coupled to the memory 1601 and the transceiver 1602. The processor 1603 may be configured to implement the proposed functions, processes and / or methods described in this specification. The layers of the wireless interface protocol may be implemented in the processor 1603. The memory 1601 is operatively coupled to the processor 1603 and stores various information to operate the processor 1603. The transceiver 1602 is operatively coupled to the processor 1603, and the transceiver 1602 sends and / or receives wireless signals. The processor 1603 may include an application specific integrated circuit (ASIC), other chipsets, logic circuits and / or data processing devices. The memory 1601 may include a read-only memory (ROM), a random access memory (RAM), a flash memory, a memory card, a storage medium, and / or other storage devices. The transceiver 1602 may include a baseband circuit for processing radio frequency signals. When the embodiment is implemented in software, the technology described herein may be implemented using modules (e.g., programs, functions, etc.) that perform the functions described herein. These modules may be stored in the memory 1601 and executed by the processor 1603. The memory 1601 may be implemented within the processor 1603, or implemented outside the processor 1603, in which case the memory 1601 may be communicatively coupled to the processor 1603 by various means known in the art.

[0132] In some embodiments, the processor 1603 is configured to: perform intra-frame fusion prediction on the current block to obtain a prediction block, wherein the intra-frame fusion prediction includes predicting the current block based on multiple reference sample rows and an intra-frame prediction mode; and encoding the intra-frame prediction mode into a bitstream. This can provide at least one improvement for intra-frame fusion for video coding, improve the burden on a decoder (such as a video decoding device or a video decoder), and / or improve coding performance.

[0133] Fig.17is an example of a prediction method 1700 applied to a video encoder according to an embodiment of the present disclosure. The prediction method 1700 applied to a video encoder is configured to implement some embodiments of the present disclosure. Any suitably configured hardware and / or software may be used to implement some embodiments of the present disclosure in the prediction method 1700 applied to a video encoder. In some embodiments, the prediction method 1700 applied to a video encoder includes: operation 1702, performing intra-frame fusion prediction on a current block to obtain a prediction block, wherein the intra-frame fusion prediction includes predicting the current block based on multiple reference sample rows and an intra-frame prediction mode; and operation 1704, encoding the intra-frame prediction mode into a bitstream. This can provide at least one improvement for intra-frame fusion for video coding, improve the burden on a decoder (such as a video decoding device or a video decoder), and / or improve encoding performance.

[0134] In some embodiments, the intra prediction mode includes an integer oblique mode. In some embodiments, when the intra prediction mode indicates an integer oblique prediction direction, intra fusion prediction is enabled. In some embodiments, when the width of the current block, the height of the current block, and / or the block size of the current block are within a range of values, intra fusion prediction is enabled based on multiple reference sample rows and the intra prediction mode.

[0135] In some embodiments, predicting the current block based on multiple reference sample rows and the intra prediction mode further includes: determining multiple prediction blocks by performing predictions based on multiple reference sample rows respectively, so that each prediction block is determined based on each reference sample row, wherein the multiple reference sample rows are spatially adjacent to each other; and fusing the multiple prediction blocks into the current block. In some examples, the fusion can be a weighted sum of the multiple prediction blocks. In some embodiments, the method further includes: encoding information into a bitstream, wherein the information indicates an index of a reference sample row in the multiple reference sample rows. In some embodiments, the one reference sample row in the multiple reference sample rows is spatially more adjacent to the current block than another reference sample row in the multiple reference sample rows. In some embodiments, the one reference sample row in the multiple reference sample rows is spatially adjacent to the current block, and another reference sample row in the multiple reference sample rows is spatially adjacent to the current block. In some embodiments, another reference sample row in the multiple reference sample rows is spatially more adjacent to the current block than the one reference sample row in the multiple reference sample rows. In some embodiments, another reference sample row of the plurality of reference sample rows is spatially adjacent to the current block, and the one reference sample row of the plurality of reference sample rows is spatially adjacent to the current block. In some embodiments, the plurality of reference sample rows are spatially adjacent to the current block.

[0136] In some examples, the plurality of reference sample rows include a first reference sample row and a second reference sample row, and the method further includes: encoding information into a bitstream, the information indicating an index of the first reference sample row. In some examples, if the index is equal to 0, the second reference sample row is a reference sample that is spatially adjacent to the first reference sample row and far from the current block. In some examples, if the index is greater than 0, the second reference sample row is a reference sample that is spatially adjacent to the first reference sample row and close to the current block.

[0137] In some embodiments, predicting the current block based on multiple reference sample rows and the intra prediction mode further includes: fusing the multiple reference sample rows into a fused reference sample row; and predicting the current block based on the fused reference sample row. In some examples, the fusion may be a weighted sum of the multiple reference sample rows.

[0138] In some embodiments, the method further comprises: when intra-frame fusion is used, setting information indicating that intra-frame fusion is enabled, and encoding the information into the bitstream. In some embodiments, the information is encoded at at least one level. In some embodiments, the at least one level comprises a sequence parameter set (SPS) level, a picture header (PH) level, a picture parameter set (PPS) level, and / or a slice header (SH) level. In some embodiments, the current block comprises a chroma block and / or at least one luma block.

[0139] Fig.18 An example of a video decoder 1800 according to an embodiment of the present application is shown. The video decoder 1800 is configured to implement some embodiments of the present disclosure. Any suitably configured hardware and / or software may be used to implement some embodiments of the present disclosure in the video decoder 1800. The video decoder 1800 includes a decoder 1802 and a prediction circuit 1801, the decoder being configured to decode an intra-frame prediction mode from a bitstream, and the prediction circuit being configured to perform intra-frame fusion prediction on a current block to obtain a prediction block, wherein the intra-frame fusion prediction includes predicting the current block based on multiple reference sample rows and an intra-frame prediction mode. This can provide at least one improvement for intra-frame fusion for video decoding, improve the burden on a decoder (such as a video decoding device or a video decoder or a video decoder), and / or improve encoding performance.

[0140] Fig.19An example of a video decoding device 1900 according to an embodiment of the present disclosure is shown. The video decoding device 1900 is configured to implement some embodiments of the present disclosure. Some embodiments of the present disclosure may be implemented in the video decoding device 1900 using any suitably configured hardware and / or software. The video decoding device 1900 may include a memory 1901, a transceiver 1902, and a processor 1903 coupled to the memory 1901 and the transceiver 1902. The processor 1903 may be configured to implement the proposed functions, processes and / or methods described in this specification. The layers of the wireless interface protocol may be implemented in the processor 1903. The memory 1901 is operatively coupled to the processor 1903 and stores 19 various information to operate the processor 1903. The transceiver 1902 is operatively coupled to the processor 1903, and the transceiver 1902 sends and / or receives wireless signals. The processor 1903 may include an application specific integrated circuit (ASIC), other chipsets, logic circuits and / or data processing devices. The memory 1901 may include a read-only memory (ROM), a random access memory (RAM), a flash memory, a memory card, a storage medium, and / or other storage devices. The transceiver 1902 may include a baseband circuit for processing radio frequency signals. When the embodiment is implemented in software, the technology described herein may be implemented using modules (e.g., programs, functions, etc.) that perform the functions described herein. These modules may be stored in the memory 1901 and executed by the processor 1903. The memory 1901 may be implemented within the processor 1903, or implemented outside the processor 1903, in which case the memory 1901 may be communicatively coupled to the processor 1903 by various means known in the art.

[0141] In some embodiments, the processor 1903 is configured to: decode the intra prediction mode from the bitstream, and perform intra fusion prediction on the current block to obtain a prediction block, wherein the intra fusion prediction includes predicting the current block based on multiple reference sample rows and the intra prediction mode. This can provide at least one improvement for intra fusion for video decoding, improve the burden on a decoder (such as a video decoding device or a video decoder or a video decoder), and / or improve decoding performance.

[0142] Fig. 20is an example of a prediction method 2000 applied to a video decoder according to an embodiment of the present disclosure. The prediction method 2000 applied to a video decoder is configured to implement some embodiments of the present disclosure. Any suitably configured hardware and / or software may be used to implement some embodiments of the present disclosure in the prediction method 2000 applied to a video decoder. In some embodiments, the prediction method 2000 applied to a video decoder includes: operation 2002, decoding an intra-frame prediction mode from a bitstream; and operation 2004, performing intra-frame fusion prediction on a current block to obtain a prediction block, wherein the intra-frame fusion prediction includes predicting the current block based on multiple reference sample rows and an intra-frame prediction mode. This can provide at least one improvement for intra-frame fusion for video decoding, improve the burden on a decoder (such as a video decoding device or a video decoder or a video decoder), and / or improve decoding performance.

[0143] In some embodiments, the intra prediction mode includes an integer oblique mode. In some embodiments, when the intra prediction mode indicates an integer oblique prediction direction, intra fusion prediction is enabled. In some embodiments, when the width of the current block, the height of the current block, and / or the block size of the current block are within a range of values, intra fusion prediction is enabled based on multiple reference sample rows and the intra prediction mode.

[0144] In some embodiments, predicting the current block based on multiple reference sample rows and the intra prediction mode further includes: determining multiple prediction blocks by performing predictions based on multiple reference sample rows respectively, so that each prediction block is determined based on each reference sample row, wherein the multiple reference sample rows are spatially adjacent to each other; and fusing the multiple prediction blocks into the current block. In some examples, the fusion can be a weighted sum of the multiple prediction blocks. In some embodiments, the method further includes: decoding information from the bitstream, wherein the information indicates an index of a reference sample row in the multiple reference sample rows. In some embodiments, the one reference sample row in the multiple reference sample rows is spatially more adjacent to the current block than another reference sample row in the multiple reference sample rows. In some embodiments, the one reference sample row in the multiple reference sample rows is spatially adjacent to the current block, and another reference sample row in the multiple reference sample rows is spatially adjacent to the current block. In some embodiments, another reference sample row in the multiple reference sample rows is spatially more adjacent to the current block than the one reference sample row in the multiple reference sample rows. In some embodiments, another reference sample row of the plurality of reference sample rows is spatially adjacent to the current block, and the one reference sample row of the plurality of reference sample rows is spatially adjacent to the current block. In some embodiments, the plurality of reference sample rows are spatially adjacent to the current block.

[0145] In some examples, the plurality of reference sample rows include a first reference sample row and a second reference sample row, and the method further includes: decoding information from a bitstream, wherein the information indicates an index of the first reference sample row. In some examples, if the index is equal to 0, the second reference sample row is a reference sample that is spatially adjacent to the first reference sample row and far from the current block. In some examples, if the index is greater than 0, the second reference sample row is a reference sample that is spatially adjacent to the first reference sample row and close to the current block.

[0146] In some embodiments, predicting the current block based on multiple reference sample rows and the intra prediction mode further includes: fusing the multiple reference sample rows into a fused reference sample row; and predicting the current block based on the fused reference sample row. In some examples, the fusion may be a weighted sum of the multiple reference sample rows.

[0147] In some embodiments, the method further includes: decoding information from the bitstream; and enabling intra-frame fusion prediction for decoding the luminance component and / or chrominance component of the current block based on the information. In some embodiments, enabling intra-frame fusion prediction for decoding the luminance component and / or chrominance component of the current block is performed at at least one level. In some embodiments, at least one level includes a sequence parameter set (SPS) level, a picture header (PH) level, a picture parameter set (PPS) level, and / or a slice header (SH) level. In some embodiments, the current block includes a chrominance block and / or at least one luminance block.

[0148] The commercial benefits of some embodiments are as follows. 1. Provide at least one improvement to intra-frame fusion for video encoding and decoding. 2. Improve the burden on decoders (such as video decoding devices or video decoders or video decoders). 3. Improve codec performance. 4. Some embodiments of the present disclosure can be used in many applications. Chipset suppliers, video system development suppliers, vehicle (including cars, trains, trucks, buses, bicycles, motorcycles, and helmets, etc.) manufacturers, drone (unmanned aerial vehicle) manufacturers, smart phone manufacturers, communication equipment manufacturers for public safety purposes, AR / VR / MR (such as games, conferences / seminars, educational purposes) equipment manufacturers use some embodiments of the present disclosure. Some embodiments of the present disclosure are a combination of "techniques / processes" that can be adopted in video standards to create terminal products. Some embodiments of the present disclosure propose technical mechanisms. At least one proposed solution, method, system, and device of some embodiments of the present disclosure can be used for current and / or new / future codec standards. Compatible products follow at least one proposed solution, method, system, and device of some embodiments of the present disclosure. The proposed solutions, methods, systems, and devices of some embodiments of the present disclosure are widely used in video codec products and / or video compression related products.

[0149] Fig.21 is an example of a computing device 2100 according to an embodiment of the present disclosure. Any suitable computing device may be used to perform the operations described herein. For example, Fig.21 An example of a computing device 2100 is shown, which may be implemented using any suitably configured hardware and / or software. Figures 1 to 20 The method, system and apparatus for video encoding and decoding (including video encoding and / or video decoding) shown in the figure. In some embodiments, the computing device 2100 may include a processor 2112, which is communicatively coupled to the memory 2114 and executes computer executable program code and / or accesses information stored in the memory 2114. The processor 2112 may include a microprocessor, an application specific integrated circuit ("ASIC"), a state machine, or other processing device. The processor 2112 may include any number of processing devices (including one processing device). Such a processor may include a computer-readable medium storing instructions or may communicate with a computer-readable medium storing instructions, which, when executed by the processor 2112, causes the processor to perform the operations described herein.

[0150] Memory 2114 may include any suitable non-transient computer readable medium. Computer readable medium may include any electronic, optical, magnetic or other storage device capable of providing computer readable instructions or other program codes to the processor. Non-limiting examples of computer readable medium include disks, memory chips, read-only memories (ROMs), random access memories (RAMs), application specific integrated circuits (ASICs), configured processors, optical storage devices, tapes or other magnetic storage devices, or any other medium from which a computer processor can read instructions. These instructions may include processor-specific instructions generated by a compiler and / or interpreter according to a code written in any suitable computer programming language (including, for example, C, C++, C#, visual basic, java, python, perl, javascript, and actionscript).

[0151] The computing device 2100 may also include a bus 2116. The bus 2116 may communicatively couple one or more components of the computing device 2100. The computing device 2100 may also include a plurality of external or internal devices, such as input devices or output devices. For example, the computing device 2100 is shown with an input / output ("I / O") interface 2118, which may receive input from one or more input devices 2120 or provide output to one or more output devices 2122. One or more input devices 2120 and one or more output devices 2122 may be communicatively coupled to the I / O interface 2118. The communicatively coupling may be achieved via any suitable means (e.g., via a connection of a printed circuit board, via a connection of a cable, via communication via wireless transmission, etc.). Non-limiting examples of the input device 2120 include a touch screen (e.g., one or more cameras for imaging a touch area or a pressure sensor for detecting pressure changes caused by a touch), a mouse, a keyboard, or any other device that may be used to generate input events in response to a physical action of a user of the computing device. Non-limiting examples of output device 2122 include a liquid crystal display (LCD) screen, an external monitor, speakers, or any other device that can be used to display or otherwise present output generated by the computing device.

[0152] The computing device 2100 can execute program code that configures the processor 2112 to perform the above Figures 1 to 21 The program code may include an encoder 2126 and / or a decoder 2128. The encoder 2126 may be a video encoder or a video encoding device in the above embodiments. The decoder 2128 may be a video decoder or a video decoding device in the above embodiments. The program code may be located in the memory 2114 or any suitable computer readable medium, and may be executed by the processor 2112 or any other suitable processor.

[0153] The computing device 2100 may also include at least one network interface device 2124. The network interface device 2124 may include any device or device group suitable for establishing a wired data connection or a wireless data connection with one or more data networks 2128. Non-limiting examples of the network interface device 2124 include an Ethernet network adapter, and / or a modem, etc. The computing device 2100 may send messages as electronic signals or optical signals via the network interface device 2124.

[0154] Fig. 222200 is a block diagram of an example of a communication system 2200 according to an embodiment of the present disclosure. The embodiments described herein may be implemented in the communication system 2200 using any suitably configured hardware and / or software. Fig. 22 A communication system 2200 is shown, which includes a radio frequency (RF) circuit 2210, a baseband circuit 2220, an application circuit 2230, a memory / storage device 2240, a display 2250, a camera 2260, a sensor 2270 and an input / output (I / O) interface 2280, which are coupled to each other at least as shown.

[0155] The application circuit 2230 may include circuits such as, but not limited to, one or more single-core processors or multi-core processors. The processor may include any combination of general-purpose processors and special-purpose processors, such as a graphics processor, an application processor. The processor may be coupled to a memory / storage device and configured to execute instructions stored in the memory / storage device to enable various applications and / or operating systems to run on the system. The communication system 2200 may execute program code that configures the application circuit 2230 to perform the above-mentioned Figures 1 to 20 One or more of the operations described. The program code may reside in the application circuit 2230 or any suitable computer-readable medium and may be executed by the application circuit 2230 or any other suitable processor.

[0156] The baseband circuit 2220 may include circuits, such as but not limited to one or more single-core processors or multi-core processors. The processor may include a baseband processor. The baseband circuit may handle various wireless control functions, and the various wireless control functions may enable communication with one or more wireless networks via RF circuits. The wireless control functions may include but are not limited to signal modulation, encoding, decoding, wireless frequency shifting, etc. In some embodiments, the baseband circuit may provide communications compatible with one or more wireless technologies. For example, in some embodiments, the baseband circuit may support communications with an evolved universal terrestrial radio access network (EUTRAN) and / or other wireless metropolitan area networks (WMAN), wireless local area networks (WLAN), and wireless personal area networks (WPAN). An embodiment in which the baseband circuit is configured to support wireless communications of more than one wireless protocol may be referred to as a multi-mode baseband circuit.

[0157] In various embodiments, the baseband circuit 2220 may include circuits for operating on signals that are not strictly considered to be at baseband frequencies. For example, in some embodiments, the baseband circuit may include circuits for operating on signals having an intermediate frequency (which is between the baseband frequency and the radio frequency). The RF circuit 2210 may use modulated electromagnetic radiation to achieve communication with a wireless network through a non-solid medium. In various embodiments, the RF circuit may include switches, filters, amplifiers, etc. to facilitate communication with a wireless network. In various embodiments, the RF circuit 2210 may include circuits for operating on signals that are not strictly considered to be at radio frequencies. For example, in some embodiments, the RF circuit may include circuits for operating on signals having an intermediate frequency (which is between the baseband frequency and the radio frequency).

[0158] In various embodiments, the above Figures 1 to 20 The transmitter circuit, control circuit or receiver circuit discussed in the system and device for video coding and decoding shown in the above embodiments may be implemented in whole or in part in one or more of the RF circuit, baseband circuit and / or application circuit. As used herein, "circuit" may refer to, be part of or include an application-specific integrated circuit (ASIC) that executes one or more software or firmware programs, an electronic circuit, a processor (shared processor, dedicated processor or processor group) and / or a memory (shared memory, dedicated memory or memory group), a combinational logic circuit and / or other suitable hardware components that provide the described functions. In some embodiments, the electronic device circuit may be implemented in one or more software modules or firmware modules, or the functions associated with the circuit may be implemented by one or more software modules or firmware modules. In some embodiments, some or all of the components of the baseband circuit, application circuit, and / or memory / storage device may be implemented together on a system on a chip (system on a chip, SOC). The memory / storage device 2240 may be used to load and store data and / or instructions, for example, data and / or instructions for the system. The memory / storage of one embodiment may include any combination of suitable volatile memory (such as dynamic random access memory (DRAM)) and / or non-volatile memory (such as flash memory).

[0159] In various embodiments, the I / O interface 2280 may include one or more user interfaces designed to implement the interaction between the user and the system and / or a peripheral component interface designed to implement the interaction between the peripheral component and the system. The user interface may include, but is not limited to, a physical keyboard or key, a touch pad, a speaker, a microphone, etc. The peripheral component interface may include, but is not limited to, a non-volatile memory port, a universal serial bus (universal serial bus, USB) port, an audio jack, and a power interface. In various embodiments, the sensor 2270 may include one or more sensing devices to determine environmental conditions and / or location information related to the system. In some embodiments, the sensor may include, but is not limited to, a gyroscope sensor, an accelerometer, a proximity sensor, an ambient light sensor, and a positioning unit. The positioning unit may also be a part of a baseband circuit and / or an RF circuit, or may interact with a baseband circuit and / or an RF circuit to communicate with a component of a positioning network (e.g., a global positioning system (global positioning system, GPS) satellite).

[0160] In various embodiments, the display 2250 may include a display, such as a liquid crystal display and a touch screen display. In various embodiments, the communication system 2200 may be a mobile computing device, such as but not limited to a laptop computing device, a tablet computing device, a netbook, an ultrabook, a smart phone, AR / VR glasses, etc. In various embodiments, the system may have more or fewer components and / or different architectures. Where appropriate, the method described herein may be implemented as a computer program. The computer program may be stored on a storage medium (such as a non-transient storage medium).

[0161] It is understood by those of ordinary skill in the art that each of the units, algorithms and steps described and disclosed in the embodiments of the present disclosure can be implemented using electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are run on hardware or software depends on the design requirements of the application conditions and technical plans. Those of ordinary skill in the art can use different ways to implement each specific function, and such implementation should not exceed the scope of the present disclosure. It is understood by those of ordinary skill in the art that since the working processes of the above-mentioned systems, devices and units are basically the same, he / she can refer to the working processes of the systems, devices and units in the above-mentioned embodiments. For ease of description and simplicity, these workflows will not be described in detail.

[0162] It is understood that the systems, devices and methods disclosed in the embodiments of the present disclosure may also be implemented in other ways. The above embodiments are exemplary only. The division of units is based only on logical functions, and there are other divisions in implementation. Multiple units or components may be combined or integrated into another system. It is also possible to omit or skip some features. On the other hand, the mutual coupling, direct coupling or communication coupling shown or discussed is operated indirectly or communicatively through some ports, devices or units in an electrical, mechanical or other form.

[0163] The units used for explanation as separate components may or may not be physically separated. The units shown may or may not be physical units, i.e., located in one place or distributed over multiple network units. Some or all of the units are used according to the purpose of the embodiment. In addition, each of the functional units in each of the embodiments may be integrated into one processing unit, be physically independent, or be integrated into one processing unit with two or more units.

[0164] If the software functional unit is implemented as a product and is used and sold, the software functional unit can be stored in a readable storage medium in a computer. Based on this understanding, the technical plan proposed in the present disclosure can be implemented in the form of a software product in general or in part. Alternatively, a part of the technical plan that is beneficial to conventional technology is implemented in the form of a software product. The software product in the computer is stored in a storage medium, including multiple instructions to enable a computing device (such as a personal computer, a server, or a network device) to run all or part of the steps disclosed in the embodiments of the present disclosure. The storage medium includes: a USB disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a floppy disk, or other types of media capable of storing program code.

[0165] While the present disclosure has been described in connection with what is considered to be the most practical and preferred embodiments, it is to be understood that the disclosure is not limited to the disclosed embodiments but is intended to cover various arrangements made without departing from the scope of the broadest interpretation of the appended claims.

Claims

1. A prediction method applied to a video decoder, comprising: Decoding an intra prediction mode from a bitstream; as well as An intra-frame fusion prediction is performed on the current block to obtain a prediction block, wherein the intra-frame fusion prediction includes predicting the current block based on a plurality of reference sample rows and the intra-frame prediction mode.

2. The method according to claim 1, wherein: In case the intra prediction mode indicates an integer oblique prediction direction, the intra fusion prediction is enabled.

3. The method according to claim 2, wherein: In a case where a width of the current block, a height of the current block and / or a block size of the current block are within a range of values, the intra fusion prediction is enabled based on the multiple reference sample rows and the intra prediction mode.

4. The method according to claim 1, wherein: Predicting the current block based on the multiple reference sample rows and the intra prediction mode further includes: Determine a plurality of prediction blocks by performing predictions based on the plurality of reference sample rows, respectively, so that each prediction block is determined based on each reference sample row, wherein the plurality of reference sample rows are spatially adjacent to each other; and The multiple prediction blocks are merged into the current block.

5. The method according to claim 4, wherein: The plurality of reference sample rows include a first reference sample row and a second reference sample row, and the method further includes: decoding information from the bitstream, wherein the information indicates an index of the first reference sample row.

6. The method according to claim 5, wherein: If the index is equal to 0, the second reference sample row is a reference sample that is spatially adjacent to the first reference sample row and is far away from the current block.

7. The method according to claim 5, wherein: If the index is greater than 0, the second reference sample row is a reference sample that is spatially adjacent to the first reference sample row and close to the current block.

8. The method according to any one of claims 1 to 3, wherein: Predicting the current block based on the multiple reference sample rows and the intra prediction mode further includes: Merging the plurality of reference sample rows into a fused reference sample row; and The current block is predicted based on the fused reference sample row.

9. The method according to any one of claims 1 to 8, further comprising: decoding information from the bit stream; as well as Based on the information, intra-frame fusion prediction for decoding the luma component and / or the chroma component of the current block is enabled.

10. The method according to claim 9, wherein: Enabling intra blending for decoding intra luminance and / or intra chrominance on the current block is performed at at least one level.

11. The method according to claim 10, wherein: The at least one level comprises a sequence parameter set SPS level, a picture header PH level, a picture parameter set PPS level and / or a slice header SH level.

12. The method according to any one of claims 1 to 11, wherein: The current block includes a chrominance block and / or at least one luminance block.

13. A prediction method applied to a video encoder, comprising: Performing intra-frame fusion prediction on the current block to obtain a prediction block, wherein the intra-frame fusion prediction includes predicting the current block based on multiple reference sample rows and an intra-frame prediction mode; and The intra prediction mode is encoded into a bitstream.

14. The method according to claim 13, wherein: In case the intra prediction mode indicates an integer oblique prediction direction, the intra fusion prediction is enabled.

15. The method according to claim 14, wherein: In a case where a width of the current block, a height of the current block and / or a block size of the current block are within a range of values, the intra fusion prediction is enabled based on the multiple reference sample rows and the intra prediction mode.

16. The method according to claim 13, wherein: Predicting the current block based on the multiple reference sample rows and the intra prediction mode further includes: Determine a plurality of prediction blocks by performing predictions based on the plurality of reference sample rows, respectively, so that each prediction block is determined based on each reference sample row, wherein the plurality of reference sample rows are spatially adjacent to each other; and The multiple prediction blocks are merged into the current block.

17. The method according to claim 16, wherein: The plurality of reference sample rows include a first reference sample row and a second reference sample row, and the method further includes encoding information indicating an index of the first reference sample row into the bitstream.

18. The method according to claim 17, wherein: If the index is equal to 0, the second reference sample row is a reference sample that is spatially adjacent to the first reference sample row and is far away from the current block.

19. The method according to claim 17, wherein: If the index is greater than 0, the second reference sample row is a reference sample that is spatially adjacent to the first reference sample row and close to the current block.

20. The method according to any one of claims 13 to 15, wherein: Predicting the current block based on the multiple reference sample rows and the intra prediction mode further includes: Merging the plurality of reference sample rows into a fused reference sample row; and The current block is predicted according to the fused reference sample row.

21. The method according to any one of claims 13 to 20, further comprising: When intra-frame fusion is used, setting information for indicating enabling the intra-frame fusion; as well as The information is encoded into the bitstream.

22. The method according to claim 21, wherein: The information is encoded at at least one level.

23. The method according to claim 22, wherein: The at least one level includes a sequence parameter set (SPS) level, a picture header (PH) level, a picture parameter set (PPS) level and / or a slice header (SH) level.

24. The method according to any one of claims 13 to 23, wherein: The current block includes a chrominance block and / or at least one luminance block.

25. A video decoding device, comprising: Memory; Transceiver; as well as a processor coupled to the memory and the transceiver; The processor is configured to execute the method according to any one of claims 1 to 12.

26. A video encoding device, comprising: Memory; Transceiver; as well as a processor coupled to the memory and the transceiver; The processor is configured to execute the method according to any one of claims 13 to 24.

27. A non-transitory machine-readable storage medium having instructions stored thereon, which, when executed by a computer, cause the computer to perform the method according to any one of claims 1 to 24.

28. A chip, comprising: The processor is configured to call and run a computer program stored in the memory to cause a device equipped with the chip to execute a method according to any one of claims 1 to 24.

29. A computer-readable storage medium having a computer program stored therein, wherein: The computer program causes a computer to execute the method according to any one of claims 1 to 24.

30. A computer program product comprising a computer program, wherein: The computer program causes a computer to execute the method according to any one of claims 1 to 24.

31. A computer program, wherein: The computer program causes a computer to execute the method according to any one of claims 1 to 24.

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