Mask assembly, method of manufacturing mask assembly, and method and apparatus for manufacturing display device
By using the bracket, connecting part and mask in the mask assembly, combined with stacked matrix material and etching technology, the problem of precise setting of deposited materials in the display device is solved, and high-precision pixel pattern deposition is achieved, and the resolution and image quality of the display device are improved.
Patent Information
- Application Number
- CN202411107005.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-08-30
- Filing Date
- 2024-08-13
- Publication Date
- 2025-03-04
AI Technical Summary
It is difficult to effectively form pixels with precision patterns in prior art, especially in display devices, where precise arrangement of deposited materials is an important issue.
A mask assembly is used that includes a bracket, a connecting portion and a mask, and the shape and size of the pattern holes are finely controlled to achieve precision pattern deposition by stacking the substrate material and forming process holes, deposition materials and etching techniques.
It is realized that the material is deposited with high precision in the display device, forming pixels with precision patterns, and improving the resolution and image quality of the display device.
Smart Images

Figure CN119553219A_ABST
Abstract
Description
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0002] This application claims priority to Korean Patent Application No. 10-2023-0114436, filed on August 30, 2023, and all rights arising therefrom, the contents of which are incorporated herein by reference in their entirety. Technical Field
[0003] One or more embodiments relate to a method and an apparatus, and more particularly, to a mask assembly, and a method and an apparatus for manufacturing a display device. Background Art
[0004] Mobile electronic devices have been widely used. In addition to small electronic devices such as mobile phones, tablet personal computers ("PCs") have recently been widely used as mobile electronic devices.
[0005] In order to support various functions, such mobile electronic devices include a display device for providing visual information (such as images or videos) to a user. Recently, as other components for driving the display device have become smaller, the proportion occupied by the display device in the electronic device has gradually increased, and a structure that can be bent to have a certain angle in a flat state has also been developed. Summary of the invention
[0006] As display devices are applied to various fields and become smaller, it is very important that the display device has pixels arranged with a precise pattern. In this regard, a pixel can be formed by stacking a plurality of layers, and in order to form a pixel with a precise pattern, it is a very important issue that at least one of the plurality of layers has a deposited material precisely arranged at the pixel. One or more embodiments include a mask assembly of a display device that can manufacture pixels with a precise pattern, and a method and apparatus for manufacturing a display device.
[0007] Additional aspects will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the presented embodiments of the disclosure.
[0008] According to one or more embodiments, a mask assembly includes: a bracket, in which a first opening is defined; a connecting portion, in which a second opening is defined, the connecting portion is arranged on the bracket, and the connecting portion includes at least one of a metal, a metal oxide, a metal nitride, and an alloy of the metal, wherein the second opening corresponds to the first opening; and a mask, arranged on the connecting portion, the mask is configured to shield the first opening and the second opening, and the mask defines a plurality of pattern holes corresponding to the first opening and the second opening.
[0009] In this embodiment, the support may include silicon.
[0010] In this embodiment, the connection portion may include at least two layers stacked on each other.
[0011] In this embodiment, the mask may include at least one of silicon oxide, silicon nitride and silicon oxynitride.
[0012] In this embodiment, the width of the patterned holes in the cross-sectional view may decrease in a direction away from the support.
[0013] In this embodiment, the width of the pattern hole in the cross-sectional view can decrease in the direction away from the bracket from a surface of the mask facing the connecting portion to a point of the pattern hole, and can increase in the direction away from the bracket from the one point of the pattern hole to another surface of the mask opposite to the one surface.
[0014] In this embodiment, the width of the first opening may be the same as the width of the second opening in a plan view.
[0015] According to one or more embodiments, a method for manufacturing a mask assembly includes: sequentially stacking a first base material and a second base material; forming a plurality of process holes separated from each other in the second base material; arranging a third base material on the second base material; forming a first opening corresponding to the plurality of process holes in the first base material; and forming a plurality of pattern holes in the third base material by removing the third base material arranged inside each of the plurality of process holes.
[0016] In this embodiment, before the forming of the plurality of pattern holes, a surface of the third base material overlapping the plurality of process holes may include corrugations.
[0017] In this embodiment, the method may further include forming a second opening in the second base material corresponding to the first opening.
[0018] In this embodiment, the method may further include disposing a covering member on the third base material.
[0019] In this embodiment, the method may further include removing the covering member.
[0020] In this embodiment, the width of the pattern holes in the cross-sectional view may decrease in a direction away from the first base material.
[0021] In this embodiment, the width of the pattern hole in the cross-sectional view can decrease in the direction away from the first base material from a surface of the third base material facing the second base material to a point of the pattern hole, and can increase in the direction away from the first base material from the one point of the pattern hole to another surface of the third base material opposite to the one surface.
[0022] In this embodiment, the first base material may include silicon.
[0023] In this embodiment, the second matrix material may include at least one of metal, metal oxide, metal nitride and alloys of the metals.
[0024] In this embodiment, the third base material may include at least one of silicon oxide, silicon nitride and silicon oxynitride.
[0025] In this embodiment, the second base material may include at least two layers stacked on each other.
[0026] According to one or more embodiments, an apparatus for manufacturing a display device includes: a deposition source facing a substrate; and a mask assembly arranged between the substrate and the deposition source, wherein the mask assembly includes: a bracket, in which a first opening is defined; a connecting portion, in which a second opening is defined, the connecting portion is arranged on the bracket, and the connecting portion includes at least one of a metal, a metal oxide, a metal nitride, and an alloy of the metal, wherein the second opening corresponds to the first opening; and a mask, arranged on the connecting portion, the mask is configured to shield the first opening and the second opening, and the mask defines a plurality of pattern holes corresponding to the first opening and the second opening.
[0027] In this embodiment, the support may include silicon.
[0028] In this embodiment, the connection portion may include at least two layers stacked on each other.
[0029] In this embodiment, the mask may include at least one of silicon oxide, silicon nitride and silicon oxynitride.
[0030] In this embodiment, the width of the patterned holes in the cross-sectional view may decrease in a direction away from the support.
[0031] In this embodiment, in the cross-sectional view, the width of the pattern hole can decrease in the direction away from the bracket from a surface of the mask facing the connecting part to a point of the pattern hole, and can increase in the direction away from the bracket from the one point of the pattern hole to another surface of the mask opposite to the one surface.
[0032] In this embodiment, the width of the first opening may be the same as the width of the second opening in a plan view.
[0033] According to one or more embodiments, a method for manufacturing a display device includes: arranging a substrate and a mask assembly to face a deposition source; and supplying a deposition material from the deposition source so that the deposition material passes through the mask assembly and is deposited on the substrate, wherein the mask assembly includes: a bracket, in which a first opening is defined; a connecting portion, in which a second opening is defined, the connecting portion is arranged on the bracket, and the connecting portion includes at least one of a metal, a metal oxide, a metal nitride, and an alloy of the metal, wherein the second opening corresponds to the first opening; and a mask, the mask is arranged on the connecting portion, the mask is configured to shield the first opening and the second opening, and the mask defines a plurality of pattern holes corresponding to the first opening and the second opening.
[0034] In this embodiment, the support may include silicon.
[0035] In this embodiment, the connection portion may include at least two layers stacked on each other.
[0036] In this embodiment, the mask may include at least one of silicon oxide, silicon nitride and silicon oxynitride.
[0037] In this embodiment, the width of the patterned holes in the cross-sectional view may decrease in a direction away from the support.
[0038] In this embodiment, the width of the pattern hole in the cross-sectional view can decrease in the direction away from the bracket from a surface of the mask facing the connecting portion to a point of the pattern hole, and can increase in the direction away from the bracket from the one point of the pattern hole to another surface of the mask opposite to the one surface.
[0039] In this embodiment, the width of the first opening may be the same as the width of the second opening in a plan view.
[0040] These general and specific embodiments may be implemented using a system, a method, a computer program, or any combination thereof. BRIEF DESCRIPTION OF THE DRAWINGS
[0041] The above and other aspects, features and advantages of certain embodiments of the present disclosure will become more apparent through the following description in conjunction with the accompanying drawings, in which:
[0042] Figure 1A is an exploded perspective view of a mask assembly according to an embodiment;
[0043] Figure 1B It is along Figure 1A The line II-II' is intercepted Figure 1A A cross-sectional view of a mask assembly;
[0044] Figure 1C yes Figure 1B An enlarged cross-sectional view of region A;
[0045] FIG. 2A to FIG. 2F Made in Figure 1A A cross-sectional view of the process of the mask assembly shown in ;
[0046] Figure 3 is an exploded perspective view of a mask assembly according to another embodiment;
[0047] Figure 4 is an exploded perspective view of a mask assembly according to yet another embodiment;
[0048] Figure 5 is a cross-sectional view of a portion of a mask assembly according to another embodiment;
[0049] Figure 6 is a cross-sectional view of an apparatus for manufacturing a display device according to an embodiment;
[0050] Figure 7 is a plan view of a display device according to an embodiment;
[0051] Figure 8 It is along Figure 7 A cross-sectional view of a portion of the display device taken along line VI-VI'; and
[0052] Fig. 9 is an equivalent circuit diagram of one pixel in a display panel according to an embodiment. DETAILED DESCRIPTION
[0053] Reference will now be made in detail to embodiments, examples of which are shown in the accompanying drawings, wherein the same reference numerals refer to the same elements throughout. In this regard, the present embodiment may have different forms and should not be construed as being limited to the description set forth herein. Therefore, the embodiments are described below only by reference to the accompanying drawings to explain aspects of this specification. As used herein, the term "and / or" includes any and all combinations of one or more related listed items. Throughout the disclosure, the expression "at least one of a, b, and c" means only a, only b, only c, both a and b, both a and c, both b and c, all of a, b, and c, or variations thereof.
[0054] Since the present specification allows for various variations and numerous embodiments, certain embodiments will be shown in the drawings and described in the written specification. The effects and features of one or more embodiments and methods for implementing the same will become apparent through the following detailed description of one or more embodiments in conjunction with the drawings. However, the present embodiment may have different forms and should not be construed as being limited to the description set forth herein.
[0055] One or more embodiments will be described in more detail below with reference to the accompanying drawings. Those elements that are the same or correspond to each other are given the same reference numerals regardless of the figure numbers, and redundant descriptions thereof are omitted.
[0056] Although terms such as "first" and "second" may be used to describe various elements, these elements should not be limited to the above terms. The above terms are only used to distinguish one element from another.
[0057] As used herein, the singular forms “a,” “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise.
[0058] It will be understood that the terms “comprising”, “including” and “having” used herein specify the presence of stated features or elements, but do not exclude the addition of one or more other features or elements.
[0059] It will also be understood that when a layer, region or element is referred to as being "on" another layer, region or element, it can be directly or indirectly on the other layer, region or element. That is, for example, intervening layers, regions or elements may be present.
[0060] For the convenience of explanation, the size of the elements in the drawings may be exaggerated or reduced. For example, since the size and thickness of the elements in the drawings are arbitrarily shown for the convenience of explanation, the following embodiments are not limited thereto.
[0061] The x-axis direction, the y-axis direction, and the z-axis direction are not limited to the three axes of the rectangular coordinate system and can be interpreted in a broader sense. For example, the x-axis direction, the y-axis direction, and the z-axis direction can be perpendicular to each other, or can represent different directions that are not perpendicular to each other.
[0062] When the embodiment can be implemented in different ways, some process orders can be performed differently from the described order. For example, two processes described successively can be performed substantially simultaneously, or in the reverse order of the described order.
[0063] Figure 1A is an exploded perspective view of a mask assembly 10 according to an embodiment. Figure 1B It is along Figure 1A The line II-II' is intercepted Figure 1A sectional view of the mask assembly 10. Figure 1C yes Figure 1B An enlarged cross-sectional view of region A.
[0064] Reference Figures 1A to 1C , the mask assembly 10 may include a bracket 1 , a connecting portion 2 and a mask 3 .
[0065] The support 1 may define at least one first opening 1 - 1 . The support 1 may include polysilicon. The support 1 may form an edge of the mask assembly 10 .
[0066] The connecting portion 2 may be disposed between the support 1 and the mask 3 to connect the support 1 to the mask 3. In this regard, the connecting portion 2 may include at least one of a metal, a metal oxide, a metal nitride, and an alloy of the metal. The metal may include aluminum (Al), chromium (Cr), copper (Cu), gold (Au), titanium (Ti), tantalum (Ta), tungsten (W), molybdenum (Mo), or nickel (Ni). The metal oxide or metal nitride may include an oxide or nitride of aluminum (Al), chromium (Cr), copper (Cu), gold (Au), titanium (Ti), tantalum (Ta), tungsten (W), molybdenum (Mo), and / or nickel (Ni). The alloy may include Invar alloy.
[0067] The connecting portion 2 may define a second opening 2-1 in the connecting portion 2. In this regard, the second opening 2-1 may correspond to the first opening 1-1. That is, the planar shape of the second opening 2-1 may be the same as or similar to the planar shape of the first opening 1-1. As used herein, "planar shape" refers to a shape observed from the z-axis direction.
[0068] The connecting portion 2 may include at least one layer. When the connecting portion 2 includes a plurality of layers, the plurality of layers may be stacked on each other. In this regard, each layer may include the same or similar material as the above-mentioned connecting portion 2. One of the plurality of layers stacked on each other may include a material different from another layer of the plurality of layers stacked on each other.
[0069] The mask 3 may be disposed on the connection portion 2. In this regard, the mask 3 may include an inorganic material. For example, the mask 3 may include silicon oxide (SiO x ), silicon nitride (SiN x ) and silicon oxynitride (SiO x N y In another embodiment, the mask 3 may be silicon oxide (SiO x ), silicon nitride (SiN x ) and silicon oxynitride (SiO x N y ). In another embodiment, the mask 3 may include a mixed layer containing silicon oxide (SiO x ), silicon nitride (SiN x ) and silicon oxynitride (SiO x N y ) and a layer containing silicon oxide (SiO x ), silicon nitride (SiN x ) and silicon oxynitride (SiO x N y ) in another layer.
[0070] The mask 3 may define a plurality of pattern holes 3a in the mask 3. The plurality of pattern holes 3a may be formed when the deposition material is deposited on the substrate (see Figure 6 The pattern holes 3a are arranged in a deposition area 3b on a display substrate DS in the display substrate DS, and are separated from each other in the column direction and the row direction (for example, the x-axis direction and the y-axis direction). The pattern holes 3a may have various planar shapes. For example, the planar shape of the pattern holes 3a may be circular, such as Figure 1A In another embodiment, although not shown, the planar shape of the pattern holes 3a may be a polygon, such as a triangle or a quadrangle.
[0071] exist Figure 1B and Figure 1C The mask 3 is shown in FIG. 3 through the pattern hole 3a and parallel to one direction (ie, Figure 1AIn this regard, the width W of the pattern hole 3a may be changed in one direction (i.e., the z-axis direction). For example, the width W of the pattern hole 3a may be reduced in a direction away from the bracket 1 and the connecting portion 2 (e.g., the z-axis direction). That is, the surface (i.e., the side surface) of the mask 3 defining the pattern hole 3a may be inclined, and the surface of the mask 3 defining the pattern hole 3a may have an acute inclination angle θ relative to the surface (i.e., the bottom surface) of the mask 3 that contacts the connecting portion 2. In this regard, the inclination angle θ of the surface of the mask 3 defining the pattern hole 3a may be 85° or less. When the inclination angle θ of the surface of the mask 3 defining the pattern hole 3a is greater than 85°, the deposition material may be blocked by the surface of the mask 3 defining the pattern hole 3a, and therefore, the range of the deposition material to be deposited on the substrate may be narrowed, or the deposition material may not be deposited in the correct position. In the above case, the cross-sectional shape of the pattern hole 3a may be a trapezoid. The width W of the pattern hole 3a can be the distance between surfaces facing each other in a direction perpendicular to one direction (i.e., the z-axis direction) (a direction parallel to the plane defined by the x-axis direction and the y-axis direction) among the surfaces of the mask 3 that define the pattern hole 3a.
[0072] The width W of the pattern holes 3a may decrease in one direction (ie, the z-axis direction) and then increase, as shown in FIG. Figure 1C As shown in . For example, the width W of the pattern hole 3a can be reduced from the first surface (i.e., the bottom surface) of the mask 3 that contacts the connecting portion 2 to the point 3a-c. The width W of the pattern hole 3a can increase from the point 3a-c to the second surface (i.e., the top surface) of the mask 3. In this regard, the first surface and the second surface of the mask 3 can be surfaces opposite to each other in the z-axis direction. Specifically, in the above case, the width W of the pattern hole 3a can be reduced in a portion 3a-a of the side surface of the mask 3 that defines the pattern hole 3a, and the width W of the pattern hole 3a can be increased in another portion 3a-b of the side surface of the mask 3 that defines the pattern hole 3a.
[0073] The mask assembly 10 can selectively allow the deposition material to pass through. More specifically, the deposition material can pass through the pattern holes 3a and only reach the substrate (see Figure 6 In this regard, when the pattern holes 3a are in contact with the display substrate DS, Figure 1B , not only is the inlet portion of the pattern hole 3a through which the deposition material flows in narrower than when the pattern hole 3a shown in FIG is turned upside down, but the outlet portion through which the deposition material passes through the pattern hole 3a and flows out of the pattern hole 3a is wide, and therefore, the deposition material may not be deposited at a position on the substrate of the member as the deposition target where the deposition material should have been deposited. However, the pattern hole 3a according to the embodiment may have a trapezoidal shape as described above, and therefore, the above problem does not occur.
[0074] Furthermore, since the mask 3 includes an inorganic material and the pattern holes 3 a are arranged in the inorganic material, a deposition material pattern can be densely formed on a certain area of the substrate using the fine pattern holes 3 a.
[0075] The mask assembly 10 may allow a secure coupling between the mask 3 and the support 1 by coupling the mask 3 to the support 1 via the connection portion 2 .
[0076] FIG. 2A to FIG. 2F Made in Figure 1A 2 is a cross-sectional view of a process of manufacturing the mask assembly 10 shown in FIG.
[0077] Reference Figure 2A , the second base material 2M can be provided on the first base material 1M. In this regard, the first base material 1M can be a silicon wafer. In addition, the second base material 2M can be provided on the first base material 1M in various ways. For example, the second base material 2M can be formed on the first base material 1M by using a sputtering method or an evaporation method. In this regard, the second base material 2M can be connected to the above-mentioned connection part 2 (refer to Figure 1B ) includes the same or similar materials.
[0078] Reference Figure 2B , the first photoresist PR1 may be disposed on the second base material 2M, and a certain pattern may be formed by performing an exposure and development process on the first photoresist PR1. In this regard, a first hole PR1a may be formed in the first photoresist PR1, and therefore, a portion of the second base material 2M in which the process hole 2M-1 is to be formed may be exposed through the first hole PR1a. Thereafter, the portion of the second base material 2M exposed through the first hole PR1a may be removed by etching. In this regard, the etching method may be wet etching using a cleaning solution or dry etching using plasma, laser, or the like.
[0079] Reference Figure 2C , the third matrix material 3M may be disposed on the second matrix material 2M. In this regard, the third matrix material 3M may be disposed on the second matrix material 2M via plasma enhanced chemical vapor deposition ("PECVD") or tetraethyl orthosilicate chemical vapor deposition ("TEOSCVD").
[0080] The third base material 3M may include the same or similar material as the mask 3. The third base material 3M may not only be disposed on the second base material 2M, but may also be inserted into the process hole 2M-1 (refer to Figure 2B ). In this case, a portion of the third base material 3M disposed inside the process hole 2M-1 may be in direct contact with the first base material 1M. In addition, one surface of the third base material 3M may include corrugations.
[0081] Reference Figure 2D , the covering member 4M may be disposed on the third base material 3M. In this regard, the covering member 4M may be in direct contact with the surface of the third base material 3M. The surface of the portion of the covering member 4M disposed on the corrugated portion of the third base material 3M may be in a corrugated form.
[0082] Reference Figure 2E , the second photoresist PR2 may be disposed on one surface (ie, bottom surface) of the first base material 1M, and the second hole PR2a may be formed by exposure and development. In this regard, the residue of the second photoresist PR2 may shield only a portion of one surface of the first base material 1M.
[0083] The first opening 1-1 may be formed by etching the first base material 1M on which the second photoresist PR2 is disposed. In this regard, the etching may be wet etching (in which an etching solution is sprayed into the second hole PR2a) or dry etching (in which plasma or laser is sprayed into the second hole PR2a). Although not shown, when wet etching is used, the surface of the first base material 1M defining the first opening 1-1 may be aligned with the above-mentioned pattern hole 3a (refer to Figure 1B ) is tapered in a similar manner. In this regard, the surface of the first base material 1M defining the first opening 1-1 may be tapered to the same extent as the mask 3 (see Figure 1B ) is opposite to the surface of the defined pattern hole 3a. In addition, when wet etching is used, the second base material 2M can be chromium (Cr), gold (Au), etc. that will not be etched by the etching solution, or can be in the form of an alloy, metal oxide or metal nitride. Hereinafter, for the convenience of explanation, the case where the first base material 1M is etched using a dry etching method will be mainly described in detail.
[0084] As described above, the first base material 1M can be etched to form a support (see Figure 1B )1 defines a first opening 1-1 in the support 1. In this regard, the surface of the support 1 defining the first opening 1-1 may not be tapered, but may be almost perpendicular to a surface of the support 1 on which the second base material 2M is placed. In addition, when the first opening 1-1 is formed, a portion of the second base material 2M and a portion of the third base material 3M may be exposed to the outside through the first opening 1-1.
[0085] Reference Figure 2F , a portion of the third base material 3M can be etched through the first opening 1-1. In this regard, the third base material 3M can be removed by dry etching. In the above case, the third base material 3M arranged in the process hole 2M-1 (refer to Figure 2B). In addition, the portion of the second base material 2M arranged between the process holes 2M-1 can protect the portion of the third base material 3M disposed on the second base material 2M during dry etching. In the above case, the pattern hole 3a can be formed. The pattern hole 3a can be formed by removing a portion of the third base material 3M arranged in the process hole 2M-1.
[0086] Once the above process is completed, a portion of the second base material 2M can be removed. More specifically, the second base material 2M can be removed by wet etching, wherein an etching solution is sprayed onto the second base material 2M exposed to the outside through the first opening 1-1. In addition, the etching solution can also be sprayed onto the cover member 4M, and thus, the cover member 4M can also be removed.
[0087] When part of the second base material 2M and the covering member 4M are removed as described above, a Figure 1B ) defined in the second opening 2-1 (refer to Figure 1B ) and the pattern holes 3a defined in the mask 3, and thus, the mask assembly 10 (refer to Figure 1A ) manufacturing.
[0088] In the above case, the mask assembly 10 may include a pattern hole 3a having a position away from the support 1 (refer to Figure 1B ) direction (i.e., the z-axis direction).
[0089] Furthermore, the pattern holes 3 a to be formed in the mask 3 can be finely processed, and thus, the mask assembly 10 can allow as many patterns as possible to be formed in a certain area, and thus can be used to manufacture a high-resolution display device.
[0090] Figure 3 is an exploded perspective view of a mask assembly 10 according to another embodiment.
[0091] Reference Figure 3 The mask assembly 10 may include a support 1, a connecting portion 2, and a mask 3. In this regard, the support 1, the connecting portion 2, and the mask 3 may be the same as those described above with reference to Figures 1A to 1C The described support 1, connection portion 2 and mask 3 are similar. Hereinafter, for convenience of explanation, mainly the differences from the above description will be described in detail.
[0092] The support 1 may define a plurality of first openings 1 - 1 therein. In this regard, the support 1 may include an intermediate support 1 a disposed between the plurality of first openings 1 - 1. The intermediate support 1 a may define each of the plurality of first openings 1 - 1 and may support the mask 3 .
[0093] The connection portion 2 may be disposed on the bracket 1. In this regard, the connection portion 2 may include an intermediate connection portion 2a disposed on the intermediate bracket 1a. The connection portion 2 may define a plurality of second openings 2-1 corresponding to the plurality of first openings 1-1, respectively.
[0094] The mask 3 may be provided in plurality, and the plurality of masks 3 may correspond to the plurality of first openings 1-1, respectively. That is, the plurality of masks 3 may overlap the plurality of first openings 1-1, respectively. For example, the plurality of masks 3 may include a first mask 3-1 and a second mask 3-2, the first mask 3-1 and the second mask 3-2 being separated from each other and arranged on the connecting portion 2. In this regard, the intermediate bracket 1a may support the first mask 3-1 and the second mask 3-2 at the same time. The first mask 3-1 and the second mask 3-2 may be separated from each other or connected to each other. In this case, the first mask 3-1 and the second mask 3-2 may be arranged so that one side of the multiple sides of the first mask 3-1 and one side of the multiple sides of the second mask 3-2 are in contact with each other. In another embodiment, the first mask 3-1 and the second mask 3-2 may be arranged so that one side of the multiple sides of the first mask 3-1 and one side of the multiple sides of the second mask 3-2 are separated from each other.
[0095] In the above case, the first mask 3-1 may include a plurality of first pattern holes 3a-1, which are pattern holes arranged in columns and rows inside the first deposition area 3b-1. In addition, the second mask 3-2 may include a plurality of second pattern holes 3a-2, which are pattern holes arranged in columns and rows inside the second deposition area 3b-2. In the above case, the first deposition area 3b-1 and the second deposition area 3b-2 may correspond to the substrate (see Figure 6 In addition, each of the first deposition area 3b-1 and the second deposition area 3b-2 may correspond to a display area described below. In another embodiment, the first deposition area 3b-1 and the second deposition area 3b-2 may correspond to different substrates, respectively.
[0096] Figure 4 is an exploded perspective view of a mask assembly 10 according to yet another embodiment.
[0097] Reference Figure 4 , the mask assembly 10 may include a support 1, a connecting portion 2 and a mask 3. In this regard, the support 1, the connecting portion 2 and the mask 3 may be the same as those described above with reference to Figures 1A to 1C The described support 1, connection portion 2, and mask 3 are similar. Hereinafter, for the convenience of description, the differences from the above description will be mainly described in detail.
[0098] The bracket 1 may include a first intermediate bracket 1a-1 and a second intermediate bracket 1a-2 that cross each other. In this regard, the first intermediate bracket 1a-1 and the second intermediate bracket 1a-2 may be arranged in a grid shape and may define a plurality of first openings 1-1. That is, the first intermediate bracket 1a-1 or the second intermediate bracket 1a-2 may be arranged between adjacent first openings 1-1. In the above case, the bracket 1 may be in the form of a window frame.
[0099] The connection portion 2 may be disposed on the bracket 1. In this regard, the connection portion 2 may include a first intermediate connection portion 2a-1 and a second intermediate connection portion 2a-2 disposed on the first intermediate bracket 1a-1 and the second intermediate bracket 1a-2, respectively. In this regard, the connection portion 2 may be in the form of a window frame similar to the bracket 1, and may define a plurality of second openings 2-1 corresponding to the plurality of first openings 1-1, respectively.
[0100] The mask 3 may cover the entire connection portion 2. In this regard, the mask 3 may include a plurality of deposition areas 3b separated from each other. In this case, the portion of the mask 3 where the pattern holes 3a are not formed may be arranged between the plurality of deposition areas 3b. In this regard, each deposition area 3b may correspond to each second opening 2-1, and thus may allow the deposition material that has passed through the first opening 1-1 and the second opening 2-1 to pass. That is, each deposition area 3b may overlap with each second opening 2-1 in a plan view. A plurality of pattern holes 3a may be separated from each other in columns and rows in each deposition area 3b.
[0101] Although not shown, the mask 3 may include a plurality of masks 3. In this case, in a plan view, one mask 3 may overlap with one second opening 2-1, or one mask 3 may overlap with at least two of the plurality of second openings 2-1.
[0102] Figure 5 is a cross-sectional view of a portion of a mask assembly 10 according to another embodiment.
[0103] Reference Figure 5 The mask assembly 10 may include a support 1, a connecting portion 2, and a mask 3. In this regard, the support 1 and the mask 3 are similar to those described above. Figure 1A , Figure 3 or Figure 4 The described bracket 1 and mask 3 are the same or similar, and therefore, a detailed description thereof is omitted.
[0104] The connection portion 2 may include a plurality of layers stacked on each other. Hereinafter, for convenience of description, a case where the connection portion 2 includes a first layer 2-a and a second layer 2-b stacked on each other will be mainly described in detail.
[0105] The first layer 2-a and the second layer 2-b may be sequentially disposed on the support 1. In this regard, the first layer 2-a and the second layer 2-b may include materials different from each other. For example, one of the first layer 2-a and the second layer 2-b may include one of a metal, a metal oxide, a metal nitride, and an alloy of the metal. In addition, the other of the first layer 2-a and the second layer 2-b may include another of a metal, a metal oxide, a metal nitride, and an alloy of the metal. In this regard, the metal, the metal oxide, the metal nitride, and the alloy of the metal may be the above-mentioned Figures 1A to 1C Describe the material.
[0106] Although not shown, the mask 3 may also include a plurality of layers. In this regard, the material of each layer may be the same as that of the reference Figure 1A One of the materials of the described mask 3 is the same. In this case, one of the multiple layers of the mask 3 and another layer of the multiple layers of the mask 3 may include materials different from each other.
[0107] Figure 6 is a cross-sectional view of an apparatus 400 for manufacturing a display device according to an embodiment.
[0108] Reference Figure 6 , the apparatus 400 may include a chamber 410 , a deposition source 420 , a fixing portion 430 , and a pressure regulator 440 .
[0109] The chamber 410 may have a space therein and may include a gate valve 411 that may be opened or closed. When the gate valve 411 is opened, the chamber 410 may be connected to the outside, and when the gate valve 411 is closed, the chamber 410 may be disconnected from the outside.
[0110] The deposition source 420 may store the deposition material and may supply the deposition material by applying heat to the deposition material. The deposition source 420 may be fixed to the chamber 410. In another embodiment, the deposition source 420 may move linearly inside the chamber 410.
[0111] The fixing portion 430 may support the display substrate DS and the mask assembly 10. In this regard, the fixing portion 430 may support the display substrate DS and the mask assembly 10 at the same time, or may support the display substrate DS and the mask assembly 10 separately. The above-mentioned fixing portion 430 may include one fixing portion 430 or a plurality of fixing portions 430 that are separable from each other. The fixing portion 430 may have various forms. For example, the fixing portion 430 may be in the form of a shuttle that can be linearly moved inside the chamber 410 and can be moved out of the chamber 410. In another embodiment, the fixing portion 430 may be in the form of a member that can be linearly moved inside the chamber 410. In another embodiment, the fixing portion 430 may be fixed to the inside of the chamber 410. Hereinafter, for ease of explanation, the case where the fixing portion 430 is in the form of a shuttle that can support the display substrate DS and the mask assembly 10 at the same time and can be linearly moved inside and outside the chamber 410 will be mainly described in detail.
[0112] The mask assembly 10 may include a support 1, a connecting portion 2, and a mask 3. The mask assembly 10 is similar to the above-mentioned Figure 1A , Figure 3 , Figure 4 or Figure 5 The described mask assemblies 10 are the same or similar, and therefore, a detailed description thereof is omitted.
[0113] The pressure regulator 440 may be connected to the chamber 410 to control the internal pressure of the chamber 410. In this regard, the pressure regulator 440 may include a connection pipe 441 connected to the chamber 410 and a pump 442 provided at the connection pipe 441.
[0114] When manufacturing the display device, the display substrate DS may be inserted into the chamber 410 from outside the chamber 410. The substrate 100 (see FIG. 1 ) described below may be formed on the display substrate DS. Figure 8 ) to the bank layer 1117 (refer to Figure 8 ) layer.
[0115] In the above case, the mask assembly 10 may face the display substrate DS. In this regard, the display substrate DS and the mask assembly 10 may simultaneously enter the chamber 410 through the fixing portion 430, while each being disposed at the fixing portion 430 to face each other. In another embodiment, the display substrate DS and the mask assembly 10 may each enter the chamber 410 from outside the chamber 410, and be disposed at the fixing portion 430.
[0116] When the display substrate DS and the mask assembly 10 are arranged inside the chamber 410 as described above, the deposition source 420 may supply the deposition material so as to deposit the deposition material on the display substrate DS. The deposition material may form one of a variety of layers. For example, when the deposition material is deposited on the display substrate DS, the intermediate layer 220 (see Figure 8 ). That is, the deposited material may form one of a hole transport layer, a hole injection layer, an emission layer, an electron transport layer, and an electron injection layer. In addition, the deposited material may be disposed at one of the plurality of pixels.
[0117] While the above process is performed, the pressure regulator 440 may control the internal pressure of the chamber 410. For example, when at least one of the display substrate DS and the mask assembly 10 is inserted into the chamber 410, the pressure regulator 440 may inject external air into the chamber 410 and maintain the internal pressure of the chamber 410 at a level that is the same as or similar to that of the atmospheric pressure. In addition, while the process is performed in the chamber 410, the pressure regulator 440 may maintain the internal pressure of the chamber 410 at a level lower than that of the atmospheric pressure by discharging the internal air inside the chamber 410 to the outside of the chamber 410.
[0118] The apparatus 400 for manufacturing a display device and the method for manufacturing a display device can be realized by using a display device including fine pattern holes 3a (refer to Figure 1B ) mask assembly 10 to allow the manufacture of high-resolution display devices with precise patterns.
[0119] In addition, since the width of the pattern hole 3a decreases toward the display substrate DS in the thickness direction (z-axis direction) of the pattern hole 3a, the equipment 400 for manufacturing a display device and the method for manufacturing a display device can allow deposition material to be deposited at a predetermined position on the display substrate DS.
[0120] Figure 7 2 is a plan view of a display device 30 according to an embodiment. As used herein, a “plan view” is a view of the mask assembly 10 in a thickness direction (z-axis direction).
[0121] Reference Figure 7 , the display device 30 may include a display area DA and a peripheral area PA outside the display area DA. The display device 30 may provide an image through an array of a plurality of pixels PX two-dimensionally arranged in the display area DA.
[0122] The peripheral area PA is an area where no image is provided, and may completely or partially surround the display area DA. A driver for providing an electrical signal or power to a pixel circuit corresponding to each of the plurality of pixels PX may be arranged in the peripheral area PA. A pad is an area to which an electronic component or a printed circuit board may be electrically connected, and the pad may be arranged in the peripheral area PA.
[0123] Although the display device 30 is described below as including an organic light emitting diode ("OLED") as a light emitting element, the display device 30 according to one or more embodiments is not limited thereto. In another embodiment, the display device 30 may be a light emitting display device including an inorganic light emitting diode, that is, an inorganic light emitting display. The inorganic light emitting diode may include a PN junction diode containing an inorganic semiconductor-based material. When a voltage is applied forward to the PN junction diode, holes and electrons are injected, and light of a specific color can be emitted by converting the energy generated by the recombination of holes and electrons into light energy. The above-mentioned inorganic light emitting diode may have a width of several microns to several hundred microns, and in some embodiments, the inorganic light emitting diode may be referred to as a micro LED. In another embodiment, the display device 30 may be a quantum dot light emitting display.
[0124] The display device 30 can be used not only as a display screen for portable electronic devices such as mobile phones, smart phones, tablet personal computers (PCs), mobile communication terminals, electronic notebooks, electronic books, portable multimedia players ("PMPs"), navigation systems, and ultra-mobile PCs ("UMPCs"), but also as a display screen for various products such as televisions, notebook computers, monitors, billboards, and Internet of Things ("IoT") devices. In addition, the display device 30 according to the embodiment can be used for wearable devices such as smart watches, watch phones, glasses-type displays, and head-mounted displays ("HMDs"). In addition, the display device 30 according to the embodiment can be used as a dashboard of a car, a central information display ("CID") on a central panel or dashboard of a car, an interior mirror display that replaces a side mirror of a car, or a display screen on the back of a front seat for entertainment in the back seat of a car.
[0125] Figure 8 It is along Figure 7 1 is a cross-sectional view of a portion of the display device 30 taken along line VI-VI′.
[0126] Reference Figure 8 , the display device 30 may include a stacked structure of a substrate 100, a pixel circuit layer PCL, a display element layer DEL, and an encapsulation layer 300. In this regard, a display substrate (not shown) may be a concept including a portion of the substrate 100, the pixel circuit layer PCL, and the display element layer DEL. That is, the display substrate may range from the substrate 100 to the bank layer 1117.
[0127] The substrate 100 may have a multilayer structure including a base layer and an inorganic layer, the base layer including a polymer resin. For example, the substrate 100 may include a base layer including a polymer resin and a barrier layer including an inorganic insulating material. For example, the substrate 100 may include a first base layer 101, a first barrier layer 102, a second base layer 103, and a second barrier layer 104 stacked sequentially on each other. The first base layer 101 and the second base layer 103 may include polyimide ("PI"), polyethersulfone ("PES"), polyarylate, polyetherimide ("PEI"), polyethylene naphthalate ("PEN"), polyethylene terephthalate ("PET"), polyphenylene sulfide ("PPS"), polycarbonate, triacetyl cellulose ("TAC") and / or cellulose acetate propionate ("CAP"). The first barrier layer 102 and the second barrier layer 104 may include an inorganic insulating material such as silicon oxide, silicon oxynitride and / or silicon nitride. The substrate 100 may be flexible.
[0128] The pixel circuit layer PCL may be disposed on the substrate 100 . Figure 8 The pixel circuit layer PCL is shown, and the pixel circuit layer PCL includes a thin film transistor TFT, and a buffer layer 1111, a first gate insulating layer 1112, a second gate insulating layer 1113, an interlayer insulating layer 1114, a first planarizing insulating layer 1115 and a second planarizing insulating layer 1116 arranged below and / or above the elements of the thin film transistor TFT.
[0129] The buffer layer 1111 may reduce or prevent foreign matter, moisture, or external air from penetrating from below the substrate 100, and may provide a flat surface on the substrate 100. The buffer layer 1111 may include an inorganic insulating material such as silicon oxide, silicon oxynitride, and / or silicon nitride, and may have a single-layer or multi-layer structure including the above materials.
[0130] The thin film transistor TFT on the buffer layer 1111 may include a semiconductor layer Act, and the semiconductor layer Act may include polycrystalline silicon (poly-Si). Alternatively, the semiconductor layer Act may include amorphous silicon (a-Si), an oxide semiconductor, or an organic semiconductor. The semiconductor layer Act may include a channel region C and a drain region D and a source region S respectively arranged on opposite sides of the channel region C. The gate electrode GE may overlap the channel region C in a plan view.
[0131] The gate electrode GE may include a low resistance metal material, a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may have a multi-layer or single-layer structure including the above materials.
[0132] The first gate insulating layer 1112 between the semiconductor layer Act and the gate electrode GE may include an inorganic insulating material such as silicon oxide (SiO 2 ), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al 2 O 3 ), titanium oxide (TiO 2 ), Tantalum Oxide (Ta 2 O 5 ), hafnium oxide (HfO 2 ) or zinc oxide (ZnO x ). Zinc oxide (ZnO x ) can be zinc oxide (ZnO) and / or zinc peroxide (ZnO 2 ).
[0133] The second gate insulating layer 1113 may cover the gate electrode GE. Similar to the first gate insulating layer 1112, the second gate insulating layer 1113 may include an inorganic insulating material such as silicon oxide (SiO 2 ), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al 2 O 3 ), titanium oxide (TiO 2 ), Tantalum Oxide (Ta 2 O 5 ), hafnium oxide (HfO 2 ) or zinc oxide (ZnO x ). Zinc oxide (ZnO x ) can be zinc oxide (ZnO) and / or zinc peroxide (ZnO 2 ).
[0134] The upper electrode Cst2 of the storage capacitor Cst may be disposed on the second gate insulating layer 1113. The upper electrode Cst2 may overlap the gate electrode GE below in a plan view. In this regard, the gate electrode GE and the upper electrode Cst2 overlapping each other with the second gate insulating layer 1113 interposed therebetween may constitute the storage capacitor Cst. That is, the gate electrode GE may serve as the lower electrode Cst1 of the storage capacitor Cst.
[0135] As described above, the storage capacitor Cst and the thin film transistor TFT may overlap each other. In some embodiments, the storage capacitor Cst may not overlap the thin film transistor TFT in a plan view.
[0136] The upper electrode Cst2 may include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W) and / or copper (Cu), and may have a single-layer or multi-layer structure including the above materials.
[0137] The interlayer insulating layer 1114 may cover the upper electrode Cst2. The interlayer insulating layer 1114 may include silicon oxide (SiO 2 ), silicon nitride (SiN x ), silicon oxynitride (SiON), aluminum oxide (Al 2 O 3 ), titanium oxide (TiO 2 ), Tantalum Oxide (Ta 2 O 5 ), hafnium oxide (HfO 2 ) or zinc oxide (ZnO x ). Zinc oxide (ZnO x ) can be zinc oxide (ZnO) and / or zinc peroxide (ZnO 2 ). The interlayer insulating layer 1114 may have a single layer or a multi-layer structure including the above-mentioned inorganic insulating material.
[0138] The drain electrode DE and the source electrode SE may each be on the interlayer insulating layer 1114. The drain electrode DE and the source electrode SE may be connected to the drain region D and the source region S, respectively, through contact holes formed in the insulating layer below. The drain electrode DE and the source electrode SE may include a highly conductive material. The drain electrode DE and the source electrode SE may include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may have a multilayer or single-layer structure including the above materials. In an embodiment, the drain electrode DE and the source electrode SE may have a multilayer structure of titanium (Ti) / aluminum (Al) / titanium (Ti).
[0139] The first planarization insulating layer 1115 may cover the drain electrode DE and the source electrode SE. The first planarization insulating layer 1115 may include an organic insulating material such as a general commercial polymer such as polystyrene ("PS"), polymethyl methacrylate ("PMMA"), a polymer derivative having a phenol group, an acrylic acid-based polymer, an imide-based polymer, an aromatic ether-based polymer, an amide-based polymer, a fluorine-based polymer, a p-xylene-based polymer, a vinyl alcohol-based polymer, and a blend thereof.
[0140] The second planarization insulating layer 1116 may be disposed on the first planarization insulating layer 1115. The second planarization insulating layer 1116 may include the same material as the first planarization insulating layer 1115, and may include an organic insulating material such as a general commercial polymer such as PS, PMMA, a polymer derivative having a phenol group, an acrylic acid-based polymer, an imide-based polymer, an aryl ether-based polymer, an amide-based polymer, a fluorine-based polymer, a p-xylene-based polymer, a vinyl alcohol-based polymer, and a blend thereof.
[0141] The display element layer DEL may be disposed on the pixel circuit layer PCL having the above structure. The display element layer DEL may include an organic light emitting diode OLED as a display element (i.e., a light emitting element), and the organic light emitting diode OLED may include a stacked structure of a pixel electrode 210, an intermediate layer 220, and a common electrode 230. The organic light emitting diode OLED may emit, for example, red light, green light, or blue light, or may emit red light, green light, blue light, or white light. The organic light emitting diode OLED may emit light through an emission region, and the emission region may be defined as a pixel PX.
[0142] The pixel electrode 210 of the organic light emitting diode OLED may be electrically connected to the thin film transistor TFT through a contact hole formed in the second planarization insulating layer 1116 and the first planarization insulating layer 1115 and a contact metal CM disposed on the first planarization insulating layer 1115 .
[0143] The pixel electrode 210 may include a conductive oxide such as indium tin oxide ("ITO"), indium zinc oxide ("IZO"), zinc oxide (ZnO), indium oxide (In 2 O 3 ), indium gallium oxide ("IGO") or aluminum zinc oxide ("AZO"). In another embodiment, the pixel electrode 210 may include a reflective layer, and the reflective layer includes silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr) or a compound thereof. In another embodiment, the pixel electrode 210 may also include a reflective layer made of ITO, IZO, ZnO or In on / under the above-mentioned reflective layer. 2 O 3 The formed layer.
[0144] A bank layer 1117 defining an opening 117OP exposing a central portion of the pixel electrode 210 is disposed on the pixel electrode 210. The bank layer 1117 may include an organic insulating material and / or an inorganic insulating material. The opening 117OP may define an emission region of light emitted from the organic light emitting diode OLED. For example, the size / width of the opening 117OP may correspond to the size / width of the emission region. Therefore, the size and / or width of the pixel PX may depend on the size and / or width of the corresponding opening 117OP of the bank layer 1117.
[0145] The intermediate layer 220 may include an emission layer 2222 corresponding to the pixel electrode 210. The emission layer 2222 may include a high molecular weight or low molecular weight organic material that emits light of a specific color. Alternatively, the emission layer 2222 may include an inorganic light emitting material or quantum dots.
[0146] In an embodiment, the intermediate layer 220 may include a first functional layer 2221 and a second functional layer 2223 respectively disposed under and on the emission layer 2222. The first functional layer 2221 may include, for example, a hole transport layer ("HTL") or an HTL and a hole injection layer ("HIL"). The second functional layer 2223 is an element disposed on the emission layer 2222 and may include an electron transport layer ("ETL") and / or an electron injection layer ("EIL"). Similar to the common electrode 230 described below, the first functional layer 2221 and / or the second functional layer 2223 may be a common layer covering the entire substrate 100.
[0147] At least one layer in the above-mentioned intermediate layer 220 can be manufactured by the above-mentioned device 400 for manufacturing a display device. In this regard, the resolution of the display device 30 itself can vary depending on the number of at least one layer of the intermediate layers 220 arranged in a certain area / area and spaced apart from each other by the device 400 for manufacturing a display device. In this regard, when at least one layer in the intermediate layer 220 is formed by the above-mentioned device 400 for manufacturing a display device, many layers can be arranged in a certain area / area by reducing the distance between at least one layer in the intermediate layer 220. That is, the conventional mask forms pattern holes by etching a metal material, and it is difficult to place the pattern holes close together. However, the present invention can arrange as many pixels as possible in one area of the display area by reducing the distance between the pattern holes.
[0148] The common electrode 230 may be disposed above the pixel electrode 210 and may overlap the pixel electrode 210 in a plan view. The common electrode 230 may include a conductive material having a low work function. For example, the common electrode 230 may include a (semi) transparent layer, the (semi) transparent layer including silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca) or an alloy thereof. Alternatively, the common electrode 230 may also include a layer on the (semi) transparent layer including the above-mentioned materials, the layer including a conductive material such as ITO, IZO, ZnO or In 2 O 3 The common electrode 230 may be integrally formed to cover the entire substrate 100 .
[0149] The encapsulation layer 300 may be disposed on the display element layer DEL and may cover the display element layer DEL. The encapsulation layer 300 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer, and as an embodiment, Figure 8 An encapsulation layer 300 including a first inorganic encapsulation layer 310 , an organic encapsulation layer 320 , and a second inorganic encapsulation layer 330 , which are sequentially stacked, is shown.
[0150] The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may include one or more inorganic materials among aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride and silicon oxynitride. The organic encapsulation layer 320 may include a polymer-based material. Examples of polymer-based materials may include acrylic resins, epoxy resins, polyimides and polyethylene. In an embodiment, the organic encapsulation layer 320 may include acrylate. The organic encapsulation layer 320 may be formed by curing a monomer or applying a polymer. The organic encapsulation layer 320 may be transparent.
[0151] Although not shown, the touch sensor layer may be disposed on the encapsulation layer 300, and the optical functional layer may be disposed on the touch sensor layer. The touch sensor layer may obtain coordinate information based on external input (e.g., a touch event). The optical functional layer may reduce the reflectivity of light (external light) incident from the outside toward the display device and / or may improve the color purity of light emitted from the display device. In an embodiment, the optical functional layer may include a phase retarder and / or a polarizer. The phase retarder may be a film type or a liquid crystal coating type, and may include a λ / 2 phase retarder and / or a λ / 4 phase retarder. The polarizer may also be a film type or a liquid crystal coating type. The film type may include an elongated synthetic resin film, and the liquid crystal coating type may include liquid crystals arranged in a certain arrangement. The phase retarder and the polarizer may also include a protective film.
[0152] The adhesive member may be disposed between the touch sensor layer and the optical function layer. As the adhesive member, a general adhesive member known in the art may be used without limitation. The adhesive member may be a pressure sensitive adhesive ("PSA").
[0153] Fig. 9 is an equivalent circuit diagram of one pixel PX in the display panel according to the embodiment.
[0154] Reference Fig. 9 , each pixel PX may include a pixel circuit PC and a display element (e.g., an organic light emitting diode OLED) connected to the pixel circuit PC. The pixel circuit PC may include a first thin film transistor T1, a second thin film transistor T2, and a storage capacitor Cst. Each pixel PX may emit, for example, red light, green light, blue light, or white light through the organic light emitting diode OLED.
[0155] The second thin film transistor T2 is a switching thin film transistor, the second thin film transistor T2 may be connected to the scan line SL and the data line DL, and the second thin film transistor T2 may be configured to transfer a data voltage input from the data line DL to the first thin film transistor T1 based on a switching voltage input from the scan line SL. The storage capacitor Cst may be connected to the second thin film transistor T2 and the driving voltage line PL, and may store a voltage corresponding to a difference between a voltage received from the second thin film transistor T2 and a first power supply voltage ELVDD supplied to the driving voltage line PL.
[0156] The first thin film transistor T1 is a driving thin film transistor, and the first thin film transistor T1 can be connected to the driving voltage line PL and the storage capacitor Cst, and the first thin film transistor T1 can be configured to control the driving current flowing from the driving voltage line PL through the organic light emitting diode OLED in response to the voltage stored in the storage capacitor Cst. The organic light emitting diode OLED can emit light with a certain brightness according to the driving current. The counter electrode (e.g., cathode) of the organic light emitting diode OLED can receive the second power supply voltage ELVSS.
[0157] although Fig. 9 The pixel circuit PC including two thin film transistors and one storage capacitor is shown, but one or more embodiments are not limited thereto. The number of thin film transistors and the number of storage capacitors may be variously modified according to the design of the pixel circuit PC. For example, in addition to the above-mentioned two thin film transistors, the pixel circuit PC may also include four or at least five thin film transistors.
[0158] According to one or more embodiments described above, the mask assembly and the method and apparatus for manufacturing a display device may allow deposition of a deposition material in a precise pattern and manufacture of a high-resolution display device.
[0159] According to one or more of the embodiments described above, a method of manufacturing a mask assembly may allow manufacturing a mask assembly that is light and has an extended lifespan.
[0160] It should be understood that the embodiments described herein should be considered in a descriptive sense only and not for limiting purposes. The description of features or aspects within each embodiment should generally be considered as other similar features or aspects that can be used in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope defined by the appended claims.
Claims
1. A mask assembly, wherein: The mask assembly comprises: a bracket defining a first opening therein; a connecting portion defining a second opening therein, the connecting portion being disposed on the bracket and comprising at least one of a metal, a metal oxide, a metal nitride, and an alloy of the metal, wherein the second opening corresponds to the first opening; and A mask is disposed on the connection portion, the mask is configured to shield the first opening and the second opening, and the mask defines a plurality of pattern holes corresponding to the first opening and the second opening.
2. The mask assembly according to claim 1, wherein: The support comprises silicon.
3. The mask assembly according to claim 1, wherein: The connecting portion includes at least two layers stacked on each other.
4. The mask assembly according to claim 1, wherein: The mask includes at least one of silicon oxide, silicon nitride, and silicon oxynitride.
5. The mask assembly according to claim 1, wherein: The width of the patterned holes in a cross-sectional view decreases in a direction away from the support.
6. The mask assembly according to claim 1, wherein: The width of the pattern hole in the cross-sectional view decreases in a direction away from the bracket from a surface of the mask facing the connecting portion to a point of the pattern hole, and increases in the direction away from the bracket from the one point of the pattern hole to another surface of the mask opposite to the one surface.
7. The mask assembly according to claim 1, wherein: The width of the first opening is the same as the width of the second opening in a plan view.
8. A method of manufacturing a mask assembly, wherein: The method comprises: sequentially stacking a first base material and a second base material; forming a plurality of process holes separated from each other in the second base material; disposing a third base material on the second base material; forming first openings corresponding to the plurality of process holes in the first base material; and A plurality of pattern holes are formed in the third base material by removing the third base material disposed inside each of the plurality of process holes.
9. The method according to claim 8, wherein: Prior to the forming of the plurality of pattern holes, a surface of the third base material overlapping the plurality of process holes includes corrugations.
10. The method according to claim 8, wherein: The method further includes forming a second opening in the second base material corresponding to the first opening.
11. The method according to claim 8, wherein: The method further includes disposing a covering member on the third base material.
12. The method according to claim 11, wherein: The method further includes removing the covering member.
13. The method according to claim 8, wherein: A width of the pattern holes in a cross-sectional view decreases in a direction away from the first base material.
14. The method according to claim 8, wherein: The width of the pattern hole in the cross-sectional view decreases in a direction away from the first base material from a surface of the third base material facing the second base material to a point of the pattern hole, and increases in the direction away from the first base material from the one point of the pattern hole to another surface of the third base material opposite to the one surface.
15. The method according to claim 8, wherein: The first matrix material includes silicon.
16. The method according to claim 8, wherein: The second matrix material includes at least one of metal, metal oxide, metal nitride and alloy of the metal.
17. The method according to claim 8, wherein: The third matrix material includes at least one of silicon oxide, silicon nitride and silicon oxynitride.
18. The method according to claim 8, wherein: The second matrix material includes at least two layers stacked on each other.
19. An apparatus for manufacturing a display device, wherein: The device comprises: a deposition source facing the substrate; and a mask assembly disposed between the substrate and the deposition source, Wherein, the mask assembly comprises the mask assembly of any one of claims 1 to 7.
20. A method for manufacturing a display device, wherein: The method comprises: arranging the substrate and the mask assembly to face a deposition source; and supplying a deposition material from the deposition source so that the deposition material passes through the mask assembly and is deposited on the substrate, Wherein, the mask assembly comprises the mask assembly of any one of claims 1 to 7.
Citation Information
Patent Citations
Method and apparatus for super resolution of magnetic resonance image
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