A bandgap reference voltage circuit based on channel length modulation effect compensation

Abstract

The present invention relates to a bandgap reference voltage circuit based on channel length modulation effect compensation. The present invention includes a Zener voltage regulator module, which is used to perform preliminary voltage reduction on an external input voltage to generate a primary reference voltage; a linear voltage regulator module, which is coupled to the Zener voltage regulator module and is used to generate a linear voltage regulator; a first-order bandgap reference circuit module, which is coupled to the linear voltage regulator module and is used to generate a first current that has undergone first-order temperature compensation; a λ modulation effect high-order compensation circuit module, which is respectively coupled to the Zener voltage regulator module and the linear voltage regulator module, and the λ modulation effect high-order compensation circuit module generates a second current with a high-order nonlinear temperature coefficient through a channel length modulation effect; and a startup circuit module, which is used to provide a startup voltage and a driving current during the power-on process of the bandgap reference voltage circuit. The present invention can achieve a reference voltage with an ultra-low temperature coefficient.

Description

Technical Field

[0001] The invention relates to the technical field of integrated circuits, and in particular to a bandgap reference voltage circuit based on channel length modulation effect compensation. Background Art

[0002] In the field of integrated circuit design technology, analog circuits are the basis for the stable operation of electronic systems, and voltage reference modules, as key components, provide accurate temperature voltage references, whose slight deviations can affect system performance. In 1971, Widlar proposed the concept of bandgap reference voltage, which has since been widely used in various electronic systems. For example, it provides a stable voltage reference in temperature sensors to achieve accurate temperature measurement; it resists power supply fluctuations in power regulators to ensure stable output voltage; it serves as the core reference for high-precision data conversion in analog-to-digital and digital-to-analog converters; and it ensures reliable storage and reading of data in memory circuits.

[0003] Figure 1 The traditional bandgap reference voltage circuit is shown. Its principle is to add two voltages with opposite temperature coefficients with appropriate weights to generate a reference voltage with zero temperature coefficient. The negative temperature coefficient comes from the base-emitter voltage V of the forward biased bipolar transistor. BE The positive temperature coefficient comes from the difference ΔV between the base-emitter voltage of the two bipolar transistors at different collector currents. BE By multiplying ΔV BE , can compensate V BE However, the bandgap reference voltage after first-order linear compensation still has inherent high-order nonlinearity, which makes it show a curve characteristic with temperature changes. These high-order nonlinear factors cause the temperature coefficient of the reference voltage in the range of -45℃ to 125℃ to be about 25ppm / ℃. In addition, in integrated circuit design, the first-order compensation of the bandgap reference is usually based on a fixed value at room temperature for process error adjustment. Although the center value can be corrected, it will cause a large drift in the temperature coefficient, which is manifested as follows Figure 2 shown.

[0004] With the continuous evolution of integrated circuit technology and the acceleration of technology iteration, the system's performance requirements for bandgap references continue to increase, especially the demand for extremely low temperature coefficients and high precision. Specifically, it is characterized by a small voltage fluctuation range, low noise, and extremely small temperature coefficient. To this end, many studies have proposed high-order curvature compensation strategies, such as achieving ideal compensation by combining resistors with different temperature coefficients, or introducing temperature-related currents in the logarithmic operation ln link for compensation. In addition, the temperature characteristics of the transistor gain β can also be used for compensation. These methods have been verified in practice and can reduce the temperature coefficient to 5ppm / ℃. However, due to the differences in compensation under different process platforms and the design of transistor matching, further reducing the temperature coefficient still faces technical bottlenecks on various process platforms and urgently needs to be broken through. Summary of the invention

[0005] To this end, the present invention provides a bandgap reference voltage circuit based on channel length modulation effect (λ modulation effect) compensation. By adjusting the channel length of the transistor, different high-order compensation functions can be generated to compensate for the high-order nonlinear curvature caused by each process platform, and ultimately achieve a reference voltage with an ultra-low temperature coefficient.

[0006] In order to solve the above technical problems, the present invention provides a bandgap reference voltage circuit based on channel length modulation effect compensation, comprising:

[0007] The Zener voltage regulator module is used to initially step down the external input voltage to generate a primary reference voltage;

[0008] A linear voltage stabilizing source module, the linear voltage stabilizing source module is coupled to the Zener voltage stabilizing source module, the primary reference voltage provides a working voltage for the linear voltage stabilizing source module, and the linear voltage stabilizing source module is used to generate a linear voltage stabilizing source;

[0009] A first-order bandgap reference circuit module, the first-order bandgap reference circuit module is coupled to the linear voltage regulator module, and is used to generate a first current that has undergone first-order temperature compensation;

[0010] A λ modulation effect high-order compensation circuit module is coupled to the Zener voltage regulator module and the linear voltage regulator module, respectively, and the λ modulation effect high-order compensation circuit module generates a second current with a high-order nonlinear temperature coefficient through a channel length modulation effect; wherein the curvature openings of the first current and the second current are opposite, and a reference current with a predetermined temperature coefficient is obtained by summing the two, and the reference current is converted by a resistor to obtain a reference voltage with a predetermined temperature coefficient;

[0011] A startup circuit module is used to provide a startup voltage and a driving current during the power-on process of the bandgap reference voltage circuit, and to shut down its own driving output after the bandgap reference voltage circuit is working; wherein the linear voltage regulator is used to power the first-order bandgap reference circuit module, the λ modulation effect high-order compensation circuit module and the startup circuit module.

[0012] In one embodiment of the present invention, the linear voltage stabilizing source module includes a two-stage operational amplifier negative feedback structure, a voltage dividing resistor, and a capacitor C213 for compensation / filtering. The two-stage operational amplifier negative feedback structure includes: MOS tube M201, MOS tube M202, MOS tube M203, MOS tube M204, MOS tube M205, MOS tube M206, MOS tube M207, MOS tube M208, MOS tube M209 and MOS tube M210. The voltage dividing resistor includes a resistor R211 and a resistor R212.

[0013] The sources of the MOS tube M201 and the MOS tube M202 are connected to each other and then connected to the drain of the MOS tube M203. The drain of the MOS tube M201 is connected to the drain of the MOS tube M206. The gate of the MOS tube M201 is connected between one end of the resistor R211 and one end of the resistor R212.

[0014] The gate of the MOS tube M202 is connected to the bandgap reference voltage V_{REF}, and the drain of the MOS tube M202 is connected to the drain of the MOS tube M208;

[0015] The source of the MOS tube M203 is connected to the ground level;

[0016] The source, gate and drain of the MOS tube M204 are respectively connected to the ground level, the gate of the MOS tube M205 and the drain of the MOS tube M209;

[0017] The source of the MOS tube M205 is connected to the ground level, and the gate and drain of the MOS tube M205 are connected;

[0018] The source of the MOS tube M206, the source of the MOS tube M207, the source of the MOS tube M208, and the source of the MOS tube M209 are all connected to the power supply voltage;

[0019] The gate of the MOS tube M206 is connected to the gate of the MOS tube M207, and the drain and gate of the MOS tube M206 are connected;

[0020] The drain of the MOS tube M207 is connected to the drain of the MOS tube M205;

[0021] The drain and gate of the MOS tube M208 are connected, and the gate of the MOS tube M208 is connected to the gate of the MOS tube M209;

[0022] The drain of the MOS tube M209 is connected to the gate of the MOS tube M210;

[0023] The drain of the MOS tube M210 is connected to the power supply voltage, the source of the MOS tube M210 is respectively connected to the other end of the resistor R211 and one end of the capacitor C213, and the other end of the capacitor C213 and the other end of the resistor R212 are connected to the ground level.

[0024] In one embodiment of the present invention, the first-order bandgap reference circuit module includes: a current-voltage mirror structure, a transistor Q301, a transistor Q302, a resistor R303, a resistor R304, and a resistor R305, and the current-voltage mirror structure includes: a MOS tube M306, a MOS tube M307, a MOS tube M308, a MOS tube M309, a MOS tube M310, and a MOS tube M311;

[0025] The emitter of the transistor Q301 and the emitter of the transistor Q302 are connected to the ground level respectively, the base and collector of the transistor Q301 are connected, and the base and collector of the transistor Q302 are connected;

[0026] One end of the resistor R303 is connected to the collector of the transistor Q302, and the other end is respectively connected to one end of the resistor R305 and the source of the MOS tube M307, and the other end of the resistor R305 is grounded;

[0027] One end of the resistor R304 is connected to the ground level, and the other end is connected to the collector of the transistor Q301 and the source of the MOS tube M306;

[0028] The gate of the MOS tube M306 is connected to the gate of the MOS tube M307, the gate and drain of the MOS tube M306 are connected, the drain of the MOS tube M306 is connected to the drain of the MOS tube M308, and the drain of the MOS tube M307 is connected to the drain of the MOS tube M309;

[0029] The gate of the MOS tube M308 is connected to the gate of the MOS tube M309, the source of the MOS tube M308 is connected to the drain of the MOS tube M310, the gate and drain of the MOS tube M309 are connected, and the source of the MOS tube M309 is connected to the drain of the MOS tube M311;

[0030] The gate of the MOS tube M310 is connected to the gate of the MOS tube M311, and the gate and drain of the MOS tube M311 are connected;

[0031] The source of the MOS tube M310 and the source of the MOS tube M311 are connected and then connected to the Zener voltage stabilization source module.

[0032] In one embodiment of the present invention, the λ modulation effect high-order compensation circuit module includes: a transistor Q401, a transistor Q402, a MOS transistor M406, a MOS transistor M407, a MOS transistor M408, a MOS transistor M409, a resistor R403, a resistor R404, and a resistor R405;

[0033] The emitters of transistors Q401 and Q402 are connected to the ground level;

[0034] The base of transistor Q401 is connected to the collector, and the base of transistor Q402 is connected to the collector;

[0035] The source of the MOS tube M406 is connected to the collector of the transistor Q401 and is connected to the ground level through the resistor R404;

[0036] The source of MOS tube M407 is connected to the collector of Q402 through resistor R403 and to the ground level through resistor R405;

[0037] The gate of the MOS tube M406 is connected to the gate of the MOS tube M407, the gate and drain of the MOS tube M406 are connected, the drain of the MOS tube M406 is connected to the drain of the MOS tube M408, and the drain of the MOS tube M407 is connected to the drain of the MOS tube M409;

[0038] The gate of the MOS tube M408 is connected to the gate of the MOS tube M409, the gate and drain of the MOS tube M409 are connected, the source of the MOS tube M408 is connected to the source of the MOS tube M409 and then connected to the Zener voltage stabilization source module.

[0039] In one embodiment of the present invention, the startup circuit module includes MOS tube M501, MOS tube M502, MOS tube M503, MOS tube M504, MOS tube M505, MOS tube M506, and MOS tube M507;

[0040] The gate and source of the MOS tube M501 are connected to the bandgap reference voltage V_{REF} and the ground level respectively;

[0041] The gate of the MOS tube M502, the drain of the MOS tube M501 and the gate of the MOS tube M503 are connected, the source of the MOS tube M502 is connected to the ground level, and the drain of the MOS tube M502 is connected to the λ modulation effect high-order compensation circuit module;

[0042] The source of the MOS tube M503 is connected to the ground level, and the drain of the MOS tube M503 is connected to the λ modulation effect high-order compensation circuit module;

[0043] The drain of MOS tube M504 is connected to the drain of MOS tube M501, the source of MOS tube M504 is connected to the drain of MOS tube M505, the source of MOS tube M505 is connected to the drain of MOS tube M506, the source of MOS tube M506 is connected to the drain of MOS tube M507, and the source of MOS tube M507 is connected to the Zener voltage regulator module;

[0044] The drain of the MOS tube M504, the gate of the MOS tube M504, and the gate of the MOS tube M505 are connected to each other; the drain of the MOS tube M505, the gate of the MOS tube M506, and the gate of the MOS tube M507 are connected to each other.

[0045] In an embodiment of the present invention, the device further includes a resistor R601, a resistor R602, a resistor R603, a MOS tube M604, a MOS tube M605, a MOS tube M606, a MOS tube M607, a MOS tube M608, a MOS tube M609, a MOS tube M701, a MOS tube M702, a MOS tube M703, and a MOS tube M704;

[0046] The drain of the MOS tube M604 is connected to the ground level through the resistor R601, the source of the MOS tube M604 is connected to the drain of the MOS tube M605, and the gate of the MOS tube M604, the gate of the MOS tube M608, and the gate of the MOS tube M702 are connected to the first-order bandgap reference circuit module;

[0047] The source electrodes of the MOS tube M605, the MOS tube M606, the MOS tube M607, the MOS tube M609, the MOS tube M703 and the MOS tube M704 are connected to the Zener voltage stabilization source module;

[0048] The gate of the MOS tube M605, the gate of the MOS tube M607, and the gate of the MOS tube M704 are connected to a first-order bandgap reference circuit module;

[0049] The gate of the MOS tube M606, the gate of the MOS tube M609, and the gate of the MOS tube M703 are connected to the λ modulation effect high-order compensation circuit module, and the drain of the MOS tube M606 is connected to the ground level through the resistor R602;

[0050] The drain of the MOS tube M607 is connected to the source of the MOS tube M608, and the drain of the MOS tube M608 is connected to the ground level and the drain of the MOS tube M609 through the resistor R603;

[0051] The drain of the MOS tube M704 is connected to the drain of the MOS tube M702 and the drain of the MOS tube M701, the drain of the MOS tube M703 is connected to the source of the MOS tube M702, the gate and drain of the MOS tube M701 are connected, and the source of the MOS tube M701 is connected to the ground level.

[0052] In one embodiment of the present invention, the first-order bandgap reference circuit module includes: MOS tube M306*, MOS tube M307*, MOS tube M308*, MOS tube M309*, MOS tube M310*, MOS tube M311*, MOS tube M312*, MOS tube M313*, MOS tube M314*, MOS tube M315*, resistor R301*, resistor R302*, resistor R303*, triode Q304*, triode Q305*;

[0053] The collector and base of the transistor Q304* are connected, the emitter of the transistor Q304* is connected to the Zener voltage regulator module and the source of the MOS tube M314* through the resistor R301*, and the collector of the transistor Q304* is connected to the Zener voltage regulator module;

[0054] The collector and base of the transistor Q305* are connected, the collector of the transistor Q305* is connected to the Zener voltage regulator module through the resistor R302*, the emitter of the transistor Q305* is connected to the source of the MOS tube M315*, and is connected to the Zener voltage regulator module through the resistor R303*;

[0055] The source electrodes of the MOS tube M309*, the MOS tube M310*, and the MOS tube M311* are connected to the ground level;

[0056] The gate of the MOS tube M310* and the gate of the MOS tube M311* are connected and then connected to the gate of the MOS tube M309* and the drain of the MOS tube M310* respectively. The drain of the MOS tube M310* is connected to the source of the MOS tube M312*.

[0057] The drain of the MOS tube M311* is connected to the source of the MOS tube M313*; the drain of the MOS tube M309* is connected to the source of the MOS tube M308*;

[0058] The gate of the MOS tube M312* and the gate of the MOS tube M313* are connected and then connected to the gate of the MOS tube M308* and the drain of the MOS tube M312* respectively. The drain of the MOS tube M312* is connected to the drain of the MOS tube M314*; the drain of the MOS tube M313* is connected to the drain of the MOS tube M315*.

[0059] The gate of the MOS tube M314* is connected to the gate of the MOS tube M315*; the gate and drain of the MOS tube M315* are connected;

[0060] The drain of the MOS tube M306* is connected to the source of the MOS tube M307*, and the source of the MOS tube M306* is connected to the Zener voltage regulator module; the gate and drain of the MOS tube M306* are connected, and the gate and drain of the MOS tube M307* are connected;

[0061] The drain of the MOS tube M307* is connected to the drain of the MOS tube M308*.

[0062] In one embodiment of the present invention, the λ modulation effect high-order compensation circuit module includes a MOS tube M406*, a MOS tube M407*, a MOS tube M409*, a MOS tube M410*, a MOS tube M411*, a MOS tube M412*, a MOS tube M413*, a triode Q404*, a triode Q405*, a resistor R401*, a resistor R402*, and a resistor R403*;

[0063] The collector and base of the transistor Q404* are connected, the emitter of the transistor Q404* is connected to the Zener voltage regulator module and the source of the MOS tube M412* through the resistor R401*, and the collector of the transistor Q404* is connected to the Zener voltage regulator module;

[0064] The collector and base of the transistor Q405* are connected, the collector of the transistor Q405* is connected to the Zener voltage regulator module through the resistor R402*, the emitter of the transistor Q405* is connected to the source of the MOS tube M413*, and is connected to the Zener voltage regulator module through the resistor R403*;

[0065] The source electrodes of the MOS tube M409*, the MOS tube M410*, and the MOS tube M411* are connected to the ground level;

[0066] The gate of the MOS tube M410* and the gate of the MOS tube M411* are connected and then connected to the gate of the MOS tube M409* and the drain of the MOS tube M410* respectively. The drain of the MOS tube M410* is connected to the drain of the MOS tube M412*.

[0067] The drain of the MOS tube M411* is connected to the drain of the MOS tube M413*; the drain of the MOS tube M409* is connected to the drain of the MOS tube M407*;

[0068] The gate of the MOS tube M412* is connected to the gate of the MOS tube M413*; the gate and drain of the MOS tube M413* are connected;

[0069] The drain of the MOS tube M406* is connected to the source of the MOS tube M407*, and the source of the MOS tube M406* is connected to the Zener voltage regulator module; the gate and drain of the MOS tube M406* are connected, and the gate and drain of the MOS tube M407* are connected.

[0070] In one embodiment of the present invention, the device further includes a resistor R601*, a resistor R602*, a resistor R603*, a MOS tube M604*, a MOS tube M605*, a MOS tube M606*, a MOS tube M607*, a MOS tube M608*, a MOS tube M609*, a MOS tube M610*, a MOS tube M611*, a MOS tube M701*, a MOS tube M702*, a MOS tube M703*, a MOS tube M704*; a MOS tube M705*;

[0071] The drain of the MOS tube M604* is connected to the ground level through the resistor R601*, the source of the MOS tube M604* is connected to the drain of the MOS tube M605*, and the gate of the MOS tube M604*, the gate of the MOS tube M608*, and the gate of the MOS tube M704* are connected to the first-order bandgap reference circuit module;

[0072] The source electrodes of the MOS tube M605*, the MOS tube M606*, the MOS tube M608*, the MOS tube M610*, the MOS tube M704*, and the MOS tube M705* are connected to the Zener voltage stabilization source module;

[0073] The gate of the MOS tube M605*, the gate of the MOS tube M609*, and the gate of the MOS tube M702* are connected to the first-order bandgap reference circuit module;

[0074] The gate of the MOS tube M606*, the gate of the MOS tube M610*, and the gate of the MOS tube M703* are connected to the λ modulation effect high-order compensation circuit module, the drain of the MOS tube M606* is connected to the source of the MOS tube M607*, and the drain of the MOS tube M607* is connected to the ground level through the resistor R602*;

[0075] The drain of the MOS tube M608* is connected to the source of the MOS tube M609*, and the drain of the MOS tube M609* is connected to the ground level through the resistor R603*;

[0076] The drain of MOS tube M704* is connected to the source of MOS tube M702*, the drain of MOS tube M705* is connected to the source of MOS tube M703*, the drain of MOS tube M701* is connected to the drains of MOS tube M702* and MOS tube M703*, the gate and drain of MOS tube M701* are connected, and the source of MOS tube M701* is connected to the ground level.

[0077] The above technical solution of the present invention has the following advantages compared with the prior art:

[0078] The bandgap reference voltage circuit based on channel length modulation effect compensation described in the present invention provides stable working conditions for a first-order bandgap reference circuit and a high-order compensation circuit by combining a Zener voltage regulator with a linear voltage regulator; and then generates a high-order compensation current with a curvature opposite to the first-order compensation by means of the MOS tube channel length modulation effect, thereby greatly reducing the drift of the bandgap reference voltage in a wide temperature range; and finally, combined with a three-stage adjustable resistor adjustment strategy, a high-precision reference output with a fixed center voltage and an ultra-low temperature coefficient is achieved under a wide range of process fluctuations.

[0079] The present invention adjusts the output current of the first-order bandgap reference circuit module to obtain the minimum temperature coefficient; adjusts the output current of the λ modulation effect high-order compensation circuit module to match the output current of the first-order bandgap reference circuit module in terms of high-order curvature; and adjusts the output conversion resistor to obtain an output voltage with a fixed center value. In the face of process manufacturing errors, a bandgap reference voltage with a fixed center value and an extremely low temperature coefficient can also be achieved.

[0080] The present invention adds a linear voltage stabilizing source module to the rear stage of the Zener voltage stabilizing source module. The Zener diode in the Zener voltage stabilizing source module cooperates with the source follower of the MOS tube M103 to initially reduce the external input voltage and provide a basic reference voltage. On this basis, the MOS tube M103 plays a certain role in enhancing the load capacity. The linear voltage stabilizing source module adopts a secondary operational amplifier negative feedback structure (LDO) to further precisely stabilize the voltage on the basis of the primary reference voltage. The negative feedback regulation is formed by the voltage divider resistor (R211, R212) and the operational amplifier structure (M201~M210), which can make the output voltage have the characteristics of high precision, low ripple and small temperature drift. When the linear voltage stabilizing module is started, the voltage provided will be higher than the voltage of the Zener voltage stabilizing source, so that only the linear voltage stabilizing source module is used to power the bandgap reference core circuit, thereby suppressing the output reference fluctuation caused by power supply fluctuation. The startup circuit module ensures power-on reliability and avoids working point merging. In the initial stage of circuit power-on, the module prevents the bandgap core water path from having a dead zone state of zero bias current. When the bandgap reference voltage is established, the startup circuit automatically shuts down and stops injecting excess current into the core circuit, reducing disturbances to the reference output and additional power consumption.

[0081] The present invention further adopts an NMOS cascode structure in the current mirror stage inside the first-order bandgap reference circuit module and the λ modulation effect high-order compensation circuit module to reduce the influence of channel length modulation at the resistor sampling port. The simulation results show that the temperature coefficient in this embodiment can be as low as 0.698ppm / ℃. BRIEF DESCRIPTION OF THE DRAWINGS

[0082] In order to make the contents of the present invention more clearly understood, the present invention is further described in detail below based on specific embodiments of the present invention in conjunction with the accompanying drawings.

[0083] Figure 1 This is the schematic diagram of the traditional first-order bandgap reference circuit.

[0084] Figure 2 This is a schematic diagram of the temperature coefficient offset caused by the traditional first-order bandgap reference circuit after adjustment due to process errors.

[0085] Figure 3 It is a structural diagram of a bandgap reference voltage reference circuit based on channel length modulation effect compensation of the present invention.

[0086] Figure 4 It is a structural diagram of a bandgap reference voltage circuit based on channel length modulation effect compensation according to embodiment 1 of the present invention.

[0087] Figure 5 This is a circuit diagram of a resistor group with trimming.

[0088] Figure 6 This is a simulation result diagram of the reference voltage of the bandgap reference voltage circuit based on channel length modulation effect compensation according to Example 1 of the present invention varying with temperature.

[0089] Figure 7 It is a structural diagram of a bandgap reference voltage circuit based on channel length modulation effect compensation according to embodiment 2 of the present invention.

[0090] Figure 8 This is a simulation result diagram of the reference voltage of the bandgap reference voltage circuit based on channel length modulation effect compensation according to embodiment 2 of the present invention varying with temperature.

[0091] Description of the Figures in the Specification:

[0092] 100. Zener voltage regulator module;

[0093] 200, linear voltage regulator source module;

[0094] 300. First-order bandgap reference circuit module;

[0095] 400, lambda modulation effect high-order compensation circuit module;

[0096] 500. Start the circuit module. DETAILED DESCRIPTION

[0097] The present invention is further described below in conjunction with the accompanying drawings and specific embodiments so that those skilled in the art can better understand the present invention and implement it, but the embodiments are not intended to limit the present invention.

[0098] In the present invention, if directions (up, down, left, right, front and back) are described, it is only for the convenience of describing the technical solution of the present invention, and does not indicate or imply that the technical features referred to must have a specific orientation, be constructed and operate in a specific orientation. Therefore, it cannot be understood as a limitation of the present invention.

[0099] In the present invention, "several" means one or more, "multiple" means more than two, "greater than", "less than", "exceed" and the like are understood to exclude the number itself; "above", "below", "within" and the like are understood to include the number itself. In the description of the present invention, if there is a description of "first" or "second", it is only used for the purpose of distinguishing technical features, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features.

[0100] In the present invention, unless otherwise clearly defined, the words "set", "install", "connect" and the like should be understood in a broad sense, for example, they can be directly connected or indirectly connected through an intermediate medium; they can be fixedly connected or detachably connected or integrally formed; they can be mechanically connected or electrically connected or able to communicate with each other; they can be the internal connection of two elements or the interaction relationship between two elements. Those skilled in the art can reasonably determine the specific meanings of the above words in the present invention in combination with the specific content of the technical solution.

[0101] Example 1

[0102] Reference Figure 3 As shown, a bandgap reference voltage circuit based on channel length modulation effect compensation of the present invention includes a Zener voltage regulator module 100, a linear voltage regulator module 200, a first-order bandgap reference circuit module 300, a λ modulation effect high-order compensation circuit module 400, and a startup circuit module 500; wherein,

[0103] The Zener voltage regulator module 100 is used to initially step down the external input voltage to generate a primary reference voltage after the system is powered on; the Zener voltage regulator module 100 provides a basic voltage source for the internal circuit, which uses a Zener diode to generate a preliminary reference voltage, and through an emitter follower composed of a MOS tube, a stable voltage source output with a certain load capacity is achieved.

[0104] A linear voltage regulator module 200, the linear voltage regulator module 200 is coupled to the Zener voltage regulator module 100, the primary reference voltage provides the linear voltage regulator module 200 with an operating voltage, and the linear voltage regulator module 200 is used to generate a linear voltage regulator. Since the channel length modulation effect is used to perform high-order nonlinear curvature compensation, this will result in poor power ripple suppression capability of the bandgap reference voltage core circuit. To this end, the linear voltage regulator module 200 generates a high-precision, low-temperature-coefficient voltage source output using an LDO (low-dropout linear regulator) structure through an established reference voltage. Subsequently, this high-precision, low-temperature-coefficient voltage source output in turn powers the bandgap reference voltage core circuit. It should be noted that the output voltage of the linear voltage regulator module 200 must be higher than the output voltage of the Zener voltage regulator module 100 to ensure that after the linear voltage regulator module 200 starts working, it is only used to provide power to the bandgap reference voltage core module.

[0105] A first-order bandgap reference circuit module 300, the first-order bandgap reference circuit module 300 is coupled to the linear voltage regulator module 200, and is used to generate a first current after first-order temperature compensation;

[0106] The λ modulation effect high-order compensation circuit module 400 is coupled to the Zener voltage regulator module 100 and the linear voltage regulator module 200, respectively. The λ modulation effect high-order compensation circuit module 400 generates a second current with a high-order nonlinear temperature coefficient through a channel length modulation effect; wherein the curvature openings of the first current and the second current are opposite, and the reference current with a predetermined temperature coefficient is obtained by summing the two, and the reference current is converted by a resistor to obtain a reference voltage with a predetermined temperature coefficient;

[0107] The startup circuit module 500 is used to provide a startup voltage and a driving current during the power-on process of the bandgap reference voltage circuit, and to shut down its own driving output after the bandgap reference voltage circuit works. The module provides a startup voltage for the bandgap reference voltage circuit to prevent the bandgap reference voltage circuit from working in the zero current state area (merging bias point). After the bandgap reference voltage circuit is successfully powered on, the startup circuit module 500 controls the transistor to remain turned off, without affecting the core of the bandgap reference voltage circuit. The linear voltage regulator supplies power to the first-order bandgap reference circuit module 300, the λ modulation effect high-order compensation circuit module 400, and the startup circuit module 500.

[0108] Reference Figure 4 As shown, the Zener voltage regulator module 100 includes: a resistor R101, a Zener diode D102, and a MOS tube M103;

[0109] Two ends of the resistor R101 are respectively connected to the power supply voltage and the cathode of the Zener diode D102;

[0110] The gate of the MOS tube M103 is connected between the resistor R101 and the cathode of the Zener diode D102, the drain of the MOS tube M103 is connected to the power supply voltage, and the source of the MOS tube M103 is connected to the linear voltage regulator module 200 and the first-order bandgap reference circuit module 300 respectively.

[0111] It should be noted that the resistor R101 acts as a current limiting resistor, and the gate voltage of the MOS tube M103 is determined by the reverse breakdown voltage of the Zener diode D102. Theoretically, the breakdown voltage of the Zener diode D102 has a zero temperature coefficient, but due to process errors, the actual breakdown voltage may fluctuate by ±10% and is accompanied by a certain temperature coefficient. Therefore, this voltage is used as a primary reference voltage. The role of the MOS tube M103 is to act as a source follower, thereby enhancing the load capacity of the primary reference voltage. Ultimately, the reference voltage output by the Zener voltage regulator module 100 is the reverse breakdown voltage of the Zener diode D102 minus the gate-source voltage of the MOS tube M103, that is, .

[0112] Specifically, the linear voltage regulator module 200 includes a two-stage operational amplifier negative feedback structure, a voltage dividing resistor, and a capacitor C213 for compensation / filtering. The two-stage operational amplifier negative feedback structure includes: MOS tube M201, MOS tube M202, MOS tube M203, MOS tube M204, MOS tube M205, MOS tube M206, MOS tube M207, MOS tube M208, MOS tube M209 and MOS tube M210. The voltage dividing resistor includes a resistor R211 and a resistor R212.

[0113] The sources of the MOS tube M201 and the MOS tube M202 are connected to each other and then connected to the drain of the MOS tube M203. The drain of the MOS tube M201 is connected to the drain of the MOS tube M206. The gate of the MOS tube M201 is connected between one end of the resistor R211 and one end of the resistor R212.

[0114] The gate of MOS tube M202 is connected to the bandgap reference voltage , the drain of the MOS tube M202 is connected to the drain of the MOS tube M208;

[0115] The source of the MOS tube M203 is connected to the ground level;

[0116] The source, gate and drain of the MOS tube M204 are respectively connected to the ground level, the gate of the MOS tube M205 and the drain of the MOS tube M209;

[0117] The source of the MOS tube M205 is connected to the ground level, and the gate and drain of the MOS tube M205 are connected;

[0118] The source of the MOS tube M206, the source of the MOS tube M207, the source of the MOS tube M208, and the source of the MOS tube M209 are all connected to the power supply voltage;

[0119] The gate of the MOS tube M206 is connected to the gate of the MOS tube M207, and the drain and gate of the MOS tube M206 are connected;

[0120] The drain of the MOS tube M207 is connected to the drain of the MOS tube M205;

[0121] The drain and gate of the MOS tube M208 are connected, and the gate of the MOS tube M208 is connected to the gate of the MOS tube M209;

[0122] The drain of the MOS tube M209 is connected to the gate of the MOS tube M210;

[0123] The drain of the MOS tube M210 is connected to the power supply voltage, the source of the MOS tube M210 is respectively connected to the other end of the resistor R211 and one end of the capacitor C213 (and the source of the MOS tube M103), and the other end of the capacitor C213 and the other end of the resistor R212 are connected to the ground level.

[0124] It should be noted that the linear voltage regulator module 200 uses a two-stage operational amplifier negative feedback structure to implement a low-dropout linear regulator (LDO). Its output voltage is divided by resistors R211 and R212, and the divided voltage is fed back to the gate of the operational input tube, MOS tube M201. The gate signal of MOS tube M202 is determined by the bandgap reference voltage. Therefore, the output voltage of the linear voltage regulator module 200 can be expressed as:

[0125] .

[0126] To ensure that the linear voltage regulator module 200 can independently supply power to the bandgap reference voltage core module after startup, its output voltage must be higher than the output voltage of the Zener voltage regulator module 100.

[0127] .

[0128] This design ensures that after the linear voltage regulator module 200 operates normally, the power supply of the bandgap reference voltage core module is completely provided by the linear voltage regulator module 200 .

[0129] Reference Figure 4As shown, the first-order bandgap reference circuit module 300 includes: a current-voltage mirror structure, a transistor Q301, a transistor Q302, a resistor R303, a resistor R304, and a resistor R305. The current-voltage mirror structure includes: a MOS tube M306, a MOS tube M307, a MOS tube M308, a MOS tube M309, a MOS tube M310, and a MOS tube M311;

[0130] The emitter of the transistor Q301 and the emitter of the transistor Q302 are connected to the ground level respectively, the base and collector of the transistor Q301 are connected, and the base and collector of the transistor Q302 are connected;

[0131] One end of the resistor R303 is connected to the collector of the transistor Q302, and the other end is respectively connected to one end of the resistor R305 and the source of the MOS tube M307, and the other end of the resistor R305 is grounded;

[0132] One end of the resistor R304 is connected to the ground level, and the other end is connected to the collector of the transistor Q301 and the source of the MOS tube M306;

[0133] The gate of the MOS tube M306 is connected to the gate of the MOS tube M307, the gate and drain of the MOS tube M306 are connected, the drain of the MOS tube M306 is connected to the drain of the MOS tube M308, and the drain of the MOS tube M307 is connected to the drain of the MOS tube M309;

[0134] The gate of the MOS tube M308 is connected to the gate of the MOS tube M309, the source of the MOS tube M308 is connected to the drain of the MOS tube M310, the gate and drain of the MOS tube M309 are connected, and the source of the MOS tube M309 is connected to the drain of the MOS tube M311;

[0135] The gate of the MOS tube M310 is connected to the gate of the MOS tube M311, and the gate and drain of the MOS tube M311 are connected;

[0136] The source of the MOS tube M310 is connected to the source of the MOS tube M311 and then connected to the Zener voltage-stabilizing source module 100 (the source of the MOS tube M103 ).

[0137] M306~M311 form a current-voltage mirror structure, in which M308~M311 adopts a cascode structure, which effectively eliminates the error introduced by the channel length modulation effect. The area ratio of Q302 and Q301 is set to 8, and the difference makes the voltage drop on resistor R303:

[0138]

[0139] The voltage drop across resistor R304 is In addition, the resistor R304 and the resistor R305 have the same resistance value. By designing the structure of the resistor R304 to be approximately 8.27 times the resistance value of R303, a current that has undergone first-order temperature compensation can be generated in the current mirrors M308-M311.

[0140] Reference Figure 4 As shown, the main structure of the λ modulation effect high-order compensation circuit module 400 is similar to the first-order bandgap reference circuit module 300. The difference is that in the current-voltage mirror structures M406-M409, no cascode current mirror structure is used, so that M408 and M409 use different channel lengths, which will introduce different high-order nonlinear compensation.

[0141] Specifically, the λ modulation effect high-order compensation circuit module 400 includes: a transistor Q401, a transistor Q402, a MOS transistor M406, a MOS transistor M407, a MOS transistor M408, a MOS transistor M409, a resistor R403, a resistor R404, and a resistor R405;

[0142] The emitters of transistors Q401 and Q402 are connected to the ground level;

[0143] The base of transistor Q401 is connected to the collector, and the base of transistor Q402 is connected to the collector;

[0144] The source of the MOS tube M406 is connected to the collector of the transistor Q401 and is connected to the ground level through the resistor R404;

[0145] The source of MOS tube M407 is connected to the collector of Q402 through resistor R403 and to the ground level through resistor R405;

[0146] The gate of the MOS tube M406 is connected to the gate of the MOS tube M407, the gate and drain of the MOS tube M406 are connected, the drain of the MOS tube M406 is connected to the drain of the MOS tube M408, and the drain of the MOS tube M407 is connected to the drain of the MOS tube M409;

[0147] The gate of the MOS tube M408 is connected to the gate of the MOS tube M409, the gate and drain of the MOS tube M409 are connected, the source of the MOS tube M408 is connected to the source of the MOS tube M409 and then connected to the Zener voltage regulator module 100 (the source of the MOS tube M103).

[0148] Reference Figure 4 As shown, the startup circuit module 500 includes a MOS tube M501, a MOS tube M502, a MOS tube M503, a MOS tube M504, a MOS tube M505, a MOS tube M506, and a MOS tube M507;

[0149] The gate and source of MOS tube M501 are connected to the bandgap reference voltage and ground level;

[0150] The gate of the MOS tube M502, the drain of the MOS tube M501 and the gate of the MOS tube M503 are connected, the source of the MOS tube M502 is connected to the ground level, and the drain of the MOS tube M502 is connected to the λ modulation effect high-order compensation circuit module 400 (between the source of the MOS tube M309 and the drain of the MOS tube M311);

[0151] The source of the MOS tube M503 is connected to the ground level, and the drain of the MOS tube M503 is connected to the λ modulation effect high-order compensation circuit module 400 (between the drain of the MOS tube M407 and the drain of the MOS tube M409);

[0152] The drain of MOS tube M504 is connected to the drain of MOS tube M501, the source of MOS tube M504 is connected to the drain of MOS tube M505, the source of MOS tube M505 is connected to the drain of MOS tube M506, the source of MOS tube M506 is connected to the drain of MOS tube M507, and the source of MOS tube M507 is connected to the Zener voltage regulator source module 100 (the source of MOS tube M103);

[0153] The drain of the MOS tube M504, the gate of the MOS tube M504, and the gate of the MOS tube M505 are connected to each other; the drain of the MOS tube M505, the gate of the MOS tube M506, and the gate of the MOS tube M507 are connected to each other.

[0154] The startup circuit module 500 is intended to ensure reliable startup and stable operation of the bandgap reference voltage core circuit. Transistors M504~M507 are connected in the form of diodes, and their main function is to act as current limiting resistors. During the circuit power-on process, when the bandgap reference core circuit is at the merging point, the output reference voltage is zero. At this time, transistor M501 is in the off state, and its drain voltage is pulled up to a high level, so that transistors M502 and M503 are in the on state, providing driving current for the bandgap reference core circuit, causing it to deviate from the merging point and enter a normal working state. When the bandgap reference voltage core circuit starts to work, transistor M501 is turned on, and its drain voltage is pulled down to a low level, so that transistors M502 and M503 are turned off, and the drive to the bandgap voltage core circuit is stopped.

[0155] Specifically, it also includes a resistor R601, a resistor R602, a resistor R603, a MOS tube M604, a MOS tube M605, a MOS tube M606, a MOS tube M607, a MOS tube M608, a MOS tube M609, a MOS tube M701, a MOS tube M702, a MOS tube M703, and a MOS tube M704;

[0156] The drain of the MOS tube M604 is connected to the ground level through the resistor R601, the source of the MOS tube M604 is connected to the drain of the MOS tube M605, and the gates of the MOS tube M604, the gates of the MOS tube M608, and the gates of the MOS tube M702 are connected to the first-order bandgap reference circuit module 300 (the drain of the MOS tube M307);

[0157] The source electrodes of the MOS tube M605, MOS tube M606, MOS tube M607, MOS tube M609, MOS tube M703 and MOS tube M704 are connected to the Zener voltage-stabilizing source module 100 (the source electrode of the MOS tube M103);

[0158] The gate of the MOS tube M605, the gate of the MOS tube M607, and the gate of the MOS tube M704 are connected to the first-order bandgap reference circuit module 300 (the source of the MOS tube M309);

[0159] The gate of the MOS tube M606, the gate of the MOS tube M609, and the gate of the MOS tube M703 are connected to the λ modulation effect high-order compensation circuit module 400 (the drain of the MOS tube M407), and the drain of the MOS tube M606 is connected to the ground level through the resistor R602;

[0160] The drain of the MOS tube M607 is connected to the source of the MOS tube M608, and the drain of the MOS tube M608 is connected to the ground level and the drain of the MOS tube M609 through the resistor R603;

[0161] The drain of the MOS tube M704 is connected to the drain of the MOS tube M702 and the drain of the MOS tube M701, the drain of the MOS tube M703 is connected to the source of the MOS tube M702, the gate and drain of the MOS tube M701 are connected, and the source of the MOS tube M701 is connected to the ground level.

[0162] Reference Figure 5 As shown, in order to reduce the influence of process error on the temperature coefficient, the resistors R303, R403 and R603 are adjustable resistors. The adjustable resistors include resistors R801 to R808, fuse resistors R813 to R816 and MOS tubes M813 to M834;

[0163] The drain of the MOS tube M817 is connected to the drain of the MOS tube M818, the source of the MOS tube M817 is connected to the power supply end, and the gate of the MOS tube M817 is connected to the gate of the MOS tube M833;

[0164] The gate of the MOS tube M818 is connected to the gate of the MOS tube M820, the drain of the MOS tube M818 is connected to its own gate, and the source of the MOS tube M818 is grounded through the resistor R813; the gate of the MOS tube M819 is connected to the gate of the MOS tube M833, the drain of the MOS tube M819 is connected to the drain of the MOS tube M820 and the gate of the MOS tube M812, the source of the MOS tube M820 is grounded, the resistor R808 and the resistor R804 are connected in parallel, and one end of each is connected to the source and drain of the MOS tube M812 respectively, and the other end after parallel connection is connected to the resistor R805;

[0165] The drain of the MOS tube M821 is connected to the drain of the MOS tube M822, the source of the MOS tube M821 is connected to the power supply end, and the gate of the MOS tube M821 is connected to the gate of the MOS tube M833;

[0166] The gate of the MOS tube M822 is connected to the gate of the MOS tube M824, the drain of the MOS tube M822 is connected to its own gate, the source of the MOS tube M822 is grounded through the resistor R814, the gate of the MOS tube M823 is connected to the gate of the MOS tube M833, the drain of the MOS tube M823 is connected to the drain of the MOS tube M824 and the gate of the MOS tube M811, the source of the MOS tube M824 is grounded, the resistor R807 and the resistor R803 are connected in parallel, and one end of each is connected to the source and drain of the MOS tube M811 respectively, and the other end after parallel connection is connected to one end of the resistor R804;

[0167] The drain of the MOS tube M825 is connected to the drain of the MOS tube M826, the source of the MOS tube M825 is connected to the power supply end, and the gate of the MOS tube M825 is connected to the gate of the MOS tube M833;

[0168] The gate of the MOS tube M826 is connected to the gate of the MOS tube M828, the drain of the MOS tube M826 is connected to its own gate, the source of the MOS tube M826 is grounded through the resistor R815, the gate of the MOS tube M827 is connected to the gate of the MOS tube M833, the drain of the MOS tube M827 is connected to the drain of the MOS tube M828 and the gate of the MOS tube M810, the source of the MOS tube M828 is grounded, the resistor R806 and the resistor R802 are connected in parallel, and one end of each is connected to the source and drain of the MOS tube M810 respectively, and the other end after parallel connection is connected to one end of the resistor R803;

[0169] The drain of the MOS tube M829 is connected to the drain of the MOS tube M830, the source of the MOS tube M829 is connected to the power supply end, and the gate of the MOS tube M829 is connected to the gate of the MOS tube M833;

[0170] The gate of the MOS tube M830 is connected to the gate of the MOS tube M832, the drain of the MOS tube M830 is connected to its own gate, the source of the MOS tube M830 is grounded through the resistor R816, the gate of the MOS tube M831 is connected to the gate of the MOS tube M833, the drain of the MOS tube M831 is connected to the drain of the MOS tube M832 and the gate of the MOS tube M834, and the sources of the MOS tubes M832 and M834 are grounded; the source of the MOS tube M833 is connected to the power supply end, the drain of the MOS tube M833 is connected to the drain of the MOS tube M834 and the gate of the MOS tube M809, and the drain and source of the MOS tube M809 are connected to the two ends of the resistor R801.

[0171] R813~R816 are fuse resistors, whose resistance is only a few ohms before programming, but they are in an open circuit state after programming. By programming the fuse resistors R813~R816, the actual resistance of the resistor R303 can be accurately adjusted, thereby calibrating the curvature of the output reference current, further improving the accuracy and stability of the circuit.

[0172] It should be noted that the transistors M701 - M704 form a current source for transmitting the reference current to the operational amplifier in the linear voltage regulator module 200 .

[0173] The three-stage adjustment is achieved by measuring the voltage across resistors R601 ~ R603 to accurately calibrate the output characteristics of the bandgap reference voltage circuit. The specific steps are as follows:

[0174] 1. First-order compensation: Resistor R601 is used to convert the current in the first-order bandgap reference circuit module 300 into an output voltage. By measuring the voltage temperature coefficient on resistor R601 and burning and adjusting the resistance value of resistor R303, first-order temperature compensation can be achieved.

[0175] 2. High-order compensation: By measuring the voltage temperature coefficient on the resistor R602 and adjusting the resistance value of the resistor R403 accordingly, the output current of the λ modulation effect high-order compensation circuit module 400 obtains a curvature that matches the output current of the first-order bandgap reference circuit module 300.

[0176] 3. Center value correction: After high-order compensation is completed, the current on resistor R603 has high-order compensation characteristics. By adjusting the resistance value of resistor R603, the center value of its output voltage returns to the typical value, thereby obtaining a bandgap reference voltage with an extremely low temperature coefficient and a fixed center value on resistor R603.

[0177] Figure 6The curve of the output reference voltage changing with temperature is shown in Figure 1. Its temperature coefficient is as low as 1.781ppm / ℃. It should be noted that this high-order compensation is not the best solution because when the resistors are converted into voltage, the mismatch of the voltage on resistors R602 and R603 will still cause some errors due to the channel length modulation effect of M606 and M609.

[0178] Example 2

[0179] Reference Figure 7 As shown, in order to optimize the error caused by the mismatch of the voltages on the resistors R602 and R603 in the embodiment, the current-voltage mirrors in the first-order bandgap reference circuit module 300 and the λ modulation effect high-order compensation circuit module 400 are implemented by NMOS (M310*~M315* and M410*~M413*), and then converted into output reference current through a cascode structure (M306*~M307* and M406*~M407*), thereby eliminating the influence of the channel modulation effect caused by the output load voltage. Figure 8 The curve showing the variation of the output reference voltage with temperature in Example 2 is shown. Its temperature coefficient is as low as 0.698ppm / ℃, which is better than 1.781ppm / ℃ in Example 1.

[0180] In this embodiment, the first-order bandgap reference circuit module 300 includes: MOS transistor M306*, MOS transistor M307*, MOS transistor M308*, MOS transistor M309*, MOS transistor M310*, MOS transistor M311*, MOS transistor M312*, MOS transistor M313*, MOS transistor M314*, MOS transistor M315*, resistor R301*, resistor R302*, resistor R303*, triode Q304*, triode Q305*;

[0181] The collector and base of the transistor Q304* are connected, the emitter of the transistor Q304* is connected to the Zener voltage regulator module 100 (the source of the MOS tube M103) and the source of the MOS tube M314* through the resistor R301*, and the collector of the transistor Q304* is connected to the Zener voltage regulator module 100 (the source of the MOS tube M103);

[0182] The collector and base of the transistor Q305* are connected, the collector of the transistor Q305* is connected to the Zener voltage regulator module 100 (the source of the MOS tube M103) through the resistor R302*, the emitter of the transistor Q305* is connected to the source of the MOS tube M315*, and is connected to the Zener voltage regulator module 100 through the resistor R303*;

[0183] The source electrodes of the MOS tube M309*, the MOS tube M310*, and the MOS tube M311* are connected to the ground level;

[0184] The gate of the MOS tube M310* and the gate of the MOS tube M311* are connected and then connected to the gate of the MOS tube M309* and the drain of the MOS tube M310* respectively. The drain of the MOS tube M310* is connected to the source of the MOS tube M312*.

[0185] The drain of the MOS tube M311* is connected to the source of the MOS tube M313*; the drain of the MOS tube M309* is connected to the source of the MOS tube M308*;

[0186] The gate of the MOS tube M312* and the gate of the MOS tube M313* are connected and then connected to the gate of the MOS tube M308* and the drain of the MOS tube M312* respectively. The drain of the MOS tube M312* is connected to the drain of the MOS tube M314*; the drain of the MOS tube M313* is connected to the drain of the MOS tube M315*.

[0187] The gate of the MOS tube M314* is connected to the gate of the MOS tube M315*; the gate and drain of the MOS tube M315* are connected;

[0188] The drain of the MOS tube M306* is connected to the source of the MOS tube M307*, and the source of the MOS tube M306* is connected to the Zener voltage regulator module 100 (the source of the MOS tube M103); the gate and drain of the MOS tube M306* are connected, and the gate and drain of the MOS tube M307* are connected;

[0189] The drain of the MOS tube M307* is connected to the drain of the MOS tube M308*.

[0190] Specifically, the λ modulation effect high-order compensation circuit module 400 includes a MOS transistor M406*, a MOS transistor M407*, a MOS transistor M409*, a MOS transistor M410*, a MOS transistor M411*, a MOS transistor M412*, a MOS transistor M413*, a triode Q404*, a triode Q405*, a resistor R401*, a resistor R402*, and a resistor R403*;

[0191] The collector and base of the transistor Q404* are connected, the emitter of the transistor Q404* is connected to the Zener voltage regulator module 100 (the source of the MOS tube M103) and the source of the MOS tube M412* through the resistor R401*, and the collector of the transistor Q404* is connected to the Zener voltage regulator module 100 (the source of the MOS tube M103);

[0192] The collector and base of the transistor Q405* are connected, the collector of the transistor Q405* is connected to the Zener voltage regulator module 100 (the source of the MOS tube M103) through the resistor R402*, the emitter of the transistor Q405* is connected to the source of the MOS tube M413*, and is connected to the Zener voltage regulator module 100 through the resistor R403*;

[0193] The source electrodes of the MOS tube M409*, the MOS tube M410*, and the MOS tube M411* are connected to the ground level;

[0194] The gate of the MOS tube M410* and the gate of the MOS tube M411* are connected and then connected to the gate of the MOS tube M409* and the drain of the MOS tube M410* respectively. The drain of the MOS tube M410* is connected to the drain of the MOS tube M412*.

[0195] The drain of the MOS tube M411* is connected to the drain of the MOS tube M413*; the drain of the MOS tube M409* is connected to the drain of the MOS tube M407*;

[0196] The gate of the MOS tube M412* is connected to the gate of the MOS tube M413*; the gate and drain of the MOS tube M413* are connected;

[0197] The drain of the MOS tube M406* is connected to the source of the MOS tube M407*, and the source of the MOS tube M406* is connected to the Zener voltage regulator module 100 (the source of the MOS tube M103); the gate and drain of the MOS tube M406* are connected, and the gate and drain of the MOS tube M407* are connected.

[0198] Specifically, it also includes a resistor R601*, a resistor R602*, a resistor R603*, a MOS tube M604*, a MOS tube M605*, a MOS tube M606*, a MOS tube M607*, a MOS tube M608*, a MOS tube M609*, a MOS tube M610*, a MOS tube M611*, a MOS tube M701*, a MOS tube M702*, a MOS tube M703*, a MOS tube M704*; a MOS tube M705*;

[0199] The drain of the MOS tube M604* is connected to the ground level through the resistor R601*, the source of the MOS tube M604* is connected to the drain of the MOS tube M605*, and the gate of the MOS tube M604, the gate of the MOS tube M608*, and the gate of the MOS tube M704* are connected to the first-order bandgap reference circuit module 300 (the drain and gate of the MOS tube M307*);

[0200] The source electrodes of the MOS tube M605*, MOS tube M606*, MOS tube M608*, MOS tube M610*, MOS tube M704*, and MOS tube M705* are connected to the Zener voltage-stabilizing source module 100 (the source electrode of the MOS tube M103);

[0201] The gate of the MOS tube M605*, the gate of the MOS tube M609*, and the gate of the MOS tube M702* are connected to the first-order bandgap reference circuit module 300 (the source of the MOS tube M307*);

[0202] The gates of the MOS tube M606*, the gates of the MOS tube M610*, and the gates of the MOS tube M703* are connected to the λ modulation effect high-order compensation circuit module 400 (the drain and gate of the MOS tube M407*), the drain of the MOS tube M606* is connected to the source of the MOS tube M607*, and the drain of the MOS tube M607* is connected to the ground level through the resistor R602*;

[0203] The drain of the MOS tube M608* is connected to the source of the MOS tube M609*, and the drain of the MOS tube M609* is connected to the ground level through the resistor R603*;

[0204] The drain of MOS tube M704* is connected to the source of MOS tube M702*, the drain of MOS tube M705* is connected to the source of MOS tube M703*, the drain of MOS tube M701* is connected to the drains of MOS tube M702* and MOS tube M703*, the gate and drain of MOS tube M701* are connected, and the source of MOS tube M701* is connected to the ground level.

[0205] In addition, R302*, R402*, and R603* also use adjustable resistors.

[0206] It should be noted that the components and structures of the Zener voltage regulator module 100 , the linear voltage regulator module 200 and the startup circuit module 500 in the second embodiment are the same as those in the first embodiment.

[0207] Example 3

[0208] Based on the bandgap reference voltage circuits of Embodiments 1 and 2, the main function of the first-order bandgap reference circuit module 300 is similar to that of the conventional bandgap reference circuit, which is used to generate a current after first-order temperature compensation. (i.e. the first current). Among them, the positive temperature coefficient current ( ) is the base-emitter voltage difference of a bipolar transistor with N times the emitter area ratio under the same collector current ( ) in the resistor The current generated on (resistor R303 in embodiment 1, resistor R302* in embodiment 2) is expressed as:

[0209] ;

[0210] The negative temperature coefficient current ( ) is derived from the base-emitter voltage ( ) of the forward-biased bipolar transistor across the resistor (resistor R304 or resistor R305 in Embodiment 1, R304 = R305; resistor R301* or resistor R303* in Embodiment 2, R301* = R303*), and its expression is:

[0211] ;

[0212] Where is the reference temperature; is the bandgap reference voltage at the reference temperature; is the base-emitter voltage at the reference temperature; is the Boltzmann constant; is the electron charge; is the temperature; is the temperature-dependent parameter of the silicon mobility; is the collector current; is the collector current at the reference temperature; is the bandgap voltage of silicon, and its temperature expression is:

[0213] ;

[0214] In different temperature ranges, the parameter values are as follows:

[0215] When 150K ≤ T ≤ 300K, , , .

[0216] When 300K < T < 400K, , , .

[0217] By adjusting the resistance ratio of and , the superimposed current of the positive temperature coefficient current and the negative temperature coefficient current achieves a first-order zero temperature coefficient, and its expression is:

[0218] ;

[0219] Where is and The superimposed equivalent resistance. At this time, the generated current Contains constant terms And higher-order nonlinear terms and . Output current The reference current is shown as a downward opening curvature. If the current is converted into a reference voltage through a resistor, the obtained reference voltage also has a downward opening curvature characteristic.

[0220] The λ modulation effect high-order compensation circuit module 400 introduces a high-order nonlinear temperature coefficient current into the PTAT current applied to the base-emitter of the forward biased bipolar transistor through the channel length modulation effect. (i.e., the second current) forms The current with similar curvature but opening upward, the output current after first-order compensation design The expression is:

[0221] ;

[0222] The channel length modulation effect is used in In this design, The current contains both quadratic and logarithmic functions, so it is difficult to directly obtain the optimal analytical solution. However, with the help of computer simulation tools, the optimal numerical solution for high-order compensation effect can be achieved by adjusting different channel lengths. With upward opening curvature and curvature characteristics close to .

[0223] Finally and The sum is used to obtain a reference current with a very low temperature coefficient, which is then converted into a reference voltage with a very low temperature coefficient through a resistor. .

[0224] The present invention adopts a three-stage trimming mode during the manufacturing process. In the first stage, the output current of the first-order bandgap reference circuit 300 module is trimmed to obtain the minimum temperature coefficient; in the second stage, the output current of the λ modulation effect high-order compensation circuit 400 module is trimmed to match the output current of the first-order bandgap reference circuit 300 module in terms of high-order curvature; in the third stage, the output conversion resistor is trimmed to obtain an output voltage with a fixed center value. Through the above three stages of trimming, a bandgap reference voltage with a fixed center value and an extremely low temperature coefficient can be achieved even in the face of process manufacturing errors.

[0225] Finally, it should be noted that the above specific implementation methods are only used to illustrate the technical solution of the present invention rather than to limit it. Although the present invention has been described in detail with reference to examples, those skilled in the art should understand that the technical solution of the present invention can be modified or replaced by equivalents without departing from the spirit and scope of the technical solution of the present invention, which should be included in the scope of the claims of the present invention.

Claims

1. A bandgap reference voltage circuit based on channel length modulation effect compensation, characterized in that: include: A Zener voltage regulator module (100) is used to initially reduce the voltage of an external input voltage to generate a primary reference voltage; A linear voltage stabilizing source module (200), the linear voltage stabilizing source module (200) being coupled to the Zener voltage stabilizing source module (100), the primary reference voltage providing a working voltage for the linear voltage stabilizing source module (200), the linear voltage stabilizing source module (200) being used to generate a linear voltage stabilizing source; A first-order bandgap reference circuit module (300), the first-order bandgap reference circuit module (300) being coupled to the linear voltage stabilization source module (200) and used for generating a first current that has undergone first-order temperature compensation; the first current being a reference current with a downward opening curvature; A λ modulation effect high-order compensation circuit module (400) is respectively coupled to the Zener voltage regulator module (100) and the linear voltage regulator module (200), wherein the λ modulation effect high-order compensation circuit module (400) generates a second current with a high-order nonlinear temperature coefficient through a channel length modulation effect; wherein the curvature openings of the first current and the second current are opposite, and a reference current with a predetermined temperature coefficient is obtained by summing the two, and the reference current is converted by a resistor to obtain a reference voltage with a predetermined temperature coefficient; A startup circuit module (500) is used to provide a startup voltage and a drive current during the power-on process of a bandgap reference voltage circuit, and to shut down its own drive output after the bandgap reference voltage circuit is operating; wherein the linear voltage regulator supplies power to the first-order bandgap reference circuit module (300), the lambda modulation effect high-order compensation circuit module (400), and the startup circuit module (500).

2. A bandgap reference voltage circuit based on channel length modulation effect compensation according to claim 1, characterized in that: The Zener voltage-stabilizing source module (100) comprises: a resistor R101, a Zener diode D102, and a MOS tube M103; Two ends of the resistor R101 are respectively connected to the power supply voltage and the cathode of the Zener diode D102; The gate of the MOS tube M103 is connected between the resistor R101 and the negative electrode of the Zener diode D102, the drain of the MOS tube M103 is connected to the power supply voltage, and the source of the MOS tube M103 is respectively connected to the linear voltage regulator module (200) and the first-order bandgap reference circuit module (300).

3. The bandgap reference voltage circuit based on channel length modulation effect compensation according to claim 1, characterized in that: The linear voltage stabilizing source module (200) comprises a two-stage operational amplifier negative feedback structure, a voltage dividing resistor, and a capacitor C213 for compensation / filtering. The two-stage operational amplifier negative feedback structure comprises: MOS tube M201, MOS tube M202, MOS tube M203, MOS tube M204, MOS tube M205, MOS tube M206, MOS tube M207, MOS tube M208, MOS tube M209 and MOS tube M210. The voltage dividing resistor comprises a resistor R211 and a resistor R212. The sources of the MOS tube M201 and the MOS tube M202 are connected to each other and then connected to the drain of the MOS tube M203. The drain of the MOS tube M201 is connected to the drain of the MOS tube M206. The gate of the MOS tube M201 is connected between one end of the resistor R211 and one end of the resistor R212. The gate of MOS tube M202 is connected to the bandgap reference voltage V REF , the drain of the MOS tube M202 is connected to the drain of the MOS tube M208; The source of the MOS tube M203 is connected to the ground level; The source, gate and drain of the MOS tube M204 are respectively connected to the ground level, the gate of the MOS tube M205 and the drain of the MOS tube M209; The source of the MOS tube M205 is connected to the ground level, and the gate and drain of the MOS tube M205 are connected; The source of the MOS tube M206, the source of the MOS tube M207, the source of the MOS tube M208, and the source of the MOS tube M209 are all connected to the power supply voltage; The gate of the MOS tube M206 is connected to the gate of the MOS tube M207, and the drain and gate of the MOS tube M206 are connected; The drain of the MOS tube M207 is connected to the drain of the MOS tube M205; The drain and gate of the MOS tube M208 are connected, and the gate of the MOS tube M208 is connected to the gate of the MOS tube M209; The drain of the MOS tube M209 is connected to the gate of the MOS tube M210; The drain of the MOS tube M210 is connected to the power supply voltage, the source of the MOS tube M210 is respectively connected to the other end of the resistor R211 and one end of the capacitor C213, and the other end of the capacitor C213 and the other end of the resistor R212 are connected to the ground level.

4. The bandgap reference voltage circuit based on channel length modulation effect compensation according to claim 1, characterized in that: The first-order bandgap reference circuit module (300) comprises: a current-voltage mirror structure, a transistor Q301, a transistor Q302, a resistor R303, a resistor R304, and a resistor R305; the current-voltage mirror structure comprises: a MOS tube M306, a MOS tube M307, a MOS tube M308, a MOS tube M309, a MOS tube M310, and a MOS tube M311; The emitter of the transistor Q301 and the emitter of the transistor Q302 are connected to the ground level respectively, the base and collector of the transistor Q301 are connected, and the base and collector of the transistor Q302 are connected; One end of the resistor R303 is connected to the collector of the transistor Q302, and the other end is respectively connected to one end of the resistor R305 and the source of the MOS tube M307, and the other end of the resistor R305 is grounded; One end of the resistor R304 is connected to the ground level, and the other end is connected to the collector of the transistor Q301 and the source of the MOS tube M306; The gate of the MOS tube M306 is connected to the gate of the MOS tube M307, the gate and drain of the MOS tube M306 are connected, the drain of the MOS tube M306 is connected to the drain of the MOS tube M308, and the drain of the MOS tube M307 is connected to the drain of the MOS tube M309; The gate of the MOS tube M308 is connected to the gate of the MOS tube M309, the source of the MOS tube M308 is connected to the drain of the MOS tube M310, the gate and drain of the MOS tube M309 are connected, and the source of the MOS tube M309 is connected to the drain of the MOS tube M311; The gate of the MOS tube M310 is connected to the gate of the MOS tube M311, and the gate and drain of the MOS tube M311 are connected; The source electrode of the MOS tube M310 and the source electrode of the MOS tube M311 are connected and then connected to a Zener voltage stabilization source module (100).

5. The bandgap reference voltage circuit based on channel length modulation effect compensation according to claim 1, characterized in that: The λ modulation effect high-order compensation circuit module (400) comprises: a transistor Q401, a transistor Q402, a MOS transistor M406, a MOS transistor M407, a MOS transistor M408, a MOS transistor M409, a resistor R403, a resistor R404, and a resistor R405; The emitters of transistors Q401 and Q402 are connected to the ground level; The base of transistor Q401 is connected to the collector, and the base of transistor Q402 is connected to the collector; The source of the MOS tube M406 is connected to the collector of the transistor Q401 and is connected to the ground level through the resistor R404; The source of MOS tube M407 is connected to the collector of Q402 through resistor R403 and to the ground level through resistor R405; The gate of the MOS tube M406 is connected to the gate of the MOS tube M407, the gate and drain of the MOS tube M406 are connected, the drain of the MOS tube M406 is connected to the drain of the MOS tube M408, and the drain of the MOS tube M407 is connected to the drain of the MOS tube M409; The gate of the MOS tube M408 is connected to the gate of the MOS tube M409, the gate and drain of the MOS tube M409 are connected, the source of the MOS tube M408 is connected to the source of the MOS tube M409 and then connected to the Zener voltage stabilization source module (100).

6. The bandgap reference voltage circuit based on channel length modulation effect compensation according to claim 1, characterized in that: The startup circuit module (500) comprises a MOS tube M501, a MOS tube M502, a MOS tube M503, a MOS tube M504, a MOS tube M505, a MOS tube M506, and a MOS tube M507; The gate and source of MOS tube M501 are connected to the bandgap reference voltage V REF and ground level; The gate of the MOS tube M502, the drain of the MOS tube M501 and the gate of the MOS tube M503 are connected, the source of the MOS tube M502 is connected to the ground level, and the drain of the MOS tube M502 is connected to the lambda modulation effect high-order compensation circuit module (400); The source of the MOS tube M503 is connected to the ground level, and the drain of the MOS tube M503 is connected to the lambda modulation effect high-order compensation circuit module (400); The drain of the MOS tube M504 is connected to the drain of the MOS tube M501, the source of the MOS tube M504 is connected to the drain of the MOS tube M505, the source of the MOS tube M505 is connected to the drain of the MOS tube M506, the source of the MOS tube M506 is connected to the drain of the MOS tube M507, and the source of the MOS tube M507 is connected to the Zener voltage regulator source module (100); The drain of the MOS tube M504, the gate of the MOS tube M504, and the gate of the MOS tube M505 are connected to each other; the drain of the MOS tube M505, the gate of the MOS tube M506, and the gate of the MOS tube M507 are connected to each other.

7. The bandgap reference voltage circuit based on channel length modulation effect compensation according to claim 1, characterized in that: It also includes a resistor R601, a resistor R602, a resistor R603, a MOS tube M604, a MOS tube M605, a MOS tube M606, a MOS tube M607, a MOS tube M608, a MOS tube M609, a MOS tube M701, a MOS tube M702, a MOS tube M703, and a MOS tube M704; The drain of the MOS tube M604 is connected to the ground level through the resistor R601, the source of the MOS tube M604 is connected to the drain of the MOS tube M605, and the gate of the MOS tube M604, the gate of the MOS tube M608, and the gate of the MOS tube M702 are connected to the first-order bandgap reference circuit module (300); The source electrodes of the MOS tube M605, the MOS tube M606, the MOS tube M607, the MOS tube M609, the MOS tube M703 and the MOS tube M704 are all connected to the Zener voltage stabilization source module (100); The gate of the MOS tube M605, the gate of the MOS tube M607, and the gate of the MOS tube M704 are connected to a first-order bandgap reference circuit module (300); The gate of the MOS tube M606, the gate of the MOS tube M609 and the gate of the MOS tube M703 are connected to the λ modulation effect high-order compensation circuit module (400), and the drain of the MOS tube M606 is connected to the ground level through the resistor R602; The drain of the MOS tube M607 is connected to the source of the MOS tube M608, and the drain of the MOS tube M608 is connected to the ground level and the drain of the MOS tube M609 through the resistor R603; The drain of the MOS tube M704 is connected to the drain of the MOS tube M702 and the drain of the MOS tube M701, the drain of the MOS tube M703 is connected to the source of the MOS tube M702, the gate and drain of the MOS tube M701 are connected, and the source of the MOS tube M701 is connected to the ground level.

8. The bandgap reference voltage circuit based on channel length modulation effect compensation according to claim 1, characterized in that: The first-order bandgap reference circuit module (300) comprises: MOS tube M306*, MOS tube M307*, MOS tube M308*, MOS tube M309*, MOS tube M310*, MOS tube M311*, MOS tube M312*, MOS tube M313*, MOS tube M314*, MOS tube M315*, resistor R301*, resistor R302*, resistor R303*, triode Q304*, triode Q305*; The collector and base of the transistor Q304* are connected, the emitter of the transistor Q304* is connected to the Zener voltage regulator module (100) and the source of the MOS tube M314* through the resistor R301*, and the collector of the transistor Q304* is connected to the Zener voltage regulator module (100); The collector and base of the transistor Q305* are connected, the collector of the transistor Q305* is connected to the Zener voltage regulator module (100) via a resistor R302*, the emitter of the transistor Q305* is connected to the source of the MOS tube M315*, and is connected to the Zener voltage regulator module (100) via a resistor R303*; The source electrodes of the MOS tube M309*, the MOS tube M310*, and the MOS tube M311* are connected to the ground level; The gate of the MOS tube M310* and the gate of the MOS tube M311* are connected and then connected to the gate of the MOS tube M309* and the drain of the MOS tube M310* respectively. The drain of the MOS tube M310* is connected to the source of the MOS tube M312*. The drain of the MOS tube M311* is connected to the source of the MOS tube M313*; the drain of the MOS tube M309* is connected to the source of the MOS tube M308*; The gate of the MOS tube M312* and the gate of the MOS tube M313* are connected and then connected to the gate of the MOS tube M308* and the drain of the MOS tube M312* respectively. The drain of the MOS tube M312* is connected to the drain of the MOS tube M314*; the drain of the MOS tube M313* is connected to the drain of the MOS tube M315*. The gate of the MOS tube M314* is connected to the gate of the MOS tube M315*; the gate and drain of the MOS tube M315* are connected; The drain of the MOS tube M306* is connected to the source of the MOS tube M307*, and the source of the MOS tube M306* is connected to the Zener voltage regulator module (100); the gate and drain of the MOS tube M306* are connected, and the gate and drain of the MOS tube M307* are connected; The drain of the MOS tube M307* is connected to the drain of the MOS tube M308*.

9. The bandgap reference voltage circuit based on channel length modulation effect compensation according to claim 1, characterized in that: The λ modulation effect high-order compensation circuit module (400) comprises a MOS tube M406*, a MOS tube M407*, a MOS tube M409*, a MOS tube M410*, a MOS tube M411*, a MOS tube M412*, a MOS tube M413*, a triode Q404*, a triode Q405*, a resistor R401*, a resistor R402*, and a resistor R403*; The collector and base of the transistor Q404* are connected, the emitter of the transistor Q404* is connected to the Zener voltage regulator module (100) and the source of the MOS tube M412* through the resistor R401*, and the collector of the transistor Q404* is connected to the Zener voltage regulator module (100); The collector and base of the transistor Q405* are connected, the collector of the transistor Q405* is connected to the Zener voltage regulator module (100) via the resistor R402*, the emitter of the transistor Q405* is connected to the source of the MOS tube M413*, and is connected to the Zener voltage regulator module (100) via the resistor R403*; The source electrodes of the MOS tube M409*, the MOS tube M410*, and the MOS tube M411* are connected to the ground level; The gate of the MOS tube M410* and the gate of the MOS tube M411* are connected and then connected to the gate of the MOS tube M409* and the drain of the MOS tube M410* respectively. The drain of the MOS tube M410* is connected to the drain of the MOS tube M412*. The drain of the MOS tube M411* is connected to the drain of the MOS tube M413*; the drain of the MOS tube M409* is connected to the drain of the MOS tube M407*; The gate of the MOS tube M412* is connected to the gate of the MOS tube M413*; the gate and drain of the MOS tube M413* are connected; The drain of the MOS tube M406* is connected to the source of the MOS tube M407*, and the source of the MOS tube M406* is connected to the Zener voltage regulator module (100); the gate and drain of the MOS tube M406* are connected, and the gate and drain of the MOS tube M407* are connected.

10. The bandgap reference voltage circuit based on channel length modulation effect compensation according to claim 1, characterized in that: It also includes resistor R601*, resistor R602*, resistor R603*, MOS tube M604*, MOS tube M605*, MOS tube M606*, MOS tube M607*, MOS tube M608*, MOS tube M609*, MOS tube M610*, MOS tube M611*, MOS tube M701*, MOS tube M702*, MOS tube M703*, MOS tube M704*; MOS tube M705*; The drain of the MOS tube M604* is connected to the ground level through the resistor R601*, the source of the MOS tube M604* is connected to the drain of the MOS tube M605*, and the gate of the MOS tube M604*, the gate of the MOS tube M608*, and the gate of the MOS tube M704* are connected to the first-order bandgap reference circuit module (300); The source electrodes of the MOS tube M605*, the MOS tube M606*, the MOS tube M608*, the MOS tube M610*, the MOS tube M704*, and the MOS tube M705* are all connected to the Zener voltage stabilization source module (100); The gate of the MOS tube M605*, the gate of the MOS tube M609*, and the gate of the MOS tube M702* are connected to a first-order bandgap reference circuit module (300); The gate of the MOS tube M606*, the gate of the MOS tube M610*, and the gate of the MOS tube M703* are connected to the λ modulation effect high-order compensation circuit module (400), the drain of the MOS tube M606* is connected to the source of the MOS tube M607*, and the drain of the MOS tube M607* is connected to the ground level through the resistor R602*; The drain of the MOS tube M608* is connected to the source of the MOS tube M609*, and the drain of the MOS tube M609* is connected to the ground level through the resistor R603*; The drain of MOS tube M704* is connected to the source of MOS tube M702*, the drain of MOS tube M705* is connected to the source of MOS tube M703*, the drain of MOS tube M701* is connected to the drains of MOS tube M702* and MOS tube M703*, the gate and drain of MOS tube M701* are connected, and the source of MOS tube M701* is connected to the ground level.

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