Method of migrating data, method of operating storage device, and storage system

Abstract

A method of migrating data, a method of operating a storage device, and a storage system are provided. The method includes: receiving data, read count information about the data, and write count information about the data; selecting at least one memory block among a plurality of memory blocks based on wear levels of the plurality of memory blocks, the read count information, and the write count information; and storing the data in the at least one memory block.

Description

[0001] This application claims the priority of Korean Patent Application No. 10-2023-0116150 filed on September 1, 2023 in the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field

[0002] The present disclosure relates to a storage system and a method of operating the same. Background Art

[0003] In a data center, hundreds or thousands of computer servers (e.g., web servers, mail servers, file servers, video servers, cloud servers, etc.) are installed in one location to provide various stable services to different service users. The data center may use a storage device such as a solid-state drive (SSD) to store and provide various data. SSDs with high processing speeds are mainly used to meet the quality of service (QoS) provided to clients requesting to connect to the data center. Since SSDs have a shorter lifespan than HDDs, a management method for improving the lifespan of SSDs is required. Summary of the invention

[0004] A storage system and an operating method thereof are disclosed that can perform data migration to reduce wear level differences.

[0005] The disclosure also provides a storage system and an operating method thereof that can perform data migration in units of zones.

[0006] According to one aspect of the disclosure, a method for migrating data includes: receiving data, read count information about the data, and write count information about the data; selecting at least one memory block among multiple memory blocks based on wear levels of multiple memory blocks, the read count information, and the write count information; and storing the data in the at least one memory block.

[0007] According to one aspect of the disclosure, a method for operating a storage device includes: setting multiple zones; setting multiple sub-zones to each of the multiple zones; allocating the multiple memory blocks to the multiple sub-zones based on read counts and write counts of the multiple memory blocks; storing information about read counts and write counts corresponding to each of the multiple sub-zones in a zone management table; receiving a data migration request for at least one zone of the multiple zones; and sending data stored in the at least one zone and information about read counts and write counts of multiple sub-zones of the at least one zone from the zone management table.

[0008] According to one aspect of the disclosure, a storage system includes: a source storage device including multiple memory blocks, wherein the source storage device is configured to: allocate the multiple memory blocks into multiple zones, allocate each of the multiple zones into multiple sub-zones, and send information about data stored in one zone of the multiple zones and read counts of multiple sub-zones of the one zone; and a source storage server configured to send information about data stored in the one zone and read counts and write counts of multiple sub-zones of the one zone to a target storage device. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The above and other aspects, features and advantages of certain embodiments of the present disclosure will become more apparent through the following description in conjunction with the accompanying drawings, in which:

[0010] Figure 1 A block diagram showing a storage system according to an embodiment;

[0011] Figure 2 A block diagram illustrating an example of a server and a storage device included in a data center according to an embodiment;

[0012] Figure 3 A block diagram illustrating an example of a storage controller included in a storage device according to an embodiment;

[0013] Figure 4 A block diagram showing an example of a nonvolatile memory included in a storage device according to an embodiment;

[0014] Figure 5 An example of a read / write (R / W) table according to an embodiment is shown;

[0015] Figure 6 A block diagram showing a R / W level of each memory block of a nonvolatile memory according to an embodiment;

[0016] Figure 7 A flow chart showing a data migration method of a storage system according to an embodiment;

[0017] Figure 8 A block diagram illustrating a data migration process of a storage system according to an embodiment;

[0018] Fig. 9 A block diagram illustrating an example of a storage controller included in a storage device according to an embodiment;

[0019] Fig.10 A block diagram showing the R / W level of each region of a nonvolatile memory according to an embodiment;

[0020] Fig.11A block diagram showing the R / W level of each region of various non-volatile memories according to embodiments;

[0021] Fig.12 Block diagram showing a process of changing the R / W level of each area of ​​a nonvolatile memory according to an embodiment

[0022] Fig.13 A block diagram showing the R / W level of each region of a nonvolatile memory according to an embodiment;

[0023] Fig.14 An example of a zone management table according to an embodiment is shown;

[0024] Fig.15 A flow chart showing a data migration method of a storage system according to an embodiment;

[0025] Fig.16 A block diagram illustrating a data migration process of a storage system according to an embodiment; and

[0026] Fig.17 A block diagram illustrating a data center to which a storage system according to an embodiment is applied. DETAILED DESCRIPTION

[0027] The present disclosure will be described more fully hereinafter with reference to the accompanying drawings, in which embodiments of the present disclosure are shown. As those skilled in the art will appreciate, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present disclosure.

[0028] Therefore, the drawings and description are considered to be illustrative and not restrictive in nature. Throughout the specification, the same reference numerals represent the same elements. In the flowcharts described with reference to the drawings in this specification, the order of operations may be changed, various operations may be combined, specific operations may be divided, and specific operations may not be performed.

[0029] In addition, unless an explicit expression such as "one" or "single" is used, a singular form may also be intended to include a plural form. Terms including ordinal numbers such as first, second, etc. will only be used to describe various constituent elements and should not be interpreted as limiting these constituent elements. These terms may be used for the purpose of distinguishing one constituent element from other constituent elements.

[0030] Terms such as "unit", "module", "component" and "block" may be implemented as hardware or software. Depending on the embodiment, multiple "units", "modules", "components" and "blocks" may be implemented as a single component, or a single "unit", "module", "component" and "block" may include multiple components.

[0031] It will be understood that when an element is referred to as being “connected” with or “connected” to another element, the element may be directly or indirectly connected to the other element, wherein the indirect connection includes “connection via a wireless communication network”.

[0032] Furthermore, when a component “includes” or “comprises” an element, unless there is a specific description contrary thereto, the component may further include other elements, rather than excluding other elements.

[0033] Here, the expression “at least one of a, b, and c” means “only a”, “only b”, “only c”, “both a and b”, “both a and c”, “both b and c”, or “all of a, b, and c”.

[0034] Figure 1 A block diagram of a storage system according to an embodiment is shown.

[0035] Reference Figure 1 , storage system 100 may include a plurality of computing devices (such as servers 111, 114, 121, and 124) connected to networks 140 and 150. For example, servers 111, 114, 121, and 124 may be part of a cloud computing system operated by a service provider. Storage system 100 may include at least one storage device (such as storage devices 117 and 118 and storage devices 127 and 128). Storage system 100 may include at least one client computing device (such as client device 130) that may communicate with servers 111, 114, 121, and 124 via networks 140 and 150. Servers 111, 114, 121, and 124 and storage devices 117, 118, 127, and 128 may be maintained by a service provider in at least one data center. For example, as Figure 1 As shown in , servers 111 and 114 and storage devices 117 and 118 may be provided in a data center 110, and servers 121 and 124 and storage devices 127 and 128 may be provided in another data center 120. The data centers 110 and 120 and / or the servers 111, 114, 121, and 124 may be located in different cities, states, countries, continents, etc. that are separated from each other by a considerable distance. In addition, at least one region or zone may exist within the data centers 110 and 120. For example, the regions or zones may be logically partitioned based on appropriate attributes.

[0036] Servers 111, 114, 121, and 124 may be configured similarly to each other. For example, as shown, server 111 may include at least one processor 112, memory 113, and other components present in a typical general-purpose computer. Memory 113 may store information accessible by processor 112, and include instructions executable by processor 112. Memory 113 may include data that can be acquired, manipulated, or stored by processor 112. Memory 113 may be a non-temporary computer-readable medium (such as HDD, SSD, tape drive, optical storage device, memory card, read-only memory (ROM), random access memory (RAM), DVD, CD-ROM, and writable read-only memory) that can store information accessible by processor 112. Processor 112 may be a well-known processor or another type of processor that is less well-known. Optionally, processor 112 may be a dedicated controller (such as a graphics processing unit (GPU) or an application-specific integrated circuit (ASIC) (such as a tensor processing unit (TPU) or a neural processing unit (NPU))). In one embodiment, server 114 may include a processor 115 and a memory 116 , server 121 may include a processor 122 and a memory 123 , and server 124 may include a processor 125 and a memory 126 .

[0037] although Figure 1 The processor 112 and memory 113 are functionally shown as being located within the same block, but the processor 112 and memory 113 may actually include multiple processors and memories, which may or may not be stored in the same physical housing. The processor 112 may include a group of processors that may or may not operate in parallel. The servers 111, 114, 121, 124 may each include at least one internal clock that provides timing information that can be used to measure the time of operations and programs executed by the servers 111, 114, 121, and 124.

[0038] Servers 111, 114, 121, and 124 include direct attached storage (DAS), network attached storage (NAS), storage area network (SAN), Fibre Channel (FC), Fibre Channel over Ethernet (FCoE), and hybrid architecture networks, but are not limited thereto, and may be implemented by various architectures and technologies:

[0039] In one or more embodiments, servers 111 , 114 , 121 , and 124 may be virtualized environments.

[0040] The client device 130 may include a processor 131 and a memory 132, and may be configured similarly to the servers 111, 114, 121, and 124. The client device 130 may have all components common to personal computing devices (such as memory (e.g., RAM and internal hard drive), input and / or output devices, sensors and / or output devices, clocks). The client device 130 may include a personal computing device, or alternatively, the client device 130 may include a mobile computing device capable of wirelessly exchanging data with a server via a network (such as the Internet). For example, the client device 130 may be a device that can obtain information via the Internet (such as a desktop or laptop computer, a mobile phone or wireless-enabled PDA, a tablet PC, a netbook, or a wearable computing device).

[0041] The servers 111, 114, 121, and 124 and the client device 130 may communicate directly and indirectly through the networks 140 and 150. For example, by using an Internet socket, the client device 130 may connect to a service operating on the remote servers 111, 114, 121, and 124 through the Internet protocol suite. The servers 111, 114, 121, and 124 may set up a listening socket capable of accepting an initial connection for sending and receiving information. The networks 140 and 150 and the intermediate nodes may include the Internet, the World Wide Web, an intranet, a virtual private network, a wide area network, a local network, a private network using at least one company-proprietary communication protocol, Ethernet, WiFi (e.g., 802.81, 802.81b, g, n, or other standards), and various configurations and protocols including HTTP, and various combinations thereof.

[0042] Data migration between data center 110 and data center 120 or data migration between storage device 117 and storage device 118 located in different regions within data center 110 may be required. For example, client device 130 and data center 110 may be located in the same city, state, country, or continent. Client device 130 and data center 120 may be located in different cities, states, countries, or continents. Data center 120 may migrate user data provided to client device 130 to data center 110. Client device 130 may receive services from data center 110 located in the same region, and fast data access is possible.

[0043] Figure 2 A block diagram illustrating an example of a server and a storage device included in a data center according to an embodiment.

[0044] Reference Figure 2, the data center 201 and the data center 202 may be located in different areas. The data center 201 may include a server 210 and a storage device 230, and the data center 202 may include a server 220 and a storage device 240. Hereinafter, the server 210 and the storage device 230 included in the data center 201 are referred to as a source server 210 and a source storage device 230, and the server 220 and the storage device 240 included in the data center 202 are referred to as a target server 220 and a target storage device 240.

[0045] Source server 210 can provide read and write requests from user applications. For example, a user can use an application (eg, a word processing application) and send user data writes or user data reads to source storage device 230.

[0046] The source server 210 may include a server controller 211 , a storage 212 , and a migration manager 213 .

[0047] The server controller 211 may control the operation of the source server 210 and, for example, may run an operating system (OS). The memory 212 may store instructions and data executed and processed by the server controller 211. For example, the operating system run by the server controller 211 may include a file system for file management and a device driver for controlling peripheral devices including the source storage device 230 at the operating system level.

[0048] The migration manager 213 may migrate data from a source storage device 230 connected to the source server 210 to a target storage device 240. The storage device 230 connected to the source server 210 may be located in the data center 201. The migration manager 213 may be based on the client device 130 (see Figure 1 ) to migrate user data of the client device 130. For example, the migration manager 213 may migrate the user data to the data center 202 located in an area adjacent to the client device 130. In one or more embodiments, the migration manager 213 may migrate the user data to the data center 202 according to a migration request from the client device 130. When performing data migration, the migration manager 213 may directly access the target storage device 240 or access the target storage device 240 through the target server 220.

[0049] In one embodiment, when performing data migration to another storage device (e.g., 240), the migration manager 213 in the source data center 201 or the source server 210 may send data and data attribute information to the other storage device 240. For example, the migration manager 213 may send the data and information about the read / write counts of the data to the other storage device 240. In one or more embodiments, the migration manager 213 may send the data together with the read / write counts of at least one of the memory block, super block, sub-area, and area storing the data.

[0050] The source server 210 including the migration manager 213 may be a storage system ( Figure 1 The migration manager 213 may manage a migration operation for copying data from the source storage device 230 to the target storage device 240.

[0051] In one or more embodiments, the source server 210 may be connected (e.g., linked) to the target server 220 via a target link 260 of the source server 210. The target link 260 may be implemented using various techniques depending on whether the storage system 100 is implemented by hardware (HW), software (SW), or a combination of HW and SW. For example, it will be understood that the servers and storage devices of the storage system 100 may be implemented by HW, SW, or a combination of HW and SW. For example, in one or more embodiments, the target link 260 may be a physical network connection (e.g., Ethernet).

[0052] In one or more embodiments, the source server 210 may be linked (e.g., connected) to the target storage device 240 via a communication link 251. The source server 210 may communicate with the source storage device 230 via the communication link 250. As an example, the server 210 may communicate with the source storage device 230 and / or the target storage device 240 via various interfaces such as Universal Serial Bus (USB), Multimedia Card (MMC), Peripheral Component Interconnect Express (PCI-E), Advanced Technology (AT) Attachment (ATA), Serial AT Attachment (SATA), Parallel AT Attachment (PATA), Small Computer System Interface (SCSI), Serial Attached SCSI (SAS), Enhanced Small Disk Interface (ESDI), Integrated Drive Electronics (IDE), and Non-Volatile Memory Express (NVMe).

[0053] The source storage device 230 may be accessed by the source server 210. The source storage device 230 may include a storage controller 231, a plurality of non-volatile memories (NVMs) (235a, 235b, ..., 235h), and a buffer memory 234. The source storage device 230 may store data or process data in response to an instruction from the source server 210. For example, the source storage device 230 may be a solid state drive (SSD), a smart SSD, an embedded multimedia card (eMMC), an embedded universal flash storage (UFS) memory device, a UFS memory card, a compact flash (CF), a secure digital (SD), a micro secure digital (Micro-SD), a mini secure digital (Mini-SD), an extreme digital (xD), or a memory stick.

[0054] The storage controller 231 may control the operation of the source storage device 230. For example, the storage controller 231 may control the operation of the plurality of non-volatile memories (235a, 235b, ..., 235h) based on commands, addresses, and data received from the source server 210. The storage controller 231 may include embedded logic for processing a request from a server (e.g., the source server 210) to copy (e.g., write) data to the source storage device 230.

[0055] The plurality of non-volatile memories (235a, 235b, ..., 235h) may store data. For example, the plurality of non-volatile memories (235a, 235b, ..., 235h) may store metadata and other user data.

[0056] Each of the plurality of nonvolatile memories (235a, 235b, ..., 235h) may include a memory cell array including nonvolatile memory cells that can maintain stored data even when the power of the memory device 230 is turned off, and the memory cell array may be divided into a plurality of memory blocks. The plurality of memory blocks may have a 2D horizontal structure, in which the memory cells are two-dimensionally arranged on the same plane (or layer), or a 3D vertical structure, in which the nonvolatile memory cells are three-dimensionally arranged. The memory cell may be a single-level cell (SLC) storing one bit of data or a multi-level cell (MLC) storing two or more bits of data. However, without limitation thereto, each memory cell may be a three-level cell (TLC) storing 3 bits of data or a four-level cell (QLC) storing 4 bits of data.

[0057] Each of the plurality of nonvolatile memories (235a, 235b, ..., 235h) may include a plurality of dies or a plurality of chips, each of which includes a memory cell array. For example, each of the plurality of nonvolatile memories (235a, 235b, ..., 235h) may include a plurality of chips, and each of the plurality of chips may include a plurality of dies. In this embodiment, the plurality of nonvolatile memories 235a, 235b, ..., 235h may also include a plurality of channels, each of which includes a plurality of chips.

[0058] Each of the plurality of nonvolatile memories (235a, 235b, ..., 235h) may include a NAND flash memory. In another embodiment, each of the plurality of nonvolatile memories (235a, 235b, ..., 235h) may include an electrically erasable programmable read-only memory (EEPROM), a phase change random access memory (PRAM), a resistive RAM (ReRAM), a resistive random access memory (RRAM), a nano floating gate memory (NFGM), a polymer random access memory (PoRAM), a magnetic random access memory (MRAM), a ferroelectric random access memory (FRAM), or the like. Hereinafter, in the present disclosure, it will be described assuming that each of the plurality of nonvolatile memories (235a, 235b, ..., 235h) is a NAND flash memory device.

[0059] The buffer memory 234 may store commands and data executed and processed by the memory controller 231. The buffer memory 234 may temporarily store data stored or to be stored in a plurality of nonvolatile memories (235a, 235b, . . . , 235h).

[0060] The buffer memory 234 may be implemented as a volatile memory such as a dynamic random access memory (DRAM) and a static RAM (SRAM). However, without being limited thereto, the buffer memory 234 may be implemented as a resistive non-volatile memory such as a magnetic RAM (MRAM), a phase change RAM (PRAM), or a resistive RAM (ReRAM) or various types of non-volatile memories such as a flash memory, a nano floating gate memory (NFGM), a polymer random access memory (PoRAM), or a ferroelectric random access memory (FRAM). Figure 2 In the embodiment of FIG. 2 , the buffer memory 234 is shown to be disposed outside the memory controller 231 , but is not limited thereto, and the buffer memory 234 may be disposed inside the memory controller 231 .

[0061] The storage controller 231 may manage attribute information of data, and transmit the attribute information of data to be migrated to the target storage device 240 to the target storage device 240. In one or more embodiments, the storage controller 231 may manage the read / write count of each of the plurality of nonvolatile memories (235a, 235b, ..., 235h), and when performing migration, the storage controller 231 may transmit the read / write count of each of the plurality of nonvolatile memories (235a, 235b, ..., 235h) to the target storage device 240. For example, the storage controller 231 may transmit the read / write count of at least one of a memory block, a super block, a sub-area, and an area of ​​the nonvolatile memory storing the data to be migrated among the plurality of nonvolatile memories (235a, 235b, ..., 235h) to the target storage device 240.

[0062] In one or more embodiments, the storage controller 231 may set a plurality of non-volatile memories (235a, 235b, ..., 235h) as a plurality of zones. Each of the plurality of zones may be defined differently, and as an example, the size of each zone may be defined differently. For example, each of the plurality of zones may include a plurality of blocks or a plurality of super blocks. In one or more embodiments, each of the plurality of zones may have a size larger than a write or read unit of data. The sizes of the plurality of zones are not limited to the above examples, and the sizes of the plurality of zones may be the same or different.

[0063] In one or more embodiments, the storage controller 231 may store data sequentially in the corresponding zones. Specifically, the plurality of zones do not store data randomly, but may store data sequentially from the first storage position in each zone. For example, when each of the plurality of zones stores data for the first time, the data may be sequentially stored from the first storage position in each zone. In addition, when each of the plurality of zones stores additional data, the storage position of the last written data may be checked, and the data may be sequentially stored starting from the storage position next to the checked storage position.

[0064] Therefore, the server controller 211 may determine the zone in which the data will be written, and may send a write request including a logical address corresponding to the determined zone (e.g., a logical address indicating the start position of the zone) to the storage device 230. Then, the storage device 230 may check the zone corresponding to the logical address included in the write request, check the storage position where the data was last written in the checked zone, and may sequentially store the received write data starting from the next storage position of the checked storage position. The storage device 230 that sets the storage space as a plurality of zones and sequentially stores data in each zone as described above may be referred to as a zoned namespace (ZNS) storage device.

[0065] In one embodiment, the storage controller 231 may set at least one sub-area for each of the plurality of zones. For example, the storage controller 231 may set a first sub-area and a second sub-area in one zone. The storage controller 231 may allocate at least one memory block or at least one super block to each of the at least one sub-area. In one or more embodiments, the storage controller 231 may allocate a plurality of memory blocks or a plurality of super blocks to at least one sub-area based on the read / write count of each of the plurality of memory blocks or a plurality of super blocks. For example, based on the read / write count, the storage controller 231 may allocate a memory block or a super block in which the number of read requests is greater than the number of write requests to the first sub-area, and may allocate a memory block or a super block in which the number of write requests is greater than the number of read requests to the second sub-area. When the number of write requests for any memory block allocated to the first sub-area exceeds the number of read requests, the storage controller 231 may allocate the memory block to the second sub-area. In one or more embodiments, the storage controller 231 may store the read / write count of the first sub-area and the read / write count of the second sub-area based on the read / write requests for the first sub-area and the second sub-area.

[0066] In this embodiment, each of the plurality of zones may store data of a corresponding user. Data migration of user data may be performed in zones. In one or more embodiments, when data migration is performed in zones, the migration manager 213 may send read / write counts of sub-zones included in each zone to the target storage device 240. The migration manager 213 may send the read / write counts to the target storage device 240 so that the data stored in the sub-zones may be determined with reference to the read / write counts of the sub-zones to be stored in the regions of the plurality of non-volatile memories (245a, 245b, ..., 245h).

[0067] In one or more embodiments, at least one of the servers (e.g., source server 210 and target server 220) may be a software entity. For example, at least one server may be a virtual machine (VM) managed by a hypervisor (also known as a virtual machine monitor) associated with at least one central processing unit (CPU). Similarly, at least one of storage devices 230 and 240 may be virtualized and implemented by HW and / or SW technology. For example, at least one of storage devices 230 and 240 may be provided by a combination of physical storage devices. For example, there may be a migration from a first virtual machine to a second virtual machine, but two virtual machines may be supported on one physical storage device. For example, it will be understood that various other combinations between physical devices and virtual devices may be implemented without departing from the spirit and scope of the present disclosure.

[0068] The target server 220 may receive data from the source server 210 and send a data write request to the target storage device 240. The target server 220 may send the data write request to the target storage device 240 together with the attribute information of the data.

[0069] The target server 220 may include a server controller 221 and a memory 222 .

[0070] In this embodiment, when data migration from another storage device (e.g., 230) is performed (i.e., when data is received from the source storage device 230 and stored in the target storage device 240), the server controller 221 in the target server 220 or the target data center 202 may send the data together with attribute information about the data to the target storage device 240. For example, the server controller 221 may send the data and information about the read / write count of the data to the target storage device 240. In one or more embodiments, the server controller 221 may send the data together with the read / write count of at least one of the memory block, super block, sub-area, and area storing the data. In addition, the server controller 221 and the memory 222 are the same or similar to the server controller 211 and the memory 212 of the source server 210, and thus a description thereof will be omitted.

[0071] The target server 220 may communicate with the target storage device 240 via a communication link 251. As an example, the target server 220 may communicate with the target storage device 240 via various interfaces such as Universal Serial Bus (USB), MultiMediaCard (MMC), Peripheral Component Interconnect Express (PCI-E), AT Attachment (ATA), Serial AT Attachment (SATA), Parallel AT Attachment (PATA), Small Computer System Interface (SCSI), Serial Attached SCSI (SAS), Enhanced Small Disk Interface (ESDI), Integrated Drive Electronics (IDE), and Non-Volatile Memory Express (NVMe).

[0072] The target storage device 240 is accessible by the target server 220. In addition, the target storage device 240 is accessible by the source server 210. The target storage device 240 may include a storage controller 241, a plurality of non-volatile memories (245a, 245b, ..., 245h), and a buffer memory 244. The target storage device 240 may store or process data in response to a command from the source server 210 and / or the target server 220.

[0073] When the source server 210 performs data migration directly to the storage device 240, the storage controller 241 may receive attribute information of the data from the source server 210. The storage controller 241 may refer to the attribute information about the data and store the data in a corresponding area among the multiple non-volatile memories (245a, 245b, ..., 245h). The storage controller 241 may compare the attribute information about the data with the wear level of each area of ​​the multiple non-volatile memories (245a, 245b, ..., 245h), and may store the data in an area having a wear level corresponding to the attribute information. For example, the storage controller 241 may store "data stored in memory blocks, super blocks, sub-areas, and areas having relatively high read counts within multiple non-volatile memories (235a, 235b, ..., 235h)" in an area having a relatively high wear level among the multiple non-volatile memories (245a, 245b, ..., 245h). The storage controller 241 may store "data stored in memory blocks, super blocks, sub-areas, and areas having relatively high write counts within multiple non-volatile memories (235a, 235b, ..., 235h)" in areas having relatively low wear levels in multiple non-volatile memories (245a, 245b, ..., 245h). In one or more embodiments, the storage controller 241 may use program / erase (P / E) cycle information of each area of ​​the non-volatile memory (245a, 245b, ..., 245h) as the wear level. In addition, the storage controller 241 may use at least one of the on-cell count (OCC1), the off-cell count (OCC2), the retention time, and the number of error bits of the read data as the wear level. Hereinafter, the wear level information will be described as P / E cycle information.

[0074] In this embodiment, the storage controller 241 may set the non-volatile memory (245a, 245b, ..., 245h) to multiple zones. The storage controller 241 may divide each of the multiple zones into multiple storage areas based on the wear level. For example, the storage controller 241 may divide a zone into a storage area with a relatively high wear level and a storage area with a relatively low wear level. In one or more embodiments, the storage controller 241 may receive a data migration request in units of zones. The storage controller 241 may determine a zone for storing data among multiple zones in the non-volatile memory (245a, 245b, ..., 245h). The storage controller 241 may determine a storage area with a wear level corresponding to the read / write count of at least one sub-zone among multiple storage areas in the determined zone. The storage controller 241 may store data of at least one sub-zone in multiple storage areas. For example, the storage controller 241 may store data of the first sub-zone whose read count is greater than the write count in the non-volatile memory (245a, 245b, ..., 245h) in an area with a relatively high wear level. The memory controller 241 may store the data of the second sub-area having a write count greater than a read count in an area having a relatively low wear level within the nonvolatile memory ( 245 a , 245 b , . . . , 245 h ).

[0075] In this embodiment, each of the storage devices 230 and 240 may be a solid state drive (SSD). In another embodiment, each of the storage devices 230 and 240 may be a universal flash storage (UFS), a multimedia card (MMC), or an embedded MMC (eMMC). In another embodiment, each of the storage devices 230 and 240 may be implemented as a secure digital (SD) card, a micro SD card, a memory stick, a chip card, a universal serial bus (USB) card, a smart card, a compact flash (CF) card, or the like.

[0076] In this embodiment, each of the storage devices 230 and 240 can be connected to the servers 210 and 220 via a block-accessible interface including a bus (such as a Serial Advanced Technology Attachment (SATA) bus, a Small Computer Mini Interface (SCSI) bus, a Non-Volatile Memory Express (NVMe) bus, a Serial Attached SCSI (SAS) bus, UFS, and eMMC), and each of the storage devices 230 and 240 can be accessed by the servers 210 and 220 in units of blocks through the block-accessible interface.

[0077] Figure 3 A block diagram illustrating an example of a memory controller included in a memory device according to an embodiment.

[0078] Reference Figure 3The storage controller 300 may include at least one processor 310, a memory 320, a read / write manager 330, a host interface circuit 340, a wear leveling manager 350, and a flash memory interface circuit 360. In addition, the storage controller 300 may also include a buffer memory ( Figure 2 A buffer interface circuit for the interface between 234 and 244).

[0079] The processor 310 may respond to a request from the server ( Figure 2 The processor 310 may control the operation of the storage controller 300 using commands received from the processor 310. For example, the processor 310 may control each configuration using firmware for driving a storage device.

[0080] The memory 320 may store commands and data executed and processed by the processor 310. For example, the memory 320 may be implemented as a volatile memory such as a DRAM or a static RAM (SRAM) or a non-volatile memory such as a PRAM or a flash memory. The memory 320 may store firmware and data for controlling the storage controller 300. The stored firmware and data may be driven or processed by the processor 310. The software hierarchy of the storage controller 300 implemented as firmware may include an interface layer, a flash translation layer (FTL), and the like. In one or more embodiments, the memory 320 may include an R / W table 321 and a wear level information table 322 for each memory block.

[0081] When the read / write manager 330 receives a read request for a read target word line, the read / write manager 330 may increase a read count of a memory block including the read target word line. When the read / write manager 330 receives a write request for a write target word line, the read / write manager 330 may increase a write count of a block including the write target word line. The read / write manager 330 may update the read / write count information of each memory block to the memory 320.

[0082] The read / write manager 330 may be implemented as software (or firmware) or hardware. Alternatively, the read / write manager 330 may be implemented as a combination of software and hardware. When the read / write manager 330 is implemented as software, commands configuring the program of the read / write manager 330 may be loaded into the memory 320 and may be executed by the processor 310.

[0083] The host interface circuit 340 may provide a physical connection between a host device (e.g., a server) and a storage device. That is, the host interface circuit 340 may provide an interface connection with the storage device in response to a bus format of the host device. In this embodiment, at least one of various interface methods (such as USB, MMC, PCI-E, ATA, SATA, PATA, SCSI, SAS, ESDI, IDE, NVMe, etc.) may be applied to the host interface circuit 340.

[0084] The wear leveling manager 350 may generate wear level information of the memory blocks. For example, the wear leveling manager 350 may generate information related to degradation of each memory block (OCC1, OCC2, P / E cycle, retention time, etc.), and the wear leveling manager 350 may update the information related to degradation of each memory block to the memory 320 (e.g., the wear level information table 322 in the memory 320). For example, the wear leveling manager 350 may count the P / E cycles of each memory block related to the request from the host device (or server), and may store the P / E cycle information of each memory block in the memory 320 in the form of a table.

[0085] The flash interface circuit 360 can communicate with the non-volatile memory. The flash interface circuit 360 can send data to the non-volatile memory and can receive data read from the non-volatile memory. In this embodiment, the flash interface circuit 360 can be connected to the non-volatile memory through one channel. In another embodiment, the flash interface circuit 360 can be connected to the non-volatile memory through multiple channels.

[0086] The storage controller 300 may also include an error checking and correction (ECC) engine that performs ECC encoding and ECC decoding using the following coded modulations: such as Bose-Chaudhuri-Hocquenghem (BCH) codes, low-density parity-check (LDPC) codes, turbo codes, reed-Solomon codes, convolutional codes, recursive systematic codes (RSC), trellis-coded modulation (TCM) and block coded modulation (BCM) or other error correction codes.

[0087] In one or more embodiments, the storage controller 300 may send data stored in the nonvolatile memory to the host device. The storage controller 300 may read the read / write count information of the memory block storing the data from the R / W table 321, and may send the read / write count information of the memory block storing the data as data and data attribute information to the host device.

[0088] Figure 4 A block diagram illustrating an example of a nonvolatile memory included in a storage device according to an embodiment.

[0089] Reference Figure 4 , the nonvolatile memory 400 includes a memory cell array 410, an address decoder 420, a page buffer circuit 430, a data input / output circuit 440, a voltage generator 450, and a control circuit 460. For example, the nonvolatile memory 400 may be Figure 2 One of the non-volatile memories (235a, 235b, ..., 235h) shown in .

[0090] The memory cell array 410 is connected to the address decoder 420 through a plurality of string selection lines SSL, a plurality of word lines WL, and a plurality of ground selection lines GSL. In addition, the memory cell array 410 is connected to the page buffer circuit 430 through a plurality of bit lines BL. The memory cell array 410 may include a plurality of memory cells connected to the plurality of word lines WL and the plurality of bit lines BL. The memory cell array 410 may be divided into a plurality of memory blocks (BLK1, BLK2, ..., BLKz), each memory block including memory cells. In addition, each of the plurality of memory blocks BLK1 to BLKz may be divided into a plurality of pages.

[0091] In one or more embodiments, the memory cell array 410 may be formed to have a two-dimensional array structure or a three-dimensional vertical array structure.

[0092] The control circuit 460 receives the signal from the outside (eg, Figure 2 The source server 210 and / or the storage controller 231) receives the command (CMD) and the address (ADDR), and controls the erase cycle, program cycle and read operation of the nonvolatile memory 400 based on the command (CMD) and the address (ADDR). Here, the program cycle may include a program operation and a program verification operation, and the erase cycle may include an erase operation and an erase verification operation. Here, the read operation may include a normal read operation and a data recovery read operation.

[0093] For example, the control circuit 460 may generate a control signal CON for controlling the voltage generator 450 and a control signal PBC for controlling the page buffer circuit 430 based on the command CMD, and may generate a row address R_ADDR and a column address C_ADDR based on the address ADDR. The control circuit 460 may provide the row address R_ADDR to the address decoder 420 and provide the column address C_ADDR to the data input / output circuit 440.

[0094] The address decoder 420 is connected to the memory cell array 410 through a plurality of string selection lines SSL, a plurality of word lines WL, and a plurality of ground selection lines GSL.

[0095] For example, during erase / program / read operations, the address decoder 420 may determine at least one of the plurality of word lines WL as a selected word line in response to the row address R_ADDR, and may determine the remaining word lines of the plurality of word lines WL except the selected word line as unselected word lines.

[0096] In addition, during erase / program / read operations, the address decoder 420 may determine at least one of the plurality of string selection lines SSL as a selected string selection line, and may determine the remaining string selection lines as unselected string selection lines.

[0097] In addition, during erase / program / read operations, the address decoder 420 may determine at least one of the plurality of ground selection lines GSL as a selected ground selection line in response to the row address R_ADDR, and may determine the remaining ground selection lines as unselected ground selection lines.

[0098] The voltage generator 450 may generate a voltage VS required for the operation of the nonvolatile memory 400 based on the power supply voltage PWR and the control signal CON. The voltage VS may be applied to a plurality of string selection lines SSL, a plurality of word lines WL, and a plurality of ground selection lines (GSL) through the address decoder 420. In addition, the voltage generator 450 may generate an erase voltage VERS required for an erase operation based on the power supply voltage PWR and the control signal CON. The erase voltage VERS may be directly applied to the memory cell array 410, or may be applied to the memory cell array 410 through the bit line BL.

[0099] The page buffer circuit 430 may be connected to the memory cell array 410 through a plurality of bit lines BL. The page buffer circuit 430 may include a plurality of page buffers. In this embodiment, one bit line may be connected to one page buffer. In another embodiment, two or more bit lines may be connected to one page buffer.

[0100] The page buffer circuit 430 may store write data DAT to be programmed in the memory cell array 410 or read data DAT sensed from the memory cell array 410. That is, the page buffer circuit 430 may operate as a write driver or a sense amplifier according to an operation mode of the nonvolatile memory 400.

[0101] The data input / output circuit 440 may be connected to the page buffer circuit 430 through the data line DL. In response to the column address C_ADDR, the data input / output circuit 440 may provide write data DAT to the memory cell array 410 through the page buffer circuit 430, or may provide read data DAT output from the memory cell array 410 to the outside through the page buffer circuit 430.

[0102] Figure 5 An example of a read / write (R / W) table according to an embodiment is shown.

[0103] Reference Figure 5 , the R / W table 500 may include identification information of each of the plurality of memory blocks and read / write count information of each of the plurality of memory blocks. The read count information may include the number of times a read request is received, and the write count information may include information about the number of times a write request is received. In one or more embodiments, the number of read requests received for each of the plurality of memory blocks may be the total number of times a read operation is performed on a word line included in each of the plurality of memory blocks. The number of write requests received for each of the plurality of memory blocks may be the total number of times a write operation is performed on a word line included in each of the plurality of memory blocks. In one or more embodiments, the R / W table 500 may also include information about the number of erase or read errors for each of the plurality of memory blocks.

[0104] Figure 6 A block diagram illustrating a R / W level of each memory block of a nonvolatile memory according to an embodiment.

[0105] Reference Figure 6 , the non-volatile memory (NVM) 610 may include a plurality of memory blocks (BLK1, BLK2, ..., BLKz). Each of the plurality of memory blocks (BLK1, BLK2, ..., BLKz) may be determined as one of a plurality of read / write levels according to the read / write count information. For example, depending on whether the difference (e.g., the absolute value of the difference) between the number of received read requests and the number of received write requests exceeds a threshold value, each of the plurality of memory blocks (BLK1, BLK2, ..., BLKz) may be determined as one of a plurality of read / write levels.

[0106] Refer to Figure 5 and Figure 6, for the memory block BLK1, since the number of received read requests is 39 and the number of received write requests is 234, the number of received write requests is greater than the number of received read requests and the difference between the number of received read requests and the number of received write requests exceeds a threshold value (e.g., 100). Therefore, the memory block BLK1 can be determined as the first level (WRITEINTENSIVE) among multiple read / write levels. For the memory block BLK2, since the number of received read requests is 215 and the number of received write requests is 201, the difference between the number of received read requests and the number of received write requests is less than the threshold value. Therefore, the memory block BLK2 can be determined as the second level (NEUTRAL) among multiple read / write levels. For the memory block BLKz, since the number of received read requests is 362 and the number of received write requests is 24, the number of received read requests is greater than the number of received write requests and the difference between the number of received read requests and the number of received write requests exceeds a threshold value (e.g., 100). Therefore, the memory block BLKz can be determined as the third level (READ INTENSIVE) among the multiple read / write levels. In addition, the memory block on which the read / write operation has not been performed can be determined as the fourth level (UNDETERMINED) among the multiple read / write levels.

[0107] Figure 7 A flow chart of a data migration method of a storage system according to an embodiment is shown.

[0108] Reference Figure 7 , the source storage device 710 updates the read / write count of the memory block (S700). The source storage device 710 may update the read / write count of each memory block based on the number of read / write requests received for each memory block. For example, when a read or write request for a word line or page included in a first memory block is received, the R / W manager ( Figure 3 330) can be increased by storing in the memory ( Figure 3 320) in the R / W table ( Figure 3 The R / W table 321 is updated based on the number of times a read request or a write request corresponding to the first memory block is received by the R / W table 321.

[0109] The source server 720 sends a migration read command to the source storage device 710 (S701). The source server 720 can migrate data stored in the source storage device 710 to the target storage device 740 in response to a user request and a change in the network environment. The migration manager ( Figure 2 The migration manager 213 may generate a migration read command for reading data stored in the source storage device 710. The migration manager 213 may send the migration read command and the address of the data to be migrated to the source storage device 710.

[0110] The source storage device 710 transmits the data to be migrated and the read / write count information of the memory block storing the data to the source server 720 according to the migration read command (S702). The R / W manager 330 of the source storage device 710 may determine the memory block storing the data based on the address of the data, and may read the read / write count information of the memory block determined from the R / W table 321 of the memory 320. The source storage device 710 may read the data from the nonvolatile memory and transmit the data and the read / write count information to the source server 720.

[0111] The source server 720 sends a migration write command to the target server 730 (S703). In addition, the source server 720 sends data and read / write count information to the target server 730 (S704).

[0112] The target server 730 generates a write request according to the migration write command and sends the write request to the target storage device 740 (S705). In addition, the target server 730 sends the data and read / write count information to the target storage device 740 (S706). In one or more embodiments, the source server 720 may send the migration write command and the data and read / write count information directly to the target storage device 740.

[0113] The target storage device 740 updates the wear level of the memory block (S707). For example, the wear leveling manager ( Figure 3 350) can count the P / E cycles of each memory block, and the P / E cycles of each memory block can be stored in the memory 320 in a table form.

[0114] The target storage device 740 stores the data in the memory block based on the read / write count information and the wear level of the memory block (S708). The target storage device 740 may divide the memory blocks into wear levels, and may store the data in the memory blocks with the corresponding wear levels by referring to the read / write count information. For example, the target storage device 740 may store the data stored in the memory block with a relatively high read count in the memory block with a relatively high wear level based on the read / write count information. The target storage device 740 may store the data stored in the memory block with a relatively high write count in the memory block with a relatively low wear level based on the read / write count information. Therefore, even when data migration is performed between different storage devices, wear leveling may be performed with reference to the attribute information about the data. Figure 8 The operation is described (S708).

[0115] Figure 8 A block diagram illustrating a data migration process of a storage system according to an embodiment.

[0116] Reference Figure 8 , data stored in the nonvolatile memory 810 of the source storage device may be migrated to the nonvolatile memories 820 , 830 , and 840 of the target storage device.

[0117] The nonvolatile memory 810 may include a plurality of memory blocks SBLK having a plurality of read / write levels (write intensive, neutral, read intensive, and undetermined). Among the plurality of memory blocks SBLK, the read / write level of the memory block 812 storing the data to be migrated may have a first level (write intensive).

[0118] In one or more embodiments, among the plurality of wear levels, the first wear level (WEAR-LEVEL1) may indicate a state in which degradation progresses relatively less, the second wear level (WEAR-LEVEL2) may indicate a state in which degradation progresses more than the first wear level (WEAR-LEVEL1), and the third wear level (WEAR-LEVEL3) may indicate a state in which degradation progresses more than the second wear level (WEAR-LEVEL2). For example, the first wear level (WEAR-LEVEL 1) may have a relatively low P / E cycle, the second wear level (WEAR-LEVEL2) may have a higher P / E cycle than the first wear level (WEAR-LEVEL1), and the third wear level (WEAR-LEVEL3) may have a higher P / E cycle than the second wear level (WEAR-LEVEL2).

[0119] In this embodiment, data stored in a memory block of a first level (write-intensive) focused on (or emphasized on) writing among multiple read / write levels can be migrated to a memory block having a wear level indicating a state where degradation progress is small (i.e., degradation is not serious). Data stored in a memory block of a third level (read-intensive) focused on reading among multiple read / write levels can be migrated to a memory block having a wear level indicating a state where degradation progress is large (i.e., degradation is serious).

[0120] The nonvolatile memory 820 of the target storage device may include a plurality of memory blocks TBLK having a plurality of wear levels (WEAR-LEVEL1, WEAR-LEVEL2, and WEAR-LEVEL3). When data migration is performed in the nonvolatile memory 820, data stored in the memory block 812 having the first level (write-intensive) may be stored in the memory block 822 having the first wear level (WEAR-LEVEL1) indicating a state in which degradation progression is less corresponding to the first level (write-intensive) focused on writing.

[0121] The nonvolatile memory 830 of the target storage device may include a plurality of memory blocks TBLK having a plurality of wear levels (WEAR-LEVEL2 and WEAR-LEVEL3). When data migration is performed in the nonvolatile memory 820, data stored in the memory block 812 having the first level (write-intensive) may be stored in the memory block 832 having the second wear level (WEAR-LEVEL2) indicating a state in which degradation progress is less than that corresponding to the first level (write-intensive) focused on writing.

[0122] The nonvolatile memory 840 of the target storage device may include a plurality of memory blocks TBLK having one wear level (WEAR-LEVEL3). When data migration is performed in the nonvolatile memory 840, data stored in the memory block 812 having the first level (write-intensive) may be stored in the memory block 842 having the third wear level (WEAR-LEVEL3).

[0123] According to an embodiment, data stored in a memory block focused on reading can be migrated to a memory block with a higher wear level (i.e., a memory block with a higher degree of degradation), and data stored in a memory block focused on writing can be migrated to a memory block with a lower wear level (i.e., a memory block with a lower degree of degradation). Therefore, wear leveling can be performed even when data is migrated between servers.

[0124] In the above, managing the read / write level and the wear level in units of memory blocks and performing data migration between servers has been described, and in one or more embodiments, the storage device may manage the read / write level and the wear level in units of logical block addresses (LBAs) and perform data migration between servers.

[0125] Fig. 9 A block diagram showing an example of a storage controller included in a storage device according to an embodiment, Fig.10 A block diagram showing the R / W level of each area of ​​a nonvolatile memory according to an embodiment, and Fig.11 A block diagram illustrating the R / W level of each region of various nonvolatile memories according to embodiments.

[0126] Reference Fig. 9 , the storage controller 900 may include at least one processor 910, a memory 920, a zone manager 930, a host interface circuit 940, a wear leveling manager 950, and a flash memory interface circuit 960. For example, the memory 920 may include an R / W table 921, a wear level information table 922, and a zone management table 923. For example, the zone manager 930 may include an R / W manager 931. In addition, the storage controller 900 may also include a buffer memory ( Figure 2 The buffer interface circuit of the interface between 234 and 244). Fig. 9 Among the constituent elements shown in Figure 3 Descriptions of constituent elements that are the same as or similar to the constituent elements described in will be omitted.

[0127] Refer to Figures 9 to 11 , the zone manager 930 may support functions of managing a plurality of zones of the nonvolatile memory 1000 or the plurality of nonvolatile memories 1110, 1120, and 1130 and processing various requests for the plurality of zones. In this embodiment, the zone manager 930 may set a plurality of zones to the nonvolatile memory 1000 or the plurality of nonvolatile memories 1110, 1120, and 1130 according to a management command received from the host device. For example, Fig.10 As shown in FIG. 1 , the zone manager 930 may set a first zone (ZONE1) storing data of a first user, a second zone (ZONE2) storing data of a second user, and a third zone (ZONE3) storing data of a third user in one nonvolatile memory 1000 according to a management command received from a host device. Fig.11As shown in , the zone manager 930 may set a first zone (ZONE1) storing data of a first user, a second zone (ZONE2) storing data of a second user, a third zone (ZONE3) storing data of a third user, and a fourth zone (ZONE4) storing data of a fourth user in a plurality of non-volatile memories 1110, 1120, and 1130 according to a management command received from a host device. In one or more embodiments, the zone manager 930 may set a plurality of zones for each application. For example, the zone manager 930 may set a first zone (ZONE1) storing data for a first application, a second zone (ZONE2) storing data for a second application, and a third zone (ZONE3) and a fourth zone (ZONE4) storing data for a third application. In addition, the zone manager 930 may set a plurality of zones for each service provider. In addition, the zone manager 930 may set a plurality of zones based on an arbitrary management reference of a service provider. In one or more embodiments, the zone manager 930 may divide a plurality of zones into a plurality of levels. The zone manager 930 may divide a plurality of zones into a plurality of levels and allocate a plurality of zones to each service provider. For example, service provider A may be assigned a high-level zone, and service provider B may be assigned a low-level zone. The above example is merely an example of a method for setting the nonvolatile memory 1000 or the plurality of nonvolatile memories 1110, 1120, and 1130 as a plurality of zones, and the present disclosure is not limited thereto.

[0128] The zone manager 930 may set a plurality of zones in units such as memory blocks and super blocks. The sizes of the plurality of zones may be the same or different. The zone manager 930 may set at least one sub-zone within the plurality of zones. In one or more embodiments, the zone manager 930 may set at least one sub-zone based on read / write count information of a memory block in each of the plurality of zones. Fig.10 , each of the plurality of zones (ZONE1, ZONE2, and ZONE3) may include at least one sub-zone (SUB-ZONE1 or SUB-ZONE2). Fig.11 , each of the multiple zones (ZONE1, ZONE2, ZONE3 and ZONE4) may include at least one sub-zone (SUB-ZONE1 or SUB-ZONE2).

[0129] The zone manager 930 may provide the flash translation layer (FTL) with information about the zone where the data is to be stored, and based on this, the flash translation layer may convert the logical address of the data into a physical address. In this embodiment, the logical address may be assigned to the data, and the flash translation layer may convert the logical address of the data to be stored into a continuous physical address within the zone determined by the zone manager 930. The flash translation layer may send the converted physical address to the zone manager 930, and the zone manager 930 may control the non-volatile memory to store the data in the received physical address.

[0130] In one or more embodiments, the number of memory blocks included in at least one sub-area may be changed based on the read / write count information of the memory blocks. Fig.10 , similar to the second zone (ZONE2) and the third zone (ZONE3), when the number of memory blocks BLK with relatively high read counts (i.e., memory blocks BLK with the third level focused on reading (read intensive)) is greater than the number of memory blocks BLK with relatively high write counts (i.e., memory blocks BLK with the first level focused on writing (write intensive)), the number of memory blocks allocated to the second sub-zone (SUB-ZONE2) may be greater than the number of memory blocks allocated to the first sub-zone (SUB-ZONE1). For example, the zone manager 930 may allocate memory blocks with relatively high write counts to the first sub-zone (SUB-ZONE1), and allocate memory blocks with relatively high read counts to the second sub-zone (SUB-ZONE2). This will refer to Fig.12 and Fig.13 Give a description.

[0131] Fig.12 A block diagram showing a process of changing the R / W level of each area of ​​a nonvolatile memory according to an embodiment, and Fig.13 A block diagram illustrating a R / W level of each region of a nonvolatile memory according to an embodiment.

[0132] like Fig.12 As shown in (A), the first zone (ZONE1) may include a plurality of memory blocks BLK. The plurality of memory blocks BLK may be allocated to one of the first sub-zone (SUB-ZONE1) and the second sub-zone (SUB-ZONE2). In one or more embodiments, some of the memory blocks BLK may not be allocated to the first sub-zone (SUB-ZONE1) and the second sub-zone (SUB-ZONE2). The number of memory blocks allocated to the first sub-zone (SUB-ZONE1) and the second sub-zone (SUB-ZONE2) may be the same.

[0133] like Fig.12As shown in (B), the first zone (ZONE1) may include a plurality of memory blocks BLK. The plurality of memory blocks BLK may be allocated to one of the first sub-zone (SUB-ZONE1) and the second sub-zone (SUB-ZONE2). In one or more embodiments, some of the memory blocks BLK may not be allocated to the first sub-zone (SUB-ZONE1) and the second sub-zone (SUB-ZONE2).

[0134] and Fig.12 Compared with the first sub-zone (SUB-ZONE1) shown in (A), the Fig.12 The number of memory blocks of the first sub-zone (SUB-ZONE1) shown in (B) may increase. For example, the zone manager 930 may determine the read / write level of a memory block BLK having a relatively high write count among a plurality of memory blocks BLK as the first level (write-intensive) at a specific time or in a specific cycle, and may allocate the memory block BLK having the first level (write-intensive) to the first sub-zone (SUB-ZONE1). Fig.12 Compared with the second sub-zone (SUB-ZONE2) shown in (A), the Fig.12 The number of memory blocks of the second sub-zone (SUB-ZONE2) shown in (B) may be reduced. For example, the zone manager 930 may determine the read / write level of a memory block BLK having a relatively high read count among the plurality of memory blocks BLK as the third level (read-intensive) at a specific time or a specific cycle, and may allocate the memory block BLK having the third level (read-intensive) to the second sub-zone (SUB-ZONE2).

[0135] In one or more embodiments, the size of at least one sub-zone (SUB-ZONE1 and SUB-ZONE2) within the plurality of zones (ZONE1, ZONE2, and ZONE3) may be the same or different from each other. For example, the number of memory blocks BLK having a first level (write-intensive) included in the first sub-zone (SUB-ZONE1) of the first zone (ZONE1), the first sub-zone (SUB-ZONE1) of the second zone (ZONE2), and the first sub-zone (SUB-ZONE1) of the third zone (ZONE3) may be different.

[0136] Reference Fig.13, the size of the sub-zone of each of the multiple zones (ZONE1, ZONE2, and ZONE3) within the non-volatile memory 1300 may be the same. For example, the size of the first sub-zone (SUB-ZONE1) of each of the multiple zones (ZONE1, ZONE2, and ZONE3) may be the same, and the size of the second sub-zone (SUB-ZONE2) of each of the multiple zones (ZONE1, ZONE2, and ZONE3) may be the same. In one or more embodiments, the size of all sub-zones (SUB-ZONE1 and SUB-ZONE2) of each of the multiple zones (ZONE1, ZONE2, and ZONE3) may be the same.

[0137] The first sub-zone (SUB-ZONE1) may include a memory block BLK having a first level (write intensive), and the second sub-zone (SUB-ZONE2) may include a memory block BLK having a third level (read intensive). Each of the first sub-zone (SUB-ZONE1) and the second sub-zone (SUB-ZONE2) may further include a memory block (BLK) having a read / write level other than the first level (write intensive) and the third level (read intensive) (e.g., a second level (neutral) and a fourth level (undetermined)).

[0138] The storage controller 900 may send data to the host device in units of a plurality of zones (ZONE1, ZONE2, and ZONE3) according to the migration read command. For example, the storage controller 900 may send data stored in the first zone (ZONE1) to the source server ( Figure 2 210 in the example). In one or more embodiments, the storage controller 900 may send information about sub-zones within the plurality of zones (ZONE1, ZONE2, and ZONE3) together with the data stored in the sub-zones. For example, the storage controller 900 may send information about the size of each sub-zone of the zone to be migrated and about the memory blocks included in each sub-zone from the zone management table 923 of the memory 920 together with the data stored in the sub-zone. Fig.14 Description area management table 923.

[0139] Fig.14 An example of a zone management table according to the embodiment is shown.

[0140] Reference Fig.14, the zone management table 1400 may include information about the size of the sub-zone (the size of SUB-ZONE1 and the size of SUB-ZONE2) included in each of the multiple zones (ZONE1, ZONE2, ..., ZONEn), the memory blocks (e.g., identifiers corresponding to the memory blocks) included in the sub-zones (BLK in SUB-ZONE1 and BLK in SUB-ZONE2), and the number of read / write requests for the sub-zones (read requests for SUB-ZONE1 and write requests for SUB-ZONE1). When the memory blocks are allocated to the sub-zones, the number of read / write requests for the sub-zones (read requests for SUB-ZONE1 and write requests for SUB-ZONE1) may be determined based on the read / write counts of the memory blocks. In one or more embodiments, the zone management table 1400 may also include information about the rank of each of the multiple zones (ZONE1, ZONE2, ..., ZONEn).

[0141] When there is a migration read request for the first zone (ZONE1), the storage controller 900 can read information about the first zone (ZONE1) from the zone management table 1400, and can send the information about the first zone (ZONE1) together with the data stored in the first zone (ZONE1) to the host device (i.e., server).

[0142] In this embodiment, the storage controller 900 may store the data received in units of zones in one of the multiple zones (ZONE1, ZONE2, and ZONE3) according to the migration write command. For example, the storage controller 900 may store the data received in units of zones in the first zone (ZONE1). The storage controller 900 may store "data stored in sub-zones of data received in units of zones" in a storage area corresponding to each sub-zone among multiple storage areas in the first zone (ZONE1) based on the information of the sub-zone. For example, the first zone (ZONE1) includes multiple storage areas, and the storage controller 900 may store "data stored in the first sub-zone among the data received in units of zones" in a storage area corresponding to the first sub-zone among multiple storage areas. In addition, the storage controller 900 may store "data stored in the second sub-zone among the data received in units of zones" in a storage area corresponding to the second sub-zone among multiple storage areas.

[0143] In one or more embodiments, the storage controller 900 may set a plurality of storage areas based on the wear level of the memory block. For example, the storage controller 900 may divide the first zone (ZONE1) into a plurality of storage areas based on the wear level of the memory blocks included in the first zone (ZONE1). Memory blocks having a wear level less than or equal to the first reference value may be allocated to a storage area of ​​the first wear level (WEAR-LEVEL1), memory blocks having a wear level exceeding the second reference value may be allocated to a storage area of ​​the third wear level (WEAR-LEVEL3), and memory blocks having a wear level exceeding the first reference value and less than or equal to the second reference value may be allocated to a storage area of ​​the second wear level (WEAR-LEVEL2). The storage controller 900 may store data of the sub-zone in a plurality of storage areas having different wear levels corresponding to the sub-zone based on information about the sub-zone. For example, when the number of read requests in the first sub-area is greater than the number of write requests and the difference between the number of read requests and the number of write requests exceeds a threshold value (e.g., 100), the storage controller 900 may store the data of the first sub-area in a storage area with a relatively high wear level (i.e., the third wear level (WEAR-LEVEL3)). For example, when the number of write requests in the second sub-area is greater than the number of read requests and the difference between the number of write requests and the number of read requests exceeds a threshold value (e.g., 100), the storage controller 900 may store the data of the second sub-area in a storage area with a relatively low wear level (i.e., the first wear level (WEAR-LEVEL1)). In this embodiment, the storage controller 900 may set a plurality of areas based on the wear level of the memory block. According to the level, the plurality of areas may include different numbers of memory blocks with relatively low wear levels. For example, the first level area may include a first number of memory blocks with relatively low wear levels and a second number of memory blocks with relatively high wear levels, the second number being less than the first number. The second level area may include a second number of memory blocks with relatively low wear levels and a first number of memory blocks with relatively high wear levels. In one or more embodiments, when the storage controller 900 receives data from a first zone having a relatively high rank, and the number of read requests in a first sub-zone of the first zone is greater than the number of write requests and the difference between the number of read requests and the number of write requests exceeds a threshold, the storage controller 900 may store the data of the first sub-zone of the first zone in the first rank zone. When the storage controller 900 receives data from a second zone having a relatively low rank, and the number of read requests in the first sub-zone of the second zone is greater than the number of write requests and the difference between the number of read requests and the number of write requests exceeds a threshold, the storage controller 900 may store the data of the first sub-zone of the second zone in the second rank zone.That is, even if the difference between the number of read requests and the number of write requests for the first sub-zone in each of the first zone and the second zone is the same, due to the grade difference between the first zone and the second zone, data in the first sub-zone of the first zone may be stored in a first grade zone including more memory blocks with relatively low wear levels, and data in the first sub-zone of the second zone may be stored in a second grade zone including fewer memory blocks with relatively low wear levels.

[0144] Fig.15 A flow chart of a data migration method of a storage system according to an embodiment is shown.

[0145] Reference Fig.15 , the source storage device 1510 sets a plurality of zones (S1500). The source storage device 1510 may set a plurality of zones including at least one memory block in the nonvolatile memory. In one or more embodiments, the source storage device 1510 may set a plurality of zones so that the number of memory blocks included in each of the plurality of zones is the same or different.

[0146] The source storage device 1510 sets a plurality of sub-areas in each of a plurality of zones, and allocates memory blocks to the plurality of sub-areas based on the read / write counts of the memory blocks (S1501). The source storage device 1510 may set a first sub-area that is read-intensive and a second sub-area that is write-intensive to each of the plurality of zones. The source storage device 1510 may allocate the memory blocks to the first sub-area or the second sub-area based on the read / write counts of each memory block in the nonvolatile memory. For example, the source storage device 1510 may check the memory blocks from the R / W table ( Fig. 9 The source storage device 1510 may store information about a plurality of areas in the area management table ( Fig. 9 923 in the source storage device 1510). For example, the information about the plurality of zones includes information about the size of a sub-zone included in each of the plurality of zones, the memory blocks included in the sub-zone, and the read / write count of the sub-zone. In one or more embodiments, the source storage device 1510 may set a plurality of sub-zones so that the number of memory blocks included in the plurality of sub-zones set in each of the plurality of zones is the same or different.

[0147] The source storage device 1510 updates the read / write count of the memory block (S1502). The source storage device 1510 may update the read / write count of each memory block based on the number of read / write requests received for each memory block. For example, when a read or write request for a word line or page included in a first memory block is received, the R / W manager ( Fig. 9 931) can be increased by storing in memory ( Fig. 9 The R / W table 921 is updated based on the number of times a read request or a write request corresponding to the first memory block in the R / W table 921 in 920) is received.

[0148] The source server 1520 sends a migration read command to the source storage device 1510 (S1503). The source server 1520 may migrate the data stored in the source storage device 1510 to the target storage device 1540 in response to a user request and a change in the network environment. The migration manager ( Figure 2 The migration manager 213 may generate a migration read command for reading data stored in the source storage device 1510. The migration manager 213 may send the migration read command and the address of the data to be migrated to the source storage device 1510.

[0149] The source storage device 1510 transmits the data to be migrated and the information about the area storing the data to the source server 1520 according to the migration read command (S1504). The R / W manager 931 of the source storage device 1510 may read the information about the area storing the user data to be migrated from the area management table 923 of the memory 920. The source storage device 1510 may read the user data to be migrated from the nonvolatile memory and transmit the data and the area information to the source server 1520.

[0150] The source server 1520 sends a migration write command to the target server 1530 (S1505). In addition, the source server 1520 sends data and zone information to the target server 1530 (S1506).

[0151] The target server 1530 generates a write request according to the migration write command and sends the write request to the target storage device 1540 (S1507). In addition, the target server 1530 sends the data and zone information to the target storage device 1540 (S1508). In one or more embodiments, the source server 1520 may send the migration write command and the data and zone information directly to the target storage device 1540.

[0152] The target storage device 1540 may set a plurality of areas (S1509). The target storage device 1540 may set a plurality of areas including at least one memory block in the nonvolatile memory.

[0153] The target storage device 1540 may update the wear level of the memory block (S1510). For example, the wear leveling manager ( Fig. 9 950) can count the P / E cycles of each memory block, and the P / E cycles of each memory block can be stored in the memory 920 in a table form.

[0154] The target storage device 1540 stores data in the zone based on the zone information and the wear level of the memory block (S1511). The target storage device 1540 may classify the memory blocks included in the zone set in the non-volatile memory of the target storage device 1540 by the wear level. The target storage device 1540 may store the data in the memory blocks with the corresponding wear level in the set zone by referring to the information about the received zone. For example, the target storage device 1540 may store the data stored in the read-intensive sub-zone in the memory blocks with relatively high wear levels in the zone, and may store the data stored in the write-intensive sub-zone in the memory blocks with relatively low wear levels in the zone, based on the read / write count information of each sub-zone in the zone information. Therefore, even when data migration is performed between different storage devices, wear leveling may be performed with reference to the attribute information about the data. Fig.16 The operation is described (S1511).

[0155] Fig.16 A block diagram illustrating a data migration process of a storage system according to an embodiment.

[0156] Reference Fig.16 , data stored in the nonvolatile memory 1610 of the source storage device may be migrated to the nonvolatile memories 1620, 1630, and 1640 of the target storage device. Data stored in the first zone (ZONE1) of the nonvolatile memory 1610 may be migrated to zones (ZONE2, ZONE3, and ZONE4) of the nonvolatile memories 1620, 1630, and 1640 of the target storage device.

[0157] The first zone (ZONE1) of the nonvolatile memory 1610 may include a plurality of memory blocks SBLK having a plurality of read / write levels (write-intensive, neutral, read-intensive, and undetermined). The first zone (ZONE1) may include a plurality of sub-zones (SUB-ZONE1 and SUB-ZONE2). The first sub-zone (SUB-ZONE1) may include a memory block SBLK having a first level (write-intensive) among the plurality of memory blocks SBLK, and the second sub-zone (SUB-ZONE2) may include a memory block SBLK having a third level (read-intensive) among the plurality of memory blocks SBLK. In one or more embodiments, the first sub-zone (SUB-ZONE1) and the second sub-zone (SUB-ZONE2) may also include a memory block SBLK having a second level (neutral) and / or a memory block SBLK having a fourth level (undetermined) among the plurality of memory blocks SBLK.

[0158] In this embodiment, data stored in the first zone (ZONE1) can be migrated to multiple zones (ZONE2, ZONE3, and ZONE4). Data stored in the first sub-zone (SUB-ZONE1) including memory blocks with a first level focused on writing (write-intensive) can be migrated to memory blocks with a wear level indicating a state of less degradation progression within multiple zones (ZONE2, ZONE3, and ZONE4). Data stored in the second sub-zone (SUB-ZONE2) including memory blocks with a third level focused on reading (read-intensive) can be migrated to memory blocks with a wear level indicating a state of greater degradation progression within multiple zones (ZONE2, ZONE3, and ZONE4).

[0159] The nonvolatile memories 1620 , 1630 , and 1640 of the target storage device may include a plurality of zones, and each of the plurality of zones may include a plurality of memory blocks TBLK having a plurality of wear levels ( WEAR-LEVEL1 , WEAR-LEVEL2 , and WEAR-LEVEL3 ).

[0160] In one or more embodiments, the target storage device may perform data migration to a second zone (ZONE2) of the plurality of zones in the nonvolatile memory 1620. When data migration is performed in the second zone (ZONE2), data (data in SUB-ZONE1) stored in the first sub-zone (SUB-ZONE1) may be stored in a memory block 1621 having a first wear level (WEAR-LEVEL1) indicating a state in which degradation progression is small corresponding to a first level (write-intensive) focused on writing. Data (data in SUB-ZONE2) stored in the second sub-zone (SUB-ZONE2) may be stored in a memory block 1622 having a third wear level (WEAR-LEVEL3) indicating a state in which degradation progression is large corresponding to a third level (read-intensive) focused on reading.

[0161] In one or more embodiments, the target storage device may perform data migration to a third zone (ZONE3) among the plurality of zones in the nonvolatile memory 1630. The third zone (ZONE3) may include a plurality of memory blocks (TBLK) having a plurality of wear levels (WEAR-LEVEL1, WEAR-LEVEL2, and WEAR-LEVEL3).

[0162] When data migration is performed in the third zone (ZONE3), data (data in SUB-ZONE1) stored in the first sub-zone (SUB-ZONE1) may be stored in a memory block 1631 having a first wear level (WEAR-LEVEL1) indicating a state of less degradation progression corresponding to the first level (write-intensive) focused on writing, and a memory block 1633 having a second wear level (WEAR-LEVEL2) indicating a state of greater degradation progression than the first wear level (WEAR-LEVEL1). That is, the data (data in SUB-ZONE1) is first stored in the memory block 1631 having the first wear level (WEAR-LEVEL1), and then the data (data in SUB-ZONE1) may be stored in the memory block 1633 having the second wear level (WEAR-LEVEL2). Data (data in SUB-ZONE2) stored in the second sub-zone (SUB-ZONE2) may be stored in a memory block 1632 having a third wear level (WEAR-LEVEL3) indicating a state of greater degradation progression corresponding to the third level (read intensive) focused on reading.

[0163] In one or more embodiments, the target storage device may perform data migration to a fourth zone (ZONE4) among the plurality of zones in the nonvolatile memory 1640. The fourth zone (ZONE4) may include a plurality of memory blocks TBLK having a plurality of wear levels (WEAR-LEVEL2 and WEAR-LEVEL3) in addition to the first wear level (WEAR-LEVEL1).

[0164] When data migration is performed in the fourth zone (ZONE4), data (data in SUB-ZONE1) stored in the first sub-zone (SUB-ZONE1) may be stored in a memory block 1641 having a second wear level (WEAR-LEVEL2) indicating a state in which degradation progress is less corresponding to the first level (write-intensive) focused on writing, and a memory block 1642 having a third wear level (WEAR-LEVEL3). That is, the data (data in SUB-ZONE1) is first stored in the memory block 1641 having the second wear level (WEAR-LEVEL2), and then the data (data in SUB-ZONE1) may be stored in the memory block 1642 having the third wear level (WEAR-LEVEL3). Data (data in SUB-ZONE2) stored in the second sub-zone (SUB-ZONE2) may be stored in a memory block 1642 having a third wear level (WEAR-LEVEL3) indicating a state of greater degradation progression corresponding to the third level (read intensive) focused on reading.

[0165] According to an embodiment, data stored in a memory block focused on reading can be migrated to a memory block with a higher wear level (i.e., a memory block with a higher degree of degradation), and data stored in a memory block focused on writing can be migrated to a memory block with a lower wear level (i.e., a memory block with a lower degree of degradation). Therefore, wear leveling can be performed even when data is migrated between servers.

[0166] Fig.17 A block diagram illustrating a data center to which a storage system according to an embodiment is applied.

[0167] Reference Fig.17, data center 1700 is a facility that collects various data and provides services, and may be referred to as a data storage center. Data center 1700 may be a system for operating a search engine and a database, and may be a computing system used in a business or a government agency such as a bank. Data center 1700 may include application servers (1710a (first application server), ..., 1710n (Nth application server)) and storage servers (1720a (first storage server), ..., 1720m (Mth storage server)). The number of application servers (1710a, ..., 1710n) and the number of storage servers (1720a, ..., 1720m) may be selected differently according to the embodiment, and the number of application servers (1710a, ..., 1710n) and the number of storage servers (1720a, ..., 1720m) may be different. In the following, similar elements may be represented by similar reference numerals ending with different letters.

[0168] The application server 1710 or the storage server 1720 may include at least one of the processors 1711 and 1721 and the memories 1712 and 1722. When the storage server 1720 is described as an example, the processor 1721 may control the overall operation of the storage server 1720, and may access the memory 1722 to execute commands and / or data loaded into the memory 1722. The memory 1722 may be a double data rate synchronous DRAM (DDR SDRAM), a high bandwidth memory (HBM), a hybrid memory cube (HMC), a dual in-line memory module (DIMM), an optane DIMM, or a non-volatile DIMM (NVMDIMM). In one or more embodiments, the number of processors 1721 and the memory 1722 included in the storage server 1720 may be selected differently. In this embodiment, the processor 1721 and the memory 1722 may provide a processor-memory pair. In this embodiment, the number of processors 1721 and the number of memories 1722 may be different. The processor 1721 may include a single-core processor or a multi-core processor. The above description of the storage server 1720 may be similarly applied to the application server 1710. In one or more embodiments, the application server 1710 may not include the storage device 1715. The storage server 1720 may include at least one storage device 1725. The number of storage devices 1725 included in the storage server 1720 may be selected differently according to embodiments.

[0169] The application servers (1710a, ..., 1710n) and the storage servers (1720a, ..., 1720m) can communicate with each other through the network 1730. The network 1730 can be implemented using Fibre Channel (FC) or Ethernet. In this case, FC is a medium for relatively high-speed data transmission, and an optical switch that provides high performance / high availability can be used. Depending on the access method of the network 1730, the storage servers (1720a, ..., 1720m) can be set as file storage devices, block storage devices, or object storage devices.

[0170] In this embodiment, the network 1730 may be a storage-only network such as a storage area network (SAN). For example, the SAN may be an FC-SAN implemented using an FC network and according to an FC protocol (FCP). As another example, the SAN may be an IP-SAN implemented using a TCP / IP network and according to an iSCSI (SCSI over TCP / IP or Internet SCSI) protocol. In another embodiment, the network 1730 may be a general network such as a TCP / IP network. For example, the network 1730 may be implemented according to protocols such as FC over Ethernet (FCoE), network attached storage (NAS), and NVMe over network (NVMe-oF).

[0171] Hereinafter, the application server 1710 and the storage server 1720 will be mainly described. The description of the application server 1710 may also be applied to another application server 1710n, and the description of the storage server 1720 may also be applied to another storage server 1720m.

[0172] The application server 1710 may store data requested by a user or client to be stored in one of the storage servers (1720a, ..., 1720m) through the network 1730. In addition, the application server 1710 may obtain data requested to be read by a user or client from one of the storage servers (1720a, ..., 1720m) through the network 1730. For example, the application server 1710 may be implemented as a network server or a database management system (DBMS).

[0173] The application server 1710 may access a memory 1712n or a storage device 1715n included in another application server 1710n through a network 1730, or may access a memory (1722a, ..., 1722m) or a storage device (1725a, ..., 1725m) included in a storage server (1720a, ..., 1720m) through a network 1730. Therefore, the application server 1710 may perform various operations on data stored in the application server (1710a, ..., 1710n) and / or the storage server (1720a, ..., 1720m). For example, the application server 1710 may execute a command to move or copy data between the application server (1710a, ..., 1710n) and / or the storage server (1720a, ..., 1720m). In this case, data may be moved from the storage device (1725a, ..., 1725m) of the storage server (1720a, ..., 1720m) to the memory (1712a, ..., 1712n) of the application server (1710a, ..., 1710n) through the memory (1722a, ..., 1722m) of the storage server (1720a, ..., 1720m), or directly to the memory (1712a, ..., 1712n) of the application server (1710a, ..., 1710n). The data moved through the network 1730 may be encrypted data for security or privacy.

[0174] When the storage server 1720 is described as an example, the interface circuit 1729 may provide a physical connection between the processor 1721 and the controller 1726 and a physical connection between the NIC 1724 and the controller 1726. For example, the interface circuit 1729 may be implemented by a direct attached storage (DAS) method of directly connecting the storage device 1725 to a dedicated cable. In addition, for example, the interface circuit 1729 may be implemented by various interface methods (such as, Advanced Technology Attachment (ATA), Serial ATA (SATA), External SATA (e-SATA), Small Computer Small Interface (SCSI), Serial Attached SCSI (SAS), Peripheral Component Interconnect (PCI), PCI Express (PCIe), NVM Express (NVMe), IEEE 1394, Universal Serial Bus (USB), Secure Digital (SD) Card, Multimedia Card (MMC), Embedded Multimedia Card (eMMC), Universal Flash Storage (UFS), Embedded Universal Flash Storage (eUFS) and Compact Flash (CF) Card).

[0175] The storage server 1720 may further include a switch 1723 and a NIC 1724. The switch 1723 may selectively connect the processor 1721 and the storage device 1725 or selectively connect the NIC 1724 and the storage device 1725 according to the control of the processor 1721. Similarly, the application server 1710 may further include a switch 1713 and a NIC 1714.

[0176] In this embodiment, the NIC 1724 may include a network interface card, a network adapter, etc. The NIC 1724 may be connected to the network 1730 through a wired interface, a wireless interface, a Bluetooth interface, an optical interface, etc. The NIC 1724 may include an internal memory, a DSP, a host bus interface, etc., and may be connected to the processor 1721 and / or the switch 1723 through the host bus interface. The host bus interface may be implemented as one of the examples of the above-mentioned interface circuit 1729. In this embodiment, the NIC 1724 may be integrated with at least one of the processor 1721, the switch 1723, and the storage device 1725.

[0177] In the storage server (1720a, ..., 1720m) or the application server (1710a, ..., 1710n), the processor may program or read data by sending a command to the storage device (1715a, ..., 1715n, 1725a, ..., 1725m) or the memory (1712a, ..., 1712n, 1722a, ..., 1722m). In this case, the data may be error-corrected data by an error correction code (ECC) engine. The data is data that has been processed by data bus inversion (DBI) or data masking (DM), and may include cyclic redundancy code (CRC) information. For security or privacy, the data may be encrypted.

[0178] The storage device (1725a, ..., 1725m) may send a control signal and a command / address signal to the NAND flash memory device (1727a, ..., 1727m) in response to a read command received from the processor. Therefore, when reading data from the NAND flash memory device (1727a, ..., 1727m), a read enable (RE) signal may be input as a data output control signal and may be used to output data to the DQ bus. The RE signal may be used to generate a data strobe (DQS). The command and address signals may be latched into the page buffer according to the rising edge or falling edge of the write enable (WE) signal.

[0179] The controller 1726 may control the overall operation of the storage device 1725. In this embodiment, the controller 1726 may include a static random access memory (SRAM). The controller 1726 may write data to the NAND flash memory 1727 in response to a write command, or read data from the NAND flash memory 1727 in response to a read command. For example, the write command and / or the read command may be provided from the processor 1721 in the storage server 1720, the processor 1721m in another storage server 1720m, or the processor (1711a, ..., 1711n) in the application server (1710a, ..., 1710n). The DRAM 1728 may temporarily store (buffer) data to be written to the NAND flash memory 1727 or data read from the NAND flash memory 1727. In addition, the DRAM 1728 may store metadata. Here, the metadata is data generated by the controller 1726 for managing user data or the NAND flash memory 1727.

[0180] The storage devices (1725a, ..., 1725m) can be based on the above reference Figures 1 to 16 The described storage device according to the embodiment of the present disclosure is implemented, and may be implemented to perform the driving method according to the embodiment of the present disclosure.

[0181] The storage device (1725a, ..., 1725m) may send the data to be migrated and the attribute information of the memory block storing the data to the target storage server (1720a, ..., 1720m) according to the migration read request. In one or more embodiments, the storage device (1725a, ..., 1725m) may send the zone unit data and the zone information to the target storage server (1720a, ..., 1720m) according to the migration read request.

[0182] The storage device (1725a, ..., 1725m) may receive the data and the attribute information of the memory block storing the data according to the migration write request, and store the data to be migrated in the memory block having the wear level corresponding to the attribute information. In one or more embodiments, the storage device (1725a, ..., 1725m) may receive the zone unit data and the zone information according to the migration write request, and may store the zone unit data in the memory block having the corresponding wear level based on the zone information.

[0183] Embodiments of the present disclosure can be effectively used in storage devices and electronic devices and systems including storage devices. For example, embodiments of the present disclosure can be more effectively applied to electronic systems (such as personal computers, server computers, data centers, workstations, laptop computers, cellular phones, smart phones, MP3 players, personal digital assistants (PDAs), portable multimedia players (PMPs), digital TVs, digital cameras, portable game consoles, navigation devices, wearable devices, IoT (Internet of Things) devices, IoE (Internet of Everything) devices, e-books, virtual reality (VR) devices, augmented reality (AR) devices, and drones).

[0184] While embodiments of the present disclosure have been described in connection with what are presently considered to be practical embodiments, it is to be understood that the disclosure is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.

Claims

1. A method for migrating data, the method comprising: receiving data, read count information about the data, and write count information about the data; selecting at least one memory block among the plurality of memory blocks based on wear levels of the plurality of memory blocks, the read count information, and the write count information; as well as The data is stored in the at least one memory block.

2. The method according to claim 1, further comprising: Allocate multiple memory blocks to multiple regions, The step of receiving the data, the read count information and the write count information comprises: receiving data stored in a first area among the plurality of areas, receiving read count information about the data stored in the first area, and receiving write count information about the data stored in the first area, and The step of storing the data in the at least one memory block further comprises: The data stored in the first area is stored in a second area among the plurality of areas.

3. The method according to claim 2, wherein: The first area includes a plurality of sub-areas, wherein the read count information of the data stored in the first area includes information on the read count of the data stored in each of the plurality of sub-areas, and The write count information of the data stored in the first area includes information on the write count of the data stored in each of the plurality of sub-areas.

4. The method according to claim 3, wherein: The step of storing the data stored in the first area further comprises: for each corresponding sub-area of ​​the plurality of sub-areas: comparing a read count of data stored in the corresponding sub-area with a write count of data stored in the corresponding sub-area; Based on identifying that a read count of data stored in the corresponding sub-area is greater than a write count of data stored in the corresponding sub-area, storing the data of the corresponding sub-area in at least one memory block having a high wear level among the plurality of memory blocks, wherein the high wear level is greater than a predetermined level, and Based on identifying that a read count of data stored in the corresponding sub-area is less than a write count of data stored in the corresponding sub-area, the data of the corresponding sub-area is stored in at least one memory block having a low wear level among the multiple memory blocks, wherein the low wear level is less than the predetermined level.

5. The method according to claim 4, wherein: The step of storing data of the corresponding sub-area in the at least one memory block having a high wear level also includes: storing data of the corresponding sub-area in at least one memory block having a first wear level and at least one memory block having a second wear level, the second wear level corresponding to a state in which degradation progression is less than that of the first wear level, wherein the at least one memory block having the first wear level is included in the second area.

6. The method according to claim 4, wherein: The step of storing data of the corresponding sub-area in the at least one memory block having a low wear level also includes: storing data of the corresponding sub-area in at least one memory block having a first wear level and at least one memory block having a second wear level, the second wear level corresponding to a state in which degradation progresses more significantly than the first wear level, wherein the at least one memory block having the first wear level is included in the second area.

7. The method according to claim 1, wherein: The steps of storing the data include: comparing the read count and the write count based on the read count information about the data and the write count information about the data; Based on identifying that the read count is greater than the write count, storing the data in at least one memory block having a high wear level among the plurality of memory blocks, wherein the high wear level is greater than a predetermined level; and Based on identifying that the read count is less than the write count, the data is stored in at least one memory block having a low wear level among the plurality of memory blocks, wherein the low wear level is less than the predetermined level.

8. The method according to any one of claims 1 to 7, further comprising: Wear levels of the plurality of memory blocks are determined based on program / erase cycles of the plurality of memory blocks.

9. A method for operating a storage device, the method comprising: Set up multiple zones; assigning a plurality of sub-areas to each of the plurality of areas; allocating the plurality of memory blocks to the plurality of sub-areas based on read counts and write counts of the plurality of memory blocks; storing information about a read count and a write count corresponding to each of the plurality of sub-areas in an area management table; receiving a data migration request for at least one zone among the plurality of zones; as well as Data stored in the at least one zone and information on read counts and write counts of a plurality of sub-zones of the at least one zone from the zone management table are transmitted.

10. The method according to claim 9, wherein: The step of allocating the plurality of memory blocks to the plurality of sub-areas comprises: identifying each memory block of the plurality of memory blocks as corresponding to one of a plurality of read / write levels based on the read count and the write count, wherein the plurality of read / write levels include a read-intensive level and a write-intensive level; Based on identifying at least one memory block among the plurality of memory blocks as corresponding to a read intensive level, allocating the at least one memory block corresponding to the read intensive level to a first sub-area among the plurality of sub-areas; and Based on identifying at least one memory block among the plurality of memory blocks as corresponding to the write-intensive level, the at least one memory block corresponding to the write-intensive level is allocated to a second sub-area among the plurality of sub-areas.

11. The method according to claim 10, wherein: The step of allocating the plurality of memory blocks to the plurality of sub-areas further comprises: At least one memory block among the plurality of memory blocks that is not determined to correspond to the read intensive level or the write intensive level is allocated to the first sub-area and the second sub-area.

12. The method according to claim 10, wherein: The step of storing the information in the zone management table also includes: A size of each of the plurality of sub-areas, an identifier corresponding to at least one memory block included in each of the plurality of sub-areas, and a read count and a write count corresponding to each of the plurality of sub-areas are stored.

13. The method according to any one of claims 9 to 12, wherein: The step of setting the plurality of sub-areas includes configuring the plurality of sub-areas to have the same size.

14. The method according to any one of claims 9 to 12, wherein: One of the plurality of areas includes: a plurality of memory blocks included in a plurality of nonvolatile memories.

15. A storage system comprising: A source storage device comprising a plurality of memory blocks, wherein the source storage device is configured to: allocate the plurality of memory blocks into a plurality of zones, allocate each of the plurality of zones into a plurality of sub-zones, and transmit information about data stored in one of the plurality of zones, read counts and write counts of a plurality of sub-zones of the one zone; and The source storage server is configured to send information about the data stored in the one zone, the read counts of the multiple sub-zones of the one zone, and the write counts to the target storage device.

16. The storage system according to claim 15, wherein: The source storage device is also configured to: allocating one or more memory blocks allocated to the one zone among the plurality of memory blocks to each of the plurality of sub-zones of the one zone based on the read counts and the write counts of the plurality of sub-zones of the one zone, and Information on the read counts and the write counts of the plurality of sub-areas of the one area is stored in an area management table.

17. The storage system according to claim 16, wherein: The source storage device is also configured to: identifying the one or more memory blocks as corresponding to one of a plurality of read / write levels based on read counts and write counts of the one or more memory blocks among the plurality of memory blocks allocated to the one zone, wherein the plurality of read / write levels include a read-intensive level and a write-intensive level, Based on identifying at least one memory block among the one or more memory blocks allocated to the one zone as corresponding to a read intensive level, allocating the at least one memory block corresponding to the read intensive level to a first sub-zone among the plurality of sub-zones, and Based on identifying at least one memory block among the one or more memory blocks allocated to the one zone as corresponding to a write-intensive level, the at least one memory block corresponding to the write-intensive level is allocated to a second sub-zone among the plurality of sub-zones.

18. The storage system according to claim 16, wherein: The source storage device is also configured to: dividing the plurality of zones into a plurality of levels, and Information on the plurality of levels is stored in the zone management table.

19. The storage system according to claim 18, wherein: The number of memory blocks corresponding to a relatively low wear level among the multiple memory blocks, which is included in an area corresponding to a first level among the multiple levels among the multiple zones, is different from the number of memory blocks corresponding to a relatively low wear level among the multiple memory blocks, which is included in an area corresponding to a second level among the multiple levels among the multiple memory blocks.

20. The storage system according to any one of claims 15 to 19, wherein: One of the plurality of areas includes: a plurality of memory blocks included in a plurality of nonvolatile memories.

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