Data verification method for safe refreshing of electronic controller

Abstract

The invention discloses a data verification method for safe refreshing of an electronic controller, and relates to the technical field of electronic controllers. The method comprises the following steps: acquiring target refresh data, reading a pre-stored check code, generating and matching a new check code, analyzing communication interference and data bit flipping fluctuation in the matching process, and finally grading and correcting according to matching accuracy, so that the integrity and reliability of the data in the refresh process are ensured, and the data refresh efficiency is improved. Potential transmission errors can be effectively detected and corrected, the tolerance of the system to interference can be improved, wrong data are prevented from being written into the system, and therefore the stability and safety of the system are greatly improved, and especially in the environment with the high reliability requirement, the reliability of the system is greatly improved. A closed-loop mechanism can be provided for error detection and repair in the data transmission and storage process, and long-term reliable operation of the system can be maintained.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic controllers, and in particular to a data verification method for safe refreshing of electronic controllers. Background Art

[0002] An electronic controller is a device used to manage and control electronic systems or equipment. It usually consists of hardware and embedded software, and is able to receive data from sensors, process this information, and issue instructions to control the operation of actuators or other components according to predetermined algorithms or logic. Electronic controllers are widely used in the fields of automobiles, industrial automation, household appliances, etc., and improve the performance, efficiency and safety of the system by precisely controlling various parameters.

[0003] In the prior art, the data verification for secure refresh by the electronic controller is usually implemented by using a verification algorithm (such as CRC verification or hash algorithm). Specifically, the controller generates a verification code for the data during the refresh process and compares it with the pre-stored verification code. If the verification code matches, it means that no error occurred in the data during the refresh process, ensuring data integrity and consistency; if it does not match, the controller will trigger the error handling mechanism to prevent the writing or use of erroneous data, thereby ensuring the security of the system. However, when the controller compares the verification code of the generated data with the pre-stored verification code during the refresh process, if a transmission error occurs during the data transmission between the controller and the storage unit, but the generated verification code still matches the pre-stored verification code, these errors will not be detected. He said that undetected transmission errors may cause incorrect data to enter the system, which in turn causes system instability or failure, especially in control systems that require high reliability and accuracy. This problem will have serious consequences. Summary of the invention

[0004] The object of the present invention is to provide a data verification method for safe refreshing of an electronic controller to solve the deficiencies in the background technology.

[0005] In order to achieve the above object, the present invention provides the following technical solution: a data verification method for safe refreshing of an electronic controller, comprising the following steps:

[0006] S1: Obtain target refresh data from a storage unit, the target refresh data being the content to be refreshed; read a pre-stored check code corresponding to the target refresh data from the memory, the pre-stored check code being the check code generated and stored when the data is first written and refreshed;

[0007] S2: Determine a verification algorithm, generate a new verification code according to the target refresh data, match the verification code of the newly generated target refresh data with the pre-stored verification code, and divide it into two states of matching and mismatching according to the matching result;

[0008] S3: For the matched check codes, a comprehensive analysis is performed on the communication interference degree between the controller and the storage unit during the matching process and the fluctuation of the number of data bit flips during the data transmission process to evaluate the accuracy of the check code matching;

[0009] S4: According to the accuracy of the check code matching, the accuracy of the matched check code is divided into different levels, that is, high-accuracy matching and low-accuracy matching, and the target refresh data of the low-accuracy matching is corrected, and the check code is regenerated after correction, and matching is performed again.

[0010] Preferably, in S2, the check code of the newly generated target refresh data is matched with the pre-stored check code, and divided into two states of matching and mismatching according to the matching result, specifically:

[0011] Input the target refresh data into the selected verification algorithm for processing;

[0012] After the algorithm runs, a new checksum corresponding to the target refresh data is generated;

[0013] Read the pre-stored verification code corresponding to the target refresh data;

[0014] The newly generated check code is compared bit by bit with the read pre-stored check code, and each bit is compared. If all bits are the same, the check codes are considered to match. After the comparison is completed, a Boolean value is obtained.

[0015] Preferably, if the newly generated verification code is completely consistent with the pre-stored verification code, it means that no error occurs in the target refresh data during the reading and transmission process. At this time, its state is marked as a matching state, indicating that the data verification is successful and the refresh operation is performed;

[0016] If the newly generated check code is inconsistent with the pre-stored check code, it means that an error has occurred in the data reading and transmission process. At this time, its status is marked as a mismatch state, triggering the error handling mechanism.

[0017] Preferably, in S3, a dynamic channel fluctuation index is generated according to the degree of communication interference between the controller and the storage unit during the matching process, and the method for obtaining the dynamic channel fluctuation index is:

[0018] During data transmission, the signal strength between the controller and the storage unit is monitored in real time, and the signal strength value S(t) at each time point is recorded; a fixed sampling frequency fs is set to capture the instantaneous fluctuation of the signal strength, and a time window T is selected for analysis. Within this window, the average signal strength is calculated. The expression is: Where, N is the total number of samples in the time window, S9t i ) is the signal strength at the i-th sampling time. The dynamic channel fluctuation index of the signal strength in the time window is calculated to measure the volatility of the signal strength. The expression is: Where EM is the dynamic channel fluctuation index.

[0019] Preferably, the instantaneous bit flip rate abnormality index is generated according to the fluctuation of the number of data bit flips during the data transmission process during the matching process, and the method for obtaining the instantaneous bit flip rate abnormality index is:

[0020] During data transmission, sampling is performed at fixed time intervals Δs, and the number of bit flips V in each time interval is recorded. Δs ; For each time interval Δs, calculate the instantaneous bit flip rate, the expression is: Where IBFR(s) is the instantaneous bit flip rate; the average value in the long time window H is calculated, that is, the average bit flip rate is calculated The expression is: Where N is the total number of samples in the time window H. The outlier value of the instantaneous bit flip rate in the time window H is calculated as: Where PK is the outlier value of the instantaneous bit flip rate. The instantaneous bit flip rate anomaly index is calculated based on the calculated outlier value of the instantaneous bit flip rate. The expression is: Where IBFRAI is the instantaneous bit flip rate anomaly index.

[0021] Preferably, a comprehensive analysis is performed on the communication interference degree between the controller and the storage unit during the matching process and the fluctuation of the number of data bit flips during the data transmission process to evaluate the accuracy of the check code matching, specifically:

[0022] The dynamic channel fluctuation index and the instantaneous bit flip rate anomaly index are normalized, and the accuracy coefficient of the check code matching is calculated according to the normalized dynamic channel fluctuation index and the instantaneous bit flip rate anomaly index.

[0023] Preferably, in S4, the accuracy of the matched verification code is divided into different levels according to the accuracy of the verification code matching, specifically:

[0024] The obtained accuracy coefficient of the verification code match is compared with the preset accuracy coefficient reference threshold. If the accuracy coefficient of the verification code match is greater than or equal to the preset accuracy coefficient reference threshold, it means that the accuracy of the verification code match is high. At this time, a matching accuracy signal is generated and no processing is required; if the accuracy coefficient of the verification code match is less than the preset accuracy coefficient reference threshold, it means that the accuracy of the verification code match is low. At this time, an inaccurate matching signal is generated, and data correction and re-matching are performed on the target refresh data.

[0025] In the above technical solution, the technical effects and advantages provided by the present invention are:

[0026] 1. The present invention introduces a dynamic channel fluctuation index and an instantaneous bit flip rate abnormality index to conduct an in-depth analysis and comprehensive evaluation of interference and bit flip fluctuations during data transmission. This method can not only detect and correct transmission errors that cannot be detected by traditional verification methods, but also effectively distinguish high-risk and low-risk data matching situations through refined accuracy level classification. By automatically correcting and re-verifying low-accuracy matching data, the integrity of the data and the stability of the system are ensured, especially in environments with high reliability and high precision requirements, the security and robustness of the system are significantly improved.

[0027] 2. The present invention divides the accuracy of the check code matching into two levels, high and low, by setting the accuracy coefficient reference threshold, which significantly improves the system's perception and response capabilities to data errors. For data with low accuracy matching, the system can automatically trigger the correction mechanism, regenerate and match the check code, and prevent erroneous data from entering the system. This closed-loop verification and correction mechanism ensures the normal operation of the system in the face of complex interference environments, and reduces the potential failure risk caused by undetected errors, thereby greatly improving the overall reliability and operating efficiency of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For ordinary technicians in this field, other drawings can also be obtained based on these drawings.

[0029] Figure 1 The present invention is a flow chart of the method. DETAILED DESCRIPTION

[0030] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0031] For examples, see Figure 1 As shown, the data verification method for securely refreshing an electronic controller described in this embodiment includes the following steps:

[0032] S1: Obtain target refresh data from a storage unit, the target refresh data being the content to be refreshed; read a pre-stored check code corresponding to the target refresh data from the memory, the pre-stored check code being the check code generated and stored when the data is first written and refreshed;

[0033] S2: Determine a verification algorithm, generate a new verification code according to the target refresh data, match the verification code of the newly generated target refresh data with the pre-stored verification code, and divide it into two states of matching and mismatching according to the matching result;

[0034] S3: For the matched check codes, a comprehensive analysis is performed on the communication interference degree between the controller and the storage unit during the matching process and the fluctuation of the number of data bit flips during the data transmission process to evaluate the accuracy of the check code matching;

[0035] S4: According to the accuracy of the check code matching, the accuracy of the matched check code is divided into different levels, that is, high-accuracy matching and low-accuracy matching, and the target refresh data of the low-accuracy matching is corrected, and the check code is regenerated after correction, and matching is performed again.

[0036] Among them, in S1, the target refresh data is obtained from the storage unit, and the target refresh data is the content to be refreshed; the pre-stored verification code corresponding to the target refresh data is read from the memory, and the pre-stored verification code is the verification code generated and stored when the data is first written and refreshed, mainly including:

[0037] Determine the data address: According to the system's memory management policy or the instructions of the refresh operation, determine the specific address range of the data to be refreshed in the storage unit. This may include the calculation and analysis of the physical address or logical address.

[0038] Confirm data size: Determine the size of the data to be refreshed, usually in bytes or words. This information can be obtained through the controller's refresh operation command or pre-set system parameters.

[0039] Storage unit initialization: Ensure that the storage unit is ready for read operations, the interface between the controller and the storage unit has established a connection, and all related hardware or software are ready.

[0040] Issue a read command: The controller issues a read command to the storage unit through the bus or communication interface, specifying the address and size of the target data. The command format and transmission protocol are determined by the system design, such as SPI, I2C, PCIe, etc.

[0041] Data transfer: The storage unit transfers the target data from the specified address to the controller according to the controller's command. This process may involve the transfer of multiple data blocks, especially when the data volume is large.

[0042] Data reception and storage: After the controller receives the target refresh data, it stores it in a temporary buffer or register for subsequent processing and verification.

[0043] Determine the checksum address: Find the corresponding checksum storage location according to the address or identifier of the target refresh data. Usually, the checksum will be stored in an area closely associated with the data, which may be in a specific segment of the same storage unit or a dedicated checksum storage area.

[0044] Verification code storage mapping: If the system uses a mapping table or index to manage the correspondence between data and verification codes, the specific storage address of the verification code needs to be found through the mapping table.

[0045] Checksum memory initialization: Make sure the memory used to store the checksum is ready for reading. Confirm that the communication channel between the controller and the checksum memory is unobstructed.

[0046] Issue a read checksum command: The controller issues a read command to the checksum memory, specifying the address of the checksum. This may be similar to the operation of reading data, depending on the type of memory and the interface protocol.

[0047] Checksum transfer: The memory transfers a pre-stored checksum from a specified address to the controller, usually through the same communication bus or interface as the data read.

[0048] Verification code reception and storage: After the controller receives the verification code, it stores it in a specific register or buffer for comparison with the newly generated verification code.

[0049] Verify data consistency: Compare the read target refresh data with the pre-stored checksum to confirm the integrity of the data during transmission.

[0050] Prepare for refresh operation: After confirming that the data is correct, the controller can continue to perform data refresh operations, update target data, or perform other necessary operations.

[0051] S2: Determine a verification algorithm, generate a new verification code according to the target refresh data, match the verification code of the newly generated target refresh data with the pre-stored verification code, and divide it into two states of matching and mismatching according to the matching result.

[0052] Select an appropriate verification algorithm based on system requirements and resource conditions. Common verification algorithms include:

[0053] CRC (Cyclic Redundancy Check): Suitable for detecting common transmission errors, such as single-bit errors, multiple-bit errors, burst errors, etc.

[0054] MD5 or SHA: Hash algorithm, used to generate shorter fixed-length checksums, which provide stronger guarantees for data integrity.

[0055] Parity check: Simple and fast to compute, suitable for resource-constrained systems, but has limited detection capabilities.

[0056] Configure algorithm parameters: Select CRC algorithm, set polynomial, initial value and other parameters. For hash algorithm, confirm that the generated checksum length meets the requirements.

[0057] Prepare computing resources: Make sure the controller has the computing resources required to execute the selected algorithm, including the necessary registers, memory, and processing time.

[0058] Read target refresh data: Make sure the controller has correctly obtained the data to be refreshed and saved it in the memory or register.

[0059] Input data to the verification algorithm: Input the target refresh data byte by byte or block by block into the selected verification algorithm for processing.

[0060] Calculate the checksum: After the algorithm runs, a new checksum corresponding to the target refresh data is generated. This checksum will be used to verify the integrity of the data.

[0061] Read pre-stored check code: read the pre-stored check code corresponding to the target refresh data from the storage unit or the check code memory.

[0062] Compare two check codes: compare the newly generated check code with the read pre-stored check code bit by bit (or byte by byte): Bit by bit comparison: compare each bit (or each byte). If all bits are the same, the check codes are considered to match.

[0063] Generate comparison result: After the comparison is completed, a Boolean value (match or not match) is obtained.

[0064] Match: If the newly generated checksum is exactly the same as the pre-stored checksum, it means that there is no error in the target refresh data during reading and transmission. At this point, the system can mark its status as "matched", indicating that the data verification is successful and the refresh operation can be performed safely.

[0065] Mismatch: If the newly generated checksum is inconsistent with the pre-stored checksum, it means that an error may have occurred during the data reading or transmission process. At this time, the system should mark its status as "mismatch" and trigger the error handling mechanism to prevent erroneous data from being written.

[0066] The matching results are recorded in the controller's status register or log for subsequent analysis or operation. The matching status is fed back to the upper-level software or hardware module of the system to inform it of the next operation instruction (such as continuing to refresh, retransmitting data, triggering an alarm, etc.).

[0067] S3: For the matched check codes, a comprehensive analysis is performed on the communication interference degree between the controller and the storage unit during the matching process and the fluctuation of the number of data bit flips during the data transmission process to evaluate the accuracy of the check code matching.

[0068] During the data transmission between the controller and the storage unit, use dedicated hardware or software tools to monitor the quality of the communication channel in real time and record various interference conditions that may affect communication, such as signal strength fluctuations, noise, electromagnetic interference, etc. Set error counters to record events such as bit errors, retransmission times, signal loss, etc. that occur during the transmission. These counters can be implemented through built-in communication protocols or external detection circuits. Check whether the controller has stored a history of communication interference, such as error events or warning signals that occurred during previous transmissions. These records can provide information about long-term communication interference trends.

[0069] The dynamic channel fluctuation index is generated according to the degree of communication interference between the controller and the storage unit during the matching process. The dynamic channel fluctuation index is used to quantify the fluctuation degree of the communication channel between the controller and the storage unit, especially under interference. It reflects the dynamic stability of the channel. The higher the value, the more violent the channel fluctuation and the less stable the communication quality. The method for obtaining the dynamic channel fluctuation index is:

[0070] During data transmission, monitor the signal strength between the controller and the storage unit in real time. Record the signal strength value S(t) at each time point; set a fixed sampling frequency fs to capture the instantaneous fluctuation of signal strength, and ensure that the sampling frequency is high enough to reflect the actual fluctuation. Select a time window T for analysis (e.g. 1 second, 10 seconds, etc.). Within this window, calculate the average signal strength The expression is: In the formula, N is the total number of samples in the time window, S(t i ) is the signal strength at the i-th sampling time. The dynamic channel fluctuation index of the signal strength in the time window is calculated to measure the volatility of the signal strength. The expression is: Where EM is the dynamic channel fluctuation index.

[0071] The larger the dynamic channel fluctuation index, the more serious the interference to the communication channel between the controller and the storage unit, and the more severe the signal strength fluctuation. In this case, even if the checksum matches, the accuracy of the match may be reduced because the interference may cause undetected transmission errors or "false matches". In other words, a larger dynamic channel fluctuation index indicates that the unreliability of the checksum matching results is increased, and the system may need to take additional verification measures to ensure data integrity and consistency.

[0072] During data transmission, use hardware or software tools to monitor each data bit transmitted. Record data bit flip events that occur during transmission, that is, when the bit changes from 0 to 1 or from 1 to 0. Set up a counter to record the total number of bit flips that occurred during transmission. This data can be recorded in time segments or transmission blocks (such as per byte, per packet). Establish a logging system to record the number of bit flips that have occurred during each data transmission and its fluctuations in history. This includes the total number of flips per transmission, in which transmission blocks they occurred, and whether these flips are periodic or random.

[0073] The instantaneous bit flip rate anomaly index is generated according to the fluctuation of the number of data bit flips during the data transmission process during the matching process. The instantaneous bit flip rate anomaly index is used to quantify the degree of abnormality of the instantaneous bit flip rate during the data transmission process. It reflects whether there are abnormally high bit flip events during the transmission process, indicating potential interference or error risks. The method for obtaining the instantaneous bit flip rate anomaly index is:

[0074] During data transmission, sampling is performed at fixed time intervals Δs, and the number of bit flips V in each time interval is recorded. Δs ; For each time interval Δs, calculate the instantaneous bit flip rate, the expression is: Where IBFR(s) is the instantaneous bit flip rate; the average value in the long time window H is calculated, that is, the average bit flip rate is calculated The expression is: Where N is the total number of samples in the time window H. The outlier value of the instantaneous bit flip rate in the time window H is calculated as: Where PK is the outlier value of the instantaneous bit flip rate. The instantaneous bit flip rate anomaly index is calculated based on the calculated outlier value of the instantaneous bit flip rate. The expression is: Where IBFRAI is the instantaneous bit flip rate anomaly index.

[0075] The larger the abnormal index of the instantaneous bit flip rate, the more abnormal bit flips occurred during data transmission, which may indicate that the communication link is severely disturbed or there are potential errors. In this case, even if the checksum matches, the accuracy of the match may be questionable because the checksum may fail to detect the errors caused by these abnormal bit flips. In other words, the larger the abnormal index of the instantaneous bit flip rate, the lower the reliability of the checksum matching result, and the system should perform further verification or take additional protective measures to ensure the integrity of the data.

[0076] The dynamic channel fluctuation index and the instantaneous bit flip rate anomaly index are normalized, and the accuracy coefficient of the check code matching is calculated according to the normalized dynamic channel fluctuation index and the instantaneous bit flip rate anomaly index.

[0077] For example, the present invention can use the following formula to calculate the accuracy coefficient of the check code matching, and the calculation expression is: Where KM is the accuracy coefficient of check code matching, EM is the dynamic channel fluctuation index, IBFRAI is the instantaneous bit flip rate anomaly index, a1 and a2 are the proportional coefficients of the dynamic channel fluctuation index and the instantaneous bit flip rate anomaly index, and a2>a1>0.

[0078] S4: According to the accuracy of the check code matching, the accuracy of the matched check code is divided into different levels, that is, high-accuracy matching and low-accuracy matching, and the target refresh data of the low-accuracy matching is corrected, and the check code is regenerated after correction, and matching is performed again.

[0079] The obtained accuracy coefficient of the verification code match is compared with the preset accuracy coefficient reference threshold. If the accuracy coefficient of the verification code match is greater than or equal to the preset accuracy coefficient reference threshold, it means that the accuracy of the verification code match is high, and a matching accurate signal is generated at this time; if the accuracy coefficient of the verification code match is less than the preset accuracy coefficient reference threshold, it means that the accuracy of the verification code match is low, and an matching inaccurate signal is generated at this time, and data correction and re-matching are performed on the target refresh data.

[0080] Data correction specifically includes: For low-accuracy matching data, the controller can try to re-acquire the target refresh data from the storage unit, or use redundant data for correction. If the system supports error detection and correction codes (such as ECC), it can try to correct the detected bit errors. After correction, regenerate the check code.

[0081] Regenerating the check code and matching includes: regenerating the check code using the same check algorithm according to the corrected data, matching the regenerated check code with the pre-stored check code again, further predicting and feeding back the accuracy of the check code matching in the subsequent time period, and making corresponding processing.

[0082] In this embodiment, by obtaining target refresh data from a storage unit, the target refresh data is the content to be refreshed; reading a pre-stored check code corresponding to the target refresh data from a memory, the pre-stored check code is a check code generated and stored when the data is first written and refreshed; determining a check algorithm, generating a new check code according to the target refresh data, matching the check code of the newly generated target refresh data with the pre-stored check code, and dividing it into two states of matching and mismatching according to the matching result; for the matched check code, comprehensively analyzing the communication interference degree between the controller and the storage unit during the matching process and the fluctuation of the number of data bit flips during the data transmission process, and evaluating the accuracy of the check code matching; according to the accuracy of the check code matching, dividing the accuracy of the matched check code into different levels, dividing it into high-accuracy matching and low-accuracy matching, and correcting the target refresh data of the low-accuracy matching, regenerating the check code after correction, and matching again. Thereby greatly improving the stability and security of the system, especially in an environment with high reliability requirements. This method provides a closed-loop mechanism for error detection and repair during data transmission and storage, which helps to maintain the long-term reliable operation of the system.

[0083] The above formulas are all dimensionless and numerical calculations. The formula is a formula for the most recent real situation obtained by collecting a large amount of data and performing software simulation. The preset parameters in the formula are set by technicians in this field according to actual conditions.

[0084] The above embodiments can be implemented in whole or in part by software, hardware, firmware or any other combination. When implemented by software, the above embodiments can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer programs are loaded or executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from one website site, computer, server or data center to another website site, computer, server or data center by wired (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that contains one or more available media sets. The available medium can be a magnetic medium (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium. The semiconductor medium can be a solid-state hard disk.

[0085] It should be understood that the term "and / or" in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. A and B can be singular or plural. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship, but it may also indicate an "and / or" relationship. Please refer to the context for specific understanding.

[0086] In this application, "at least one" means one or more, and "more than one" means two or more. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can be represented by: a, b, c, ab, ac, bc, or abc, where a, b, c can be single or multiple.

[0087] It should be understood that in the various embodiments of the present application, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0088] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0089] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as USB flash drives, mobile hard disks, read-only memories (ROM), random access memories (RAM), magnetic disks or optical disks.

[0090] The above description is only a specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application.

Claims

1. A data verification method for safe refresh of an electronic controller, characterized in that: The following steps are involved: S1: Obtain target refresh data from a storage unit, wherein the target refresh data is content to be refreshed; Reading a pre-stored check code corresponding to the target refresh data from the memory, wherein the pre-stored check code is a check code generated and stored when the data is first written and refreshed; S2: Determine a verification algorithm, generate a new verification code according to the target refresh data, match the verification code of the newly generated target refresh data with the pre-stored verification code, and divide it into two states of matching and mismatching according to the matching result; S3: For the matched check codes, a comprehensive analysis is performed on the communication interference degree between the controller and the storage unit during the matching process and the fluctuation of the number of data bit flips during the data transmission process to evaluate the accuracy of the check code matching; S4: According to the accuracy of the check code matching, the accuracy of the matched check code is divided into different levels, that is, high-accuracy matching and low-accuracy matching, and the target refresh data of the low-accuracy matching is corrected, and the check code is regenerated after correction, and matching is performed again.

2. A data verification method for safe refresh of an electronic controller according to claim 1, characterized in that: In S2, the newly generated verification code of the target refresh data is matched with the pre-stored verification code, and divided into two states of matching and mismatching according to the matching result, specifically: Input the target refresh data into the selected verification algorithm for processing; After the algorithm runs, a new checksum corresponding to the target refresh data is generated; Read the pre-stored verification code corresponding to the target refresh data; The newly generated check code is compared bit by bit with the read pre-stored check code, and each bit is compared. If all bits are the same, the check codes are considered to match. After the comparison is completed, a Boolean value is obtained.

3. A data verification method for safe refresh of an electronic controller according to claim 2, characterized in that: If the newly generated verification code is completely consistent with the pre-stored verification code, it means that no error occurred in the target refresh data during the reading and transmission process. At this time, its status is marked as a matching status, indicating that the data verification is successful and the refresh operation is performed; If the newly generated check code is inconsistent with the pre-stored check code, it means that an error has occurred in the data reading and transmission process. At this time, its status is marked as a mismatch state, triggering the error handling mechanism.

4. A data verification method for safe refresh of an electronic controller according to claim 1, characterized in that: In S3, a dynamic channel fluctuation index is generated according to the communication interference degree between the controller and the storage unit during the matching process. The method for obtaining the dynamic channel fluctuation index is: During data transmission, the signal strength between the controller and the storage unit is monitored in real time, and the signal strength value S(t) at each time point is recorded; a fixed sampling frequency fs is set to capture the instantaneous fluctuation of the signal strength, and a time window T is selected for analysis. Within this window, the average signal strength is calculated. The expression is: In the formula, N is the total number of samples in the time window, S(t i ) is the signal strength at the i-th sampling time. The dynamic channel fluctuation index of the signal strength in the time window is calculated to measure the volatility of the signal strength. The expression is: Where EM is the dynamic channel fluctuation index.

5. A data verification method for safe refresh of an electronic controller according to claim 4, characterized in that: According to the fluctuation of the number of data bit flips during data transmission during the matching process, the instantaneous bit flip rate abnormality index is generated. The method for obtaining the instantaneous bit flip rate abnormality index is: During data transmission, sampling is performed at fixed time intervals Δs, and the number of bit flips V in each time interval is recorded. Δs ; For each time interval Δs, calculate the instantaneous bit flip rate, the expression is: Where IBFR(s) is the instantaneous bit flip rate; the average value in the long time window H is calculated, that is, the average bit flip rate is calculated The expression is: Where N is the total number of samples in the time window H. The outlier value of the instantaneous bit flip rate in the time window H is calculated as: Where PK is the outlier value of the instantaneous bit flip rate. The instantaneous bit flip rate anomaly index is calculated based on the calculated outlier value of the instantaneous bit flip rate. The expression is: Where IBFRAI is the instantaneous bit flip rate anomaly index.

6. A data verification method for safe refresh of an electronic controller according to claim 5, characterized in that: A comprehensive analysis is conducted on the communication interference degree between the controller and the storage unit during the matching process and the fluctuation of the number of data bit flips during data transmission to evaluate the accuracy of the check code matching, specifically: The dynamic channel fluctuation index and the instantaneous bit flip rate anomaly index are normalized, and the accuracy coefficient of the check code matching is calculated according to the normalized dynamic channel fluctuation index and the instantaneous bit flip rate anomaly index.

7. A data verification method for safe refresh of an electronic controller according to claim 6, characterized in that: In S4, according to the accuracy of the check code matching, the accuracy of the matched check code is divided into different levels, specifically: The obtained accuracy coefficient of the verification code match is compared with the preset accuracy coefficient reference threshold. If the accuracy coefficient of the verification code match is greater than or equal to the preset accuracy coefficient reference threshold, it means that the accuracy of the verification code match is high. At this time, a matching accuracy signal is generated and no processing is required; if the accuracy coefficient of the verification code match is less than the preset accuracy coefficient reference threshold, it means that the accuracy of the verification code match is low. At this time, an inaccurate matching signal is generated, and data correction and re-matching are performed on the target refresh data.

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