Multi-channel radio transceiver

By introducing the shared frequency synthesizer and control components of the processing circuit system into the radio transceiver, the resource waste and frequency conversion complexity of different channels are solved, and resource sharing and frequency conversion simplification between channels are realized.

CN119561573APending Publication Date: 2025-03-04NOKIA TECHNOLOGIES OY
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Patent Information

Application Number
CN202411197984.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-09-01
Filing Date
2024-08-29
Publication Date
2025-03-04

AI Technical Summary

Technical Problem

In existing radio transceivers, the signal paths of the first channel and the second channel usually have different components, resulting in waste of resources and complex frequency conversion management.

Method used

A device is provided, including a control component for frequency conversion between the first and second frequencies, and the sharing of frequency conversion between different channels and analog-to-digital conversion is achieved through a shared frequency synthesizer and processing circuitry.

Benefits of technology

Resource sharing between different channels is realized, frequency conversion management is simplified, and system efficiency and flexibility are improved.

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Abstract

A multi-channel radio transceiver is disclosed herein. According to one aspect, an apparatus for communication comprises: a first signal path for a first channel operating at a first frequency within a first frequency range; a second signal path for a second channel operating at a second frequency within a second frequency range; a control means for controlling a frequency conversion between the second frequency and the first frequency in the second signal path wherein the amplitude of the frequency conversion is controlled to vary depending on the difference between the second frequency and the first frequency.
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Description

Technical Field

[0001] Examples of the present disclosure relate to a multi-channel radio transceiver. Background Art

[0002] The radio transceiver typically communicates using a first channel operating at a first frequency within a first frequency range and using a second channel operating at a second frequency within a second frequency range.

[0003] In some examples, there is a first signal path for a first channel and a different second signal path for a second channel.

[0004] The various signal paths may, for example, have a plurality of components.

[0005] It is desirable to allow different signal paths to share components. Summary of the invention

[0006] According to various but not necessarily all examples, there is provided an apparatus comprising:

[0007] a first signal path for a first channel operating at a first frequency within a first frequency range;

[0008] a second signal path for a second channel operating at a second frequency within a second frequency range;

[0009] Control means for controlling a frequency conversion in the second signal path between a second frequency and a first frequency, wherein an amplitude of the frequency conversion is controlled to vary depending on a difference between the second frequency and the first frequency.

[0010] In some but not necessarily all examples, the control component is configured to: control a frequency conversion in the second signal path between a second frequency and a first frequency, wherein the amplitude of the frequency conversion is controlled to change with changes in the amplitude of the second frequency within a second frequency range and is controlled to match the difference between the second frequency and the first frequency.

[0011] In some but not necessarily all examples, the control component for controlling frequency conversion in the second signal path between the second frequency and the first frequency is configured to control an intermediate frequency in the second signal path to match the first frequency.

[0012] In some but not necessarily all examples, the apparatus includes circuitry associated with a first signal path and a second signal path and configured for a first frequency range.

[0013] In some but not necessarily all examples, the apparatus includes: a shared frequency synthesizer that provides an output frequency signal to the first signal path and the second signal path.

[0014] In some but not necessarily all examples, the shared frequency synthesizer is configured to provide frequency conversion between the first frequency and a reference frequency on the first signal path and to provide frequency conversion between the first frequency and the reference frequency on the second signal path.

[0015] In some but not necessarily all examples, the shared frequency synthesizer is a phase locked loop (PLL) synthesizer including: a local oscillator and a programmable phase locked loop for providing an output frequency signal, and a local oscillator for providing an input to the phase locked loop.

[0016] In some but not necessarily all examples, a first signal path for use with a first channel at a first frequency includes:

[0017] a first frequency converter for frequency conversion between a first frequency and a reference frequency; and

[0018] A second signal path for use with a second channel at a second frequency comprises:

[0019] a second frequency converter for frequency conversion between a second frequency and the first frequency; and

[0020] a third frequency converter for frequency conversion between the first frequency and a reference frequency;

[0021] wherein the control component for controlling the frequency conversion between the second frequency and the first frequency in the second signal path is configured to: control the second frequency converter, and

[0022] The control component is configured to commonly and simultaneously control both the first frequency converter and the third frequency converter to convert between the first frequency and the reference frequency.

[0023] In some but not necessarily all examples, the apparatus includes processing circuitry configured to apply a same analog-to-digital conversion process to the first channel and the second channel.

[0024] In some but not necessarily all examples, the first processing circuitry is controlled to apply an analog to digital conversion process to a first channel and the second processing circuitry is configured to simultaneously apply the analog to digital conversion process to a second channel, or

[0025] Wherein the first processing circuitry (ABB) is controlled to apply the analog to digital conversion process to the first channel but not the second channel during a first time, and to apply the analog to digital conversion process to the second channel but not the first channel during a second time.

[0026] In some but not necessarily all examples, the first channel is a first physical channel and the first frequency is a radio frequency of the first physical channel, and the second channel is a second physical channel and the second frequency is a radio frequency of the second physical channel.

[0027] In some but not necessarily all examples, the apparatus is configured to control frequency conversion for a second channel between a second frequency and a first frequency depending on received downlink control information defining the second frequency and / or depending on received downlink control information defining the first frequency.

[0028] In some but not necessarily all examples, the first signal path is configured for transmission of at least one of a plurality of component carriers, the plurality of component carriers being combined for higher bandwidth information transmission; and / or

[0029] The second signal path is configured for transmission of at least one component carrier of a plurality of component carriers, the plurality of component carriers being combined for higher bandwidth information transmission; and / or

[0030] The first signal path and the second signal path are configured for transmission of multiple component carriers, which are combined for higher bandwidth information transmission.

[0031] In some but not necessarily all examples, the apparatus is configured to divide the received physical channel into a plurality of parallel second channels of continuous frequency ranges.

[0032] In some but not necessarily all examples, the apparatus is configured as user equipment.

[0033] According to various but not necessarily all examples, there is provided a computer program comprising computer program instructions on a device, enabling the device to:

[0034] Frequency conversion is controlled in a first signal path for a first channel operating at a first frequency within a first frequency range and in a second signal path for a second channel operating at a second frequency within a second frequency range.

[0035] According to various but not necessarily all examples, a method is provided, comprising:

[0036] Controlling a frequency conversion in a second signal path for a second channel operating at a second radio frequency within a second frequency range, between a second radio frequency and a first radio frequency, wherein the first radio frequency is a radio frequency for operation of a different signal path for a different channel, the first frequency being within the first frequency range, wherein an amplitude of the frequency conversion is controlled to vary depending on a difference between the second frequency and the first frequency.

[0037] According to various but not necessarily all examples, there is provided an apparatus comprising:

[0038] A first signal path for a first channel operating at a first frequency within a first frequency range, comprising:

[0039] a first frequency converter for frequency conversion between a first frequency and a reference frequency;

[0040] A second signal path for a second channel operating at a second frequency within a second frequency range, comprising:

[0041] a second frequency converter for frequency conversion between a second frequency and the first frequency; and

[0042] a third frequency converter for frequency conversion between the first frequency and a reference frequency; and

[0043] The control component is configured to commonly and simultaneously control both the first frequency converter and the third frequency converter to convert between the first frequency and a reference frequency.

[0044] In some but not necessarily all examples, the control component is configured to control the second frequency converter to convert between the second frequency and the first frequency.

[0045] According to various but not necessarily all examples, examples are provided as claimed in the following claims.

[0046] Although the examples and optional features disclosed above are described separately, it should be understood that they are included in the present disclosure in all possible combinations and arrangements. It should be understood that various examples of the present disclosure may include any or all of the features described for other examples of the present disclosure, and vice versa. In addition, it should be understood that any one or more or all of the features, in any combination, can be implemented / included in / executable by devices, methods and / or computer program instructions as needed and appropriate. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] Some examples will now be described with reference to the accompanying drawings, in which:

[0048] Figure 1 An example of the subject matter described herein is shown;

[0049] Figure 2A Another example of the subject matter described herein is shown;

[0050] Figure 2B Another example of the subject matter described herein is shown;

[0051] Figure 3 Another example of the subject matter described herein is shown;

[0052] Figure 4A Another example of the subject matter described herein is shown;

[0053] Figure 4B Another example of the subject matter described herein is shown;

[0054] Figure 5 Another example of the subject matter described herein is shown;

[0055] Fig. 6A Another example of the subject matter described herein is shown;

[0056] Figure 6B Another example of the subject matter described herein is shown;

[0057] Figure 7 Another example of the subject matter described herein is shown;

[0058] Figure 8 Another example of the subject matter described herein is shown;

[0059] Fig. 9 Another example of the subject matter described herein is shown;

[0060] Fig.10 Another example of the subject matter described herein is shown;

[0061] Fig.11 Another example of the subject matter described herein is shown;

[0062] Fig.12 Another example of the subject matter described herein is shown;

[0063] Fig.13 Another example of the subject matter described herein is shown;

[0064] Fig.14 Another example of the subject matter described herein is shown;

[0065] Fig.15 Another example of the subject matter described herein is shown;

[0066] Fig.16 Another example of the subject matter described herein is shown;

[0067] Fig.17 Another example of the subject matter described herein is shown.

[0068] These figures are not necessarily drawn to scale. For clarity and brevity, certain features and views in the figures may be shown schematically or enlarged in scale. For example, the size of certain elements in the figures may be enlarged relative to other elements to help illustrate. Similar reference numerals are used in the figures to represent similar features. For clarity, all reference numerals are not necessarily shown in all figures. DETAILED DESCRIPTION

[0069] Figure 1 The following example in discloses an apparatus 10, comprising:

[0070] a first signal path 11 for a first channel 21 operating at a first frequency (F1) within a first frequency range 101;

[0071] a second signal path 12 for a second channel 22 operating at a second frequency (F2) within a second frequency range 102; and

[0072] Control means 30 for controlling 33 a frequency conversion 40 between a second frequency (F2) and a first frequency (F1) in the second signal path 12 depending on a difference ΔF 42 between the second frequency (F2) and the first frequency (F1).

[0073] In at least some examples, control component 30 is configured to control frequency conversion for second channel 22 between the second frequency (F2) and the first frequency (F1) depending on changes in the second frequency (F2) and / or changes in the first frequency (F1).

[0074] The following example discloses an apparatus 10, comprising:

[0075] a first signal path 11 for a first channel 21 operating at a first frequency (F1) within a first frequency range 101;

[0076] a second signal path 12 for a second channel 22 operating at a second frequency (F2) within a second frequency range 102;

[0077] A control component 30 for controlling 33 a frequency conversion 40 between a second frequency (F2) and a first frequency (F1) in a second signal path 12, wherein an amplitude 42 of the frequency conversion 40 is controlled to change with a change in the amplitude 31 of the second frequency (F2) within a second frequency range and is controlled to match a difference between the second frequency (F2) and the first frequency (F1).

[0078] Figure 1 Disclosed is a device 10 comprising:

[0079] a first signal path 11 for a first channel 21 operating at a first frequency (F1) within a first frequency range 101;

[0080] a second signal path 12 for a second channel 22 operating at a second frequency (F2) within a second frequency range 102; and

[0081] The controller 30 is configured to control 33 a frequency conversion 40 between the second frequency (F2) and the first frequency (F1) in the second signal path 12 depending on the difference between the second frequency (F2) and the first frequency (F1).

[0082] In at least some examples, controller 30 is configured to control frequency conversion for second channel 22 between the second frequency (F2) and the first frequency (F1) depending on changes in the second frequency (F2) and / or changes in the first frequency (F1).

[0083] In this example, the controller 30 is configured to: control 33 a frequency conversion 40 between a second frequency (F2) and a first frequency (F1) in the second signal path 12, wherein an amplitude 42 of the frequency conversion is controlled to change with a change in the amplitude 31 of the second frequency (F2) within a second frequency range and is controlled to match a difference between the second frequency (F2) and the first frequency (F1).

[0084] The controller 30 controls 33 the amplitude 42 of the frequency conversion 40 between the second frequency (F2) and the first frequency (F1) in the second signal path 12 to match the difference between the second frequency (F2) and the first frequency (F1). The difference ΔF between the second frequency (F2) and the first frequency (F1) has an amplitude |F2-F1|.

[0085] The apparatus 10 is configured to match the frequency of the frequency converted signal in the second signal path 12 to the frequency of the signal in the first signal path 11 .

[0086] It will be appreciated that the match need not be exact, but needs to be within the tolerance of the device 10. Thus, the controlled difference ΔF between the second frequency (F2) and the first frequency (F1) may have a magnitude |F2-F1| + / -Δ, where Δ is the bandwidth tolerance of the device 10, for example.

[0087] Device 10 sets the conversion frequency of one signal (second channel 22) to match the frequency of another signal (first channel 21) so that both can be processed using circuit system 50 configured for a first frequency range. For example, circuit system 50 can perform direct analog-to-digital conversion at the first frequency range. For example, circuit system 50 can perform frequency conversion to / from the first frequency, such as Figure 2A , 2B, 4A, and 4B.

[0088] In some examples, there is no frequency conversion in the first signal path 11. In other examples, for example Figure 2A , 2B , 4A, 4B, there is a frequency conversion 50 in the first signal path 11.

[0089] In the following examples, but not necessarily all examples, the second frequency (F2) is greater than the first frequency (F1).

[0090] In some examples, such as Figure 2A , 2B , 4A, 4B, the first frequency (F1) of the first channel 21 matches the intermediate frequency (IF) of the second channel 22. In the case where the first frequency (F1) and the intermediate frequency match, there is a frequency conversion 50 in the first signal path 11. The device 10 sets the conversion frequency of one signal (the intermediate frequency of the second channel 22) to match the frequency of the other signal (the first channel 21), so that the two channels can be processed using a common frequency conversion circuit system 50. Some examples, Figure 4A , 4B , shows the conversion of a first frequency (F1) (intermediate frequency) to a reference frequency (Fref), such as a baseband frequency for further baseband processing 90. The reference frequency (Fref) may be, for example, DC (direct current).

[0091] In some examples, such as Figure 2A and Figure 4A , the first channel 21 and the second channel 22 are transmission channels at the device 10, such as uplink (UL) channels in a cellular telecommunication network.

[0092] In some examples, such as Figure 2B and Figure 4B , the first channel 21 and the second channel 22 are reception channels at the device 10, such as downlink (DL) channels in a cellular telecommunication network.

[0093] Figure 3 An example is shown in which a frequency converter 74_2 is used for frequency conversion 40 between a second frequency (F2) and a first frequency (F1) in the second signal path 12, depending on the difference between the second frequency (F2) and the first frequency (F1).

[0094] Figure 4A Shown as Figure 2AThe example shown. The first channel 21 and the second channel 22 are transmission channels at the device 10, such as uplink channels in a cellular telecommunication network. The frequency conversion in the first channel 21 is upconversion from a reference frequency (Fref) to a first frequency (F1). The frequency conversion in the second channel 22 is upconversion from a reference frequency (Fref) to a first frequency (F1) (intermediate frequency) and then upconversion from the first frequency (F1) to a second frequency (F2).

[0095] Figure 4B It shows that Figure 2B The example shown. The first channel 21 and the second channel 22 are reception channels at the device 10, such as downlink channels in a cellular telecommunication network. The frequency conversion in the first channel 21 is down-conversion from a first frequency (F1) to a reference frequency (Fref). The frequency conversion in the second channel 22 is down-conversion from the second frequency (F2) to the first frequency (F1) (intermediate frequency) and then down-conversion from the first frequency (F1) to the reference frequency (Fref).

[0096] refer to Figure 4A and 4B In both, the device 10 sets the conversion frequency of one signal (the second channel 22) to match the radio frequency of the other signal (the first channel 21) so that both can be processed using the circuit system 50 configured for the first frequency range. The circuit system 50 performs frequency conversion between the first frequency and the reference frequency (Fref) for both the first signal path 11 and the second signal path 12. The second frequency (F2) is greater than the first frequency (F1).

[0097] exist Figure 4A and 4B In the embodiment, the frequency converter 74_1 is used for frequency conversion between a reference frequency (Fref) and a first frequency (F1) in the first signal path 11, and the associated frequency converter 74_3 is used for frequency conversion between the reference frequency (Fref) and the first frequency (F1) in the second signal path 12, the first frequency (F1) being an intermediate frequency of the second signal path 12. The conversion is controlled depending on the change of the difference between the reference frequency (F2) and the first frequency (F1).

[0098] The frequency converter 74_2 is used for frequency conversion 40 between the second frequency (F2) and the first frequency (F1) (intermediate frequency) in the second signal path 12. The conversion is controlled depending on the change of the difference between the second frequency (F2) and the first frequency (F1).

[0099] It will therefore be understood that

[0100] A first signal path 11 for use with a first channel 21 at a first frequency (F1) comprises:

[0101] a first frequency converter 74_1 for frequency conversion between a first frequency (F1) and a reference frequency Fref, and

[0102] A second signal path 12 for use with a second channel 22 at a second frequency (F2) comprises:

[0103] A second frequency converter 74_2 for frequency conversion between a second frequency (F2) and a first frequency (F1); and

[0104] The third frequency converter 74_3 is used for frequency conversion between the first frequency (F1) and the reference frequency Fref.

[0105] The controller 30 is configured to control the second frequency converter 74_2 to perform frequency conversion between the second frequency and the first frequency in the second signal path 12, and is configured to control both the first frequency converter 74_1 and the third frequency converter 74_3 in common and simultaneously (e.g., using the control signal 65) to convert between the first frequency (F1) and the reference frequency Fref. The controller 30 is configured to change the frequency conversion in the second signal path 12 between the second frequency and the first frequency.

[0106] The controller 30 is configured to commonly and simultaneously change a common frequency conversion between the second frequency and the first frequency in the signal paths 11 , 12 .

[0107] When it is necessary to change the first frequency (F1) and / or the second frequency (F2), the controller 30 responds by controlling 33:

[0108] the amplitude of the frequency conversion 40 between the reference frequency (Fref) and the first frequency (F1) in the first signal path 11 and the second signal path 12 to match the difference between the fixed reference frequency (Fref) and the variable first frequency (F1), i.e. the difference between the reference frequency (Fref) and the first frequency (F1) has an amplitude |F1-Fref|;

[0109] The amplitude of the frequency conversion 42 between the second frequency (F2) and the first frequency (F1) in the second signal path 12 is to match the difference between the variable second frequency (F2) and the first frequency (F1), that is, the difference ΔF between the second frequency (F2) and the first frequency (F1) has an amplitude |F2-F1|.

[0110] It will be appreciated that the second channel 22 has at least one additional frequency conversion step compared to the first channel 21 .

[0111] It will therefore be appreciated that, in at least some examples, the apparatus 10 includes:

[0112] a first signal path 11 of a first channel 21 for operating at a first frequency (F1) within a first frequency range, comprising a first frequency converter 74_1 for frequency conversion between the first frequency (F1) and a reference frequency Fref;

[0113] a second signal path 12 for a second channel 22 operating at a second frequency (F2) within a second frequency range, comprising a second frequency converter 74_2 for frequency conversion between the second frequency (F2) and the first frequency (F1); and

[0114] a third frequency converter 74_3 for frequency conversion between the first frequency (F1) and the reference frequency Fref; and

[0115] The control part 30 is configured to commonly and simultaneously control both the first frequency converter 74_1 and the third frequency converter 74_3 to convert between the first frequency ( F1 ) and the reference frequency Fref when the first frequency ( F1 ) changes.

[0116] The control component 30 may also be configured to control the second frequency converter 74_2 to switch between the second frequency (F2) and the first frequency (F1) when the first frequency (F1) changes and / or when the second frequency (F2) changes.

[0117] The frequency converter 74_1 and the frequency converter 74_2 that perform the same frequency conversion on different channels 21, 22 share a frequency synthesizer 60 that provides an output frequency signal 61 to the frequency converter 74_1 of the first signal path 11 and to the frequency converter 74_3 of the second signal path 12. The frequency converter 74_1 performs a frequency conversion between a first frequency (F1) and a reference frequency Fref on the first signal path 11. The frequency converter 74_3 performs a frequency conversion between a first frequency (F1) and a reference frequency Fref on the second signal path 12.

[0118] The frequency synthesizer 60 is configured to operate within a first frequency range.

[0119] exist Figure 4A and 4B In the example shown, the frequency converter comprises a mixer 70. An input signal of a frequency converter 74 for frequency conversion is provided as an input to the mixer 70. The mixers 70_1, 70_3 receive an input signal from the frequency synthesizer 60.

[0120] The frequency converter 74_1 for the first channel 21 and the frequency converter 74_3 for the second channel 22 share the frequency synthesizer 60. The output of the shared frequency synthesizer 60 is provided to the mixer 70_1 for the first channel 21 and the mixer 70_3 for the second channel 22. The same components may be used for the mixers 70_1, 70_3.

[0121] The paths 21, 22 may include other components not shown, such as linear amplifiers (for reception) and power amplifiers (for transmission), switches for band selection and filters for out-of-band attenuation.

[0122] The second frequency converter 74_2 may be close to the antenna 80 .

[0123] Figure 5 An example of a frequency synthesizer 60 shared between channels 21, 22 is shown. The shared frequency synthesizer 60 is a phase locked loop (PLL) comprising a programmable phase locked loop (PLL) 64 for providing an output frequency signal 61 and a local oscillator 62 for providing an input 63 to the phase locked loop.

[0124] PLL 64 is programmed by control signal 65. Figure 4A and 4B In the example shown, but not necessarily in all examples, the control signal 65 is provided by the controller 30 to control the value of the first frequency ( F1 ).

[0125] Fig. 6A and 6B An example of processing circuitry 90 is shown, in this example, analog baseband (ABB) processing circuitry 92. In these examples, ABB processing circuitry 92 includes amplifiers, channel filters with bandwidth configurability, gain control, and analog-to-digital conversion circuitry. The analog-to-digital conversion circuitry for transmission may be digital-to-analog conversion circuitry. The analog-to-digital conversion circuitry for reception may be analog-to-digital conversion circuitry.

[0126] Fig. 6A An example is shown in which different analog baseband (ABB) circuit systems 92_1, 92_2 are used for the first channel 21 and the second channel 22. Different analog baseband (ABB) circuit systems 92_1, 92_2 can be used for the first channel 21 and the second channel 22 at the same time. The first ABB circuit system 92_1 is controlled to apply an analog-to-digital conversion (ADC) process to the first channel 21, while the second ABB circuit system 92_2 is configured to simultaneously apply the analog-to-digital conversion process to the second channel 22. The first channel 21 and the second channel 22 do not share a processing circuit system (ADC).

[0127] Figure 6BAn example is shown in which the analog baseband (ABB) circuit system 92_1 is shared between the first channel 21 and the second channel 22. The analog baseband (ABB) circuit system 92_1 can be used for the first channel 21 or the second channel 22, but cannot be used for both the first channel 21 and the second channel 22. The first ABB circuit system 92_1 is controlled to apply an analog-to-digital conversion (ADC) process to the first channel 21 instead of the second channel 22 during a first time, and to apply the same analog-to-digital conversion process to the second channel 22 instead of the first channel 21 during a second time. The first channel 21 and the second channel 22 share the processing circuit system (ADC).

[0128] exist Fig. 6A and 6B In the embodiment, the processing circuit system 90 is configured to apply the same analog-to-digital conversion process to the first channel 21 and the second channel 22, that is, the same analog-to-digital conversion method is used for both paths, but not necessarily at the same time. For example, the analog-to-digital conversion can have the same bandwidth limit for both channels, constrained by the processing circuit system 90.

[0129] Figure 7 An example of a portion of the electromagnetic spectrum (radio frequencies) is shown. It shows an example of a first frequency range 101 where a first frequency (F1) is located. It shows an example of a second frequency range 102 where a second frequency (F2) is located.

[0130] In at least some examples, the first channel 21 is a first physical channel and the first frequency (F1) is a radio frequency of the first physical channel, and the second channel 22 is a second physical channel and the second frequency (F2) is a radio frequency of the second physical channel. The intermediate frequency of the second channel 22 can be controlled to be the first frequency (F1).

[0131] As previously described, in some examples, the first frequency may vary within a first frequency range 101 , and the second frequency ( F2 ) may vary within a second frequency range 102 .

[0132] In the example shown, the first frequency range 101 and the second frequency range 102 are exclusive and non-overlapping, and the second frequency range has a higher frequency than the first frequency range.

[0133] In some examples, the first frequency range 101 is between 8 and 20 GHz, such as between 10.7 GHz–15.35 GHz, and the second frequency range is greater than 24 GHz, such as frequency region two (FR2) of 5G 3GPP (New Radio).

[0134] In the example shown, the first frequency range 101 includes exclusive, non-overlapping frequency bands 111_1 , 111_2 , and the second frequency range 102 includes exclusive, non-overlapping frequency bands 112_1 , 112_2 .

[0135] The first frequency ( F1 ) is located within a first frequency band 111 , and the second frequency ( F2 ) is located within a second frequency band 122 .

[0136] In some examples, a first frequency (F1) band 111_i including a first frequency (F1) and a second frequency (F2) band 112_j including a second frequency (F2) have the same bandwidth.

[0137] Carrier aggregation (CA) combines data transmitted by different component carriers. The component carriers are at different frequencies. The combined component carriers can be in the same frequency band or in different frequency bands.

[0138] Dual Connectivity (DC) also combines data transmitted by different component carriers. The component carriers are at different frequencies. The combined component carriers can be in the same frequency band or in different frequency bands.

[0139] Component carrier combination (CA or DC) may, for example, combine data transmitted by different component carriers within the first frequency range 101. The combined component carriers may be located in the same frequency band 111_i or in different frequency bands 111_i, 111_j.

[0140] Component carrier combination (CA or DC) may, for example, combine data transmitted by different component carriers within the second frequency range 102. The combined component carriers may be located in the same frequency band 112_i or in different frequency bands 112_i, 112_j.

[0141] In at least some examples, the first signal path 11 is configured for transmission of at least one component carrier of a plurality of component carriers combined for higher bandwidth information transmission (component carrier combination within the first frequency range 101); and / or the second signal path 12 is configured for transmission of at least one component carrier of a plurality of component carriers combined for higher bandwidth information transmission (component carrier combination within the second frequency range 102); and / or

[0142] The first signal path 11 and the second signal path 12 are configured for transmission of multiple component carriers combined for higher bandwidth information transmission (combination of component carriers across the first frequency range 101 and the second frequency range 102).

[0143] Figure 8 An example of a cellular telecommunications network 200 is shown.

[0144] In this example, the apparatus 10 is a user equipment (UE) 204 and the network node 202 is a transmission reception point (TRP) of the network.

[0145] In this example, the network sends one or more downlink control signals 201 to a UE 204 via a network node 202, which defines a telecommunications first frequency (F1) and / or a second frequency (F2). The downlink control signal 201 may be, for example, downlink control information (DCI).

[0146] The apparatus 10 is configured to control a frequency conversion for the second channel 22 between the second frequency (F2) and the first frequency (F1) depending on received downlink control information defining the second frequency (F2) and / or depending on received downlink control information defining the first frequency (F1).

[0147] In some examples, the apparatus 10 is configured to control frequency conversion for the first channel 21 (and the second channel 22) between a reference frequency (F1) and the first frequency (F1) depending on received downlink control information defining the first frequency (F1).

[0148] Thus, in some examples, the device 10 is configured to: determine a change of the first frequency (F1) depending on received downlink control information defining the first frequency (F1), and thereby control a frequency conversion for the second channel 22 between the second frequency (F2) and the first frequency (F1) depending on the determined change, and is configured to: control a frequency conversion for the first channel 21 and the second channel 22 between a reference frequency (F1) and the first frequency (F1) depending on the determined change of the first frequency (F1).

[0149] Thus, in some examples, the device 10 is configured to: determine a change of the second frequency (F2) depending on received downlink control information defining the second frequency (F2), and thereby control a frequency conversion for the second channel 22 between the second frequency (F2) and the first frequency (F1) depending on the determined change.

[0150] The apparatus 10 may use any intermediate frequency in the down-conversion of the second channel 22 at its discretion.

[0151] Fig. 9 An example is shown where the first channel 21 (and the first frequency ( F1 ) and the first frequency range 101 ) are associated with a first radio access technology and the second channel 22 (and the second frequency ( F2 ) and the second frequency range 102 ) are associated with a second radio access technology.

[0152] The first frequency range 101 may be, for example, a frequency range defined for 6G (to be determined). The second frequency range 102 may be, for example, a frequency range defined for 5G (currently defined as FR2).

[0153] Frequency band 112 may include, for example, FR2 bands n257 to n262. These bands have bandwidths of 50, 100, 200, 400 MHz. Band n257 is 26.5-29.5 GHz, band n258 is 24.25-27.5 GHz, band n261 is 27.5-28.35 GHz. Band n259 is 39.5-43.5 GHz, band n260 is 37-40 GHz, and band n262 is 47.2-48.20 GHz.

[0154] The frequency band 111 may be, for example, 10.7 GHz to 12.7 GHz and 14.3 GHz to 15.35 GHz.

[0155] Fig.10 An example of an apparatus 10 is shown in which a received physical channel is divided 300 into a plurality of parallel second channels 22 of consecutive frequency ranges.

[0156] The received physical channel 112_1 is divided 300_1 into a plurality of parallel second channels of continuous frequency ranges.

[0157] The received physical channel 112_2 is divided 300_2 into a plurality of parallel second channels of continuous frequency ranges.

[0158] This shows how physical channel bandwidth or carrier aggregation can be supported when the combined downlink bandwidth exceeds the bandwidth of ABB 92.

[0159] The received physical channel 112_1 may be, for example, one of n257 (26.5-29.5 GHz), n258 (24.25-27.5 GHz), or n261 (27.5-28.35 GHz).

[0160] The received physical channel 112_2 may be, for example, one of n259 (39.5-43.5 GHz), n260 (37-40 GHz), n262 (47.2-48.20 GHz).

[0161] The received physical channel 111_1 may be, for example, 10.7 GHz-12.7 GHz.

[0162] The received physical channel 111_2 may be, for example, 14.3 GHz-15.35 GHz.

[0163] The received physical channel 111_1 defines F1, for example, 11.7 GHz.

[0164] The following example keeps the number of PLLs and down-conversion receiver chains in the UE transceiver design to a minimum while supporting the highest combination of multiple channels, such as those defined in 3GPP as carrier aggregation (CA) and dual connectivity (DC) combinations. This is achieved by matching the frequency band of FR1 (including frequencies of 7 GHz-20 GHz or 6 GHz-24 GHz) with the IF frequency for the frequency region two (FR2) intermediate frequency. The FR2 intermediate frequency is at millimeter wavelengths (mmWave).

[0165] refer to Fig. 9 , there is an example architecture of UE 204. RF transceiver 310 is connected to a sub-10 GHz RF front end (RFFE), a 6G RF front end (RFFE), and a mmWave module supporting frequency region two (FR2).

[0166] The IF used for mmWave up / down conversion matches the radio frequency of the 6G RFFE, which is expected to be in the 10.7 GHz-15.35 GHz range. This provides an advantage in design when the network configures the UE 204 with active channels in multiple operating bands.

[0167] The radio frequency (F1) of the 6G RFFE system matches and defines the IF frequency of the mmWave system, so that simultaneous operation of two different spectrum regions can be supported simultaneously without the need for two separate PLL systems within the transceiver 310.

[0168] This is achieved by programming the mmWave module PLL with the radio frequency (F2) of mmWave channel 22 minus the radio frequency (F1) of 6G RFFE channel 21, so that the frequency down-conversion result of the radio frequency (F2) of mmWave channel 22 is the radio frequency (F1) of 6G RFFE channel 21. In one use case, dual connectivity or carrier aggregation (or even measurement reporting) requires transceiver activity on more than one frequency band simultaneously. The 6G RFFE operates at an RF frequency of 10.92 GHz (F1), while the mmWave module operates at an RF frequency of 27.5 GHz (F2). The transmitter PLL within the frequency synthesizer 60 of the UE transceiver is set to 10.92 GHz for direct up / down conversion of the 6G RFFE signal. The same frequency is used for up / down conversion of the signal from the mmWave module at the transceiver Trx PLL. The frequency converter 74_2 must be set to 27.5 GHz - 10.92 GHz = 16.58 GHz (ΔF). ΔF=F2-F1.

[0169] This approach allows the transceiver 310 to support CA / DC and measurement reporting in the 6G RFFE frequency range while operating in mmWave, with the same PLL inside the transceiver 310, thereby reducing the number of PLL systems required in the UE transceiver chip. This saves cost, implementation effort, chip area, and current.

[0170] In the UE, if the RF system has limited downlink (DL) bandwidth from multiple receiver chains, hardware can be reused on the 6G RFFE band and mmWave module receive chains 11, 12. In a DL limited RF system, the total bandwidth can be defined from any combination of DC / CA inter-band and intra-band combinations. This example can be taken from 3GPP's CA notation, which includes letters that define bandwidth classes:

[0171] Total DL BW=n257R=CA_n257E-n259B=DC_“6G Band”A_n257F

[0172] The bandwidth class letter after the 3GPP band name indicates the number of component carriers, and the total downlink bandwidth is the same for the three combinations mentioned above, as defined by the restricted and limited available receiver chains of the transceiver 310 .

[0173] In mmWave modules, the frequency synthesizer must be tuned from 24.25 GHz to 29.5 GHz, which means that the lowest frequency electrical tuning used in FR2-1 covers a range of 5.25 GHz. The 5.25 GHz tuning range is sufficient to also cover the necessary tuning range (4.65 GHz) for the 6G band in the 10.7 GHz-15.35 GHz range.

[0174] The tuning range of the millimeter wave modules covers the same range as the new 6G frequency bands.

[0175] Fig.10 A subsystem of a UE transceiver is shown, with 4 DL nodes connecting 4 different frequency bands 112_1, 112_2, 111_1, 111_2 to the RF transceiver 310. As 6G bands have not yet been agreed upon, an exact frequency or band enumeration cannot be provided, but two different ranges [10.7 GHz - 12.7 GHz] and [14.3 GHz - 15.35 GHz] are used as example bands.

[0176] There is an LNA (Low Noise Amplifier) ​​system behind the FR2 node that splits the 300 into multiple receiver chains. Each individual receiver chain in FR2 is mapped to, for example, a 200MHz ABB 92_2. In this example, the combined supported bandwidth would be 1000MHz from these 5 ABB92_2s. This can support 10 component carriers (CCs) of 100MHz bandwidth, each of which passes through the ABB 92_2 in a 2×2 CC manner.

[0177] The maximum 1000 MHz downlink bandwidth may be based on the processing speed and data transfer rate between the RF transceiver 310 and the following digital processor system 90 which sets the maximum combined data bandwidth for the UE design.

[0178] Combining FR2 bands n259, n260 and n262 [37-48.2 GHz] with FR2 bands n257, n258 and n261 [24.24-29.5 GHz], the combined usage of inter-band and intra-band component carriers is always limited to the combined ABB bandwidth regardless of how the component carriers of carrier aggregation are combined.

[0179] Adding new 6G bands 111_1, 111_2 with dedicated ABB paths and expected channel bandwidth matching FR2 channel bandwidth increases the combined downlink bandwidth. In this case, the full bandwidth can be 7 times 200MHz = 1400MHz, but can be extended to any new ABB bandwidth supported by future designs.

[0180] One of the PLLs (60) is connected to the FR2 mixer and the 6G band mixer. This means that the RF frequency (F1) of the 6G band within [10.7 GHz-12.7 GHz] dictates how a maximum of 5 PLLs need to be configured.

[0181] Fig.11 FIG. 1 shows a portion of a transceiver, showing how to support 2CC inter-band CA using one PLL (PLL1), which in the example is configured for 10.92 GHz, the same as the 6G band channel allocation. This means that the mmWave PLL ( Fig.11 This allows a 400 MHz combined downlink bandwidth, which does not fully load the design, but the design reduces the number of PLLs required because PLL1 is shared and runs for simultaneous downlinks for both bands.

[0182] Fig.12Shows how the additional CC in the n257 is supported by switching another RX chain supported by PLL2. PLL2 must be set to a frequency separate from the PLL1+CC in the n257 to track the 6G band RF channel frequency but allow for correct down conversion. The combination of FR2 and 6G band CCs will ultimately result in 1200MHz downlink bandwidth through 6 configured CCs using only 5 PLLs.

[0183] Therefore, whenever a design is configured for CA / DC for these bands that may share IF and RF frequencies, it will take advantage of sharing of the PLLs rather than requiring two separate PLLs for each RX chain.

[0184] Fig.13 An alternative embodiment is shown, where the total ABB bandwidth of the system is limited and the ABB 92_1 can be shared, not just the PLL.

[0185] Assuming the total downlink bandwidth of ABB is 5x 200MHz = 1000MHz, then Fig.13 The system shows that the frequency range of two of the PLLs matches the IF and RF frequencies, which means that they can be connected to FR2 and 6G band receive chains. One of the receive chains is shown in bold. The bold receive chain can serve the 6G band, carrying CCs in the 10.7GHz-12.7GHz-band and using one ABB for channel bandwidths up to 200MHz. This can be aggregated with up to 4 200MHz CCs of FR2 to form a combined 1000MHz downlink bandwidth (maximum value for DL ​​in this example). In addition, 2x 6G inter-band CA can be configured with inter-band or intra-band CA of FR2 at one or both nodes.

[0186] Fig.14 The second embodiment ( Fig.13 ). In embodiment 2, the sharing of PLLs means that the HW (hardware) and operating frequency ranges between the receiver chains are matched, but they will never operate at the same time as in embodiment 1. The 6G band is connected to the FR2 receive chain before the mixer instead of after. When they are connected before the mixer, the mixer is reused (less hardware) and also saves routing for separate PLLs (less routing and fewer PLLs). Finally, it allows the same PLL 60 to work for both the 6G band and the FR2 band.

[0187] A DC configuration that matches this assignment could be:

[0188] DC_"6G band1"A-"6G band2"A_n257B-n259A

[0189] Combinations of the concepts of Embodiment 1 and Embodiment 2 are not excluded.

[0190] A projection onto the transmission path shared to the UE is not excluded, since the uplink frequency can also be similarly configured with respect to the PLL.

[0191] Fig.15 A method 500 is shown, comprising: controlling a frequency conversion between a second radio frequency operating at a second radio frequency within a second frequency range 102 in a second signal path 12 for a second channel 22 and a first radio frequency, wherein the first radio frequency is a radio frequency operating at a different first signal path 11 for a different first channel 21, the first frequency being within the first frequency range 101, wherein an amplitude of the frequency conversion is controlled to vary depending on a difference between the second frequency and the first frequency.

[0192] At block 502, the apparatus 10 receives downlink control information defining a second frequency and / or a first frequency.

[0193] At block 504, the apparatus 10 coordinates a frequency conversion between the second frequency and the first frequency. It controls the frequency conversion between the second frequency and the first frequency for the second channel 22 depending on the received downlink control information defining the second frequency and / or depending on the received downlink control information defining the first frequency.

[0194] At block 506, the apparatus 10 coordinates frequency conversion between the reference frequency and the first frequency, depending on the downlink control information defining the received first frequency, while controlling frequency conversion between the reference frequency and the first frequency for the first channel 21 and the second channel 22.

[0195] Fig.16 An example of a controller 400 suitable for use in the apparatus 10 is shown. An implementation of the controller 400 may be a controller circuit system. The controller 400 may be implemented solely in hardware, with certain aspects in software (including firmware), or may be a combination of hardware and software (including firmware).

[0196] like Fig.16 As shown in , the controller 400 can be implemented using instructions that enable hardware functions, for example, by using executable instructions of a computer program 406 in a general or special purpose processor 402, which executable instructions can be stored on a computer-readable storage medium (disk, memory, etc.) for execution by such a processor 402.

[0197] The processor 402 is configured to read from and write to the memory 404. The processor 402 may also include an output interface via which data and / or commands are output by the processor 402, and an input interface via which data and / or commands are input to the processor 402.

[0198] The memory 404 stores a computer program 406, which includes computer program instructions (computer program code) that control the operation of the device 10 when loaded into the processor 402. The computer program instructions of the computer program 406 provide the logic and routines that enable the device to perform the methods shown in the drawings. The processor 402 can load and execute the computer program 406 by reading the memory 404.

[0199] The device 10 comprises:

[0200] at least one processor 402; and

[0201] at least one memory 404 including computer program code,

[0202] The at least one memory stores instructions that, when executed by the at least one processor 402, cause the apparatus to at least:

[0203] Frequency conversion of a first channel 21 in the first signal path 11 for operating at a first frequency (F1) within a first frequency range and a second channel 22 in the second signal path 12 for operating at a second frequency (F2) within a second frequency range is controlled.

[0204] like Fig.17 As shown in , the computer program 406 may arrive at the apparatus 10 via any suitable delivery mechanism 408. The delivery mechanism 408 may be, for example, a machine-readable medium, a computer-readable medium, a non-transitory computer-readable storage medium, a computer program product, a memory device, a recording medium (such as a compact disk read-only memory (CD-ROM) or a digital versatile disk (DVD) or a solid-state memory), an article of manufacture that includes or tangibly embodies the computer program 406. The delivery mechanism may be a signal configured to reliably transmit the computer program 406. The apparatus 10 may propagate or send the computer program 406 as a computer data signal.

[0205] Computer program instructions for causing an apparatus to perform at least the following items or for performing at least the following items:

[0206] Frequency conversion of a first channel 21 in the first signal path 11 for operating at a first frequency (F1) within a first frequency range and a second channel 22 in the second signal path 12 for operating at a second frequency (F2) within a second frequency range is controlled.

[0207] The computer program instructions may be included in a computer program, a non-transitory computer readable medium, a computer program product, a machine readable medium. In some but not necessarily all examples, the computer program instructions may be distributed over more than one computer program.

[0208] Although memory 404 is shown as a single component / circuitry, it may be implemented as one or more separate components / circuitry, some or all of which may be integrated / removable and / or may provide permanent / semi-permanent / dynamic / cache storage.

[0209] Although processor 402 is shown as a single component / circuitry, it may be implemented as one or more separate components / circuitry, some or all of which may be integrated / removable.Processor 402 may be a single-core or multi-core processor.

[0210] References to "computer-readable storage medium," "computer program product," "tangibly embodied computer program," etc., or "controller," "computer," "processor," etc., should be understood to cover not only computers having different architectures (such as single / multi-processor architectures and sequential (von Neumann) / parallel architectures), but also special-purpose circuits (such as field-programmable gate arrays (FPGAs), application-specific circuits (ASICs), signal processing devices, and other processing circuit systems). References to computer programs, instructions, code, etc. should be understood to cover software for programmable processors or firmware, such as, for example, the programmable content of a hardware device, whether instructions for a processor, or configuration settings for a fixed-function device, gate array, or programmable logic device, etc.

[0211] As used in this application, the term "circuitry" may refer to one, more, or all of the following:

[0212] (a) a hardware circuitry-only implementation (e.g., an implementation using only analog and / or digital circuitry) and

[0213] (b) a combination of hardware circuitry and software such as (where applicable):

[0214] (i) a combination of analog and / or digital hardware circuits and software / firmware and

[0215] (ii) any portion of hardware processor(s) (including digital signal processor(s)), software and memory(s) with software that work together to enable a device (such as a mobile phone or server) to perform various functions and (c) hardware circuit(s) and / or processor(s), such as microprocessor(s) or portion(s) of microprocessor(s) that require software (e.g. firmware) to operate, but where the software is not required for operation, the software may not be present.

[0216] This definition of circuitry applies to all uses of this term in this application, including in any claims. As a further example, as used in this application, the term circuitry also covers an implementation of only hardware circuits or processors and their (or their) accompanying software and / or firmware. The term circuitry also covers, for example, a baseband integrated circuit for a mobile device or a similar integrated circuit in a server, cellular network device, or other computing or network device, if applicable to the particular claim element.

[0217] The blocks shown in the accompanying drawings may represent steps in the method and / or code portions in the computer program 406. The description of a particular order of blocks does not necessarily mean that the blocks have a required or preferred order, and the order and arrangement of the blocks may vary. In addition, some blocks may be omitted.

[0218] As used herein, "module" refers to a unit or device that does not include certain parts / components added by the final manufacturer or user. The device 10 may be a module.

[0219] The above example can be used as the following supporting component discovery application:

[0220] Automotive systems; telecommunications systems; electronic systems, including consumer electronics; distributed computing systems; media systems for generating or presenting media content, including audio, visual and audiovisual content and mixed, mediated, virtual and / or augmented reality; personal systems, including personal health systems or personal fitness systems; navigation systems; user interfaces, also known as human-machine interfaces; networks, including cellular, non-cellular and fiber-optic networks; ad hoc networks; the Internet; the Internet of Things; virtualized networks; and related software and services.

[0221] According to the examples of the present disclosure, the device can be provided in an electronic device, such as a mobile terminal. However, it should be understood that the mobile terminal is only an example of an electronic device that will benefit from the examples of the implementation of the present disclosure, and therefore should not be considered to limit the scope of the present disclosure to this. Although in some implementation examples, the device can be provided in a mobile terminal, other types of electronic devices, such as but not limited to: mobile communication devices, handheld portable electronic devices, wearable computing devices, portable digital assistants (PDAs), pagers, mobile computers, desktop computers, televisions, gaming devices, laptops, cameras, video recorders, GPS devices, and other types of electronic systems, can easily adopt the examples of the present disclosure. In addition, the device can easily adopt the examples of the present disclosure, regardless of whether it is intended to provide mobility.

[0222] The term "comprising" is used in this document in an inclusive rather than exclusive sense. That is, any reference to X including Y means that X may include only one Y or may include more than one Y. If "comprising" is intended to be used in an exclusive sense, it will be made clear in the context by referring to "including only one..." or using "consisting of".

[0223] In this specification, the terms "connected", "coupled" and "in communication" and their derivatives refer to being operationally connected / coupled / in communication. It should be understood that any number or combination of intermediate components (including no intermediate components) may be present, i.e., to provide direct or indirect connection / coupling / in communication. Any such intermediate components may include hardware and / or software components.

[0224] As used herein, the term "determine / determining" (and grammatical variations thereof) may specifically include: calculating, computing, processing, deriving, measuring, investigating, identifying, searching (e.g., searching in a table, database or other data structure), ascertaining, etc. In addition, "determining" may include receiving (e.g., receiving information), accessing (e.g., accessing data in a memory), obtaining, etc. In addition, "determine / determining" may include resolving, selecting, choosing, establishing, etc.

[0225] In this specification, reference has been made to various examples. The description of features or functions associated with an example indicates that these features or functions are present in the example. The use of the term "example" or "for example" or "may" or "might" herein indicates that, whether explicitly stated or not, such features or functions are at least present in the example, whether described as an example or not, and they may but not necessarily be present in some or all other examples. Therefore, "example", "for example", "may" or "might" refers to a specific instance in an example class. The attributes of an instance may be attributes of only the instance, or attributes of the class, or attributes of a subclass of the class, which includes some but not all instances in the class. Therefore, features described with reference to one example rather than with reference to another example are implicitly disclosed, and may be used in the other example as part of a working combination where possible, but may not necessarily be used in the other example.

[0226] Although the preceding paragraphs have described the examples with reference to various examples, it should be appreciated that modifications to the examples given can be made without departing from the scope of the claims.

[0227] Features described in the preceding description may be used in combinations other than those explicitly described above.

[0228] Although functions have been described with reference to certain features, those functions may be performable by other features whether described or not.

[0229] Although features have been described with reference to certain examples, those features may also be present in other examples whether described or not.

[0230] The terms "a", "an" or "the" are used in this document in an inclusive, rather than exclusive, sense. That is, any reference to X that includes a / an / the Y indicates that X may include only one Y or more than one Y, unless the context clearly indicates otherwise. If "a", "an" or "the" is intended to be used in an exclusive sense, this will be clearly indicated in the context. In some cases, "at least one" or "one or more" may be used to emphasize the inclusive sense, but the absence of these terms should not be considered to infer any exclusive sense.

[0231] The presence of a feature (or combination of features) in a claim is a reference to the feature or (combination of features) itself, and also a reference to features (equivalent features) that achieve substantially the same technical effect. Equivalent features include, for example, features that are variants and achieve substantially the same result in substantially the same way. Equivalent features include, for example, features that perform substantially the same function in substantially the same way to achieve substantially the same result.

[0232] In this specification, various examples have been cited that use adjectives or adjective phrases to describe characteristics of examples. Such descriptions of characteristics associated with examples indicate that the characteristics exist in some examples exactly as described, and in other examples substantially as described.

[0233] The above description describes some examples of the present disclosure, but those of ordinary skill in the art will be aware of possible alternative structures and method features that provide equivalent functions to the specific examples of the above structures and features, and have been omitted from the above description for the sake of brevity and clarity. Nevertheless, the above description should be understood to implicitly include references to such alternative structures and method features that provide equivalent functions, unless such alternative structures or method features are explicitly excluded in the above description of examples of the present disclosure.

[0234] While an effort has been made in the foregoing description to draw attention to those features regarded as important, it should be understood that the applicant may seek protection by way of the claims for any patentable feature or combination of features mentioned above and / or shown in the drawings, whether or not emphasis has been placed thereon.

Claims

1. A device for communication, comprising: a first signal path for a first channel operating at a first frequency within a first frequency range; a second signal path for a second channel operating at a second frequency within a second frequency range; Control means for controlling a frequency conversion between the second frequency and the first frequency in the second signal path, wherein the amplitude of the frequency conversion is controlled to vary depending on a difference between the second frequency and the first frequency.

2. The apparatus of claim 1 , wherein the control component is configured to control a frequency conversion between the second frequency and the first frequency in the second signal path, wherein an amplitude of the frequency conversion is controlled to change with a change in an amplitude of the second frequency within the second frequency range and is controlled to match a difference between the second frequency and the first frequency.

3. The apparatus according to claim 1 or 2, wherein the control component for controlling frequency conversion between the second frequency and the first frequency in the second signal path is configured to: control an intermediate frequency in the second signal path to match the first frequency.

4. The device according to claim 1 or 2, comprising: Circuitry is associated with the first signal path and the second signal path and configured for the first frequency range.

5. An apparatus according to any preceding claim, comprising: A shared frequency synthesizer provides an output frequency signal to the first signal path and the second signal path.

6. The apparatus of claim 5, wherein the shared frequency synthesizer is configured to provide frequency conversion between a first frequency and a reference frequency on the first signal path, and to provide frequency conversion between the first frequency and the reference frequency on the second signal path.

7. The apparatus of claim 5 or 6, wherein the shared frequency synthesizer is a phase-locked loop (PLL) synthesizer, comprising: A local oscillator and a programmable phase locked loop are provided to provide the output frequency signal, and a local oscillator is provided to provide an input to the phase locked loop.

8. A device according to any preceding claim, wherein The first signal path for use with the first channel at the first frequency comprises: a first frequency converter for frequency conversion between said first frequency and a reference frequency; as well as The second signal path for use with the second channel at the second frequency comprises: a second frequency converter for frequency conversion between the second frequency and the first frequency; and a third frequency converter for frequency conversion between said first frequency and a reference frequency; wherein the control means for controlling frequency conversion between the second frequency and the first frequency in the second signal path is configured to: control the second frequency converter, and The control component is configured to commonly and simultaneously control both the first frequency converter and the third frequency converter to convert between the first frequency and the reference frequency.

9. An apparatus according to any preceding claim, comprising: Processing circuitry configured to apply a same analog-to-digital conversion process to the first channel and the second channel.

10. An apparatus according to claim 9, wherein the first processing circuit system is controlled to apply the analog-to-digital conversion process to the first channel, and the second processing circuit system is configured to simultaneously apply the analog-to-digital conversion process to the second channel, or Wherein the first processing circuitry (ABB) is controlled to apply the analog-to-digital conversion process to the first channel but not the second channel during a first time, and to apply the analog-to-digital conversion process to the second channel but not the first channel during a second time.

11. An apparatus according to any preceding claim, wherein the first channel is a first physical channel and the first frequency is a radio frequency of the first physical channel, and the second channel is a second physical channel and the second frequency is a radio frequency of the second physical channel.

12. An apparatus according to any preceding claim, configured to: control a frequency conversion between the second frequency and the first frequency for the second channel depending on received downlink control information defining the second frequency and / or depending on received downlink control information defining the first frequency.

13. An apparatus according to any preceding claim, wherein: The first signal path is configured for transmission of at least one component carrier of a plurality of component carriers, the plurality of component carriers being combined for higher bandwidth information transmission; and / or the second signal path being configured for transmission of at least one component carrier of a plurality of component carriers, the plurality of component carriers being combined for higher bandwidth information transmission; and / or The first signal path and the second signal path are configured for transmission of multiple component carriers, the multiple component carriers being combined for higher bandwidth information transmission.

14. An apparatus according to any preceding claim, configured to divide a received physical channel into a plurality of parallel second channels of consecutive frequency ranges.

15. An apparatus according to any preceding claim, configured as user equipment.

16. A computer program product comprising computer program instructions on a device, enabling the device to: Frequency conversion is controlled in a first signal path for a first channel operating at a first frequency within a first frequency range and in a second signal path for a second channel operating at a second frequency within a second frequency range.

17. A method for communication, comprising: Controlling a frequency conversion in a second signal path for a second channel operating at a second radio frequency within a second frequency range between the second radio frequency and a first radio frequency, wherein the first radio frequency is the radio frequency for operation of a different signal path for a different channel, the first frequency being within the first frequency range, wherein an amplitude of the frequency conversion is controlled to vary depending on a difference between the second frequency and the first frequency.

18. An apparatus for communication, comprising: A first signal path for a first channel operating at a first frequency within a first frequency range, comprising: a first frequency converter for frequency conversion between the first frequency and a reference frequency; A second signal path for a second channel operating at a second frequency within a second frequency range, comprising: a second frequency converter for frequency conversion between the second frequency and the first frequency; and a third frequency converter for frequency conversion between the first frequency and a reference frequency; and A control component is configured to commonly and simultaneously control both the first frequency converter and the third frequency converter to convert between the first frequency and the reference frequency.

19. The apparatus of claim 18, wherein the control component is configured to control the second frequency converter to convert between the second frequency and the first frequency.