Power semiconductor module and motor driving system using same

Abstract

Provided is a power semiconductor module provided with a snubber capacitor, the power semiconductor module being capable of achieving both high current density and prevention of heating of the snubber capacitor. The present invention comprises: a positive electrode terminal; a negative electrode terminal disposed so as to at least partially overlap the positive electrode terminal in plan view; a first wiring branching from the positive electrode terminal; a second wiring branching off from the negative electrode terminal; and a snubber capacitor that is disposed outside a position where the positive electrode terminal and the negative electrode terminal overlap in plan view, and that is connected via the first wiring and the second wiring.

Description

Technical Field

[0001] The present invention relates to a structure of a power semiconductor module, and more particularly to a technology that is effective when applied to a power semiconductor module including a snubber capacitor. Background Art

[0002] The power conversion device has functions such as AC-DC conversion, DC-AC conversion, or frequency conversion of AC power, voltage conversion of DC power, etc. In order to perform such conversion functions, the power conversion device has a power conversion circuit that converts power by turning on and off a power semiconductor module with a switching function.

[0003] Inside the power semiconductor module, an insulating substrate with a wiring pattern is formed by soldering on a metal base for heat dissipation. There are 1in1 modules (one-in-one module) in which a single or multiple switching elements (semiconductor elements) connected in parallel are mounted on the wiring pattern of the insulating substrate, and 2in1 modules (two-in-one module) in which two switching elements are connected in series inside the module to form a half-bridge circuit with one module.

[0004] In recent years, the performance of switching elements has been improved, which has promoted the reduction of conduction loss due to low on-resistance or low on-voltage, and the reduction of switching loss due to high-speed switching. In addition, with the reduction of switching element loss, the rated current of the power semiconductor module has been increased, which has promoted the high current density inside the power semiconductor module. If the rated current and switching speed of the power semiconductor module increase, the di / dt when the switch is turned off increases, and the surge voltage when the switch is turned off, which is proportional to the di / dt and the wiring inductance of the main circuit, increases.

[0005] Here, the wiring inductance of the main circuit is, for example, the wiring inductance of the power conversion main circuit from the DC smoothing capacitor through the upper and lower switching elements in the case of a half-bridge circuit, and returns to the DC smoothing capacitor. If the surge voltage exceeds the rated voltage of the power semiconductor module, an overvoltage fault may occur, so the surge voltage needs to be suppressed to below the rated voltage.

[0006] In order to reduce the surge voltage while maintaining di / dt, it is sufficient to reduce the wiring inductance of the main circuit. However, there is a limit to how much the wiring inductance of the main circuit can be reduced by changing the wiring structure inside the power conversion circuit or the power semiconductor module.

[0007] As a method of reducing surge voltage other than changing the wiring structure inside the module, for example, as long as it is a 2in1 module, there is a method of connecting a snubber capacitor between the positive terminal and the negative terminal inside the power semiconductor module. By mounting the snubber capacitor inside the power semiconductor module and arranging it in front of the upper and lower switching elements, the wiring inductance of the main circuit becomes smaller with respect to the amount of current flowing through the snubber capacitor when the switch is turned off, so that the surge voltage can be reduced.

[0008] The snubber capacitors can also be mounted on an insulating substrate on a metal base inside a power semiconductor module. However, in this case, the amount of snubber capacitors installed and the mounting space for switching elements are reduced, which becomes an obstacle when increasing the number of switching elements mounted and increasing the power density of the power semiconductor module.

[0009] As a background technology of this technical field, there is a technology such as Patent Document 1. Patent Document 1 proposes the following method: by making a structure in which a snubber capacitor is sandwiched between the positive terminal and the negative terminal in the power semiconductor module, high power density of the power semiconductor module and built-in snubber capacitor to suppress surge voltage are achieved at the same time.

[0010] Prior art literature

[0011] Patent Literature

[0012] Patent Document 1: Japanese Patent Application Publication No. 2020-120455 Summary of the invention

[0013] Problems to be solved by the invention

[0014] However, Patent Document 1 has a structure in which a snubber capacitor is sandwiched between the positive terminal and the negative terminal. Therefore, with the recent increase in current density of power semiconductor modules, the heat generated by the positive terminal and the negative terminal increases, and the snubber capacitor becomes overheated, which may eventually cause failure.

[0015] Therefore, an object of the present invention is to provide a power semiconductor module including a snubber capacitor, which can achieve both high current density and prevention of heating of the snubber capacitor, and a motor drive system using the same.

[0016] Solutions to Solve Problems

[0017] In order to solve the above-mentioned problems, the present invention is characterized in that it has: a positive terminal; a negative terminal, which is arranged so that at least a portion overlaps with the above-mentioned positive terminal when viewed from above; a first wiring, which branches from the above-mentioned positive terminal; a second wiring, which branches from the above-mentioned negative terminal; and a buffer capacitor, which is arranged outside the position where the above-mentioned positive terminal overlaps with the above-mentioned negative terminal when viewed from above, and is connected via the above-mentioned first wiring and the above-mentioned second wiring.

[0018] Effects of the Invention

[0019] According to the present invention, in a power semiconductor module including a snubber capacitor, it is possible to realize a power semiconductor module that achieves both high current density and prevention of heating of the snubber capacitor, and a motor drive system using the same.

[0020] This can contribute to reducing losses and improving reliability of a power semiconductor module and a motor drive system using the same.

[0021] Other problems, structures, and effects than those described above will become apparent from the following description of the embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 It is a cross-sectional view showing the internal structure of the power semiconductor module according to the first embodiment of the present invention.

[0023] Figure 2 yes Figure 1 FIG. 1 is an enlarged view of a mounting portion of the snubber capacitor 14 .

[0024] Figure 3 It is conceptually expressed Figure 2 Diagram of the flow of current in .

[0025] Figure 4 yes Figure 1 Top view of a power semiconductor module.

[0026] Figure 5 is used Figure 1 Equivalent circuit diagram of a half-bridge circuit composed of power semiconductor modules.

[0027] Figure 6 Yes means Figure 5 Figure 1 shows the simulation results of the switching waveforms in the circuit configuration (without a snubber capacitor)

[0028] Figure 7 Yes means Figure 5 This is a diagram showing the simulation results of the switching waveform in the circuit configuration. (The electrostatic capacitance of the snubber capacitor is 50nF)

[0029] Figure 8 It is a top view of a power semiconductor module according to a second embodiment of the present invention.

[0030] Fig. 9 is used Figure 8 Equivalent circuit diagram of a half-bridge circuit composed of power semiconductor modules.

[0031] Fig.10 It is a top view of a power semiconductor module according to a third embodiment of the present invention.

[0032] Fig.11 yes Fig.10 1 is a perspective view of a mounting portion of a first snubber capacitor 14 and a second snubber capacitor 32 inside a power semiconductor module.

[0033] Fig.12 yes Fig.10 Equivalent circuit diagram inside a power semiconductor module.

[0034] Fig.13 It is a structural diagram of a motor drive system according to a fourth embodiment of the present invention. DETAILED DESCRIPTION

[0035] Hereinafter, embodiments of the present invention will be described using the accompanying drawings. In addition, the same components are denoted by the same reference numerals in each of the drawings, and detailed descriptions of the overlapping components are omitted.

[0036] Example 1

[0037] Reference Figures 1 to 7 , a power semiconductor module according to the first embodiment of the present invention is described. In this embodiment, first, using Figures 1 to 4 Next, the structure of the power semiconductor module of this embodiment is described. Figure 5 , an equivalent circuit diagram of a case where a half-bridge circuit is formed using the power semiconductor module of this embodiment is described. Figure 6 as well as Figure 7 ,right Figure 5 The surge voltage reduction effect at turn-off according to the present invention in the circuit structure will be described.

[0038] Figure 1 1 is a cross-sectional view showing the internal structure of the power semiconductor module 1 of the present embodiment. The power semiconductor module 1 of the present embodiment is a so-called 2-in-1 module.

[0039] like Figure 1 As shown, the power semiconductor module 1 of this embodiment has an upper insulating substrate 3, a lower insulating substrate 4, an upper insulator substrate 5, and a lower insulator substrate 6 joined to a metal base 2 for heat dissipation by solder 7. The insulating substrates 3, 4 and the insulator substrates 5, 6 are respectively composed of a metal layer 8, an insulating layer 9, and a wiring pattern 10.

[0040] The switching element SW11 (at the top) is joined to the wiring pattern 10 of the upper insulating substrate 3 by solder 7. Figure 1 Not shown), switch element SW12, diode D11 (in Figure 1 The bonding material may be sintered copper or the like in addition to solder.

[0041] The high potential side electrodes (collector electrode and anode electrode in this case) of the switch elements SW11 and SW12 and the diodes D11 and D12 are electrically connected by a wiring pattern 10, and the low potential side electrodes (emitter electrode and cathode electrode in this case) are electrically connected by a bonding wire 11 (see Figure 4 ).

[0042] The switching element SW21 (at the bottom) is joined to the wiring pattern 10 of the lower insulating substrate 4 by solder 7. Figure 1 Not shown), switch element SW22, diode D21 (in Figure 1 (not shown), and diode D22. As the bonding material, materials such as sintered copper may be used in addition to solder.

[0043] The high potential side electrodes (collector electrode and anode electrode in this case) of the switch elements SW21 and SW22 and the diodes D21 and D22 are electrically connected by a wiring pattern 10, and the low potential side electrodes (emitter electrode and cathode electrode in this case) are electrically connected by a bonding wire 11 (see Figure 4 ).

[0044] As the switching elements SW11, SW12, SW21, and SW22, in addition to the IGBT (Insulated Gate Bipolar Transistor) shown in the figure, MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) etc. are also applied. In addition, as the diodes D11, D12, D21, and D22, in addition to the pn junction diode, SBD (Schottky Barrier Diode) etc. are also applied.

[0045] The semiconductor material constituting the switching elements SW11 , SW12 , SW21 , SW22 and the diodes D11 , D12 , D21 , D22 may be Si or a wide bandgap semiconductor such as SiC.

[0046] Furthermore, when MOSFETs are used as the switching elements SW11 , SW12 , SW21 , and SW22 , parasitic diodes (body diodes) of the MOSFETs may be used as the diodes D11 , D12 , D21 , and D22 .

[0047] In addition, on the upper insulating substrate 3, the positive terminal (first positive terminal) P1 is ultrasonically bonded to the wiring pattern 10, on the lower insulating substrate 4, the negative terminal (first negative terminal) N1 is ultrasonically bonded to the wiring pattern 10, on the upper insulating substrate 5, the upper gate auxiliary terminal G1AUX and the upper emitter auxiliary terminal E1AUX are ultrasonically bonded to the wiring pattern 10, and on the lower insulating substrate 6, the lower gate auxiliary terminal G2AUX and the lower emitter auxiliary terminal E2AUX are ultrasonically bonded to the wiring pattern 10. The bonding method may also be other methods such as solder bonding. The power semiconductor module 1 is entirely incorporated into a resin case (not shown), and the interior is sealed by gel 47. The sealing material may also be other materials such as resin.

[0048] The negative terminal N1 is arranged so that at least a portion of it overlaps with the positive terminal P1 when viewed from above, and the interval between the two terminals is designed to be as short as possible while ensuring the insulation distance. This is to cancel the magnetic flux generated by the current flowing in each other's terminals by placing the two terminals facing each other and close to the ground, thereby reducing the wiring inductance of the two terminals.

[0049] In the present invention, it is characterized in that, relative to Figure 1 The negative terminal N1 is arranged so as to overlap with the positive terminal P1 when viewed from above, and a snubber capacitor (first snubber capacitor) 14 is connected to the outside of the position where the positive terminal P1 overlaps with the negative terminal N1 when viewed from above, via a first bus bar 12 branching from the negative terminal N1 and a second bus bar 13 branching from the positive terminal P1.

[0050] In this way, by connecting the snubber capacitor 14 at a position where the positive terminal P1 and the negative terminal N1 that generate heat due to the flow of current do not overlap, that is, outside the position where the positive terminal P1 and the negative terminal N1 overlap when looking down at the power semiconductor module 1, it is possible to prevent the temperature of the snubber capacitor 14 from increasing excessively due to heating from the positive terminal P1 and the negative terminal N1.

[0051] The first bus bar 12 and the negative terminal N1 and the second bus bar 13 and the positive terminal P1 are connected by screws 15. Instead of screws 15, the bus bars and the terminals may be connected by other means that allow electrical connection, such as soldering.

[0052] In addition, the electrostatic capacitance of the buffer capacitor 14 is on the order of tens of nF to hundreds of nF and is less than one thousandth of the DC smoothing capacitor (not shown) connected to the outside of the power semiconductor module 1. Therefore, the current flowing through the first bus 12 and the second bus 13 is also sufficiently smaller than the positive terminal P1 and the negative terminal N1. Therefore, in terms of the heat generated by the current, the first bus 12 and the second bus 13 are sufficiently smaller than the positive terminal P1 and the negative terminal N1, and the heating of the buffer capacitor 14 from the first bus 12 and the second bus 13 is relatively small.

[0053] The snubber capacitor 14 uses a chip-type ceramic capacitor, a film capacitor, a thin film capacitor, etc., and preferably has high heat resistance in order to suppress surge voltage at turn-off and to withstand high-frequency characteristics and high-temperature operation of the power semiconductor module 1 .

[0054] In addition, the first bus bar 12 and the second bus bar 13 may not be bus bars as long as they can electrically connect the positive terminal P1 and the negative terminal N1 to the snubber capacitor 14. For example, the following structure may be adopted: a first wiring pattern and a second wiring pattern are provided on an insulating substrate, the snubber capacitor 14 is connected between one side of the first wiring pattern and one side of the second wiring pattern, and the other side of the first wiring pattern and the positive terminal P1 are connected, and the other side of the second wiring pattern and the negative terminal N1 are connected, respectively.

[0055] Figure 2 yes Figure 1 FIG. 1 is an enlarged view of a mounting portion of the snubber capacitor 14 .

[0056] like Figure 2 As shown, in this embodiment, the connection portion between the snubber capacitor 14 and the first bus bar 12, and the connection portion between the snubber capacitor 14 and the second bus bar 13 are arranged on the same main surface as the snubber capacitor 14 (on the Figure 2 The middle is the lower surface).

[0057] In the present invention, in order to connect the snubber capacitor 14 between the positive terminal P1 and the negative terminal N1, it is necessary to three-dimensionally wire the first busbar 12 and the second busbar 13. Therefore, compared with the case where the capacitor is joined flatly on the printed circuit board, the thermal stress generated in the solder joint between the snubber capacitor 14 and the busbar may increase. Figure 2 In the case where the second bus bar 13 thermally expands in the vertical direction 17, thermal stress (compression stress) 18 is generated in the solder joint portion.

[0058] Therefore, in order to reduce the thermal stress 18, the second busbar 13 is provided with a bent portion 16. When the second busbar 13 thermally expands, the bent portion 16 deforms in the horizontal direction 19, thereby reducing the thermal stress 18 and preventing cracks in the solder joint. In order to reduce the horizontal thermal stress of the busbar, the bent portion 16 may be provided in the horizontal direction of the busbar, or may be provided in the first busbar 12 according to the wiring structure of the busbar.

[0059] Figure 3 It is conceptually expressed Figure 2 Diagram of the flow of current in .

[0060] In order to reduce the surge voltage at the time of shutdown, the first bus bar 12, the second bus bar 13, and the snubber capacitor 14 themselves have small wiring inductances, which is highly effective.

[0061] Therefore, if Figure 3 As shown, by making the current direction 21 of the negative terminal N1 and the buffer current direction 45 flowing through the first busbar 12 arranged in parallel with the negative terminal N1 and the buffer current direction 45 of the buffer capacitor 14, and the current direction 20 of the positive terminal P1 and the buffer current direction 46 flowing through the second busbar 13 arranged in parallel with the positive terminal P1 respectively in opposite directions, the magnetic flux generated by the currents flowing mutually can be offset, thereby reducing the wiring inductance of the first busbar 12, the second busbar 13, and the buffer capacitor 14 themselves.

[0062] Figure 4 yes Figure 1 A top view of a power semiconductor module 1 is shown.

[0063] like Figure 4 As shown, the first bus bar 12 is configured to branch from the negative terminal N1, and the second bus bar 13 is configured to branch from the positive terminal P1.

[0064] Figure 5 is used Figure 1 An equivalent circuit diagram of a half-bridge circuit formed by a power semiconductor module 1.

[0065] like Figure 5 As shown, between the positive terminal P1 and the negative terminal N1 of the power semiconductor module 1 , a DC smoothing capacitor 26 and a DC power source 24 are connected in parallel outside the module.

[0066] In addition, a load inductor 28 is connected between the positive terminal P1 and the AC terminal (first AC terminal) AC1. The snubber capacitor 14 is connected between the positive terminal P1 and the negative terminal N1 inside the module.

[0067] Compared with the DC smoothing capacitor 26, by configuring the buffer capacitor 14 at a position close to the leg portion formed by the upper branch switching elements (SW11 and SW12) and the lower branch switching elements (SW21 and SW22), the wiring inductance 25 of the main circuit becomes smaller with respect to the amount of current flowing through the buffer capacitor 14 when the switch is turned off, thereby reducing the surge voltage when the switch is turned off.

[0068] Figure 6 It means in Figure 5 A diagram showing simulation results of switching waveforms in a circuit configuration without a snubber capacitor.

[0069] In the off switch at around 81μs, as the gate voltage VgeL of the lower branch decreases from +17V when turned on to -10V when turned off, the total value of the current flowing through the switch elements (SW21 and SW22) of the lower branch, that is, Ic1+Ic2, is cut off. In addition to the DC voltage Vcc, the surge voltage generated by the wiring inductance 25 is applied to both ends of the switch elements (SW21 and SW22) of the lower branch according to the di / dt when the current is cut off.

[0070] As a result, the collector-emitter voltage VceL of the lower arm is applied with a surge voltage of 550V in addition to 1200V of the DC power supply voltage Vcc, and jumps to around 1750V.

[0071] Figure 7 It means in Figure 5 FIG. 4 is a diagram showing simulation results of switching waveforms when the electrostatic capacitance of the snubber capacitor 14 is set to 50 nF in the circuit configuration of .

[0072] In the case of a switch-off at around 1 μs in FIG8 , the wiring inductance 25 of the main circuit decreases with respect to the amount of current flowing through the snubber capacitor 14 during switching, and the surge voltage can be reduced. Therefore, the surge voltage is relatively Figure 6 The 550V without the buffer capacitor is reduced to 300V.

[0073] according to Figure 6 and Figure 7 The comparison confirmed that the surge voltage reduction effect at the time of shutdown is sufficiently obtained even in the electrostatic capacitance of the snubber capacitor 14 of the order of tens of nF to hundreds of nF that can be mounted in the power semiconductor module 1 of the present invention.

[0074] Example 2

[0075] Reference Figure 8 as well as Fig. 9 , a power semiconductor module according to a second embodiment of the present invention will be described. In addition, the following mainly describes the differences from the first embodiment.

[0076] Figure 8 is a top view of the power semiconductor module 1 of this embodiment, which is equivalent to the embodiment 1 ( Figure 4 ) is a variation of .

[0077] like Figure 8 As shown, in the power semiconductor module 1 of the present embodiment, two snubber capacitors 14 are symmetrically arranged with the imaginary center line 23 between the positive terminal P1 and the negative terminal N1 as a boundary.

[0078] If Figure 4 When a plurality of switching elements are connected in parallel on the insulating substrates 3 and 4 , the wiring distance from the snubber capacitor 14 to each switching element varies, and the wiring inductance 25 from the snubber capacitor 14 to each switching element may differ between the switching elements connected in parallel.

[0079] In this case, the influence of the voltage drop at the wiring inductance 25 caused by the snubber capacitor current differs between the parallel switch elements, so that a potential difference is generated between the parallel switch elements, and a circulating current for canceling the potential difference may flow.

[0080] This circulating current can be suppressed by arranging the snubber capacitor 14 at a position where the wiring inductance 25 from each switching element connected in parallel becomes equal. Figure 8 As shown, the plurality of snubber capacitors 14 can be symmetrically arranged with the imaginary center line 23 between the positive terminal P1 and the negative terminal N1 as a boundary to suppress the above.

[0081] Fig. 9 is used Figure 8 An equivalent circuit diagram of a half-bridge circuit formed by a power semiconductor module 1.

[0082] like Figure 8 As shown, by symmetrically arranging a plurality of snubber capacitors 14 in the power semiconductor module 1, Fig. 9 As shown in FIG. 1 , the plurality of snubber capacitors 14 can also be made bilaterally symmetrical as an equivalent circuit.

[0083] Furthermore, by symmetrically arranging the plurality of snubber capacitors 14 , the combined electrostatic capacitance of the snubber capacitors 14 is increased by connecting the plurality of snubber capacitors 14 in parallel, and the surge voltage suppression effect can be enhanced.

[0084] Example 3

[0085] Reference Figures 10 to 12 , a power semiconductor module according to a third embodiment of the present invention will be described. In addition, the following mainly describes the differences from the first embodiment.

[0086] Fig.10is a top view of the power semiconductor module 1 of this embodiment, which is equivalent to the embodiment 1 ( Figure 4 ) is a variation of .

[0087] like Fig.10 As shown, in the power semiconductor module 1 of the present embodiment, the positive terminal has a first positive terminal P1 and a second positive terminal P2, and the negative terminal has a first negative terminal N1 and a second negative terminal N2. When looking down at the power semiconductor module 1, the first positive terminal P1 is configured to overlap with at least a portion of the first negative terminal N1, and the second positive terminal P2 is configured to overlap with at least a portion of the second negative terminal N2.

[0088] Furthermore, the snubber capacitor includes a first snubber capacitor 14 electrically connected between the first positive terminal P1 and the second negative terminal N2 , and a second snubber capacitor 32 electrically connected between the second positive terminal P2 and the first negative terminal N1 .

[0089] The first positive terminal P1 and the second positive terminal P2, and the first negative terminal N1 and the second negative terminal N2 are electrically connected by a bus bar or the like outside the module (not shown). That is, the first positive terminal P1 and the second positive terminal P2, and the first negative terminal N1 and the second negative terminal N2 are at the same potential, so the first snubber capacitor 14 and the second snubber capacitor 32 are connected in parallel.

[0090] Fig.11 yes Fig.10 1 is a perspective view of a mounting portion of a first snubber capacitor 14 and a second snubber capacitor 32 inside a power semiconductor module 1 .

[0091] like Fig.11 As shown in FIG. 1 , if the snubber capacitor is cross-connected between the left and right terminals, the positive terminal and the negative terminal which generate heat can be further away from each other than in the first embodiment, and the temperature rise of the snubber capacitor can be suppressed.

[0092] However, if Fig.11 If the cross connection is performed as described above, the wiring length of the first busbar 12 and the second busbar 13 will be extended, and the wiring inductance 29 of the first busbar 12 and the wiring inductance 30 of the second busbar 13 will increase. In order to reduce the wiring inductance, as long as Fig.11 The current path from the first positive terminal P1 to the second negative terminal N2 via the first snubber capacitor 14 and the current path from the second positive terminal P2 to the first negative terminal N1 via the second snubber capacitor 32 may be substantially parallel.

[0093] By setting them to be approximately parallel, the direction of the current Isnu1 flowing in the first buffer capacitor 14 and the direction of the current Isnu2 flowing in the second buffer capacitor 32 become opposite directions, so that the magnetic flux generated by the currents flowing in each other can be offset, and the wiring inductance of the first bus 12, the second bus 13, the first buffer capacitor 14, and the second buffer capacitor 32 can be reduced.

[0094] Fig.12 yes Fig.10 1 is an equivalent circuit diagram of the power semiconductor module 1.

[0095] The first positive terminal P1 and the second positive terminal P2 are electrically connected outside the module via the bus bar 34. Similarly, the first negative terminal N1 and the second negative terminal N2 are electrically connected outside the module via the bus bar 35. Therefore, as described above, the first snubber capacitor 14 and the second snubber capacitor 32 are connected in parallel.

[0096] If the buffer capacitor is set to Fig.12 With such cross connection, the circulation path between the snubber capacitor and the upper and lower switching elements crosses the left and right insulating substrates. For example, in the case of the first snubber capacitor 14, the circulation path passes through the first snubber capacitor 14, the upper switching elements SW11 and SW12 of the left insulating substrate 3, and the lower switching elements SW21 and SW22 of the left insulating substrate 4 and returns to the first snubber capacitor 14.

[0097] Therefore, if a wiring is added to connect the left and right insulating substrates with low inductance, the wiring inductance of the circulation path can be reduced, and the surge voltage suppression effect when the switch is turned off can be improved. Fig.10 As shown, in this embodiment, by providing a bonding wire 33 connecting the emitter electrodes of the left and right lower insulating substrates 4, that is, the first negative electrode terminal N1 and the second negative electrode terminal N2, the wiring inductance 36 (see Fig.12 ), the emitter electrodes of the insulating substrate 4 of the left and right lower branches are connected with low inductance.

[0098] Example 4

[0099] Reference Fig.13 , a motor drive system according to a fourth embodiment of the present invention is described.

[0100] Fig.13 3 is a structural diagram of the motor drive system 37 of this embodiment.

[0101] like Fig.13 As shown, the motor drive system 37 of the present embodiment drives the motor 38 by the AC power output by the power conversion device 39 .

[0102] The power conversion device 39 comprises: a three-phase inverter main circuit composed of three power semiconductor modules 1 (2in1 modules) each having a group of upper and lower branches; a DC power supply 24 connected to the DC side of the three-phase inverter main circuit; a gate drive circuit 27 for driving the power semiconductor module 1; and a controller 40 for outputting a PWM signal to the gate drive circuit 27.

[0103] As the power semiconductor module 1, the power semiconductor module of any one of the above-mentioned embodiments 1 to 3 is applied. In addition, the motor 38 is a three-phase AC motor, and each phase of the motor 38 is connected to the AC terminal (for example Figure 1 "AC1") connection.

[0104] The controller 40 calculates two PWM signals (S1i to S2i: i = u, v, w) for each phase based on the three-phase current (Iu, Iv, Iw) of the motor 38 detected by the current sensors (41, 42, 43) and the rotation speed (ω) of the motor 38 detected by the speed detector 44, and outputs them to the gate drive circuit 27 of each phase. The power semiconductor module 1 converts the DC power from the DC power supply 24 into three-phase AC power by switching by the gate drive circuit 27 according to the PWM signal. The motor 38 is driven by the three-phase AC power.

[0105] By applying any one of the power semiconductor modules of Embodiments 1 to 3 as the power semiconductor module 1, it is possible to achieve both high power density of the power semiconductor module 1 and low loss caused by surge voltage suppression when the switch is turned off, thereby making the power conversion device 39 compact and low-loss.

[0106] In addition, the present invention is not limited to the above-mentioned embodiments, and includes various modified examples. For example, the above-mentioned embodiments are described in detail in order to explain the present invention in an easy-to-understand manner, and are not necessarily limited to having all the structures described. In addition, a part of the structure of a certain embodiment can be replaced with the structure of another embodiment, and in addition, the structure of another embodiment can be added to the structure of a certain embodiment. In addition, other structures can be added, deleted, or replaced with a part of the structure of each embodiment.

[0107] Explanation of symbols

[0108] 1—power semiconductor module, 2—metal base, 3—insulating substrate of upper branch, 4—insulating substrate of lower branch, 5—insulating substrate of upper branch, 6—insulating substrate of lower branch, 7—solder, 8—metal layer, 9—insulating layer, 10—wiring pattern, 11—bonding lead, 12—first bus bar, 13—second bus bar, 14—(first) buffer capacitor, 15—screw, 16—bending portion, 17—vertical direction, 18—thermal stress (direction), 19—horizontal direction, 20—direction of current flowing to positive terminal P1, 21—direction of current flowing to negative terminal N1, 22—gate electrode, 23—positive terminal P1 and negative terminal N1, 24—DC power supply, 25—wiring inductance, 26—DC smoothing capacitor, 27—gate drive circuit, 28—load inductance, 29—wiring inductance of the first bus 12, 30—wiring inductance of the second bus 13, 31—imaginary center line of the positive terminal P2 and the negative terminal N2, 32—(second) buffer capacitor, 33—bonding lead between emitter electrodes of the insulating substrate connecting the left and right lower branches, 34—bus connecting the first positive terminal P1 and the second positive terminal P2, 35—bus connecting the first negative terminal N1 and the second negative terminal N2, 36—insulating substrate connecting the left and right lower branches , 37—motor drive system, 38—motor, 39—power conversion device, 40—controller, 41, 42, 43—current sensor, 44—speed detector, 45—buffer current direction, 46—buffer current direction, 47—gel, SW11, SW12, SW21, SW22, SW31, SW32, SW41, SW42—switching elements, D11, D12, D21, D22, D31, D32, D41, D42—diodes, P1—(first) positive terminal, P2—(second) positive terminal, N1—(first) negative terminal, N2— (Second) negative terminal, AC1—(first) AC terminal, AC2—(second) AC terminal, G1AUX—gate auxiliary terminal of the upper branch, G2AUX—gate auxiliary terminal of the lower branch, E1AUX—emitter auxiliary terminal of the upper branch, E2AUX—emitter auxiliary terminal of the lower branch, Vcc—DC power supply voltage, Ic1—current flowing in SW21, Ic2—current flowing in SW22, VceL—collector-emitter voltage of the lower branch, VgeL—gate-emitter voltage of the lower branch, Isnu1—current flowing in the first buffer capacitor 14, Isnu2—current flowing in the second buffer capacitor 32.

Claims

1. A power semiconductor module, characterized in that: have: Positive terminal; a negative electrode terminal, at least a portion of which is arranged to overlap with the positive electrode terminal in a plan view; a first wiring line branching from the positive terminal; a second wiring line branching from the negative electrode terminal; as well as The snubber capacitor is disposed outside a position where the positive electrode terminal and the negative electrode terminal overlap in a plan view, and is connected via the first wiring and the second wiring.

2. The power semiconductor module according to claim 1, characterized in that: The first wiring and the second wiring are wiring patterns provided on a bus bar or an insulating substrate.

3. The power semiconductor module according to claim 1, characterized in that: The positive electrode terminal and the first wiring, and the negative electrode terminal and the second wiring are connected by screws, respectively.

4. The power semiconductor module according to claim 1, characterized in that: A connection portion between the snubber capacitor and the first wiring and a connection portion between the snubber capacitor and the second wiring are arranged on the same main surface of the snubber capacitor.

5. The power semiconductor module according to claim 1, characterized in that: At least one of the first wiring and the second wiring has a bent portion.

6. The power semiconductor module according to claim 1, characterized in that: The directions of the currents flowing in the positive terminal and the first wiring are opposite to each other. The directions of the currents flowing in the negative electrode terminal and the second wiring are opposite to each other.

7. The power semiconductor module according to claim 6, characterized in that: The first wiring has a portion substantially parallel to the positive terminal. The second wiring has a portion substantially parallel to the negative electrode terminal.

8. The power semiconductor module according to claim 1, characterized in that: Having a plurality of the above-mentioned buffer capacitors, The plurality of snubber capacitors are symmetrically arranged with an imaginary center line of the positive terminal or the negative terminal as a boundary.

9. The power semiconductor module according to claim 1, characterized in that: The positive terminal has a first positive terminal and a second positive terminal. The negative terminal includes a first negative terminal and a second negative terminal. In a plan view, the first positive electrode terminal and the first negative electrode terminal are arranged to overlap at least a portion thereof. The second positive electrode terminal is arranged to overlap at least a portion of the second negative electrode terminal.

10. The power semiconductor module according to claim 9, characterized in that: The snubber capacitor includes a first snubber capacitor electrically connected between the first positive terminal and the second negative terminal, and a second snubber capacitor electrically connected between the second positive terminal and the first negative terminal.

11. The power semiconductor module according to claim 10, characterized in that: A current path from the first positive terminal to the second negative terminal via the first snubber capacitor and a current path from the second positive terminal to the first negative terminal via the second snubber capacitor have a portion that is substantially parallel.

12. The power semiconductor module according to claim 9, characterized in that: A wiring is provided inside the power semiconductor module to connect the first negative electrode terminal and the second negative electrode terminal.

13. A motor drive system, characterized in that: The power semiconductor module according to any one of claims 1 to 12 is used.

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