Abnormal signal classification method of intelligent oscilloscope

Abstract

The invention discloses an abnormal signal classification method for an intelligent oscilloscope, which comprises the following steps of: deploying a gating circulation unit network in an FPGA (Field Programmable Gate Array) of the intelligent oscilloscope, performing offline training, accessing a signal to be tested, sampling through an ADC (Analog to Digital Converter), storing sampled data into an external memory DDR (Double Data Rate) of the FPGA, and finally starting abnormal classification by an upper computer. And issuing the weight and bias parameter matrix to a gating cycle unit network, and then controlling the gating cycle unit network to realize automatic anomaly classification of the to-be-tested signal through the FPGA.

Description

Technical Field

[0001] The invention belongs to the technical field of oscilloscopes, and more specifically, relates to an abnormal signal classification method of an intelligent oscilloscope. Background Art

[0002] Through anomaly classification technology, we can identify the possible anomaly types of the measured signal, and capture the signal and proceed to the next step of processing. Ordinary abnormal signals often need to be captured and identified manually, and operators who lack professional knowledge often cannot accurately identify the anomaly. In addition, for signals of different types and characteristics, it is difficult to accurately classify and distinguish each anomaly. At the same time, empirical methods are often only applicable to one or several specific signal types, and are not robust to anomaly detection of other types of signals. Therefore, how to accurately classify abnormal signals at any time has become a new problem in the field of data signal analysis.

[0003] Some neural network-based methods have been used to identify and classify anomalies in common data. However, for common time series signals, traditional fully connected layer networks have some problems such as high complexity and poor ability to capture time series features. The gated recurrent unit network is based on the traditional recurrent neural network architecture and uses gated recurrent units to solve the problems of inability to perform long-term memory in traditional recurrent neural networks and gradient vanishing or exploding in back propagation. It has strong adaptability when processing large-scale and complex time series signals, and shows higher accuracy and robustness than traditional methods in actual abnormal signal classification. Therefore, it is more suitable for the abnormal classification function in common time series signals, bringing new methods to signal monitoring and anomaly detection. Summary of the invention

[0004] The purpose of the present invention is to overcome the deficiencies of the prior art and to provide an abnormal signal classification method for an intelligent oscilloscope, which can automatically and quickly capture signals that meet the set time width trigger conditions and signals with abnormal time width.

[0005] To achieve the above-mentioned object of the invention, the present invention provides an abnormal signal classification method of an intelligent oscilloscope, characterized in that it comprises the following steps:

[0006] (1) Deploy the gated recurrent unit network in the FPGA of the smart oscilloscope and train it offline;

[0007] Deploy a gated recurrent unit network in the FPGA of the smart oscilloscope, and train the gated recurrent unit network through various abnormal data collected by the ADC in the acquisition system. Then, record the weight and bias parameter matrix of the gated recurrent unit network after training and store it in the host computer.

[0008] (2) The smart oscilloscope is powered on, the signal to be tested is connected, and then the signal is sampled by the ADC and stored in the external memory DDR of the FPGA;

[0009] (3) The host computer starts abnormal classification and sends the weight and bias parameter matrix to the gated recurrent unit network. Then, the gated recurrent unit network is controlled by FPGA to realize automatic abnormal classification of the test signal.

[0010] The object of the invention of the present invention is achieved in this way:

[0011] The invention discloses an abnormal signal classification method for an intelligent oscilloscope. The method comprises the following steps: firstly, a gated cyclic unit network is deployed in the FPGA of the intelligent oscilloscope and trained offline; then, a signal to be tested is accessed and sampled through an ADC, and the sampled data is stored in an external memory DDR of the FPGA; finally, a host computer starts abnormal classification, sends a weight and bias parameter matrix to the gated cyclic unit network, and then the gated cyclic unit network is controlled by the FPGA to realize automatic abnormal classification of the signal to be tested.

[0012] At the same time, the abnormal signal classification method of an intelligent oscilloscope of the present invention also has the following beneficial effects:

[0013] (1) The present invention uses a gated recurrent unit to compress time series data. Compared with the traditional fully connected layer network and recurrent neural network, it has the ability of long-term memory and fewer parameters than the long short-term memory network, thereby achieving fast convergence and low-complexity inference.

[0014] (2) The neural network is trained by the abnormal signals in the template library. When a new abnormal type is captured, it can be added to the abnormal signal template library, thereby greatly expanding the application scenarios of the present invention. In addition, the trained neural network model is more robust and less complex than the traditional abnormal classification method.

[0015] (3) The present invention uses the data in the abnormal signal template library to train the neural network, and by minimizing the cross entropy between the network output classification probability and the actual classification, the neural network has the ability to realize abnormal classification. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a flow chart of an abnormal signal classification method of an intelligent oscilloscope of the present invention;

[0017] Figure 2 It is a schematic diagram of the structure of the GRU layer;

[0018] Figure 3 This is a common schematic diagram of signal anomalies;

[0019] Figure 4 It is a schematic diagram of the sigmoid function and its derivative. DETAILED DESCRIPTION

[0020] The specific implementation of the present invention is described below in conjunction with the accompanying drawings so that those skilled in the art can better understand the present invention. It should be noted that in the following description, when the detailed description of known functions and designs may dilute the main content of the present invention, these descriptions will be omitted here.

[0021] Example

[0022] In this embodiment, if Figure 1 As shown, the present invention provides an abnormal signal classification method for an intelligent oscilloscope, characterized in that it includes the following steps:

[0023] (1) Deploy the gated recurrent unit network in the FPGA of the smart oscilloscope and train it offline;

[0024] A gated recurrent unit network is deployed in the FPGA of the smart oscilloscope, and the gated recurrent unit network is trained by using M types of abnormal data collected by the ADC in the acquisition system. Then, the weight and bias parameter matrix of the gated recurrent unit network after training is recorded and stored in the host computer.

[0025] In this embodiment, the gated recurrent unit network includes two GRU layers, one fully connected layer, and one comparison layer connected in series, where Figure 2 As shown, each GRU layer includes a forget gate r, an update gate z, and a candidate hidden state

[0026] pass Figure 3 After completing the training of the gated recurrent unit network, we need to record the weight and bias parameter matrix of the gated recurrent unit network, that is, the weight matrix W of the forget gate r in each GRU layer. r and bias B r , update the weight matrix W of gate z z and bias B z , candidate hidden states The weight matrix and bias Among them, the weight matrix dimension of all gates in the first GRU layer is 129×128, the bias matrix dimension is 1×128, the weight matrix dimension of all gates in the second GRU layer is 256×128, and the bias matrix dimension is 1×128; in addition, the forget gate and update gate are activated by the sigmoid function, and the candidate hidden state is activated by the tanh function.

[0027] In this embodiment, if Figure 3As shown in the figure, common signal anomalies include: (a) normal signal, (b) voltage surge, (c) voltage drop, (d) power on, (e) power off, (f) transient pulse, etc.

[0028] (2) The smart oscilloscope is powered on, the signal to be tested is connected, and then the signal is sampled by the ADC and stored in the external memory DDR of the FPGA;

[0029] (3) The host computer starts abnormal classification and sends the weight and bias parameter matrix to the gated recurrent unit network. Then, the gated recurrent unit network is controlled by FPGA to realize automatic abnormal classification of the test signal.

[0030] Below we describe in detail the process of automatic anomaly classification of the test signal by the gated recurrent unit network:

[0031] (3.1) The host computer sends weight and bias parameters to the gated recurrent unit network, and then initializes the gated recurrent unit network;

[0032] (3.2) The host computer reads the sampling data required to complete a signal anomaly classification from the DDR, which is recorded as X = [x 1 ,x 2 ,x 3 ,…,x t ,,x L ], x t represents the tth sample data, L is the length of the sample data, and its value is 100; then the sample data X is input into the gated recurrent unit network;

[0033] (3.3), initialize t = 1, and take the sample data x t Input to the first GRU layer and calculate the output r of the forget gate t :

[0034] r t =sigmoid([x t ,h t-1 ]·W r +B r )

[0035] in, represents the memory value of the first GRU layer after t-1 iterations, and its initial memory value is all 0; N is the matrix dimension, and its value is 128; sigmoid(·) represents the activation function;

[0036] (3.4) Calculate the output z of the update gate t :

[0037] z t =sigmoid([x t ,ht-1 ]·W z +B z )

[0038] (3.5) Calculate the output of the candidate hidden state

[0039]

[0040] Among them, tanh(·) represents the activation function;

[0041] In this embodiment, the cumulative calculations in the matrix operations of the forget gate, the update gate, and the candidate hidden state all use parameterized addition trees, and the specific process is:

[0042] (3.5.1) The specific process of the accumulation calculation in the matrix operation of the forget gate is:

[0043] (3.5.1.1), set the initial value of accumulation T 0 ;

[0044] [x t ,h t-1 ]·W r(:,1) =[S 1 ,S 2 ,S 3 ,L,S N+1 ]

[0045] Among them, W r(:,1) Represents the weight matrix W r The first column of

[0046] Let A 0 =N+1,T 0 =[S 1 ,S 2 ,S 3 ,L,S N+1 ], then the initial value T 0 Represented as T 0 =[S 1 ,S 2 ,S 3 ,L,S A0 ];

[0047] (3.5.1.2), calculate the first addition result T 1 :

[0048]

[0049] (3.5.1.3), determine T 1 Dimension A 1 :

[0050]

[0051] (3.5.1.4), let A 0 =A 1 , T 0 =T 1 , then repeat steps (3.5.1.2) to (3.5.1.3) until A 1 =1, and the final accumulated result T is obtained 1 ;

[0052] (3.5.2) Similarly, follow step (3.5.1) to complete the cumulative calculations in the matrix operations of the update gate and candidate hidden states.

[0053] (3.6) Calculate the memory value h of the first GRU layer after t iterations t :

[0054]

[0055] (3.7), the output h of the first GRU layer t As the input of the second GRU layer, that is, x t =h t Then, follow steps (3.3) to (3.6) to complete the calculation of the second GRU layer and obtain the memory value h output by the second GRU layer. t ;

[0056] (3.8), traverse the sampled data X = [x 1 ,x 2 ,x 3 ,…,x t ,…,x L ], and finally get the memory value h output by the second GRU layer after the Lth iteration L ;

[0057] (3.9), h L As the input of the fully connected layer, a set of probability vectors of length M is obtained through the fully connected layer Indicates the probability value that the signal to be tested belongs to the mth type of anomaly;

[0058] H fc =h L ·W fc +B fc

[0059] In this embodiment, the accumulation calculation in the matrix operation of the fully connected layer adopts a pipeline processing method that eliminates the correlation of the addition results. The specific processing process is:

[0060] (3.9.1), let the input h of the fully connected layer L for: represents the tth memory element;

[0061] (3.9.2), record the weight matrix of the fully connected layer W fc for:

[0062] (3.9.3), initialize t = 1, in the first clock cycle t = 1, use the three-clock multiplier to calculate and The product of each element in ;

[0063] (3.9.4) In the second clock cycle t = 2, continue to use the three-clock multiplier to calculate and The product of each element in ;

[0064] (3.9.5) At the third clock cycle t = 3, continue to use the three-clock multiplier to calculate and The product of each element in ;

[0065] In this embodiment, after three clock cycles, the multiplier outputs the product result y of the first clock cycle. 1 =[y (1,1) ,y (1,2) ,…,y (1,M) ]

[0066] (3.9.6) At the fourth clock cycle t = 4, continue to use the three-clock multiplier to calculate and The product of each element in; at the same time, the output y of the three-clock multiplier at the first clock cycle t = 1 1 Enter the waiting state;

[0067] (3.9.7) Repeat the above operation. At the fifth clock cycle t=5, the three-clock multiplier outputs y 2 ; At the sixth clock cycle t=6, the three-clock multiplier outputs y 3 , and at the same time 1 ,y 2 The input is sent to the three-clock adder and the output of the three-clock multiplier is y 3 Enter the waiting state;

[0068] (3.9.8) Repeat the above operation. At the seventh clock cycle t=7, the three-clock multiplier outputs y 4 ; At the eighth clock cycle t = 8, the three-clock multiplier outputs y 5 , and y 5 Enter the waiting state and set y 3 With y 4 Enter the three-clock adder;

[0069] (3.9.9) After three clock cycles, i.e., at the ninth clock cycle t=9, the three-clock adder outputs y 6 , while the three-clock adder outputs c 1 ;

[0070] Repeat the above operation. At the tenth clock cycle t=10, the three-clock multiplier outputs y 7 , and y 7 Enter the waiting state and set y 6 With c 1 Enter the three-clock adder;

[0071] Repeat the above operation. At the eleventh clock cycle t=11, the three-clock multiplier outputs y 8 , and y 8 Enters the waiting state, and the three-clock adder outputs c 2 , and y 7 With c 2 Enter the three-clock adder;

[0072] (3.9.10) Continue to set t = t + 1 and repeat the above operation until the number of clock cycles reaches the maximum value N = 128. Check whether the adder is still calculating. If it is still calculating, then c t Enter the waiting state and wait for the next calculation result c of the adder t+1 Then c t and c t+1 As the input of the adder, continue to add; otherwise, c t As a result of matrix operations;

[0073] (3.10), the probability vector Input to the comparison layer, output vector The maximum probability value is obtained, and the abnormal type corresponding to the maximum probability value is taken as the abnormal classification result of the signal to be tested.

[0074] In this embodiment, both the sigmoid function and the tanh function implement nonlinear activation in a manner of allocating storage according to the slope size. The specific activation process is:

[0075] (3.10.1), sigmoid function activation;

[0076] In this embodiment, if Figure 4 This is a schematic diagram of the sigmoid function and its derivative. According to the slope value, the input is divided into four intervals: -1 to 0 and 0 to 1, -2 to -1 and 1 to 2, -4 to -2 and 2 to 4, -8 to -4 and 4 to 8.

[0077] In the data input to the sigmoid function, 1 bit of sign bit, m bits of integer bit, and n bits of decimal bit are taken to form the sampling data;

[0078] Determine the interval where the m bit integer of the sampled data is located:

[0079] When the m bit integer is between -1 and 0, 0 and 1, that is, the integer is 111,000, such as Figure 4 As shown, the slope is the largest at this time, and the integer bits 111 are modified to 01 and 000 to 10, and then combined with the n-bit decimal place, and the combined result is activated and output by the sigmoid function;

[0080] When the m bit integer is between -2 and -1, 1 and 2, that is, the integer is 110,001, such as Figure 4 As shown in the figure, the slope slows down at this time, and the integer bit 110 is modified to 001, and 001 is modified to 110, and then combined with the (n-1) bit decimal bit, and the combined result is activated and output by the sigmoid function;

[0081] When the m bit integer is between -4 and -2, 2 and 4, that is, when the integer is 100 to 101, 010 to 011, the integers 100 to 101 are modified to 0001, 010 to 011 are modified to 1110, and then combined with the (n-2) bit decimal place, and the combined result is activated and output through the sigmoid function;

[0082] When the m bit integer is between -8 and -4, 4 and 8, that is, when the integer is 000 to 011, 100 to 111, the integer 000 to 011 is modified to 0000, 100 to 111 is modified to 1111, and then combined with the (n-3) bit decimal place, and the combined result is activated and output through the sigmoid function;

[0083] When the m bit integer is less than -8 or greater than 8, it is directly output as 1 without sigmoid function activation;

[0084] (3.10.2), tanh function activation;

[0085] The processing method of the tanh function is the same as that of the sigmoid function, and the activation processing is performed in intervals according to step (3.10.1).

[0086] Although the above describes the illustrative specific embodiments of the present invention to facilitate those skilled in the art to understand the present invention, it should be clear that the present invention is not limited to the scope of the specific embodiments. For those of ordinary skill in the art, as long as various changes are within the spirit and scope of the present invention as defined and determined by the attached claims, these changes are obvious, and all inventions and creations using the concept of the present invention are protected.

Claims

1. A method for classifying abnormal signals of an intelligent oscilloscope, characterized in that: The following steps are involved: (1) Deploy the gated recurrent unit network in the FPGA of the smart oscilloscope and train it offline; Deploy a gated recurrent unit network in the FPGA of the smart oscilloscope, and train the gated recurrent unit network through various abnormal data collected by the ADC in the acquisition system. Then, record the weight and bias parameter matrix of the gated recurrent unit network after training and store it in the host computer. (2) The smart oscilloscope is powered on, the signal to be tested is connected, and then the signal is sampled by the ADC and stored in the external memory DDR of the FPGA; (3) The host computer starts abnormal classification and sends the weight and bias parameter matrix to the gated recurrent unit network. Then, the gated recurrent unit network is controlled by FPGA to realize automatic abnormal classification of the test signal.

2. The abnormal signal classification method of the intelligent oscilloscope according to claim 1, characterized in that: The gated recurrent unit network includes 2 GRU layers, 1 fully connected layer and 1 comparison layer, wherein each GRU layer includes a forget gate r, an update gate z, a candidate hidden state Among them, the forget gate and update gate are activated by sigmoid function, and the candidate hidden state is activated by tanh function.

3. The abnormal signal classification method of the intelligent oscilloscope according to claim 1, characterized in that: The method for the gated recurrent unit network in step (3) to realize automatic abnormal classification of the test signal is: (3.1) The host computer sends weight and bias parameters to the gated recurrent unit network, and then initializes the gated recurrent unit network; (3.2) The host computer reads the sampling data required to complete a signal anomaly classification from the DDR, which is recorded as X = [x1, x2, x3, ..., x t ,…,x L ], x t represents the tth sample data, L is the length of the sample data; then the sample data X is input into the gated recurrent unit network; (3.3), initialize t = 1, and take the sample data x t Input to the first GRU layer and calculate the output r of the forget gate t : r t =sigmoid([x t ,h t-1 ]·W r +B r ) in, represents the memory value of the first GRU layer after t-1 iterations, and its initial memory value is all 0; N is the matrix dimension, and sigmoid(·) represents the activation function; (3.4) Calculate the output z of the update gate t : z t =sigmoid([x t ,h t-1 ]·W z +B z ) (3.5) Calculate the output of the candidate hidden state Among them, tanh(·) represents the activation function; (3.6) Calculate the memory value h of the first GRU layer after t iterations t : (3.7), the output h of the first GRU layer t As the input of the second GRU layer, that is, x t =h t Then, follow steps (3.3) to (3.6) to complete the calculation of the second GRU layer and obtain the memory value h output by the second GRU layer. t ; (3.8), traverse the sampled data X = [x1, x2, x3, ..., x t ,…,x L ], and finally get the memory value h output by the second GRU layer after the Lth iteration L ; (3.9), h L As the input of the fully connected layer, a set of probability vectors of length M is obtained through the fully connected layer Indicates the probability value that the signal to be tested belongs to the mth type of anomaly; H fc =h L ·W fc +B fc (3.10), the probability vector Input to the comparison layer, output vector The maximum probability value is obtained, and the abnormal type corresponding to the maximum probability value is taken as the abnormal classification result of the signal to be tested.

4. The abnormal signal classification method of the intelligent oscilloscope according to claim 3, characterized in that: The sigmoid function and the tanh function both implement nonlinear activation in a way that the storage is allocated according to the slope size. The specific activation process is: (4.1), sigmoid function activation; According to the slope value, the input is divided into four intervals: -1 to 0 and 0 to 1, -2 to -1 and 1 to 2, -4 to -2 and 2 to 4, -8 to -4 and 4 to 8; In the data input to the sigmoid function, 1 bit of sign bit, m bits of integer bit, and n bits of decimal bit are taken to form the sampling data; the interval of the m bit integer bit of the sampling data is determined: When the m bit integer is between -1 and 0, 0 and 1, that is, when the integer is 111, 000, the integer 111 is modified to 01 and 000 is modified to 10, and then combined with the n bit decimal place, and the combined result is activated and output through the sigmoid function; When the m bit integer is between -2 and -1, 1 and 2, that is, when the integer is 110, 001, the integer 110 is modified to 001, 001 to 110, and then combined with the (n-1) bit decimal place, and the combined result is activated and output through the sigmoid function; When the m bit integer is between -4 and -2, 2 and 4, that is, when the integer is 100 to 101, 010 to 011, the integers 100 to 101 are modified to 0001, 010 to 011 are modified to 1110, and then combined with the (n-2) bit decimal place, and the combined result is activated and output through the sigmoid function; When the m bit integer is between -8 and -4, 4 and 8, that is, when the integer is 000 to 011, 100 to 111, the integer 000 to 011 is modified to 0000, 100 to 111 is modified to 1111, and then combined with the (n-3) bit decimal place, and the combined result is activated and output through the sigmoid function; When the m bit integer is less than -8 or greater than 8, it is directly output as 1 without sigmoid function activation; (4.2), tanh function activation; The processing method of the tanh function is the same as that of the sigmoid function, and the activation processing is performed in intervals according to step (4.1).

5. The abnormal signal classification method of the intelligent oscilloscope according to claim 3, characterized in that: The cumulative calculations in the matrix operations of the forget gate, update gate, and candidate hidden states all use parameterized addition trees, and the specific process is as follows: (5.1) The specific process of the accumulation calculation in the matrix operation of the forget gate is: (5.1.1) Set the initial value of accumulation T0; <h2 style=";text-align:left;direction:ltr">[x<h2 style=";text-align:left;direction:ltr"> t <h2 style=";text-align:left;direction:ltr"> ,h<h2 style=";text-align:left;direction:ltr"> t-1 <h2 style=";text-align:left;direction:ltr"> ]·W<h2 style=";text-align:left;direction:ltr"> r(:,1) <h2 style=";text-align:left;direction:ltr"> (S1,S2,S3,…,S)<h2 style=";text-align:left;direction:ltr"> N+1 <h2 style=";text-align:left;direction:ltr"> ] Among them, W r(:,1) Represents the weight matrix W r The first column of Let A0=N+1,T0=[S1,S2,S3,…,S N+1 ], then the initial value T0 is expressed as (5.1.2) Calculate the first addition result T1: (5.1.3) Determine the dimension A1 of T1: (5.1.4) Let A0 = A1, T0 = T1, and then repeat steps (5.1.2) to (5.1.3) until A1 = 1, and obtain the final accumulated result T1; (5.2) Similarly, follow step (5.1) to complete the cumulative calculation in the matrix operation of the update gate and candidate hidden state.

6. The abnormal signal classification method of the intelligent oscilloscope according to claim 3, characterized in that: The accumulation calculation in the matrix operation of the fully connected layer adopts a pipeline processing method that eliminates the correlation of the addition results. The specific processing process is: (6.1) Let the input h of the fully connected layer be L for: represents the tth memory element; (6.2), let the fully connected layer weight matrix W fc for: (6.3), initialize t = 1, and calculate through the three-clock multiplier and After three clock cycles, we get the array y. t =[y (t,1) ,y (t,2) ,…,y (t,M) ]; (6.4) Determine whether there is a cumulative result c of the three-clock adder t , if there is c t , then c t and t Input to the three-clock adder; otherwise, determine whether there is only one set of y t , if there is only one set of y t , then let y t Enter the waiting state; otherwise, the two sets of output y of the three-clock multiplier are output t ,y t-1 Input to the three-clock adder, and get the accumulated result c after three clock cycles. t ; (6.5) Let t = t + 1. If t ≤ N, repeat steps (6.3) to (6.4). Otherwise, check whether the three-clock adder is still calculating. If it is still calculating, c t Enter the waiting state, waiting for c t The next calculation result c t+1 , and then c t and c t+1 Continue to add as the input of the three-clock adder, and then repeat step (6.5); if the calculation is stopped, the accumulated result c of the three-clock adder is t as the result of the operation.

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