Method, device, equipment and medium for improving communication security of power supply digital controller

Abstract

The invention discloses a method, a device, equipment and a medium for improving communication security of a power supply digital controller. The method comprises the following steps of: controlling a CPLD (Complex Programmable Logic Device) to close I2C / SMBus communication between a BMC (Baseboard Management Controller) and the power supply digital controller; a notification signal is sent to the CPLD through a GPIO port of the BMC; the CPLD activates I2C / SMBus communication between the BMC and the power supply digital controller according to the received notification signal, so that the BMC can perform read-write operation on the power supply digital controller through the I2C / SMBus; after completing the read-write operation, the BMC sends a completion signal to the CPLD through the GPIO port again; and the CPLD closes the I2C / SMBus communication between the BMC and the power supply digital controller according to the received completion signal. Compared with the prior art, the I2C / SMBUS switch is added between the BMC and the VRM, when the BMC needs to perform read-write operation on the VRM, the CPLD is notified to turn on the signal switch through the GPIO, and the CPLD is notified to close the I2C / SMUBS channel after information is acquired, so that hackers are prevented from acquiring the control right of I2C through a BMC network port, maliciously tampering the data of the VRM and causing damage and even burning of a mainboard.

Description

Technical Field

[0001] The present invention relates to the field of communication security technology, and in particular to a method, device, equipment and medium for improving the communication security of a power digital controller. Background Art

[0002] In the current server PCBA design, the power digital controller VRM is commonly used, and the BMC burns the VR FW of the power digital controller through I2C, and reads the status, such as output voltage / temperature / fault information, etc. However, since the main function of the BMC is the management port, it has a network port, and since the I2C / SMBUS channel from the BMC to the power digital controller is always connected, there are certain security risks: hackers can maliciously tamper with the content of the power digital controller through the BMC network port and I2C control, which may cause the server to crash at the least, or even cause irreversible damage and burning of the motherboard at the worst. Summary of the invention

[0003] The purpose of the present invention is to provide a method, device, equipment and medium for improving the communication security of a power digital controller, aiming to solve the technical problem that there are communication loopholes in the prior art, and hackers may obtain the I2C controller through the network port of the BMC and maliciously tamper with the content in the power digital controller, causing irreversible damage or even burning of the motherboard.

[0004] In order to solve the above technical problems, the purpose of the present invention is achieved through the following technical solutions:

[0005] A first aspect of the present application provides a method for improving communication security of a power digital controller, the method comprising:

[0006] Control CPLD to shut down I2C / SMBus communication between BMC and power digital controller;

[0007] Send a notification signal to CPLD through the GPIO port of BMC;

[0008] The CPLD activates the I2C / SMBus communication between the BMC and the power digital controller according to the received notification signal, so that the BMC can perform read and write operations on the power digital controller through the I2C / SMBus;

[0009] After the BMC completes the read and write operations, it sends a completion signal to the CPLD through the GPIO port again;

[0010] The CPLD closes the I2C / SMBus communication between the BMC and the power digital controller according to the received completion signal.

[0011] In a possible implementation, the method further includes:

[0012] Before the BMC sends a notification signal to the CPLD through the GPIO port, the BMC performs an authentication step to verify the legitimacy of the entity requesting I2C / SMBus communication;

[0013] If the identity authentication fails, the BMC does not send a notification signal and records an identity authentication failure event.

[0014] In a possible implementation, controlling the CPLD to close the I2C / SMBus communication between the BMC and the power digital controller includes:

[0015] Ensure that the hardware connections between BMC, CPLD and power digital controller are correct;

[0016] Perform logic design by configuring the logic circuits or registers inside the CPLD;

[0017] According to the preset logic, when the control system is powered on or reset, the CPLD closes the I2C / SMBus communication between the BMC and the power digital controller by default.

[0018] In a possible implementation, the CPLD activates the I2C / SMBus communication between the BMC and the power digital controller according to the received notification signal, so that the BMC can perform read and write operations on the power digital controller through the I2C / SMBus, including:

[0019] Set the initial state of the signal switch added in the I2C bus between the BMC and the power digital controller to off;

[0020] The CPLD identifies the notification signal received from the BMC and controls the opening of the signal switch, thereby realizing the I2C / SMBus communication between the BMC and the power digital controller.

[0021] In a possible implementation, the CPLD identifies the notification signal received from the BMC to control the opening of the signal switch, thereby realizing the I2C / SMBus communication between the BMC and the power digital controller, including:

[0022] Identify the notification signal from the BMC received by the input port of the CPLD;

[0023] According to the logic preset in the CPLD, the CPLD responds to the identified signal;

[0024] If the identified signal level is high, the I2C / SMBus communication between the BMC and the power digital controller is turned on.

[0025] In a possible implementation, the CPLD closes the I2C / SMBus communication between the BMC and the power digital controller according to the received completion signal, including:

[0026] Identify the completion signal from the BMC received by the input port of the CPLD;

[0027] According to the logic preset in the CPLD, the CPLD responds to the identified signal;

[0028] If the recognized signal level is low, the I2C / SMBus communication between the BMC and the power digital controller is turned off.

[0029] In a possible implementation, the method further includes:

[0030] Between BMC and CPLD, an encrypted communication protocol is used to transmit notification signals and completion signals;

[0031] The GPIO interface and its connection lines are designed to be non-publicly accessible.

[0032] A second aspect of the present application provides a device for improving communication security of a power digital controller, the device comprising:

[0033] An initialization unit, used to control the CPLD to shut down the I2C / SMBus communication between the BMC and the power digital controller;

[0034] A notification signal sending unit, used for sending a notification signal to the CPLD through the GPIO port of the BMC;

[0035] The signal processing unit 1 is used for the CPLD to activate the I2C / SMBus communication between the BMC and the power digital controller according to the received notification signal, so that the BMC can perform read and write operations on the power digital controller through the I2C / SMBus;

[0036] The completion signal sending unit is used to send a completion signal to the CPLD through the GPIO port again after the BMC completes the read and write operations;

[0037] The signal processing unit 2 is used for the CPLD to close the I2C / SMBus communication between the BMC and the power digital controller according to the received completion signal.

[0038] A third aspect of the present application provides a computer device, characterized in that the computer device includes a memory and a processor, the memory stores a computer program, and the processor implements the method described in the first aspect when executing the computer program.

[0039] A fourth aspect of the present application provides a computer-readable storage medium, wherein the storage medium stores a computer program, wherein the computer program includes program instructions, and when the program instructions are executed by a processor, the method described in the first aspect above can be implemented.

[0040] The beneficial effect of the present invention compared with the prior art is: the present invention provides a method for improving the communication security of the power digital controller, including: controlling the CPLD to close the I2C / SMBus communication between the BMC and the power digital controller; sending a notification signal to the CPLD through the GPIO port of the BMC; the CPLD activates the I2C / SMBus communication between the BMC and the power digital controller according to the received notification signal, so that the BMC can perform read and write operations on the power digital controller through the I2C / SMBus; after the BMC completes the read and write operations, it sends a completion signal to the CPLD again through the GPIO port; the CPLD closes the I2C / SMBus communication between the BMC and the power digital controller according to the received completion signal. Compared with the prior art, the present invention adds an I2C / SMBUS switch between the BMC and the power digital controller, closes the communication channel by default, and enhances communication security. When BMC needs to read and write the power digital controller normally, it notifies CPLD through GPIO to turn on the I2C / SMBUS switch for communication. After obtaining the information, it notifies CPLD to close the I2C / SMUBS channel, thereby preventing hackers from gaining control of I2C through the BMC network port and maliciously tampering with the data in the power digital controller, causing damage or even burning of the motherboard. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying any creative work.

[0042] Figure 1 A schematic diagram of the hardware framework structure of a device for improving communication security of a power digital controller provided by an embodiment of the present invention;

[0043] Figure 2 A circuit schematic diagram of a signal switch in a device for improving communication security of a power digital controller provided by an embodiment of the present invention;

[0044] Figure 3 Schematic diagram of a method for improving communication security of a power digital controller provided by an embodiment of the present invention Figure 1 ;

[0045] Figure 4Schematic diagram of a method for improving communication security of a power digital controller provided by an embodiment of the present invention Figure 2 ;

[0046] Figure 5 Schematic diagram of a method for improving communication security of a power digital controller provided by an embodiment of the present invention Figure 3 ;

[0047] Figure 6 Schematic diagram of a method for improving communication security of a power digital controller provided by an embodiment of the present invention Figure 4 ;

[0048] Figure 7 Schematic diagram of a method for improving communication security of a power digital controller provided by an embodiment of the present invention Figure 5 ;

[0049] Figure 8 Schematic diagram of a method for improving communication security of a power digital controller provided by an embodiment of the present invention Figure 6 ;

[0050] Fig. 9 Schematic diagram of a method for improving communication security of a power digital controller provided by an embodiment of the present invention Figure 7 ;

[0051] Fig.10 A schematic block diagram of a device for improving communication security of a power digital controller provided by an embodiment of the present invention;

[0052] Fig.11 A schematic block diagram of a computer device provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0053] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0054] It should be understood that when used in this specification and the appended claims, the terms "include" and "comprises" indicate the presence of described features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or combinations thereof.

[0055] It should also be understood that the terms used in this specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. As used in the specification of the present invention and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.

[0056] It should be further understood that the term "and / or" used in the present description and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0057] Embodiments of the present application provide a method, apparatus, device, and storage medium for improving communication security of a power digital controller.

[0058] The executor of the method for improving the communication security of the power digital controller may be the device for improving the communication security of the power digital controller provided in the embodiment of the present application, or a computer device integrating the device for improving the communication security of the power digital controller, wherein the device for improving the communication security of the power digital controller may be implemented in hardware or software, the computer device may be a terminal or a server, and the terminal may be a smart phone, a tablet computer, a PDA, or a laptop computer, etc.

[0059] Figure 1 Schematic diagram of the hardware framework structure for improving the communication security of the power digital controller provided by the embodiment of the present application. Figure 1 As shown, the hardware configuration includes: BMC (baseboard management controller), CPLD (complex programmable logic device), signal switch, VRM (power digital controller) and Device IC (integrated circuit device), BMC and CPLD are communicated and connected, CPLD controls the opening and closing of the signal switch, BMC and VRM are connected through the I2C bus, and the signal switch controls the I2C / SMUBS channel (where I2C is a two-wire serial bus used to connect a microcontroller and its peripherals, which only requires two bus lines: a serial data line (SDA) and a serial clock line (SCL); SMBus is an extension of I2C, mainly used for system management, such as power management, temperature monitoring, etc.) switch between the two, and VRM is electrically connected to Device IC.

[0060] Specifically, in this embodiment, the signal switch is a PCA9517 switch, and its circuit principle is as follows: Figure 2As shown, the I2C SCL pin of the BMC is connected to the SCL0 pin of the PCA9517 switch U60, the I2CSDA pin of the BMC is connected to the SDA0 pin of the PCA9517 switch U60, the SCL1 pin of the PCA9517 switch U60 is connected to the VR SCL pin of the VRM digital power controller, the SDA1 pin of the PCA9517 switch U60 is connected to the VR SDA pin of the VRM digital power controller, and the EN pin controlled by the CPLD is connected to the EN pin of the PCA9517 switch U60. When the BMC needs to read or write to the power digital controller, it sends a notification signal to the CPLD through the GPIO port. At this time, the EN pin controlled by the CPLD outputs a high level, and the channel from BMC_SCL to VR_SCL is opened; when the BMC completes the read and write operation, it sends a completion signal to the CPLD again through the GPIO port. At this time, the EN pin controlled by the CPLD outputs a low level, and the channel from BMC_SCL to VR_SCL is closed. By introducing the PCA9517 switch and controlling its switch state by the CPLD, the communication channel between the BMC and the VRM can be effectively controlled. This control mechanism can prevent unauthorized access and potential communication interference, thereby improving the security and reliability of the entire system.

[0061] Figure 3 This is a flow chart of a method for improving communication security of a power digital controller provided in an embodiment of the present application. Figure 1 .like Figure 3 As shown, the method includes the following steps S110-S150.

[0062] S110, controlling CPLD to close the I2C / SMBus communication between BMC and the power digital controller;

[0063] Specifically, in the system initial state or under certain conditions, the CPLD closes the I2C / SMBus communication between the BMC and the power digital controller by default to ensure the security of the communication.

[0064] S120, sending a notification signal to the CPLD through the GPIO port of the BMC;

[0065] Specifically, when the BMC needs to perform a read or write operation on the power digital controller, it first sends a notification signal to the CPLD through the GPIO port. The notification signal is a high level or low level signal, depending on the system design and the programming logic of the CPLD.

[0066] S130, the CPLD activates the I2C / SMBus communication between the BMC and the power digital controller according to the received notification signal, so that the BMC can perform read and write operations on the power digital controller through the I2C / SMBus;

[0067] Specifically, after receiving the notification signal sent by the BMC, the CPLD parses the signal and activates the I2C / SMBus communication between the BMC and the power digital controller according to the preset logic. This involves configuring the logic circuit or register inside the CPLD to allow the I2C / SMBus signal to be transmitted between the BMC and the power digital controller. After the I2C / SMBus communication is activated, the BMC can perform read and write operations on the power digital controller through the interface, which includes the BMC burning VRFW on the power digital controller and status reading, such as output voltage / temperature / fault information.

[0068] S140, after the BMC completes the read and write operations, it sends a completion signal to the CPLD through the GPIO port again;

[0069] Specifically, once the BMC completes the read and write operations on the power digital controller, it again sends a completion signal to the CPLD through the GPIO port. The completion signal is also a high level or low level signal, used to indicate that the operation has been completed.

[0070] S150. The CPLD closes the I2C / SMBus communication between the BMC and the power digital controller according to the received completion signal.

[0071] Specifically, after receiving the completion signal sent by the BMC, the CPLD parses the signal and closes the I2C / SMBus communication between the BMC and the power digital controller according to a preset logic, thereby helping to prevent illegal operations and improve the security of communication.

[0072] like Figure 4 As shown, in another embodiment, it further specifically includes executing steps S210-S220.

[0073] S210, before the BMC sends a notification signal to the CPLD through the GPIO port, the BMC performs an identity authentication step to verify the legitimacy of the entity requesting I2C / SMBus communication;

[0074] Specifically, the BMC receives a request from an entity (internal component, external device, or software process) that wishes to establish I2C / SMBus communications. Before responding to this request, the BMC first performs an authentication procedure, which includes checking the digital signature, certificate, password, or other authentication information of the requesting entity. The authentication procedure is based on predefined rules, policies, or algorithms that are stored in the BMC's firmware, hardware, or secure storage connected to it. If the requesting entity provides valid authentication information and this information matches the information stored in the BMC, the authentication is successful.

[0075] S220: If the identity authentication fails, the BMC does not send a notification signal and records an identity authentication failure event.

[0076] Specifically, if in step S210, the authentication information of the requesting entity is invalid or cannot match the information stored in the BMC, the authentication fails. Once the authentication fails, the BMC will not send a notification signal to the CPLD through the GPIO port, thereby preventing the establishment of I2C / SMBus communication. At the same time, the BMC will record an authentication failure event, which includes the time of failure, the entity identifier of the failure, the reason for the failure (such as invalid digital signature, certificate expiration, etc.) and other relevant information. The recorded authentication failure event can be used for subsequent security audits, troubleshooting or system optimization.

[0077] like Figure 5 As shown, in a more specific embodiment, executing step S110 further specifically includes executing steps S111-S113.

[0078] S111. Ensure that the hardware connections between BMC, CPLD and power digital controller are correct;

[0079] S112, performing logic design by configuring the logic circuit or register inside the CPLD;

[0080] S113. According to the preset logic, when the control system is powered on or reset, the CPLD closes the I2C / SMBus communication between the BMC and the power digital controller by default.

[0081] Specifically, through the above steps, it can be ensured that the hardware connection between the BMC, CPLD and the power digital controller is correct, and the required logic design is implemented by configuring the logic circuit or register inside the CPLD. At the same time, according to the preset logic control system, the I2C / SMBus communication between the BMC and the power digital controller is turned off when power is turned on or reset.

[0082] like Figure 6 As shown, in a more specific embodiment, executing step S130 further specifically includes executing steps S131-S132.

[0083] S131, setting the initial state of the signal switch added in the I2C bus between the BMC and the power digital controller to off;

[0084] S132 , the CPLD identifies the notification signal received from the BMC to control the opening of the signal switch, thereby realizing I2C / SMBus communication between the BMC and the power digital controller.

[0085] Specifically, the signal switch in this embodiment is a PCA9517 switch, which is connected in series on the I2C bus between the BMC and the power digital controller to ensure that the signal path is correct. Connect the control pin of the signal switch to a controllable output pin of the CPLD so that the switch can be turned on and off by the CPLD. In the configuration of the CPLD, the pin output of the control signal switch is set to a low level by default to ensure that the signal switch is in a closed state when the system is powered on or reset; design a logic circuit in the CPLD to identify specific notification signals (such as interrupt signals, state change signals, etc.) received from the BMC. When the notification signal is recognized, the CPLD controls the output pin to output a high level, thereby turning on the signal switch.

[0086] like Figure 7 As shown, in a more specific embodiment, executing step S133 further specifically includes executing steps S1331-S1333.

[0087] S1331, identifying a notification signal from the BMC received by the input port of the CPLD;

[0088] S1332, according to the logic preset in the CPLD, the CPLD responds to the identified signal;

[0089] S1333: If the identified signal level is high, the I2C / SMBus communication between the BMC and the power digital controller is turned on.

[0090] like Figure 8 As shown, in a more specific embodiment, executing step S150 further specifically includes executing steps S151-S153:

[0091] S151, identifying the completion signal from the BMC received by the input port of the CPLD;

[0092] S152, according to the logic preset in the CPLD, the CPLD responds to the identified signal;

[0093] S153: If the recognized signal level is low, the I2C / SMBus communication between the BMC and the power digital controller is turned off.

[0094] like Fig. 9 As shown, in a more specific embodiment, it also includes executing steps S310-S320:

[0095] S310, between the BMC and the CPLD, using an encrypted communication protocol to transmit a notification signal and a completion signal;

[0096] Specifically, this embodiment selects an encrypted communication protocol, such as TLS (Transport Layer Security), SSL (Secure Sockets Layer) or a simplified version thereof, which can provide encryption, authentication and data integrity protection for both communicating parties. The parameters required for encrypted communication, such as encryption algorithm, key management, session establishment, etc., are configured on the communication interface of BMC and CPLD. For the hardware encryption module, it is necessary to ensure that it is correctly connected to BMC and CPLD, and configure the corresponding driver and interface library; write or integrate the encrypted communication module to realize the transmission of encryption notification signals and completion signals between BMC and CPLD, and ensure that the encrypted communication module can correctly identify and process encrypted data packets, including decrypting received data, encrypting sent data, and verifying the integrity of data.

[0097] S320, designing the GPIO interface and its connection lines to be in a non-public access state;

[0098] Specifically, the GPIO interface and its connection lines are encapsulated in a specific hardware module or component to ensure that they cannot be directly accessed from the outside; physical means such as shielding covers and sealants are used to protect the GPIO interface and its connection lines to prevent physical attacks or tampering. At the software level, access to the GPIO interface is strictly controlled to ensure that only authorized entities can access and operate the GPIO interface, and the access log recording function is implemented to track and audit the access and operation history of the GPIO interface.

[0099] Furthermore, by establishing a strict permission management mechanism, the entities that can access and operate the GPIO interface are authenticated and authorized; using authentication methods such as digital certificates, passwords or biometrics to ensure that only legitimate entities can access and operate the GPIO interface. For the use of encrypted communication protocols, implement key management strategies, including key generation, distribution, storage and update, to ensure the secure storage and transmission of keys and prevent key leakage or tampering.

[0100] Fig.10 is a schematic block diagram of a device for improving communication security of a power digital controller provided by an embodiment of the present application. Fig.10 As shown, corresponding to the above method for improving the communication security of the power digital controller, the present application also provides a device 200 for improving the communication security of the power digital controller. The device 200 for improving the communication security of the power digital controller includes a unit for executing the above method for improving the communication security of the power digital controller, and the device can be configured in a desktop computer, a tablet computer, a laptop, or other terminals.

[0101] Specifically, see Fig.10 The device 200 for improving communication security of a power digital controller includes:

[0102] Initialization unit 210, used for controlling CPLD to close I2C / SMBus communication between BMC and power digital controller;

[0103] A notification signal sending unit 220, configured to send a notification signal to the CPLD via a GPIO port of the BMC;

[0104] The signal processing unit 230 is used for the CPLD to activate the I2C / SMBus communication between the BMC and the power digital controller according to the received notification signal, so that the BMC can perform read and write operations on the power digital controller through the I2C / SMBus;

[0105] The completion signal sending unit 240 is used to send a completion signal to the CPLD again through the GPIO port after the BMC completes the read and write operations;

[0106] The signal processing unit 250 is used for the CPLD to close the I2C / SMBus communication between the BMC and the power digital controller according to the received completion signal.

[0107] Specifically, the device 200 for improving communication security of a power digital controller further includes:

[0108] Authentication unit: used for BMC to perform authentication steps to verify the legitimacy of the entity requesting I2C / SMBus communication before BMC sends a notification signal to CPLD through the GPIO port; if the authentication fails, BMC does not send a notification signal and records an authentication failure event.

[0109] Encryption unit: used to transmit notification signals and completion signals between BMC and CPLD using encrypted communication protocol;

[0110] The GPIO interface and its connection lines are designed to be non-publicly accessible.

[0111] In addition, more specifically, the initialization unit 210 is specifically used to: ensure that the hardware connection between the BMC, CPLD and the power digital controller is correct; perform logic design by configuring the logic circuit or register inside the CPLD; according to the preset logic, when the control system is powered on or reset, the CPLD defaults to closing the I2C / SMBus communication between the BMC and the power digital controller.

[0112] The signal processing unit 230 is specifically used for: setting the initial state of the signal switch added in the I2C bus between the BMC and the power digital controller to off; controlling the opening of the signal switch by identifying the notification signal received from the BMC through the CPLD, thereby realizing the I2C / SMBus communication between the BMC and the power digital controller; identifying the notification signal from the BMC received by the input port of the CPLD; according to the preset logic in the CPLD, the CPLD responds to the identified signal; if the identified signal level is high, the I2C / SMBus communication between the BMC and the power digital controller is turned on.

[0113] The signal processing unit 250 is specifically used for: identifying the completion signal received by the input port of the CPLD from the BMC; according to the preset logic in the CPLD, the CPLD responds to the identified signal; if the identified signal level is low, the I2C / SMBus communication between the BMC and the power digital controller is closed.

[0114] It should be noted that technicians in the relevant field can clearly understand that the specific implementation process of the above-mentioned device for improving the communication security of the power digital controller and each unit can refer to the corresponding description in the aforementioned method embodiment, and for the convenience and conciseness of the description, it will not be repeated here.

[0115] The above-mentioned device 200 for improving the communication security of the power digital controller can be implemented in the form of a computer program. The computer program can be used in Fig.11 Runs on the computer device shown.

[0116] See also Fig.11 , Fig.11 300 is a schematic block diagram of a computer device provided in an embodiment of the present application. The computer device 300 may be a terminal or a server, wherein the terminal may be an electronic device with communication functions such as a smart phone, a tablet computer, a laptop computer, a desktop computer, a personal digital assistant, and a wearable device. The server may be an independent server or a server cluster composed of multiple servers.

[0117] See also Fig.11 The computer device 300 includes a processor 302 , a memory and a network interface 305 connected via a system bus 301 , wherein the memory may include a non-volatile storage medium 303 and an internal memory 304 .

[0118] The non-volatile storage medium 303 can store an operating system 3031 and a computer program 3032. The computer program 3032 includes program instructions, and when the program instructions are executed, the processor 302 can execute a method for improving communication security of a power digital controller.

[0119] The processor 302 is used to provide computing and control capabilities to support the operation of the entire computer device 300 .

[0120] The internal memory 304 provides an environment for the operation of the computer program 3032 in the non-volatile storage medium 303. When the computer program 3032 is executed by the processor 302, the processor 302 can execute a method for improving the communication security of the power digital controller.

[0121] The network interface 305 is used to communicate with other devices over the network. Fig.11 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device 300 to which the solution of the present application is applied. The specific computer device 300 may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0122] It should be understood that in the embodiment of the present application, the processor 302 may be a central processing unit (CPU), and the processor 302 may also be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. Among them, the general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc.

[0123] It can be understood by those skilled in the art that all or part of the processes in the method for implementing the above embodiment can be completed by instructing the relevant hardware through a computer program. The computer program includes program instructions, and the computer program can be stored in a storage medium, which is a computer-readable storage medium. The program instructions are executed by at least one processor in the computer system to implement the process steps of the embodiment of the above method.

[0124] Therefore, the present application also provides a storage medium. The storage medium may be a computer-readable storage medium. The storage medium stores a computer program, wherein the computer program includes program instructions. When the program instructions are executed by a processor, the processor executes the following steps:

[0125] S110, controlling CPLD to close the I2C / SMBus communication between BMC and the power digital controller;

[0126] S120, sending a notification signal to the CPLD through the GPIO port of the BMC;

[0127] S130, the CPLD activates the I2C / SMBus communication between the BMC and the power digital controller according to the received notification signal, so that the BMC can perform read and write operations on the power digital controller through the I2C / SMBus;

[0128] S140, after the BMC completes the read and write operations, it sends a completion signal to the CPLD through the GPIO port again;

[0129] S150. The CPLD closes the I2C / SMBus communication between the BMC and the power digital controller according to the received completion signal.

[0130] The storage medium may be any computer-readable storage medium that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a magnetic disk, or an optical disk.

[0131] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in terms of function in the above description. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0132] In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of each unit is only a logical function division, and there may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed.

[0133] The steps in the method of the embodiment of the present application can be adjusted in order, combined and deleted according to actual needs. The units in the device of the embodiment of the present application can be combined, divided and deleted according to actual needs. In addition, the functional units in the various embodiments of the present application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0134] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, terminal, or network device, etc.) to perform all or part of the steps of the methods of each embodiment of the present application.

[0135] The above are only specific implementations of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in the present application, and these modifications or replacements should be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.

Claims

1. A method for improving communication security of a power digital controller, characterized in that: The method comprises: Control CPLD to shut down I2C / SMBus communication between BMC and power digital controller; Send a notification signal to CPLD through the GPIO port of BMC; The CPLD activates the I2C / SMBus communication between the BMC and the power digital controller according to the received notification signal, so that the BMC can perform read and write operations on the power digital controller through the I2C / SMBus; After the BMC completes the read and write operations, it sends a completion signal to the CPLD through the GPIO port again; The CPLD closes the I2C / SMBus communication between the BMC and the power digital controller according to the received completion signal.

2. The method for improving communication security of a power digital controller according to claim 1, characterized in that: Also includes: Before the BMC sends a notification signal to the CPLD through the GPIO port, the BMC performs an authentication step to verify the legitimacy of the entity requesting I2C / SMBus communication; If the identity authentication fails, the BMC does not send a notification signal and records an identity authentication failure event.

3. The method for improving communication security of a power digital controller according to claim 1, characterized in that: The controlling CPLD to close the I2C / SMBus communication between the BMC and the power digital controller includes: Ensure that the hardware connections between BMC, CPLD and power digital controller are correct; Perform logic design by configuring the logic circuits or registers inside the CPLD; According to the preset logic, when the control system is powered on or reset, the CPLD closes the I2C / SMBus communication between the BMC and the power digital controller by default.

4. The method for improving communication security of a power digital controller according to claim 1, characterized in that: The CPLD activates the I2C / SMBus communication between the BMC and the power digital controller according to the received notification signal, so that the BMC can perform read and write operations on the power digital controller through the I2C / SMBus, including: Set the initial state of the signal switch added in the I2C bus between the BMC and the power digital controller to off; The CPLD identifies the notification signal received from the BMC and controls the opening of the signal switch, thereby realizing the I2C / SMBus communication between the BMC and the power digital controller.

5. The method for improving communication security of a power digital controller according to claim 4, characterized in that: The method of controlling the opening of a signal switch by identifying a notification signal received from the BMC through the CPLD, thereby realizing I2C / SMBus communication between the BMC and the power digital controller, includes: Identify the notification signal from the BMC received by the input port of the CPLD; According to the logic preset in the CPLD, the CPLD responds to the identified signal; If the identified signal level is high, the I2C / SMBus communication between the BMC and the power digital controller is turned on.

6. The method for improving communication security of a power digital controller according to claim 1, characterized in that: The CPLD closes the I2C / SMBus communication between the BMC and the power digital controller according to the received completion signal, including: Identify the completion signal from the BMC received by the input port of the CPLD; According to the logic preset in the CPLD, the CPLD responds to the identified signal; If the recognized signal level is low, the I2C / SMBus communication between the BMC and the power digital controller is turned off.

7. The method for improving communication security of a power digital controller according to any one of claims 1 to 6, characterized in that: Also includes: Between BMC and CPLD, an encrypted communication protocol is used to transmit notification signals and completion signals; The GPIO interface and its connection lines are designed to be non-publicly accessible.

8. A device for improving communication security of a power digital controller, characterized in that: The device comprises: An initialization unit, used to control the CPLD to shut down the I2C / SMBus communication between the BMC and the power digital controller; A notification signal sending unit, used for sending a notification signal to the CPLD through the GPIO port of the BMC; The signal processing unit 1 is used for the CPLD to activate the I2C / SMBus communication between the BMC and the power digital controller according to the received notification signal, so that the BMC can perform read and write operations on the power digital controller through the I2C / SMBus; The completion signal sending unit is used to send a completion signal to the CPLD through the GPIO port again after the BMC completes the read and write operations; The signal processing unit 2 is used for the CPLD to close the I2C / SMBus communication between the BMC and the power digital controller according to the received completion signal.

9. A computer device, characterized in that: The computer device includes a memory and a processor, the memory stores a computer program, and the processor implements the method according to any one of claims 1 to 7 when executing the computer program.

10. A computer-readable storage medium, characterized in that: The storage medium stores a computer program, wherein the computer program includes program instructions, and when the program instructions are executed by a processor, the method according to any one of claims 1 to 7 can be implemented.

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