Groove type Schottky diode and preparation method thereof

Abstract

The invention provides a groove type Schottky diode and a preparation method thereof. The groove type Schottky diode comprises a first conductive type substrate and an epitaxial layer, wherein the epitaxial layer is of a first conductive type; the plurality of groove structures are positioned in the epitaxial layer and extend towards one side of the first conductive type substrate; the second conductive type doped region is located in the epitaxial layer and is adjacent to the plurality of groove structures; the dielectric layer is located on the side, away from the first conductive type substrate, of the epitaxial layer, covers the groove structure and at least partially exposes the second conductive type doped region; the Schottky metal layer is located on the side, away from the epitaxial layer, of the dielectric layer and forms ohmic contact with the second conduction type doped region. The groove type Schottky diode has the advantages of strong conduction characteristic, low conduction voltage drop, uniform distribution of fringe electric field and better breakdown characteristic.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular, to a trench Schottky diode and a method for preparing the same. Background Art

[0002] In the field of semiconductor technology, trench Schottky structure diodes are widely used in fields with high energy consumption due to their low leakage, low forward conduction voltage drop, and low power consumption. Since Schottky diodes only involve majority carriers (electrons) and no minority carriers (holes), the conduction of the diode stops very quickly when reverse biased, and changes to blocking the flow of current, showing a very fast response. Unlike the planar Schottky diode process, the trench Schottky diode introduces a MOS trench structure, which can improve the reverse blocking characteristics of the Schottky diode and reduce the reverse leakage current, so that it can perform better in high-voltage and high-frequency applications.

[0003] At the same time, due to the trench structure of the trench Schottky diode, the effective conductive area is smaller. Therefore, under high current conditions, the current density is high, and the increase in the on-state voltage drop will be more obvious, and the performance of high-voltage products is more significant. Under high current conditions, the high on-state voltage drop leads to higher losses. Therefore, the current trench Schottky diode and its preparation method still need to be improved. Summary of the invention

[0004] The present application aims to provide a trench Schottky diode and a preparation method thereof, and adjusts the P-type doping region structure of the traditional trench Schottky diode to connect a PN structure in parallel to the terminal of the Schottky diode, so that a more significant hole injection effect can occur when the voltage drop is greater than 0.7V, so that the conduction characteristics are enhanced and the conduction voltage drop is significantly reduced. At the same time, the P region can also optimize the edge electric field through reasonable design, which is also helpful to improve the breakdown characteristics of the product.

[0005] In one aspect of the present application, the present application proposes a trench Schottky diode. The trench Schottky diode comprises: a first conductive type substrate, the first conductive type substrate having a front side and a back side; an epitaxial layer, the epitaxial layer is located on the front side of the first conductive type substrate, and the epitaxial layer is of the first conductive type; a plurality of trench structures, the plurality of trench structures are located in the epitaxial layer and extend toward one side of the first conductive type substrate, and the plurality of trench structures are arranged at intervals; a second conductive type doped region, the second conductive type doped region is located in the epitaxial layer and is arranged adjacent to the plurality of trench structures; a dielectric layer, the dielectric layer is located on the side of the epitaxial layer away from the first conductive type substrate, covers the trench structure, and at least partially exposes the second conductive type doped region; a Schottky metal layer, the Schottky metal layer is located on the side of the dielectric layer away from the epitaxial layer, and forms an ohmic contact with the second conductive type doped region. The trench Schottky diode has a strong conduction characteristic, a low conduction voltage drop, a more uniform distribution of the edge electric field, and a better product breakdown characteristic.

[0006] According to an embodiment of the present application, the first conductivity type is N-type, and the second conductivity type is P-type.

[0007] According to an embodiment of the present application, the width a of the second conductive type doping region is 5-30 microns.

[0008] According to an embodiment of the present application, a distance b between the second conductive type doping region and a trench structure closest thereto is 3-20 microns.

[0009] According to an embodiment of the present application, the depth e of the trench structure and the depth d of the second conductive type doping region satisfy:

[0010] 0.5×e <d<1.5×e。

[0011] According to an embodiment of the present application, a depth e of the trench structure is greater than a depth d of the second conductive type doping region.

[0012] According to an embodiment of the present application, the trench Schottky diode further includes: a front metal electrode layer, which is located on the Schottky metal layer; and a back metal electrode layer, which is located on a side of the first conductive type substrate away from the epitaxial layer.

[0013] In another aspect of the present application, the present application proposes a method for preparing the trench-type Schottky diode described above, the method comprising: providing a first conductive type substrate having an epitaxial layer, the epitaxial layer being of the first conductive type; forming a plurality of grooves on the epitaxial layer, and sequentially forming a gate oxide layer and a polysilicon conductive layer in the grooves to form a plurality of trench structures; depositing an isolation dielectric layer, and etching the isolation dielectric layer to form an opening to expose at least a portion of the epitaxial layer; performing a second type of doping treatment on the epitaxial layer at the opening to form a second conductive type doped region; depositing a Schottky metal layer, and forming an ohmic contact between the Schottky metal layer and the second conductive type doped region.

[0014] According to an embodiment of the present application, forming the groove includes: forming an oxide barrier layer on the epitaxial layer, coating a photoresist, and after exposure processing, using dry etching to form the groove.

[0015] According to an embodiment of the present application, forming the polysilicon conductive layer includes: depositing polysilicon on the gate oxide layer in the groove and ensuring that the inside of the groove is completely filled with polysilicon, and removing part of the surface polysilicon by dry etching so that the polysilicon interface is lower than the top of the groove.

[0016] The above summary is for the purpose of description only and is not intended to be limiting in any way. In addition to the illustrative aspects, embodiments and features described above, further aspects, embodiments and features of the present application will be readily apparent through the following detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 A schematic diagram of the structure of a trench Schottky diode according to an embodiment of the present application;

[0018] Figure 2 The device bottom electric field simulation test result of comparative example 1 of the present application;

[0019] Figure 3 The device bottom electric field simulation test result of Example 1 of the present application;

[0020] Figure 4 The device on-state voltage drop test curves of Example 1 and Comparative Example 1 of the present application. DETAILED DESCRIPTION

[0021] The following embodiments of the technical solution of the present application are described in detail in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present application, and are therefore only used as examples, and cannot be used to limit the scope of protection of the present application.

[0022] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by technicians in the technical field to which this application belongs; the terms used herein are only for the purpose of describing specific embodiments and are not intended to limit this application; the terms "including" and "having" in the specification and claims of this application and the above-mentioned figure descriptions and any variations thereof are intended to cover non-exclusive inclusions.

[0023] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0024] In the description of the embodiments of the present application, the term "and / or" is only a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists, A and B exist at the same time, and B exists. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0025] In one aspect of the present application, the present application proposes a trench Schottky diode. A Schottky diode is a special semiconductor diode, the core of which is a metal-semiconductor (MS) junction composed of a metal electrode and an N-type semiconductor material. And because N-type doping has a higher electron mobility than P-type doping, the substrate material usually selects an "N+ type" substrate to ensure a lower series resistance and prevent substrate impurities from entering the epitaxial layer. The epitaxial layer is grown on the substrate, and the device characteristics of the diode formed can be adjusted by adjusting the thickness and doping concentration. The upper surface of the epitaxial layer contacts the metal anode to form a Schottky barrier contact to form a rectifying junction. As mentioned above, the Schottky diode stops conducting very quickly when reverse biased, so it is widely used in high-frequency and fast switching applications. In some related technologies, the device characteristics can also be adjusted by setting a trench structure in the epitaxial layer, and the effective junction area is increased by forming a trench on the surface of the epitaxial layer to improve the performance of the device.

[0026] According to the embodiments of the present application, the trench Schottky diode proposed in the present application further improves the performance of the trench Schottky diode by improving the structure of the P-type doping region. Figure 1The trench-type Schottky diode comprises a first conductive type substrate 100, wherein the first conductive type substrate 100 has a front side and a back side. An epitaxial layer 110 is provided on the front side of the first conductive type substrate 100, and the epitaxial layer 110 may be of the first conductive type. A plurality of trench structures are located in the epitaxial layer and extend toward one side of the first conductive type substrate, and the plurality of trench structures are arranged at intervals. The trench may be filled with a gate oxide layer 210 and a polysilicon conductive layer 220, and the gate oxide layer 210 and the polysilicon conductive layer 220 together constitute a structure. A second conductive type doped region 30 is located in the epitaxial layer 110 and is adjacent to the plurality of trench structures. A dielectric layer 310 is located on a side of the epitaxial layer 110 away from the first conductive type substrate, covers the trench structure, and at least partially exposes the second conductive type doped region 30. A Schottky metal layer 320 is located on a side of the dielectric layer 310 away from the epitaxial layer 110, and forms an ohmic contact with the second conductive type doped region 30.

[0027] Specifically, the forward conduction characteristic of the Schottky diode can satisfy the following relationship:

[0028]

[0029] Among them, V F is the on-state voltage drop, Rs is the contact resistance, Φbn is the barrier height, A* is the effective Richardson constant, k is the Boltzmann constant, q is the charge, T is the temperature, J F is the forward current density.

[0030] It can be seen that as the current (J F ) is larger, the conduction voltage drop also increases, resulting in higher device losses. Therefore, if the device current can be reduced under high voltage drop, it will help alleviate the above problems. The present application connects a PN structure in parallel to the terminal through the above structure, so that the device will have a significant hole injection effect when the voltage drop is greater than 0.7V, the conduction characteristics are enhanced, and the conduction voltage drop is significantly reduced. At the same time, through reasonable design of the P region, the edge electric field can also be optimized, which is also helpful to improve the breakdown characteristics of the product.

[0031] According to the embodiments of the present application, the structure of the trench Schottky diode and the principle of achieving the above-mentioned beneficial effects are described in detail below, taking the first conductivity type being N-type and the second conductivity type being P-type as an example.

[0032] As understood by those skilled in the art, a P-type doped region is provided in the N-type semiconductor (in the epitaxial layer 110) of the sidewall of the groove, which is helpful for electric field shielding and reducing the barrier lowering effect caused by the image force, thereby helping to improve the reverse blocking characteristics and reduce the reverse leakage current. In particular, in trench Schottky diodes, the provision of the P region can effectively change the electric field intensity distribution. Through the electric field coupling effect, the maximum value of the electric field intensity is transferred from the Schottky junction to the inside of the silicon, which helps to suppress the Schottky barrier lowering effect caused by the image force under reverse bias, thereby reducing the reverse leakage current of the Schottky junction. In general, the provision of the P-type region is conducive to improving the reverse withstand voltage, reducing the requirements of the preparation process for the precision control of the groove spacing, and is conducive to improving the production yield, and can improve the overall performance and reliability of the device.

[0033] While adopting a P-type doped region, i.e., the second conductive type doped region 30, the present application adjusts the device structure so that the Schottky metal layer 320 and the second conductive type doped region 30 form an ohmic contact and form a parallel structure with the source region of the device, which can significantly improve the above-mentioned problem of large forward conduction voltage drop.

[0034] According to an embodiment of the present application, the width a of the second conductive type doping region may be 5-30 micrometers. The above width can ensure that the formed PN junction can fully affect the electric field characteristics at the bottom of the trench structure, which is beneficial to improving the breakdown resistance performance during the process.

[0035] According to an embodiment of the present application, the distance b between the second conductive type doping region and the trench structure closest thereto may be 3-20 microns. For example, a plurality of trenches may be arranged in an array in the epitaxial layer 110 at intervals, and the second conductive type doping region 30 may be disposed in the terminal region to form a parallel PN junction with the trench structure.

[0036] According to an embodiment of the present application, the depth e of the trench structure and the depth d of the second conductive type doping region may satisfy:

[0037] 0.5×e <d<1.5×e。

[0038] This is beneficial for improving the hole injection effect under high voltage drop, thereby improving the conduction characteristics and alleviating the above-mentioned problem of significant voltage drop.

[0039] According to a specific embodiment of the present application, the depth e of the trench structure may be greater than the depth d of the second conductive type doping region.

[0040] For example, the depth of the trench structure can be 2-3 microns, for example, specifically 2.5 microns. The width of the trench is not particularly limited, for example, it can be 0.5-0.9 microns, specifically 0.7 microns. The second conductive type doped region 30 can be formed by forming an isolation layer on the epitaxial layer, shielding part of the epitaxial layer, and then opening a hole in the isolation layer and performing P-type ion implantation at the opening. For example, the second conductive type doped region 30 can be formed by implanting boron, and the depth of the second conductive type doped region 30 can be controlled by the ion implantation depth.

[0041] Those skilled in the art will appreciate that the trench Schottky diode further includes a front metal electrode layer 500 and a back metal electrode layer 400. In some embodiments, the substrate may be thinned before forming the back metal electrode layer 400 to further improve the performance of the trench Schottky diode.

[0042] In another aspect of the present application, the present application proposes a method for preparing the trench-type Schottky diode described above. The method may include: providing a first conductive type substrate having an epitaxial layer, wherein the epitaxial layer is of the first conductive type; forming a plurality of trenches on the epitaxial layer, and sequentially forming a gate oxide layer and a polysilicon conductive layer in the trenches to form a plurality of trench structures; depositing an isolation dielectric layer, and etching the isolation dielectric layer to form an opening to expose at least part of the epitaxial layer; performing a second type of doping treatment on the epitaxial layer at the opening to form a second conductive type doped region; depositing a Schottky metal layer, and allowing the Schottky metal layer to form an ohmic contact with the second conductive type doped region. Thus, the aforementioned trench-type Schottky diode can be easily obtained.

[0043] In some embodiments, the size of the opening of the isolation dielectric layer can be in the range of 5 microns to 30 microns, and the distance between the opening and the adjacent trench can be 3 microns to 20 microns. The position and size of the opening determine the position and width of the second conductive type doped region to be formed subsequently. When the position and size of the opening meet the above requirements, a P-type doped region with a good regulating effect on the electric field distribution can be formed.

[0044] According to an embodiment of the present application, the formation of the groove can be achieved by photolithography. Specifically, an oxide barrier layer can be first formed on the epitaxial layer, and a photoresist can be applied. After exposure, dry etching is used to form the groove.

[0045] According to an embodiment of the present application, forming the polysilicon conductive layer may include the following steps: depositing polysilicon on the gate oxide layer in the trench and ensuring that the inside of the trench is completely filled with polysilicon, and removing part of the surface polysilicon by dry etching so that the polysilicon interface is lower than the top of the trench.

[0046] In some specific embodiments, the method may specifically include the following operations:

[0047] First, an epitaxial wafer with a certain thickness is provided, and an oxide layer of a specific thickness is deposited on the epitaxial layer as a barrier layer. Subsequently, multiple grooves can be formed by photolithography. A gate oxide layer is formed inside the groove by a thermal oxidation process, and polysilicon is deposited as a conductive structure. Subsequently, an isolation dielectric layer is deposited, and an opening is formed in the source region of the device by etching the dielectric layer to form a barrier region, and a hole is simultaneously opened at the above position of the terminal to form a P-type doped region. P-type ion implantation is performed to form a P-type doped region. Finally, metal is deposited to form a Schottky metal layer, so that the Schottky metal layer is in contact with the source region and the P region at the same time to form a parallel connection.

[0048] The following are specific embodiments of the present application:

[0049] Example 1 Preparation of 100V Trench Schottky Diode

[0050] Step 1: Select an epitaxial wafer with a thickness of 9um and a resistivity of 1ohm.cm and deposit The thickness of the oxide layer acts as a barrier layer;

[0051] Step 2: Photoresist is coated on the surface of the wafer, and after exposure, a 2.5um deep groove structure is etched by dry etching, and the width of the groove is 0.7um;

[0052] Step 3: Use thermal oxidation process to form inside the groove Thickness of gate oxide layer;

[0053] Step 4: deposit polysilicon to ensure that the inside of the trench is completely filled with polysilicon. Then, dry etching is used to remove the excess polysilicon on the surface, so that the polysilicon interface is slightly lower than the top of the trench;

[0054] Step 5: Deposition An isolation dielectric layer;

[0055] Step 6: Open a hole in the source region to form a barrier region, and simultaneously open a hole at the terminal 15um away from the large trench, with a hole width of 20um;

[0056] Step 7, injecting boron into the opening to form a P region;

[0057] Step eight, deposit a 3um thick metal, which is required to form an ohmic contact with the P region and a parallel structure with the source region.

[0058] Comparative Example 1

[0059] The remaining operations are the same as those in Example 1, except that steps 5-8 are adjusted to form a P region at the same position, but the P region is covered by the isolation dielectric layer and does not form an ohmic contact with the Schottky metal layer.

[0060] The electric field conditions at the bottom of the device of Example 1 and Comparative Example 1 were simulated and tested. The test results are shown in Table 1. Figure 2 (Comparative Example 1) and Figure 3 (Example 1): The device of Comparative Example 1 has a strong electric field at the bottom of the large trench (the electric field intensity is large in the red part), while the peak value of the electric field at the bottom of the large trench in Example 1 is improved.

[0061] The on-state voltage drop of Example 1 and Comparative Example 1 was tested, and the on-state voltage curve at a current of 10A is shown in the attached Figure 4 The voltage drop of the improved mechanism of Example 1 is about 100mV lower than that of the structure of Comparative Example 1.

[0062] The above application provides many different embodiments or examples to realize the different structures of the present application. In order to simplify the present application, the parts and settings of specific examples are described above. Of course, they are only examples, and the purpose is not to limit the present application. In addition, the present application can repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplification and clarity, which itself does not indicate the relationship between the various embodiments and / or settings discussed.

[0063] The above are only specific implementations of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of various changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A trench Schottky diode, characterized in that: include: A first conductive type substrate having a front side and a back side; An epitaxial layer, the epitaxial layer is located on the front side of the first conductive type substrate, and the epitaxial layer is of the first conductive type; A plurality of trench structures, wherein the plurality of trench structures are located in the epitaxial layer and extend toward one side of the first conductive type substrate, and the plurality of trench structures are arranged at intervals; A second conductive type doped region, the second conductive type doped region is located in the epitaxial layer and is disposed adjacent to the plurality of trench structures; a dielectric layer, the dielectric layer being located on a side of the epitaxial layer away from the first conductive type substrate, covering the trench structure, and at least partially exposing the second conductive type doped region; A Schottky metal layer is located on a side of the dielectric layer away from the epitaxial layer and forms an ohmic contact with the second conductive type doped region.

2. The trench Schottky diode according to claim 1, characterized in that: The first conductivity type is N type, and the second conductivity type is P type.

3. The trench Schottky diode according to claim 1, characterized in that: The width a of the second conductive type doping region is 5-30 microns.

4. The trench Schottky diode according to claim 1, characterized in that: A distance b between the second conductive type doping region and a trench structure closest thereto is 3-20 microns.

5. The trench Schottky diode according to claim 1, characterized in that: The depth e of the trench structure and the depth d of the second conductive type doping region satisfy: 0.5×e <d<1.5×e。 6. The trench Schottky diode according to claim 5, characterized in that: The depth e of the trench structure is greater than the depth d of the second conductive type doping region.

7. The trench Schottky diode according to claim 1, characterized in that: Further including: A front metal electrode layer, wherein the front metal electrode layer is located on the Schottky metal layer; as well as A back metal electrode layer, wherein the back metal electrode layer is located on a side of the first conductive type substrate away from the epitaxial layer.

8. A method for preparing the trench Schottky diode according to any one of claims 1 to 7, characterized in that: include: Providing a first conductive type substrate having an epitaxial layer, wherein the epitaxial layer is of the first conductive type; Forming a plurality of trenches on the epitaxial layer, and sequentially forming a gate oxide layer and a polysilicon conductive layer in the trenches to form a plurality of trench structures; Depositing to form an isolation dielectric layer, and etching the isolation dielectric layer to form an opening to expose at least a portion of the epitaxial layer; Performing a second type doping process on the epitaxial layer at the opening to form a second conductive type doping region; A Schottky metal layer is deposited, and an ohmic contact is formed between the Schottky metal layer and the second conductive type doped region.

9. The method according to claim 8, characterized in that The forming of the groove comprises: forming an oxide barrier layer on the epitaxial layer, coating a photoresist, and after exposure processing, forming the groove by dry etching.

10. The method according to claim 8, characterized in that Forming the polysilicon conductive layer includes: depositing polysilicon on the gate oxide layer in the trench and ensuring that the trench is completely filled with polysilicon, and removing a portion of the surface polysilicon by dry etching so that the polysilicon interface is lower than the top of the trench.

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