Semiconductor detection tool system and method for wafer edge detection

Abstract

A semiconductor inspection tool system is disclosed. The system comprises a first illumination device for generating at least one first illumination radiation and for directing the at least one first illumination radiation to at least one bonding area unfilled volume formed between two layers of the multilayer stack. The system further comprises a second illumination device for generating at least one second illumination radiation and for directing the at least one second illumination radiation at the edge of the multilayer stack. And a second illumination device having a second illumination radiation configured to illuminate at least normal edges of the at least two layers, the second illumination device having a different radiation parameter than the first illumination device. The system also includes a bond area sensor unit for collecting reflected electromagnetic radiation from the bond area volume and generating at least one sensing data indicative of the bond area.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This patent application claims priority to U.S. Provisional Patent Application No. 63 / 367,440 filed on June 30, 2022, U.S. Patent Application No. 18 / 080,006 filed on December 13, 2022, and U.S. Provisional Patent Application No. 63 / 510,221 filed on June 26, 2023, which are incorporated herein by reference in their entireties. Technical Field

[0003] The present disclosure generally relates to wafer inspection processes and more particularly to a semiconductor inspection tool system and method for inspecting semiconductor components. Background Art

[0004] Listed below are references believed to be relevant as background to the presently disclosed subject matter:

[0005] - U.S. Patent Publication No. 2009 / 0196489

[0006] -U.S. Patent Publication No. 2015 / 0355106

[0007] - Korean Patent Publication No. 20100053038

[0008] - U.S. Patent Publication No. 2008 / 0212084

[0009] Acknowledgment of the above references herein should not be inferred as an intention that these references are in any way relevant to the patentability of the presently disclosed subject matter.

[0010] background

[0011] Edge and bevel (E&B) inspection is a common process step in wafer manufacturing. E&B inspection includes the wafer edge surface (i.e., the edge facing radially outward) and the edges (also called bevels) of the top and bottom wafer (product) surfaces. E&B inspection is usually faster and cheaper than top or bottom side inspection, and is sometimes performed before other types of inspection.

[0012] E&B inspection provides insight into the status of the wafer / product as well as the manufacturing process. In manufacturing, this can provide data indicating process stability. This can also be used in the process development phase after each stage of the manufacturing process has been developed.

[0013] In some cases, the data obtained in E&B inspection can be used to decide whether to continue the inspection process and / or manufacturing process. In some cases, the data obtained in E&B inspection can be integrated with the top side or bottom side inspection results to present a more complete picture of the wafer condition.

[0014] The development of multi-stacked packages has increased the need for E&B inspection. In some cases, inspection of the wafer edge provides insights into the internal structure (aspects) of the multi-stacked package. Other inspection methods cannot easily obtain insights.

[0015] Typical stacking (i.e., multi-stack) configuration includes multiple wafer layers with multilayer bonding materials therebetween. In some cases, the bonding layer is a glue, resin, or material that keeps the stacked layers physically connected. Therefore, a typical stacking configuration has more than one edge and more than one bevel, or more than one pair of bevels. The edge and bevel of the wafer stack define the bonding area volume. The bonding interface volume includes the gap space between every two layers of the stack and the outer region between the bevels of every two layers of the stack.

[0016] Overview

[0017] Obtaining sensing data of at least one bonding area between two layers in a multi-stacked package (e.g., an advanced package) can provide layer data of interest indicative of the internal structure of the multi-stacked package. However, it should be understood that, typically, the radially outward-facing edge of the bonding layer is positioned inward relative to the edge of the wafer, so that if an image of the bonding area is captured using a typical side and / or top and / or bottom edge imaging sensor, the edge of the bonding layer will not be clearly seen, and the indicative layer data in this volume may not be observable. The bonding area size hinders effective detection of the radially external structure of the bonding layer or the top and bottom surfaces of the bonding area. In practice, the portion of the captured image corresponding to the bonding area will appear as a black line because there is not a sufficient amount of light to penetrate the bonding area and / or reflect from the internal structure of the bonding area (i.e., the outer surface of the wafer edge).

[0018] Therefore, it is necessary to inspect the bonding area from the outer diameter of the bonding material to the edge and bevel of the wafer.

[0019] The term "wafer" refers hereinafter to any substrate (i.e., base material) made of silicon, glass, or any other semiconductor material (e.g., silicon carbide, gallium nitride, germanium, gallium arsenide, silver (Ag), gold (Au), aluminum (Al), copper (Cu), tantalum (Ta), tin (Sn), tungsten (W), palladium (Pd), aluminum nitride, aluminum phosphide, aluminum antimonide, and aluminum arsenide). The wafer may be circular, oval, square, hexagonal, or may have any other geometric shape. The substrate edge may be trimmed, polished, or processed in any other manner. The top surface of the wafer may include one or more patterned layers, or may be bare. The wafer may also include at least a portion of an integrated circuit, a thin-film head die, a microelectromechanical system (MEMS) device, a flat panel display, a magnetic head, magnetic and optical storage media, other components that may include photonic and optoelectronic devices, such as lasers, waveguides, and other passive components processed on the wafer, print heads, and biochip devices processed on the wafer.

[0020] The terms "layer" or "tier" are used interchangeably hereinafter. The terms "multilayer stack", "multi-level stack" or "stack" hereinafter refer to any possible configuration including more than one layer (e.g., three layers, four layers or five layers), such as a two-layer stack including a bottom layer and a top layer. A tier can be a wafer, a bonding layer, a resin layer, a coating, etc. A multi-level stack can include two layers connected by a bonding material (e.g., a resin). Each layer does not have any restricted thickness and can, for example, have a thickness of less than 10 microns, 100 microns, 500 microns, 1000 microns, 5000 microns or 10000 microns. A multi-level stack does not have any restricted thickness and, for example, can have a thickness of less than 10 microns, 100 microns, 500 microns, 1000 microns, 5000 microns, 10000 microns or 50000 microns.

[0021] In one embodiment, the multi-layer stack includes three layers, including a bottom layer (layer number 1), a middle layer (layer number 2), and a top layer (layer number 3).

[0022] In one embodiment, the multilayer stack includes N layers, including a bottom layer (layer number 1), middle layers (layers 2 to (N-1)), and a top layer (layer number N).

[0023] The wafer does not have any limited thickness and may, for example, have a thickness of less than 10, 50, 100, 500, 600, 750, 1000, 1500, 3000, 5000 or 10000 microns. The term "thickness" as used hereinafter is synonymous with the term "height" measured from a side view using optical means. The multilayer stack does not have any limited thickness and may, for example, have a thickness of less than 10 microns, 50 microns, 100 microns, 500 microns, 600 microns, 750 microns, 1000 microns, 1500 microns, 3000 microns, 5000 microns, 10000 microns, 15000 microns, 25000 microns, 50000 microns, 100000 microns or 250000 microns.

[0024] The bottom and top layers of a wafer or a plurality of stacked wafers can be roughly divided into a flat portion and an edge region located at the far end of the layer. The edge region includes a curved section and / or a substantially flat section. The term "substantially flat section" hereinafter refers to about 5 degrees.

[0025] The term "edge" or "bevel" refers hereinafter to a non-planar portion of one or more layers. The term edge also applies to the distal structure of the engagement layer.

[0026] The term "carrier" or "carrier layer" refers hereinafter to any substrate configured to hold a semiconductor layer during processing of the semiconductor layer. The carrier substrate may be a wafer. The carrier substrate is not limited to any material (for example, it may be made of silicon, epoxy or glass or any other wafer material), it may also be a PCB. The carrier may be opaque or translucent.

[0027] The terms "bonding layer", "bond layer", or "connecting layer" refer hereinafter to any filler layer that separates wafers in a stack. In one embodiment, the bonding layer is configured to hold components of a multilayer stack together. In one embodiment, the bonding layer provides isolation between wafers in a multilayer stack. The bonding layer is not limited to any material and any size that maintains the physical connection of the stacked layers, and can be made of, for example, a resin, glue, or an organic material, having a thickness of, for example, less than 1 μm, 10 μm, 25 μm, 50 μm, 75 μm, 100 μm, 200 μm, 500 μm, or 1000 μm. In one embodiment, the bonding layer thickness is less than the thickness of the wafers in the stack. In one embodiment, the bonding layer includes multiple layers having different material properties.

[0028] The term "wafer bonding area" or "bonding area" refers hereinafter to a portion of the stack that includes the bonding layer and the top and bottom surfaces of the wafer that interface with the bonding layer, including filled and unfilled volumes. The surface of the wafer that interfaces with the bonding layer includes flat portions (i.e., top and bottom), corresponding bevels (i.e., top and bottom), and an apex region that may be radial, segmented, or flat.

[0029] For example, in a multi-layer stack, the top plane of the bottom wafer is the bonding interface plane. It butts against the bonding layer. For example, in a three-layer stack, the top and bottom planes of the middle wafer are bonding interfaces because they butt against the bonding layer. The term "bonding interface" hereinafter refers to the volume defined between two layers of a multi-layer stack, forming a gap space from the outer diameter (i.e., the distal end) of the bonding material to the edge and bevel of the layer of the multi-layer stack (i.e., the nearest distal end of the top or bottom layer, as shown in a cross-sectional view).

[0030] The terms "interstitial space opening" and "joint area unfilled volume" are used interchangeably.

[0031] The term "bonding area unfilled volume" hereinafter refers to a subset of the bonding area defined as the unfilled volume (without bonding layer material) defined between two layers (i.e., the top and bottom wafers) of a multilayer stack, and the volume between the top-wafer-bottom-bevel and the bottom-wafer-top-bevel forming the gap space. The gap space spans the bonding area unfilled volume from the outer diameter (i.e., distal end) of the bonding layer to the edge and bevel of the stacked layers (i.e., the nearest distal end of either the top or bottom layer, as shown in a cross-sectional view).

[0032] As shown in the cross-sectional view, the bonded area unfilled volume can be further divided into 1) a rectangular area, also known as a linear area, or the gap space between the top and bottom flat layers of the wafer; and 2) a triangular area between the inclined surfaces of the top and bottom layers of the wafer in the stack (as shown in the cross-sectional view). The triangular area is also referred to as the outer structure or outer area of ​​the bonded area unfilled volume.

[0033] In some embodiments, the height of the interstitial space or the thickness of the bonding layer is 1, 5, 10, 15, 20, 30, 40, 50, 60, 70, 80, 90, 100, 150, 200, 350, 500, 750, 1000 microns.

[0034] In some embodiments, the height of the interstitial space is substantially the same as the bonding layer thickness.

[0035] In some embodiments, the height of the interstitial space varies over its length.

[0036] In some embodiments, the height of the interstitial space is thicker in one portion of the interstitial space than in other portions of the interstitial space.

[0037] In some embodiments, the depth to thickness ratio of the interstitial space is less than 0.1, 0.2, 0.5, 0.6, 0.7, 0.8, 0.9, 1.0, 2.0, 3.0, 5.0, 10.0, 15.0, 20.0, 30.0, 100.0.

[0038] The term "sensed data" refers hereinafter to any information reflected and collected from the surfaces of the wafers and layers. In the case of imaging sensors, the sensed data is an image.

[0039] In other words, sensed data therefore refers to any information related to the area of ​​interest collected by the joint area sensor, as will be described in further detail below.

[0040] In the case of an imaging sensor, the sensed data is an image. If the imaging sensor is a line camera, the sensed data is a line image, and if the imaging sensor is an area camera, the sensed data is an image area. In the case of a fluorescence detector, the sensed data is a fluorescence image. The sensed data includes triangulation data, resulting in height and thickness measurements. During the data processing mode, anomalies and metrology parameters can be identified.

[0041] In an embodiment, the sensed data includes data indicating at least one of 2D geometry, 3D geometry, and surface characteristics such as color, roughness, and continuity. 3D data can be sensed using a triangulation system, white light interferometry (WLI), and / or a color confocal sensor. The term "sensed data" also refers to any data indicating anomalies and changes along the edge of a wafer, including changes in geometry, anomalies in shape, and anomalies in reflective properties. Data related to any anomalies and changes along the edge of a wafer include, but are not limited to, data related to particles (e.g., resist particles, embedded particles), debris, slag, stains, cracks, scratches, copper overflow, delamination, blistering, corrosion, surface roughness, discoloration, or any combination thereof. In an embodiment, the sensed data may be classified as defect data. The term "defect data" hereinafter refers to any information related to any anomalies and variations along the edge of the wafer, including but not limited to particles (e.g., resist particles, embedded particles), debris, material splashes, slag, stains, edge cracks, scratches, copper overflow, delamination, blistering, corrosion, surface roughness, discoloration, chipped edges and through tape, bubbles, vacancies, resin flash, or any combination thereof.

[0042] Detecting the sensing data enables rework, stopping processing, or process improvements to obtain better output. In addition, the sensing data observed from the side or top or bottom can be outside the wafer, as will be described in detail below, for example, with respect to external glue residue, or inside the wafer, such as in a pore. In this regard, it should be noted that discoloration is an indication of an abnormality. This is an indication of a possible event, such as a material or manufacturing abnormality. In a specific and non-limiting example, the color change rate can be an indication of thickness variation, contamination, and / or glue residue. In an embodiment, the color change rate can be identified by thin film interference. In a specific non-limiting example, the color change rate indicates the presence of additional materials with different reflective properties. Different reflective properties include, but are not limited to, wavelength, angle of incidence, intensity, and polarization.

[0043] In an embodiment, the metal particles may be identified by their shape, reflectivity, color and material properties. In an embodiment, the metal particles include Au, Ag, Cu, Al and Pd particles.

[0044] According to a broad aspect of the present disclosure, a semiconductor inspection tool system is provided, which is configured to inspect a bond region formed between two wafers in a multi-layer configuration by providing at least one illumination radiation, the at least one illumination radiation being configured to illuminate a bond region volume. The terms "illumination radiation", "light radiation", "radiation" or "light" are used interchangeably hereinafter. The at least one illumination radiation can be directed to an unfilled volume of the bond region.

[0045] More specifically, a semiconductor inspection tool system is provided, comprising: a first lighting device, which is configured and operable to generate at least one first illumination radiation and direct the at least one first illumination radiation to at least one unfilled volume of a bonding area formed between two layers of a multilayer stack; a second lighting device, which is configured and operable to generate at least one second illumination radiation and direct the at least one second illumination radiation to an edge of the multilayer stack, the at least one second illumination radiation being configured to illuminate at least a normal edge of at least one layer, wherein the second lighting device has radiation parameters different from those of the first lighting device; and a bonding area sensor unit, which is configured and operable to collect reflected electromagnetic radiation from the bonding area and generate at least one sensing data indicating the bonding area.

[0046] The technology can be an independent technology intended to detect the bonding area itself, or can be combined with conventional edge and bevel detection technology to improve the analysis of edge and bevel detection. The technology disclosed in the present invention enables the measurement of the bonding area size (i.e., depth and thickness) and / or the detection of the top and bottom surfaces of the bonding area and / or the external structure of the sensing bonding layer when the wafer stack is rotated at a speed of, for example, 10, 20, 30, 40, 50, 60, 70, 80, 90, 100, 120, 150, 180, 200, 270 or 360 degrees per second. In this regard, it should be understood that in some cases, the bonding layer is not detected to save time. Therefore, the detection of the bonding area together with the detection of the edge and bevel or separately allows the provision of layer data that cannot be obtained using other detection processes. In this regard, it should be noted that the technology disclosed in the present invention can provide layer data indicating parameters in the bonding layer. The parameters in the bonding layer can include data indicating metrological measurements or changes in the image properties indicating material changes. The layer data can include defect data as described above or process data indicating a process or other events that occurred before the detection of the bonding layer. Bond area inspection can provide different types of defect data and variations along the edge of the wafer, such as detecting the presence of particles (e.g., resist particles, embedded particles), debris, slag, stains, cracks, scratches, copper overflow, delamination, blistering, corrosion.

[0047] In one embodiment, the joint area inspection is capable of measuring fragment size (e.g., less than 1μm, 2μm, 3μm, 4μm, 5μm, 6μm, 7μm, 8μm, 9μm, 10μm, 20μm, 30μm, 50μm, 75μm, 100μm, 200μm, 350μm, 500μm, 750μm, 1000μm) and estimating surface roughness.

[0048] The disclosed techniques are not limited to any particular configuration of wafers in a multi-layer stack and can provide simultaneous inspection of both E&B and bonding areas for multiple wafers in a stack.Multiple wafers may have the same or different diameters and / or the same or different thicknesses.

[0049] In some embodiments, the second illuminating radiation comprises omnidirectional or isotropic light.The second illuminating radiation may be further configured and operable to illuminate at least one of a top bevel or a bottom bevel of the at least one layer.

[0050] In order to be able to provide clear sensing data indicating the engagement area (e.g., with better resolution, contrast, and image clarity), increased illumination should be provided. This can be achieved by increasing the sensor exposure time and / or by providing a dedicated illumination radiation source. If the sensor exposure time is increased, increased illumination can be obtained without changing the lighting arrangement. However, this may affect the throughput of the system and lead to light saturation on some areas of the sensor.

[0051] In one embodiment, a high dynamic range (HDR) image of a wafer area can be created by combining multiple images captured using different exposure rates. This can be achieved while compensating for differences in rotation speed.

[0052] In some embodiments, the reflected electromagnetic data indicates more than one rotation cycle. The processing unit may be configured and operable to receive data indicating more than one rotation cycle. The processing unit may be configured and operable to receive output data indicating multiple rotation cycles and generate an image indicating at least one vertex surface of a layer within the multilayer stack, the at least one vertex surface including at least one slope of a layer within the multilayer stack. In particular, the output data may indicate at least two rotation cycles at different focus positions, and the processing unit may be configured and operable to generate an all-in-focus image indicating at least one segment of the vertex surface of the multilayer stack.

[0053] In some embodiments, the system may perform more than one inspection pass (i.e., rotation), i.e., the wafer (stack) may be rotated multiple times. In different passes, the exposure rate and / or other exposure-related parameters may vary. The processing unit includes a control unit configured and operable to control the positioning and operation of at least one of the following: (i) at least some elements of at least the first or second illumination device, (ii) a joint area sensor unit, the joint area sensor unit including at least one of a joint area sensor or an optical element that directs reflected radiation to the joint area sensor, if the joint area sensor is present, or (iii) a multi-layer stack and a joint area. The control unit may be configured and operable to, for example, change the exposure rate of the joint area sensor unit and other exposure-related parameters of the joint area sensor unit, such as frame rate and / or gain, and other exposure-related parameters of elements of at least the first or second illumination device, such as on / off operation mode, and / or current, and / or intensity, and / or pulse frequency and / or color (e.g., in a multi-LED illumination device) during a rotation cycle, in the middle of a rotation, or in each rotation cycle. The control unit can be configured and operable to change the exposure rate of the joint area sensor unit and other exposure-related parameters of the joint area sensor unit and elements of at least the first or second lighting device at any time (e.g., during a rotation cycle, before each rotation cycle (i.e., a detection pass), or mid-rotation, for example, for gap detection.

[0054] In one embodiment, one illumination radiation is parallel to the center plane of the joining region. More specifically, the first illumination radiation may be directed to the joining region in a direction substantially parallel to the center plane of the joining region. At least one of the first or second illumination means may include an optical element for directing the illumination radiation or influencing at least one of the illumination radiation.

[0055] In one embodiment, an illuminating radiation is angled with respect to the center plane of the engagement region.

[0056] In one embodiment, the first illumination beam parameters are configured to generate an illumination beam having a diameter that is in the same order of magnitude larger than the thickness of the junction area. The diameter may be less than 2, 3 or 5 times the thickness of the junction area.

[0057] In some embodiments, the parameters are varied during detection passes within a rotation cycle.

[0058] In some embodiments, a filter may be applied to remove saturation glare.

[0059] In some embodiments, the output data of the multiple passes is used to present a composite picture of multiple stacked vertex surfaces, including a vertex radial surface (ie, bevel) of at least one of the wafers.

[0060] In some embodiments, output data of multiple passes, at least two of which are at different focus positions, are used to render a composite all-in-focus image of at least one segment of a multi-stacked vertex surface.

[0061] In some embodiments, at least one illumination radiation is configured to provide high power focused optical radiation directed towards the inner structure of the bonding area, i.e. in a two-layer stack, the volume above the bottom layer and below the top layer is also defined as a plane at the mid-height of the bonding area.

[0062] In some embodiments including a multi-stack having more than two layers and more than one bonding interface, at least one illuminating radiation is configured to provide a high-power focused optical radiation directed toward an internal structure of the plurality of bonding interfaces.

[0063] In some embodiments including a multi-stack having more than two layers and more than one bonding interface, the more than one illumination radiation is configured to provide a high power focused optical radiation directed toward each of the internal structures of the bonding interface.

[0064] In some embodiments including a multi-stack having more than two layers and more than one bonding interface, at least one illuminating radiation is configured to provide a high-power focused optical radiation directed toward each of the internal structures of the bonding interface.

[0065] In one embodiment, the illumination radiation is an illumination beam. The size of the illumination beam is not limited, however, to be effective, the diameter of the illumination beam should not exceed 10 μm, 20 μm, 50 μm, 75 μm, 100 μm, 250 μm, 500 μm, 750 μm or 1000 μm. The beam shaper can also be used to generate a spot that is circular or elliptical, linear or rectangular, generally triangular, or any other illumination beam having a shape corresponding to the joint area. The beam shape (i.e., the profile cross-section and redistribution of the irradiance and phase of the radiation beam) and the diameter of the beam affect the amount of light that can enter the gap space opening.

[0066] In some embodiments, the semiconductor inspection tool system includes a dedicated external light source that is configured and operable to generate high-power focused light radiation and guide the illumination radiation to the bonding area by using a single / multiple light guides. The external light source is not limited to any configuration and may have a single or multiple light sources with different spectral distributions. For example, the light source type may be a xenon, an arc lamp, a flash lamp, an incandescent lamp, a light emitting diode (LED), a laser-driven light source, or a laser. Alternatively, the high-power focused light radiation may be generated by any conventional side and / or top and / or bottom edge illumination source, which is directed toward the stack edge layer. For example, the high-power focused light radiation may be generated by at least one focused LED that is positioned (or as a component) on a conventional illumination arc. The illumination radiation generated by the LED may be focused toward the center of the bonding area by using a converging optical device (e.g., not divergent or diffuse). High-power focused light radiation may also be generated by using off-axis illumination (e.g., conventional dark field illumination) to highlight diffuse defects / contamination and suppress specular reflections.

[0067] In some embodiments, at least one of the first illumination device and the second illumination device is configured and operable to generate a collimated light beam.

[0068] In some embodiments, each of at least one of the first illuminator and the second illuminator comprises at least one of a light source emitting at least one collimated light beam or a non-collimated light source optically coupled to any collimator element.

[0069] In some embodiments, each of at least one of the first and second illumination devices is configured and operable to direct at least one collimated or non-collimated light beam to the interstitial space opening in a normal or non-normal direction to an edge of the multilayer stack.

[0070] In some embodiments, the optical radiation is a collimated beam projected from a distance.

[0071] In some embodiments, the collimated light beam is directed with an optical element (eg, a reflective surface or a prismatic lens).

[0072] In some embodiments, a collimated beam can overcome "system real-estate" constraints.

[0073] In some embodiments, a collimated light beam directed using optical elements can overcome "system space" constraints.

[0074] In some embodiments, a semiconductor inspection tool system includes a bonding area sensor unit configured and operable to collect radiation from a bonding area and generate at least one sensing data of a bonding area defined between two layers of a wafer stack.

[0075] In some embodiments, the joint area sensor unit is configured and operable to collect substantially Figure 4A The bonding area sensor unit may be positioned at the height of a bonding area horizontal center plane (ie, a plane at the center of the bonding area).

[0076] In one embodiment, the joint area sensors are positioned at different locations and at least the radiation reflected from the joint area is detected using ( Figure 5D The optical element (shown) is redirected to the junction area. The junction area sensor unit may include a non-imaging detector, such as a spectrometer, a power meter, or an imaging detector, so that the sensed data may include imaging data or non-imaging data.

[0077] In some embodiments, the bonding area sensor unit includes at least one of the following: (i) a vertex sensor configured and operable to collect radiation reflected from at least one area including the vertex area of ​​one layer of the multilayer stack, the reflected radiation being directed in a normal direction of an edge of the multilayer stack of the wafer, or (ii) a side sensor configured and operable to collect reflected electromagnetic radiation from the bonding area, the reflected electromagnetic radiation being directed in a non-normal direction of an edge of the multilayer stack of the wafer. The vertex area may define at least one of the following areas: a vertex surface in an unfilled volume of the bonding area, a vertex surface in a non-bonding area, a vertex surface on a distal edge of the bonding layer, a top bevel, or a bottom bevel. The vertex sensor can be positioned facing the center of the multilayer stack so that the focal plane of the vertex sensor is placed at one of the following positions: at a distal end of the bonding area volume within the field of view of the vertex sensor or at a distal end of the unfilled volume of the bonding area. The vertex sensor can be positioned so that the center of the field of view of the vertex sensor points to the distal end of the bonding area volume. The vertex sensor can be configured and operable to collect radiation reflected from a top or bottom flat area. In some embodiments, the bonding region sensor unit may include a vertex sensor positioned toward the center of the multilayer stack such that its focal plane is placed at a distal end of the bonding interface layer, or at a distal end of the bonding region unfilled volume and within the field of view. The vertex sensor is configured to collect at least the vertex and the Fig. 6A The top and bottom bevels shown in regions Z2, Z3, and Z4 are shown in FIG. Optionally, the distal end of the bonding interface layer is located at the center of the field of view. Optionally, the vertex sensor is also configured and operable to collect radiation from the top flat region and the bottom flat region (e.g., Fig. 6A The radiation of Z1 and Z5).

[0078] In other words, the apex sensor is configured and operable to collect radiation reflected from at least one region including the apex region of one layer in the multilayer stack, and can detect particles on at least one region of at least one wafer of the multilayer stack. These regions include in the unfilled volume of the bonding region, in the non-bonding region, on the distal edge of the bonding layer (e.g., Figure 6B The wafer vertex of Z6) (for example, Fig. 6A Z3), the top surface or the bottom surface of the wafer (e.g., Fig. 6A Z1 or Z5), wafer bevel (e.g. Fig. 6A The vertex region defines at least one of the following regions: a vertex surface in an unfilled volume of the junction region, a vertex surface in a non-junction region, a vertex surface on a distal edge of a junction layer, a top bevel, or a bottom bevel.

[0079] In some embodiments, the bonding area sensor unit may include a side sensor that faces the apex of the wafer and / or the multi-stack (which is in the direction of the apex of the wafer in the stack) and is positioned at any position defining an angle to the normal direction (i.e., in a direction that is not normal (i.e., angled) to an edge of the multi-stack of wafers). The angle may be any angle within a range of up to about + / - 80 degrees. Thus, the side sensor is configured and operable to be positioned at an angle within a range of up to about + / - 80 degrees to the normal direction.

[0080] In some embodiments, the semiconductor inspection tool system further includes an optical element placed at an edge of the multilayer stack and configured and operable to deviate the path of the reflected electromagnetic radiation and direct the reflected electromagnetic radiation to the bonding area sensor unit. The optical element may include at least one of an optical lens, a beam splitter, a mirror, a prism, a reflective surface, a light pipe, or a fiber optic cable.

[0081] In some embodiments, the first illumination device is oriented opposite to the optical axis of the bonding area sensor with respect to the normal direction of the wafer edge to achieve simultaneous illumination and collection of reflected electromagnetic radiation. The first illumination device can be configured and operable to generate at least one first illumination radiation having a main direction defining a non-zero angle with the bonding area center plane. At least one of the first illumination device and the second illumination device can be arranged along an illumination arc.

[0082] In some embodiments, at least one of the first lighting device and the second lighting device includes at least one guiding element connected to the light source. Each of the at least one guiding element is configured and operable to guide the first optical radiation or the second optical radiation to a specific bonding area of ​​the multilayer stack.

[0083] In some embodiments, the bonding area sensor unit is configured and operable to collect reflected electromagnetic radiation from the bonding area volume, the reflected electromagnetic radiation being directed in a normal or non-normal direction at an edge of the multilayer stack of the wafer. The bonding area sensor unit may be configured and operable to be positioned at least one of the following locations: at an off-normal angle or to the side of at least one of the first illumination device or the second illumination device.

[0084] In some embodiments, the semiconductor inspection tool system also includes at least one of an edge top sensor or an edge bottom sensor, the edge top sensor being used to obtain sensing data of the top surface of a layer proximal to the outer edge of the layer, and the edge bottom sensor being used to obtain sensing data of the bottom surface of a layer proximal to the outer edge of the layer. The term "proximal" means less than 20 mm, 15 mm, 10 mm, 5 mm close to the outer edge of the layer. More specifically, when viewed from above, at the top wafer / top layer, the proximity is measured radially inward from the tip of the vertex of the top wafer toward the center of the wafer, and when viewed from below, at the bottom wafer / bottom layer, the proximity is measured radially inward from the tip of the vertex of the bottom wafer toward the center of the wafer.

[0085] In some embodiments, the illuminating radiation has a direction coaxial with the optical axis of the joint area sensor so as to enable collection of the reflected radiation beam while enabling illumination of the joint area. The joint area sensor unit may include any commercially available sensor and is not limited to any configuration. For example, it may include a line sensor such as a single line (e.g., monochrome), a bilinear or trilinear sensor (i.e., RGB), a photomultiplier tube (PMT), a charge coupled device (CCD), a time delay integration (TDI) sensor with monochrome, RGB or Bayer spectral coverage operable in global or rolling shutter mode. The area sensor may define pixels of a large area.

[0086] Alternatively, at least a portion of the radiation reflected from the internal structure of the bonding area can be collected by any of conventional side and / or top and / or bottom edge imaging sensors facing the edge of the wafer stack and generating at least one image of the bonding area defined between two layers of the wafer stack.

[0087] In one embodiment, the joint area sensor unit comprises a processing unit.

[0088] In one embodiment, one image indicating the stitching area is in focus (within plus / minus 0.5 degrees of focus).

[0089] In one embodiment, one image indicating the joined area has uniform lighting conditions. The term "uniform lighting conditions" as generally known in the art refers to the ratio of the minimum lighting level to the average lighting level in a specified area, or the ratio of the minimum lighting level to the maximum lighting level in a specified area.

[0090] In some embodiments, a semiconductor inspection tool system includes multiple sensors (e.g., a joint area sensor unit and / or an edge top and / or an edge bottom), each sensor being configured and operable to generate at least one image of each wafer edge surface in a wafer stack, respectively, in a single shot or in a multiple shot and calibration setting.

[0091] In one embodiment, the sensing data generated by the multiple image sensors overlap. For example, the image generated by the edge top sensor includes a portion of the top surface and a portion of the top bevel.

[0092] In one embodiment, the image generated by the top sensor, which includes a portion of the top bevel, overlaps with the image generated by the joint area sensor unit. Similarly, the image generated by the bottom imaging sensor is also overlapped.

[0093] The semiconductor inspection tool system may be connected to a processing unit that is connectable to at least one of the following sensors: a bonding area sensor unit, an edge top sensor, or an edge bottom sensor; wherein the processing unit is configured and operable to receive and analyze sensing data from at least one of the following sensors: a bonding area sensor unit, an edge top sensor, or an edge bottom sensor. The processing unit may further be configured and operable to analyze the sensing data and determine at least one of layer data, layer anomaly, or defect data.

[0094] In one embodiment, the processing unit comprises a control unit configured and operable to control the positioning of at least one of: (i) at least some elements of the illumination setup, (ii) a bonding area sensor unit comprising a bonding area sensor and an optical element that directs reflected radiation to the bonding area sensor (if any), or (iv) the wafer stack and the bonding area to be in the plane of the light source and / or the bonding area sensor.

[0095] In some embodiments, the processing unit is configured and operable to receive and analyze at least one sensed data generated by the sensor. The processing unit is capable of identifying specific layer data (e.g., identifying substrate layer defects), identifying adhesive layer defects, and identifying metrology data (e.g., adhesive layer thickness variations).

[0096] The term "wafer notch" hereinafter refers to a notch or cut on the edge or surface of a wafer that indicates the rotational orientation of the wafer. The notch depth may be less than 0.5 mm, 0.75 mm, 1.0 mm, 1.1 mm, 1.5 mm, 2.0 mm, 3.0 mm, or 5.0 mm.

[0097] In some embodiments, the lighting system includes a dedicated sub-lighting device focused on the vertex. In some embodiments, the lighting device includes a dedicated sub-lighting device focused on the unfilled volume of the joint area. In some embodiments, the lighting device includes a plurality of sub-lighting devices.

[0098] In some embodiments, the illuminating radiation enters the unfilled volume of the bonding area at an angle less than 0°, 1°, 2°, 5°, 8°, 10°, 20°, or 30° relative to the center plane of the bonding layer. The low angle ensures that sufficient light can enter and leave the unfilled volume of the bonding area. The term "sufficient light" can be defined by sensor sensitivity and dynamic range. Sufficient light can also be characterized by a sensor response in which the signal is above the dark noise threshold and below the saturation level.

[0099] In some embodiments, the illumination device includes an optical element that focuses light radiation toward the unfilled volume of the bonding region or toward the distal end of the bonding layer or any point in between.

[0100] In some embodiments, the illumination device comprises an optical element that focuses the light radiation towards a point in front of the unfilled volume of the bonding region or towards a point beyond the distal end of the bonding layer.

[0101] The edge and bevel detection system (i.e., measurement equipment) may include at least one of a non-imaging scatterometer, a scatterometer, a spectral scatterometer, a reflectometer, a spectral reflectometer, an ellipsometer, a spectral ellipsometer, a bright field imaging device, a dark field imaging device, a bright field and dark field imaging device, a bright field non-imaging device, a dark field non-imaging device, a bright field and dark field non-imaging device, a coherent probe microscope, an interference microscope, an optical profiler, or any combination thereof.

[0102] In some embodiments, the illumination radiation is generated by an additional light source that provides high-power illumination and is positioned parallel to the junction area center plane to direct the illumination radiation toward the junction area unfilled volume. In this specific and non-limiting example, at least one LED of the vertex illumination module positioned parallel to the junction area center plane is replaced by a high-power illumination source to provide illumination radiation at the junction area unfilled volume.

[0103] In some embodiments, the joint area sensor is configured to collect light reflected from the entire cross-section of the joint area unfilled volume and the vertices of either or both of the bottom layer and the top layer. In order for the joint area sensor to work effectively, the light reflected from the vertex and the joint area should be of the same order of magnitude. If the difference between the light reflected from the vertex and the joint area is large, two possible situations may occur. In one example, the amount of light reflected from the vertex provides a clear image on the joint area sensor, and the amount of light reflected from the vertex is significantly greater than the light reflected from the joint area unfilled volume. The image of the joint area unfilled volume will be a black line or a black area. In another example, the amount of light reflected from the joint area non-filled volume provides a clear image on the joint area sensor, and the amount of light reflected from the joint area non-filled volume is significantly less than the light reflected from the vertex. The image of the vertex will be saturated.

[0104] In some embodiments, the expression "significantly greater than value x" is on the order of 2 times, 3 times, 5 times or more, for example 1E3, 1E4, 1E5.

[0105] In some embodiments, the diameter of the area covered by the junction area sensor is less than 100, 150, 200, 300, 400, 500, 750, 1000, 1500, 2000, 2500, 5000, 10E3, 20E3 microns. In a cross-sectional view, as shown, the diameter is the height of the area.

[0106] In some embodiments, at least one of the first illumination device or the second illumination device is configured and operable to generate fluorescent emissions of the bonding layer.The bonding area sensor may be configured and operable to collect the fluorescent emissions.

[0107] In some embodiments, the first illuminator is part of the second illuminator. The first illuminator and the second illuminator may include illuminators of the same type. The first illuminator and the second illuminator may include at least one of (i) at least one brightfield illuminator or (ii) at least one darkfield illuminator.

[0108] In some embodiments, the second illumination radiation parameter comprises at least one of: focus, beam size, power, polarization, or direction. The second illumination radiation parameter may comprise a beam propagation parameter comprising at least one of collimation, convergence, or divergence.

[0109] According to another broad aspect of the present disclosure, a method for semiconductor inspection of a multilayer stack is provided. The method includes: generating at least one first illumination radiation and directing the at least one first illumination radiation to at least one non-filled volume of a bonding area formed between two layers of the multilayer stack; generating at least one second illumination radiation and directing the at least one illumination radiation to the edge of the multilayer stack, the at least one second illumination radiation being configured to illuminate at least the normal edge of at least two layers, wherein the second illumination radiation has a beam parameter different from that of the first illumination radiation; collecting reflected electromagnetic radiation from at least one bonding area and generating at least one sensing data indicating the bonding area. In some embodiments, the method also includes receiving sensing data indicating the bonding area, and analyzing the sensing data to provide at least one of layer data, layer anomaly or defect data indicating parameters of the bonding layer. Analyzing the sensing data may include measuring the size of the bonding area, detecting the top and bottom surfaces of the bonding area, and identifying the external structure of the bonding layer.

[0110] In some embodiments, the method further comprises irradiating at least one of a top bevel and a bottom bevel of the at least two layers.

[0111] In some embodiments, the method further includes obtaining sensing data of a top surface of a layer proximate an outer edge of the layer or obtaining sensing data of a bottom surface of a layer proximate an outer edge of the layer.

[0112] In some embodiments, the method further includes providing simultaneous inspection of edges and bevels of wafers in a multi-layer stack and bonding areas therebetween.

[0113] In some embodiments, the method further comprises inspecting a plurality of wafer layers having different diameters and / or thicknesses and / or materials and / or external shapes to identify at least one geometric difference or abnormal geometric edge configuration between different layers.

[0114] In some embodiments, the method further includes generating and collecting fluorescent emissions from the bonding layer.

[0115] In some embodiments, the method further comprises controlling the operation of each illumination radiation and the synchronization therebetween.

[0116] In some embodiments, the reflected electromagnetic data is indicative of more than one rotation period.

[0117] In some embodiments, the method further includes receiving output data indicative of a plurality of rotation cycles, and generating an image indicative of at least one vertex surface within the multi-layer stack, the at least one vertex surface comprising at least one slope of a layer within the multi-layer stack.

[0118] In some embodiments, the method further comprises receiving output data indicative of at least two rotational cycles at different focus positions, and generating an all-in-focus image indicative of at least a segment of an apex surface of the multilayer stack.

[0119] In some embodiments, the method further comprises changing the exposure ratio of the joint area sensor unit and other exposure related parameters of the joint area sensor unit and elements of at least the first or second illumination device during a rotation cycle, in mid-rotation or in each rotation cycle.

[0120] In some embodiments, the method further includes collecting reflected electromagnetic radiation from the junction region volume includes collecting radiation reflected from at least one region including an apex region of a layer of the multilayer stack.

[0121] In some embodiments, the method further comprises performing generating at least one first illuminating radiation and collecting reflected electromagnetic radiation from the engagement region volume substantially simultaneously.

[0122] As used herein, the term "about" refers to plus or minus 10%. BRIEF DESCRIPTION OF THE DRAWINGS

[0124] For a better understanding of the subject matter disclosed herein and to illustrate how it may be carried out in practice, embodiments will now be described, by way of non-limiting examples only, with reference to the accompanying drawings, in which:

[0125] Figure 1A A schematic cross-sectional view of a typical multilayer stack is shown, Figure 1B shows a side-imaging sensor captured using a commercially available semiconductor inspection system Figure 1A A side image of a multi-layer stack;

[0126] Figure 2A A schematic block diagram of a commercially available semiconductor edge and bevel detection system is shown; Figure 2B A schematic cross-sectional view showing a flat edge of an unstacked wafer having a defect on its top surface, Figure 2C The side imaging sensor Figure 2B The corresponding image of the unstacked wafer side, Figure 2D shows a schematic cross-sectional view of a circular edge of a single wafer;

[0127] Figure 3A A schematic cross-sectional view showing a possible multilayer stack is shown, Figure 3B shows the image captured by the side imaging sensor Figure 3A The corresponding image of one side of the multi-layer stack;

[0128] Figure 3C shows a schematic cross-sectional view of another possible multilayer stack, Figure 3D shows the image captured by the side imaging sensor Figure 3C The corresponding image of one side of the multi-layer stack;

[0129] Figure 4A A schematic block diagram showing possible configurations of a semiconductor inspection tool system according to some embodiments of the present disclosure; Figure 4B shows a schematic cross-sectional view of a multilayer stack; Figure 4C shows the image captured by the joint area sensor Figure 4B The corresponding image of one side of the multi-layer stack;

[0130] Figure 4D A schematic block diagram showing another possible configuration of a semiconductor inspection tool system according to some embodiments of the present disclosure having an arc-shaped lighting device; Figure 4E shows a schematic cross-sectional view of a multilayer stack; Figure 4F shows the image captured by the joint area sensor Figure 4E The corresponding image of one side of the multi-layer stack;

[0131] Figure 5A and Figure 5DA schematic block diagram showing possible configurations of a semiconductor inspection tool system according to some embodiments of the present disclosure; Figure 5B and Figure 5E shows a schematic cross-sectional view of a multilayer stack; Figure 5C and Fig. 5F shows the area captured by the sensor Figure 5B and Figure 5E The corresponding image of one side of the multi-layer stack;

[0132] Fig. 6A is a schematic diagram of different regions of an unstacked wafer to be inspected; Figure 6B is a schematic diagram of a cross-sectional view of a possible configuration of a multilayer stack;

[0133] Fig. 7A is a schematic diagram of a cross-sectional view of a possible configuration of a semiconductor inspection tool system according to some embodiments of the present disclosure; Figure 7B shows a schematic cross-sectional view of a multilayer stack; Figure 7C A schematic block diagram showing possible configurations of a semiconductor inspection tool system according to some embodiments of the present disclosure;

[0134] Fig. 8A shows the image captured by the joint area sensor Figure 8C The corresponding image of one side of the multi-layer stack;

[0135] Figure 8B A top partial view showing a possible configuration of an inspection tool system according to some embodiments of the present disclosure;

[0136] Figure 8C A partial diagram showing a possible configuration of a semiconductor inspection tool system according to some embodiments of the present disclosure;

[0137] Figure 9A-9C shows a schematic possible configuration of a semiconductor inspection tool system according to some embodiments of the present disclosure;

[0138] Fig.10 A schematic cross-sectional view showing a possible multilayer stack is shown;

[0139] Figures 11A-11G shows the results of simulations of light rays illuminated by different lighting configurations;

[0140] Figure 12A-12C It is shown that for a multi-stack without any contamination ( Fig. 12A ), for multiple stacks with defects ( Fig. 12B ) and multiple stacks with contamination ( Fig. 12C )’s light simulation results;

[0141] Fig.13A picture showing a side view of a multi-stack acquired using an inspection tool system according to some embodiments of the present disclosure; and

[0142] Fig.14 is a block diagram representing the main functional parts of a processing unit according to some embodiments of the present disclosure. DETAILED DESCRIPTION

[0143] As described above, obtaining sensing data of at least one bonding region defined by a gap between two wafers in a multilayer stack may provide layer data of interest indicative of an internal structure of the multilayer stack. Figure 1A , which shows a schematic cross-sectional view of a typical multilayer stack 10. The elements in the figure are shown for simplicity and clarity and are not necessarily drawn to scale. The multilayer stack 10 includes a bottom layer 12, which supports a top layer 16 via a bonding layer 14 between the layer 12 and the layer 16. In this specific and non-limiting example, the bottom layer 12 is a carrier layer. One side of the multilayer stack 10 shows a region referred to as a bonding area 18 hereinafter, which defines a volume between the radially outward edges of the bottom layer 12, the bonding layer 14 and the top layer 16 and the edges of the limiting slopes of the bottom layer 12 and the top layer 16. More specifically, the bonding area 18 can be roughly divided into a gap non-filled space 18A and a "triangle" area 18B, which defines a linear area between the top layer and the bottom layer, and the "triangle" area 18B is between the edge of the bottom surface of the top layer and the edge of the top surface of the bottom boundary gap space 18A. The opening of the gap space 18A is limited from the far end of the flat area of ​​the top layer and the bottom layer to the far end of the bonding layer. As clearly shown in the figure, the bonding area 18 is characterized by a non-planar outer surface, and imaging of its internal structure is challenging. In addition, the thickness of the bonding layer 14 has a much smaller size than the thickness of the top layer 16 and the bottom layer 12, and is generally positioned inwardly relative to the edges of the top layer 16 and the bottom layer 12. In one embodiment, much smaller can refer to less than 0.7, 0.5, 0.3, 0.2 times the thickness of the top layer 16 or the bottom layer 12. The bonding area size hinders effective detection of the radial external structure of the bonding layer and / or the top and bottom surfaces of the bonding area defined by the top and bottom wafers. More specifically, in order to obtain sensing data indicating the far end of the bonding layer, light must enter the unfilled volume of the bonding area and reflect outwardly toward the sensor.

[0144] Figure 1BAn image of the side structure of the multilayer stack 10 is shown, which would be obtained using a commercially available side camera. The image presents a black line L, centered at the mid-height of the bonding area 18. The image is black because not enough light penetrates the bonding area and / or not enough light is reflected from the internal structure of the bonding area (i.e., the outer surface of the wafer and the edge of the carrier). Therefore, as a number of examples clearly show, the image does not provide sufficient information to detect, classify or identify anomalies and / or defects. The image does not provide sufficient information to achieve accurate measurement of geometric parameters related to the internal structure of the bonding area.

[0145] refer to Figure 2A-2D , which shows a schematic block diagram of a conventional edge and slope detection system ( Figure 2A ), a flat edge of an unstacked / wafer having defects on its top surface ( Figure 2B ), the corresponding figure of the side view of the edge of the unstacked wafer ( Figure 2C ) and the rounded edge of the unstacked wafer ( Figure 2D ). Figure 2A The edge and bevel inspection tool system includes, among other things: a first illumination module, which is configured and operable to generate at least one illumination radiation directed toward a wafer / butt edge layer; a sensor (e.g., a line camera in this example), which is configured and operable to collect reflected radiation from an apex plane in a normal direction of the wafer / multi-stack edge; and an optional second illumination module, which is configured and operable to illuminate at least one of the following areas: a top bevel, a normal edge, and a bottom bevel of at least one stack layer. Figure 2B The unstacked wafer generally defines a top surface and a bottom surface. The distal end of the layer forms an apex surface which may be flat or rounded. The apex surface includes all surfaces of the layer that face the apex sensor from the top plane to the bottom plane, including the top and bottom bevels and the apex (also called the normal edge) surface. The apex surface defines a focal plane, and the position of the sensor is generally oriented according to the focal plane. In one embodiment, the apex plane is approximately parallel to the sensor plane. The apex region efficiently reflects light to the sensor, enabling it to provide high-resolution details. The top and bottom bevels are located between the apex surface and the top and bottom surfaces, respectively. Transition lines connect between the top and bottom surfaces and the top and bottom bevels, respectively. The transition lines form the boundaries between the top and bottom bevels and the apex surface. Acquired by the camera Figure 2C The image of is a side view showing the bottom and top surfaces, the top and bottom bevels, and the apex, with undefined background lighting conditions (i.e., the background lighting is not defined by any light source). The bevel areas are black because light reflected from these surfaces does not reach the sensor. In one embodiment, the bevel areas are not completely black, indicating that a certain amount of light reflected from these surfaces does reach the sensor. Figure 2C The image clearly identifies the Figure 2B Defects on the top surface of the . Figure 2D A circular edge configuration for an unstacked wafer is shown. The unstacked wafer defines a top plane, a bottom plane, and an edge / apex plane that are perpendicular to the flat surface of the wafer. Also shown are top and bottom bevels that define an area at the edge of the wafer where the planes are neither perpendicular nor horizontal relative to the flat surface of the wafer. The vertex surface includes all surfaces of the layer facing the vertex sensor from the top plane to the bottom plane, including the top and bottom bevels and the vertex (also called the normal edge) surface. The normal edge surface defines the normal direction at the distal end of the wafer radius between the bevels that are substantially perpendicular to the vertex. The normal edge surface can have any shape and can be circular, substantially flat, or even angled.

[0146] refer to Figure 3A-3B , which shows a schematic diagram of a multi-layer stack and corresponding image obtained by using a conventional detection edge and bevel tool / system. Figure 3A The multilayer stack of comprises a top layer and a bottom layer attached via a bonding layer. The distal end of the bonding layer is shown in the figure. The top layer defines the upper portion of the stack, including a flat top surface, a top bevel and a bottom bevel formed at the distal non-flat portion of the top layer, and a top layer vertex located at the vertex plane. The bottom layer defines the bottom portion of the stack with similar elements: a flat bottom surface, a top bevel and a bottom bevel formed at the distal non-flat portion of the bottom layer, and a bottom layer vertex located at the vertex plane.

[0147] The stack apex surface includes all surfaces of the multi-layer stack facing the apex sensor from the top plane of the top layer to the bottom plane of the bottom layer, including the bonding layer filled and unfilled volumes. Figure 3B The image is the one that provides the imaging data Figure 3A The multi-layer stack includes, from top to bottom: a top flat surface, a top bevel of a top layer, a top vertex, a top bottom bevel, a bonding layer, a bottom top bevel, a bottom vertex, a bottom bottom bevel and a bottom flat surface. More specifically, Figure 3B The black segment in the side view image of consists of three sub-segments. From top to bottom: the bottom slope of the top layer, the gap space opening in the same plane as the bonding layer, and the top slope of the bottom layer. The top and bottom vertices reflect light effectively to the sensor, so that the details of the vertices can be identified. As shown in the above Figure 2B As shown in Figure 3BThe image obtained in is a side view clearly showing the bottom and top surfaces with undefined background lighting conditions (i.e., the background lighting is not defined by any light source). In addition, as clearly shown in the figure, the bottom layer top bevel, the bonding layer itself, and the top layer bottom bevel are represented as black areas in the figure without any ability to distinguish these different areas. The internal bonding layer is located in the gap between the top wafer / carrier and the bottom wafer / carrier, so its distal end cannot be included and cannot be directly imaged. Due to the geometric properties of this area, only a small portion of the light emitted by the illumination module is reflected back to the sensor plane. In addition, the top layer bottom bevel and the bottom layer top bevel boundaries reduce the ability to identify the boundaries of the bonding layer (e.g., its top and bottom surfaces and distal edges).

[0148] refer to Figure 3C-Figure 3D , which shows a schematic diagram of a multi-layer stack and corresponding image obtained by using a conventional detection edge and bevel tool / system. Figure 3A The multilayer stack includes a top layer and a bottom layer attached via a bonding layer. The distal end of the bonding layer is shown in the figure and is greater than the distance from the apex of the bottom and top wafers. Figure 3A This condition may indicate an anomaly in the bond layer, for example, a change in concentricity between the bond layer and the top and / or bottom layers, or an inlet or void in the bond layer as seen in cross section. Figure 3C The multi-layer stack is different from Figure 3A (i.e., the bonding layer does not reach the bonding area, such as in a pore or inlet), Figure 3D Images and Figure 3B The same image.

[0149] refer to Figure 4A , which shows a schematic block diagram of a portion of a possible inspection tool system 100, which includes, among other things, two illumination devices: a first illumination device 104, which is configured and operable to provide focused illumination radiation directed toward an unfilled volume of a joint region; and a second illumination device 102, which is configured and operable to illuminate an apex plane of a multilayer stack, such as Figure 4BMulti-layer stacking. Although the first lighting device 104 and the second lighting device 102 are respectively represented as different entities in the figure, the first lighting device 104 can be a part of the second lighting device 102. More specifically, the second lighting device 102 can include some parts of the first lighting device 104 with different properties. The first lighting device 104 and the second lighting device 102 can be physically positioned in the same housing and can be controlled by the same or different processing units, as will be further described below. In particular, the second lighting device 102 is configured and operable to generate omnidirectional or isotropic radiation directed to the stacked edge layer in a normal direction N (hereinafter referred to as the normal to the multi-stacked vertex edge plane). In one embodiment, the second lighting module 102 is configured and operable to generate a collimated illumination beam.

[0150] More specifically, the first lighting module 104 is configured and operable to generate at least one lighting radiation directed toward the bonding layer, the bonding layer comprising the bonding area 18, Figure 1A The gap non-filled space 18A, and Figure 1A between the edge of the bottom surface of the top layer and the edge of the top surface of the bottom layer, both of which are Figure 1A The gap space 18A is bordered by the "triangular" area 18B.

[0151] As described above, the inspection tool system 100 includes, among other things: a first lighting device 104, which includes a lighting module configured and operable to generate at least one illumination radiation and direct at least one illumination radiation to a wafer / stack edge layer; a joint area sensor unit 110 (e.g., a line or area camera, a fluorescence detector), which is configured and operable to collect at least a portion of the reflected radiation from the vertex plane in the normal direction of the edge of the wafer / multi-stack; a second lighting device 102, which includes a lighting module configured and operable to generate omnidirectional or isotropic light and illuminate at least one of the following areas: a top bevel, a normal edge as will be further described below, and a bottom bevel of at least one stack layer; and an optional processing unit 120, which is configured and operable to receive images from the joint area sensor unit 110 and / or analyze images and / or determine layer data, such as layer anomalies and / or defect data, thereby identifying different types of defect data and variations along the edge of the wafer. The joint area sensor unit 110 is configured and operable to collect reflected electromagnetic radiation from the joint area and generate at least one sensing data indicative of the joint area. However, the inspection tool system 100 may also include other sensors, such as edge top and / or edge bottom sensors, as further described below. Fig. 6A as shown in .

[0152] like Figure 4AAs shown in , the second illuminator 102 may include an edge collimated light source configured and operable to generate a parallel illumination beam. Typically, the first illuminator 104 and the second illuminator 102 may include a radiation source, optionally an optical element for guiding the illumination radiation, and additionally or alternatively a diffuser or homogenizer element for influencing the illumination radiation. The illuminators 102 and 104 may also include an internal control unit (not shown) configured and operable to control beam / radiation parameters. The beam parameters include at least one of focus, beam size, power, polarization or direction, and beam propagation parameters (e.g., collimation, convergence, and divergence). The beam parameters are functions of wavelength. Additionally or alternatively, the illuminators 102 and 104 may also include a power supply.

[0153] Depend on Figure 4C The image obtained by the sensor unit 110 is a side view showing three distinct areas clearly in the central area of ​​the image: the bottom layer top bevel, the top layer bottom bevel and the bonding layer between them. The figure also shows the median height L of the bonding area. In the previous setup without the lighting devices 102 and 104, these sections were dark. In this regard, it should be noted that the layers in the figure are schematically represented. Figure 4B different regions of a multilayer stack, but these regions do not necessarily have a layered shape, and Figure 4C The darkness differences between the layers do not necessarily represent the true ratio of the light intensity. It should be noted that most of the collimated light beam reflected from the top wafer top bevel and the bottom wafer bottom bevel does not reach the bonding area sensor.

[0154] In some embodiments, the organic material may be embedded in the bonding layer such that the lighting device 102 allows fluorescent emission to be produced through the bonding layer.

[0155] refer to Figure 4D , which shows a schematic block diagram of a portion of a possible inspection tool system 100', which includes, among other things, two illumination devices: a first illumination device 104, which is configured and operable to provide focused illumination radiation directed toward the bonding layer; and a second illumination device 102', which is configured and operable to illuminate the vertex plane of the multilayer stack, such as Figure 4E In this example, the light source of the second lighting device 102' is arc-shaped and is configured and operable to generate omnidirectional or isotropic light directed toward the stack edge layer (hereinafter referred to as the "normal edge") in the normal direction of the edge of the layer. The arc span can be greater than 15, 30, 45, 60, 90, 120, 180, 210, 240, 270 and 300 degrees. The light beams generated by the arc illuminator can reach the bevel area at a certain angle so that they can be reflected from the top wafer top bevel and collected by the bonding area sensor. Figure 4AThis configuration enables a larger portion of the beam reflected from the bevel area to reach the area of ​​the sensor in the bonding area compared to a linear design. This implementation provides an image of the top bevel of the top wafer and the bottom bevel of the bottom wafer. Figure 4F The image obtained by the bonding area sensor unit 110 in FIG. 1 is a side view clearly showing three different areas at the center area of ​​the image: the bottom layer top bevel, the top layer bottom bevel and the bonding adhesive layer therebetween, as shown in FIG. Figure 4C as described in, as well as the top wafer top bevel and the bottom wafer bottom bevel.

[0156] refer to Figure 5A , which shows a schematic block diagram of a portion of a possible inspection tool system 200 including an illumination device 106 configured and operable to illuminate an unfilled volume of a joint region by providing focused illumination radiation directed toward the unfilled volume of the joint region. Figure 5B The junction area of ​​the multilayer stack is unfilled volume. The lighting device 106 is configured and operable to generate at least one illumination radiation directed to the edge layer of the stack at different possible angles x1, x2, x3 relative to the edge normal direction of the layer. The angular direction x1, x2, x3 refers to the axis of the light radiation forming the beam cone. The lighting device 106 may also include off-axis illumination (e.g., conventional dark field illumination) in order to highlight diffuse defects / contamination and suppress specular reflections. Figure 5C The image obtained by the sensor is a side view of the bonding layer at the center area of ​​the image clearly showing. In this example, the bottom bevel of the bottom layer and the top bevel of the top layer are black, indicating that radiation reflected from these surfaces does not reach the sensor. The top bevel of the bottom layer is darker than the bottom bevel of the top layer, indicating that less radiation is reflected from the bottom bevel of the top layer than from the bottom bevel of the top layer. In this example, the top bevel of the bottom layer partially shields the illumination source 106, while the top bevel of the bottom layer is in normal sight.

[0157] refer to Figure 5D , which shows a schematic block diagram of a portion of a possible detection tool system 200', the detection tool system 200' comprising: an illumination device 106', which is configured and operable to illuminate Figure 5E The junction area of ​​the multilayer stack is unfilled volume; the junction area sensor unit 110' includes an optical element 107. The junction area sensor unit 110' is positioned at an angle deviating from the normal and optionally positioned to one side of the lighting device. The optical element 107 is positioned to deflect reflected electromagnetic radiation from the multilayer stack and the junction area toward the junction area sensor unit 110'. Fig. 5F The image obtained by the sensor in the imaging junction area is similar to the turn Figure 5C In one embodiment, the optical element comprises any radiation deflecting element, such as an optical lens, a beam splitter, a mirror, a prism, a reflective surface, a light pipe or a fiber optic cable.

[0158] Fig. 6A Different zones (zones 1-5) of unstacked wafers with rounded edges are shown to be detected by using the teachings of the present disclosure. As described above, the semiconductor inspection tool system can be connected to a processing unit that is configured and operable to receive and analyze sensing data from at least one of the following sensors: a bonding area sensor unit, an edge top sensor 702, or an edge bottom sensor 704. The receiving and analyzing steps can be performed on separate processing units or by the same unit. In some embodiments, the semiconductor inspection tool system 720 also includes at least one of an edge top sensor or an edge bottom sensor, the edge top sensor being used to obtain sensing data of the top surface of a layer near the outer edge of the layer, and the edge bottom sensor being used to obtain sensing data of the bottom surface of a layer near the outer edge of the layer. The semiconductor inspection tool system 720 can therefore include multiple sensors (e.g., a bonding area sensor unit (not shown) and / or an edge top sensor 702 and / or an edge bottom sensor 704), each of which is configured and operable to generate at least one image of each wafer edge surface in a stack of wafers in a single shot or multiple shots and calibration settings, respectively. The sensing data can be generated by multiple image sensors with overlapping fields of view. For example, the image generated by the edge top sensor 702 includes the part of the top surface and the part of the top bevel. In certain embodiments, the top bevel is also imaged by the vertex sensor. Surface detection is usually covered by the top and / or bottom detection tool, and the detection tool of the present disclosure can detect at least one of the following: as the top flat area of ​​the circular edge, as the area 2 of the top bevel area of ​​the circular edge, as the area 3 of the vertex area of ​​the circular edge, as the area 4 of the bottom bevel area of ​​the circular edge, or as the area 5 of the bottom flat area of ​​the circular edge or any combination thereof. More specifically, the top detection tool (top camera) can collect the reflected light of a part of the top plane and the top bevel according to the depth of field, shown as FOV1 in the figure, and the joint area sensor of the present disclosure can collect the reflected light of the normal structure and part of the top bevel and the bottom bevel according to the depth of field, shown as FOV2 in the figure. There is overlap between FOV1 and FOV2. This is also applicable to the bottom detection tool of the bottom camera with FOV1, and the joint area sensor of the present disclosure (not shown in the figure) with FOV2. The edge normal direction and the approximate zone boundary line are also indicated in the figure. The vertical zone boundaries between Z1 and Z2 and between Z2 and Z3, and the angled zone boundaries between Z2 and Z3 and between Z3 and Z3.

[0159] refer to Figure 6B, which shows a possible configuration of a multilayer stack 90, which includes a carrier layer 120 having a first thickness A, a first bonding layer 140A having a thickness B, referred to as a connecting layer in the figure, a first wafer layer 160A having a thickness C, a second bonding layer 140B having a thickness D, referred to as a connecting layer in the figure, and a second wafer layer 160B having a thickness E. The thickness of the carrier layer, the wafer layer, and the bonding layer is less than 10, 100, 500, 1,000, 5,000, or 10,000 microns. As shown, different layers can have different diameters. Specifically, in this example, the first wafer layer 160A has a diameter greater than the diameter of the top second wafer layer 160B. The multilayer stack 90 includes two bonding areas. The first bonding area is defined between: (i) the top outer surface of the carrier layer 120, characterized in area Z4', (ii) the outer surface of the first bonding layer 140A, characterized in area Z6', and the bottom outer surface of the first wafer layer 160A, characterized in area Z2'. The second bonding area 140B is defined between: (i) the top outer surface of the first wafer layer 160A, characterized by area Z4', (ii) the outer surface of the second bonding layer 140B, characterized by area Z6 and (iii) the bottom outer surface of the second wafer layer 160B, characterized by area Z2. The multilayer stack can have multiple bonding layers and therefore multiple bonding areas to be inspected. Areas Z1, Z1', Z1" and Z5, Z5', Z5" define the top and bottom surfaces of each layer, respectively. Areas Z6 and Z6' define the unfilled volume of the bonding area.

[0160] refer to Fig. 7A , which shows a schematic block diagram of a portion of a possible detection tool system 400, comprising, among other things: a second lighting device 102, similar to Figure 4A A lighting device configured and operable to illuminate Figure 7B of the multilayer stack; and a first illumination device comprising two focused light sources 104A and 104B, each of which is configured and operable to provide focused illumination radiation directed toward the bonding layer. In one embodiment, the light sources 104A and 104B are identical in configuration and illumination parameters. In one embodiment, the light sources 104A and 104B are different in configuration and / or illumination parameters. As shown, different layers can have different diameters. The detection technology of the present disclosure also has the ability to detect multiple layers made of different materials and / or having different diameters and / or thicknesses and / or identify geometric structure differences between different layers and between multiple bonding areas in a multilayer stack, as will be referenced below Fig. 8A Described. Figure 7C An image obtained by the joint area sensor unit 110 in this setup is shown in FIG. Figure 7Cis a side view that clearly shows all surfaces between the top wafer top bevel and the bottom wafer bottom bevel. The surfaces shown include the vertices of the three wafers, the unfilled volume of the bonding area and the top wafer bottom bevel, the two bevels of the middle wafer, and the bottom wafer top bevel. The middle height L of the bonding area is also shown.

[0161] refer to Fig. 8A , which shows another possible configuration of a semiconductor inspection tool system 700 integrated into a commercially available edge and bevel semiconductor inspection system according to some embodiments of the present disclosure. In this specific and non-limiting example, the edge and bevel inspection system includes, among other things; (i) a second illumination device 102', the second illumination device 102' comprising a vertex illumination module having a plurality of LEDs arranged along an illumination arc, the vertex illumination module being configured and operated to illuminate the multilayer stack 10; (ii) a first illumination device 104, the first illumination device 104 being configured and operated to provide focused illumination radiation directed toward the bonding layer; (iii) a bonding area sensor unit 110; and (iv) a first Z stage 108, the first Z stage 108 being configured and operated to provide a height variation to the multilayer stack 10 along the Z axis (assuming that the multilayer stack 10 is located in an imaginary XY plane).

[0162] In some embodiments, the inspection tool system 700 may be associated with a second Z stage 112 that is configured and operated to (manually or automatically) adjust the position of the light source and / or the engagement area sensor along the Z axis relative to the engagement area.

[0163] In this specific and non-limiting example, the multilayer stack (e.g., stacked wafers) 10 comprises a double layer stack, namely a bottom carrier layer 12 having a thickness of about 1000 μm, a top wafer layer 16 having a thickness of about 800 μm, and a middle bonding layer having a thickness of about 50 μm. The multilayer stack 10, wherein the diameter of the carrier is larger than the diameter of the device, comprises a plurality of zones Z1-Z5 corresponding to Figure 6B The examples in the multilayer stack edge area and multiple wafer edge areas described. From top to bottom, it includes, (i) wafer layer 16, which includes region Z1 devices, Z2 devices (not shown), Z3 devices and Z4 devices (not shown), (ii) bonding layer, which includes region Z6 device-carrier; and (iii) carrier layer 12, which includes region Z2 carrier (not shown), Z3 carrier, Z4 carrier (not shown) and Z5 carrier. The surface facing upward is typically imaged by the top camera, such as wafer layer 16, region Z1 devices and Z2 devices, and in some cases region carrier layer 12, Z5 carrier. Similarly, the structure facing downward is typically imaged by the bottom camera, such as carrier layer 12, region Z4 (not shown) and region Z5.

[0164] The first illumination device 104 is configured and operated to generate at least one bonding region focused illumination radiation configured to illuminate a bonding region volume defined by the zones Z3 and Z4 devices, the Z6 device-carrier and the Z2 and Z3 carriers.

[0165] refer to Figure 8B , which shows a possible configuration of the detection tool system 500 of the present disclosure, wherein the illumination module is arranged along an illumination arc, and may further include at least one guiding element (e.g., an optical fiber) 520 connected to the light source 510. The detection tool system 500 is configured and operable to direct light radiation to the unfilled volume of the bonding area of ​​the multilayer stack parallel to the bonding area center plane.

[0166] As mentioned above about Figure 7B As described, the multilayer stack may have multiple bonding layers and therefore multiple bonding regions to be detected. In some embodiments, the detection tool system of the present disclosure is configured and operable to generate two bonding region illumination radiations, each illumination radiation being configured to illuminate each bonding region volume z2, z3, and z4, respectively. At least two images indicating the bonding regions are then obtained, respectively. The at least two images are then processed to provide the bonding region size, depth, and thickness.

[0167] Figure 8C Another possible configuration of the detection tool system 600 of the present disclosure is shown, wherein the lighting module arranged along the lighting arc may also include two guide elements 520 and 530 forming, for example, an optical fiber bundle and connected to the light source 510. Each guide element is configured and operable to guide light radiation to different joint area unfilled volumes of the multilayer stack parallel to the joint area center plane. The detection of multiple joint areas can be performed simultaneously by using the detection tool system 600, or can be performed sequentially by using the detection tool system 500 and moving (automatically or manually) the guide element 520 to each joint area in sequence. The above-mentioned guide elements are operable to transmit electromagnetic radiation.

[0168] As described above, the bonding area sensor unit 110 is configured and operable to collect reflected electromagnetic radiation from the bonding area, the reflected electromagnetic radiation being directed in a normal or non-normal (ie, angled) direction to the edge of the multi-layer stack of the wafer W. Fig. 9A, which shows a detection tool system 130, wherein the bonding area sensor unit 110 includes a side sensor configured and operable to collect reflected electromagnetic radiation from the bonding area, the reflected electromagnetic radiation pointing to the non-normal (i.e., angled) direction of the edge of the multilayer stack of wafer W. For example, the side sensor is configured and operable to be positioned at an angle within a range of up to about 80°+ / -10° from the normal direction. In this case, the bonding area sensor unit 110 includes an optical element 210, which is placed at the edge of the multilayer stack of wafer W and is configured to deviate the path of the reflected electromagnetic radiation and guide the reflected electromagnetic radiation to the bonding area sensor unit 110. Such an optical element can be, for example, any radiation deflecting element, such as an optical lens, a beam splitter, a reflector, a prism, a reflective surface, a light pipe, or a fiber optic cable.

[0169] refer to Fig. 9B and Fig. 9C , which shows a specific and non-limiting example in which brightfield illumination is used.

[0170] exist Fig. 9B In the detection tool system 700, the bright field illumination 104' should be coaxial with the optical axis of the bonding area sensor to achieve simultaneous illumination and collection of the reflected electromagnetic radiation. This can be achieved by using a beam splitter 710, which is configured to direct the bright field illumination 104' toward the bonding area unfilled volume and direct the illumination radiation to the vertex plane of the multilayer stack W.

[0171] In the inspection tool system 800, the joint area sensor unit 110 includes a side sensor positioned in a non-normal (i.e., angled) direction to the edge of the multilayer stack W of the wafer. Alternatively, the joint area sensor unit may include an optical element (not shown) configured and operable to deflect electromagnetic radiation reflected from the wafer W toward the joint area sensor unit 110. In this case, the bright field illumination 104' is oriented opposite to the optical axis of the joint area sensor with respect to the normal direction of the wafer edge to achieve simultaneous illumination and collection of the reflected electromagnetic radiation.

[0172] In some embodiments, the position of the joint area sensor is determined based on the diameter of the joint area sensor.For example, the cross-sectional height of the joint area sensor may be substantially the same as the diameter of the joint area sensor.

[0173] Although not shown, the same description applies to dark field illumination with a dark field illumination element in place of bright field illumination 104'.

[0174] refer to Fig.10 , which shows a carrier layer 12, a bonding / connection layer 14 and a wafer layer 16 Figure 1A Schematic cross-sectional view of a multilayer stack 10 of . Wafer layer 16 can be made of silicon or glass, and carrier layer 12 can be made of glass or silicon. For example, the multilayer stack can include a single layer of glass carrying a single layer of silicon. The present disclosure is not limited to any multilayer configuration, and the multilayer can include any combination of layers, such as a pair of silicon layers or a pair of glass layers or a single layer of glass carrying a silicon layer having a glass layer on top thereof, a pair of silicon layers, or three silicon layers. In this specific and non-limiting example, carrier layer 12 has an outer surface defining four bevel edges (i.e., a pair of bevel edges at each side of the layer). Wafer layer 16 has an outer surface defining two circular edges (i.e., having a rounded circular edge at each side of the layer). Bonding layer 14 has an outer surface defining two circular edges (i.e., having a rounded circular edge at each side of the layer). Since the diameter of the bonding layer 14 is smaller than the diameters of both the carrier layer 12 and the wafer layer 16, and the bonding layer 14 abuts the end of the carrier layer 12 at the left side of the multilayer stack 10 but not at the right side of the multilayer stack 10, a bonding area including an inner bevel edge is generated at the left side, while a portion of the carrier layer 12 is not covered by the bonding layer 14 at the right side, thereby generating a bonding area including a non-bonding area. At the right side of the multilayer stack 10, the non-bonding area includes a first portion A, which is a linear volume portion formed between the carrier layer 12 and the wafer layer 16 arranged spaced apart from each other, and a second portion B, which is a non-linear volume portion defining an angular opening formed between the bevel edge of the carrier layer 12 and the circular edge of the wafer layer 16. The angular opening includes a first angle α formed between the bevel edge of the carrier layer 12 and its top surface, and a second angle β formed between the bottom surface of the bonding layer 14 and the bottom bevel edge corresponding to the circular edge of the wafer 16.

[0175] Obtaining sensing data of the bonding area at the right side of the multilayer stack 10 and in particular sensing data of the angular opening formed by the angles α and β can reveal nonlinearities of the top surface of the bonding layer 14 and problematic tendencies of the wafer layer 16. Detecting the bonding area and in particular the angles α and β enables identification of possible misalignment of multiple layers with respect to each other and / or non-concentricity of the wafer layer 16 with respect to the carrier layer 12.

[0176] In some embodiments, the detection techniques of the present disclosure may also be able to identify unusual geometries, such as non-linear external shapes of layers.

[0177] The outer shape of the wafer layer can have a nonlinear top surface (e.g., curving outward). The detection technology of the present disclosure also has the ability to detect multiple layers with different outer shapes, including different edge shapes (e.g., linear bevel edges or nonlinear bevel edges, circular or non-circular, or defined truncated portions) and / or diameters and / or thicknesses. In particular, the detection technology is also capable of identifying abnormal geometric configurations, such as nonlinear contours of layers, downward or upward curved surfaces of edges, or truncated portions in the surface of edges.

[0178] Most wafer inspection systems use a dedicated pre-alignment system to define the wafer notch / plane orientation. The inspection tool system disclosed in the present invention can be used for wafer notch / plane orientation detection. The wafer edge area image obtained by using the inspection tool system disclosed in the present invention can be processed to detect the orientation of the wafer by detecting the notch or flatness of the wafer. The positioning of the wafer edge also provides wafer position information. The detection of notches or flatness can be achieved by means such as deviations from roundness and pattern matching techniques. The edge of the wafer is expected to be circular, and flatness (or notches) provides the main deviation from the circular shape. By using the inspection tool system disclosed in the present invention, there is no need for a dedicated pre-alignment system and program required for wafer notch / plane orientation detection. In addition, it should be noted that notch detection associated with glue residue in the notch area may interfere with the notch detection itself performed by the top and / or bottom cameras. In multi-layer stacking, notch detection requires a bonding area sensor without considering glue residue because the top and bottom cameras cannot detect all layers and / or all notches. The technology disclosed in the present invention enables the identification of glue residue in the notch.

[0179] refer to Figures 11A-11G , which shows the results of four different light simulations, providing a pseudo-quantitative analysis. More specifically, Fig.11A A simulated image showing the top and bottom layers, the bonding layer including its distal end, and the gap space opening is shown. In this specific and non-limiting example, the collimated light beam CL is directed to the normal edge, i.e., the gap space opening in the normal direction of the edge of the multi-stack. The detection tool system 150 may include any collimated light device 142 that emits a collimated light beam, including a light source 142A (i.e., with an integrated collimator 142B) that emits a collimated light beam or a non-collimated light source optically coupled to any collimator element 142B. The reflected light RL is collected by the bonding area sensor unit 110. Fig. 11BA simulation is shown when a collimated light beam CL is directed toward a gap space opening in a non-normal (e.g., angled) direction to an edge of a multi-stack. In this specific and non-limiting example, the inspection tool system 152 may include a plurality of collimated light devices 142' and 142". Each collimated light device 142' and 142" is configured and operable to generate and direct a collimated light beam CL toward a gap space opening in a non-normal (e.g., angled) direction to an edge of a multi-stack. Fig. 11C A simulation of a multi-stack having defects (e.g., pitting) on ​​the bottom surface of the top layer and contamination on the top surface of the bottom layer using the inspection tool system 100 is shown when a collimated light beam CL is pointed toward a normal edge (i.e., a gap space opening) in a normal direction to the edge of the multi-stack. Fig.11D A simulation of a multi-stack illuminated by a non-collimated beam is shown. The non-collimated beam is directed toward the interstack space opening in a non-normal direction to the edge of the multi-stack. Fig.11E A simulation of the same multi-stack illuminated by a collimated beam directed toward the interstitial space opening in a non-normal direction to the edge of the multi-stack is shown. Fig.11F A simulation of a multi-stack illuminated by a non-collimated beam is shown. The non-collimated beam is directed toward the interstack space opening in a non-normal direction to the edge of the multi-stack. Fig.11G A simulation of the same multi-stack illuminated by a collimated beam directed towards the normal edge, ie an interstitial space opening in the normal direction of the edge of the multi-stack is shown.

[0180] The simulation provides information about the relative impact of some parameters on the ability of light to enter the unfilled volume of the joint area and reflect out towards the joint area sensor. The amount of light reflected onto the joint area sensor can be quantified by the metric P, as shown in Table 1 below, which gives the results of comparative experiments with different configurations.

[0181]

[0182] Table 1

[0183] As shown in the table Figures 11A-11G As shown in , the P value is significantly larger when the light source is in the plane of the joining area. The P value is significantly larger when the light is focused toward the non-filled volume of the joining area. In the simulation, the light is focused on the midline / mid-height of the unfilled volume of the joining area. The light can be focused on a point outside the opening of the joining area or inside the joining area. The above simulations show that a collimated beam increases the P value. In addition, a beam with a diameter less than the thickness of the joining area increases the P value. However, these correlations also depend on geometric and material properties (e.g., refractive index, reflectivity properties, etc.) and illumination flux properties (intensity, collimation quality, spectral distribution, etc.).

[0184] Fig. 12AA simulation of a non-contaminated multi-stack illuminated by a collimated beam directed towards the normal edge, ie, a gap space opening in the normal direction of the edge of the multi-stack is shown. In this specific and non-limiting example, the P value is 3P. Fig. 12B A simulation of multiple stacks with defects (eg, pitting) inspected by an inspection tool system having the same configuration is shown. In this specific and non-limiting example, the P value is 2.5P. Fig. 12C A simulation of multiple stacks with contamination inspected by an inspection tool system with the same configuration is shown. In this specific and non-limiting example, the P value is 1.5P. Therefore, it is clear that the absence of contamination reflects more light at the joint area sensor. Defects or contamination will reduce the P value. Measurement of the P value is one way to identify defects or contamination.

[0185] refer to Fig.13 , which shows a picture of a side view of a multi-stack obtained by using a detection tool system according to some embodiments of the present disclosure. The tab clearly shows a plurality of zones z1-z5 corresponding to the edge zones of the multi-layer and corresponding to the above-mentioned Fig. 6A The technology of the present disclosure is thus able to provide a picture of the bonding area, wherein each area is a distinguishable picture, thereby identifying layer data associated with each area at the level of the layer itself and / or for the multi-layer stack. Fig.14, which shows a general functional block diagram of the processing unit 120. In some embodiments, the processing unit 120 is configured in a cloud-based configuration and / or utilizes Internet-based computing, so that parts of the processing utility 100B and / or the memory 100C can reside in multiple different geographical locations. The processing unit 120 may include a general-purpose computer processor that is programmed with software to perform the functions described below. It can be implemented by any hardware that can receive, accumulate, process, analyze and store data. Unless otherwise specifically stated, as will be apparent from the following discussion, it should be understood that throughout the specification discussion, the use of terms such as "determine", "process" and the like refers to the action and / or process of a computer that manipulates data and / or converts data into other data. In addition, the operations taught herein may be performed by a computer specially constructed for the desired purpose, or by a general-purpose computer specially configured for the desired purpose by a computer program stored in a computer-readable storage medium. The computerized system may include one or more processors, and may also include additional units or components, such as a memory unit, a communication unit, and the like. Therefore, it should be understood that the term "processing unit" should be interpreted broadly, covering local controllers (data analyzers) that communicate data with the sensor unit / system as well as cloud-based systems. The functions of the processing unit can be performed by any type of computer (one or more servers, one or more computers), and can be operated in a centralized or distributed manner. The processing unit 120 can be located in the detection system, or in a central location, or based on the cloud. In some embodiments, the control unit may also include a motion control module that is configured and operable to control the position of different elements in the system. The processing unit 120 also includes a data input utility 100A, which includes a communication module for receiving images from a bonding area sensor, and the processing unit may also include a data output utility 100D for relaying defect data and changes along the edge of the wafer. The memory 100C (i.e., a non-volatile computer-readable medium 100C) can be configured to store input / output data in a database. The database can be a cloud-based system. The processing utility 100B is configured and operable to analyze at least one sensory data (eg, image) and / or determine layer data to identify different types of defect data and variations along a wafer edge.

[0186] The processing unit 120 may include a motion controller 100F configured and operable to control the positioning of at least one of: (i) at least some elements of the lighting arrangement, (ii) a bonding area sensor capable of being in the plane of the bonding area, or (iii) the wafer stack and the bonding area in the plane of the light source and / or the bonding area sensor. All or some of the parts of the processing unit may be independent stand-alone modules, or may be integrated into different elements of the system, such as the bonding area sensor or the lighting arrangement.

[0187] In some embodiments, the processing unit 120 may include a control unit configured and operable to control at least one of the operation (start and end time and duration) of the light source of each lighting device and the synchronization between them (simultaneously, sequentially (with a certain time interval between them), overlapping, etc.). Therefore, according to another aspect of the present disclosure, there is provided a control unit for use with a detection system, the detection system comprising a joint area sensor and two lighting devices with different lighting beam properties, wherein each lighting device comprises a light source that can be operated simultaneously or sequentially in the following order:

[0188] One at a time, the light source of the first lighting device is powered and operated for a certain duration, and then the light source of the second lighting device is powered and operated for a certain duration. Thus, the two lighting sources are not powered at the same time.

[0189] In one embodiment, there is a time gap between the ON state of the first illumination source and the ON state of the second illumination source. In one embodiment, the time gap is substantially zero. In one embodiment, the time gap is a specific time period.

[0190] In some embodiments, two illumination sources are turned on simultaneously for a certain duration. The first illumination source is turned on for a first duration, and the second illumination source is turned on for a second duration. The start and end times of the first duration and the second duration when the illumination sources are turned on are not consistent.

[0191] In some embodiments, both illumination sources are turned on for the same duration. The start and end times of the durations that the illumination sources are turned on are consistent.

[0192] In some embodiments, only one illumination source is turned on at any given time. For example, in a system with N illumination sources, the first illumination source is turned on for a certain duration, the second illumination source is turned on for a certain duration, and so on.

[0193] In a specific and non-limiting example, the collection of reflected radiation may be performed at an exposure rate A at the notch, and then the control unit may change the exposure rate to exposure rate B after the notch and then back to exposure rate A. The term "exposure rate" refers to the rate at which the joint area sensor unit is exposed to the first and / or second illumination radiation during the process of capturing the sensing data. To control the exposure rate, the control unit is configured and operable to control the operation of the joint area sensor unit and the first and / or second illumination device. The exposure rate represents the amount of illumination radiation reaching the joint area sensor unit per unit time. Control and variation of the exposure rate and other exposure-related parameters of the joint area sensor unit (e.g., frame rate and / or gain) and other exposure-related parameters of at least the elements of the first or second illumination device enable determination of appropriate exposure settings for achieving the desired sensing data quality (including factors such as brightness, contrast, and color accuracy). Controlling the exposure rate and other exposure-related parameters allows adjustment of the amount of illumination radiation incident on the joint area sensor unit, thereby affecting the overall exposure and the resulting image appearance.

[0194] In another specific and non-limiting example, the control unit may start with exposure rate A, and after one rotation, change the light rate to exposure rate B. In another specific and non-limiting example, the control unit may start with exposure rate A, and after one rotation, it may move the Z stage or the first or second illumination source to the Z position, and then change the exposure rate to exposure rate B.

Claims

1. A semiconductor inspection tool system, comprising: a first illumination device configured and operable to generate at least one first illumination radiation and to direct the at least one first illumination radiation to at least one junction region unfilled volume formed between two layers of the multilayer stack; a second illumination device configured and operable to generate at least one second illumination radiation and to direct the at least one second illumination radiation to an edge of the multilayer stack, the at least one second illumination radiation being configured to illuminate at least a normal edge of at least one layer, wherein the second illumination device has different radiation parameters than the first illumination device; and A joining area sensor unit is configured and operable to collect reflected electromagnetic radiation from a joining area volume and generate at least one sensing data indicative of the joining area.

2. The semiconductor inspection tool system according to claim 1, wherein: The second illuminating radiation comprises omnidirectional light or isotropic light and is further configured and operable to illuminate at least one of a top bevel or a bottom bevel of at least one layer.

3. The semiconductor inspection tool system according to claim 1 or claim 2 further includes at least one of an edge top sensor and an edge bottom sensor, wherein the edge top sensor is used to obtain sensing data of the top surface of the layer near the outer edge of the layer, and the edge bottom sensor is used to obtain sensing data of the bottom surface of the layer near the outer edge of the layer.

4. The semiconductor inspection tool system according to claim 3 further includes a processing unit, which is capable of being connected to at least one of the following sensors: the joint area sensor unit, the edge top sensor or the edge bottom sensor; wherein the processing unit is configured and capable of operating to receive and analyze sensing data from at least one of the following sensors: the joint area sensor unit, the edge top sensor or the edge bottom sensor.

5. The semiconductor inspection tool system according to claim 4, wherein: The processing unit is also configured and operable to analyze the sensed data and determine at least one of layer data, layer anomaly, or defect data.

6. A semiconductor inspection tool system according to any one of the preceding claims, wherein: The first illuminating radiation is directed towards the joining region in a direction substantially parallel to a centre plane of the joining region.

7. The semiconductor inspection tool system according to claim 6, wherein: At least one of the first illumination device or the second illumination device is configured and operable to generate fluorescent emissions of the bonding layer.

8. The semiconductor inspection tool system according to claim 7, wherein: The junction area sensor unit is configured and operable to collect fluorescent emissions.

9. A semiconductor inspection tool system according to any one of the preceding claims, wherein: The first lighting device is a part of the second lighting device.

10. A semiconductor inspection tool system according to any one of the preceding claims, wherein: The second illumination radiation parameter comprises at least one of focus, beam size, power, polarization or direction.

11. A semiconductor inspection tool system according to any one of the preceding claims, wherein: The second illumination radiation parameters include beam propagation parameters including at least one of collimation, convergence or divergence.

12. The semiconductor inspection tool system according to claim 11, wherein: The first illumination beam parameters are configured to generate an illumination beam having a diameter that is on the same order of magnitude greater than a thickness of the engagement region.

13. A semiconductor inspection tool system according to any one of the preceding claims, wherein: The first lighting device and the second lighting device include lighting devices of the same type.

14. The semiconductor inspection tool system according to claim 13, wherein: The first illumination device and the second illumination device include at least one of: (i) at least one bright field illumination device or (i) at least one dark field illumination device.

15. A semiconductor inspection tool system according to any one of the preceding claims, wherein: At least one of the first illumination device or the second illumination device further comprises an optical element for at least one of directing the illumination radiation or influencing the illumination radiation.

16. A semiconductor inspection tool system according to any one of the preceding claims, wherein: The reflected electromagnetic data is indicative of more than one rotation period.

17. The semiconductor inspection tool system according to any one of claims 4 to 16, wherein: The processing unit is configured and operable to receive data indicative of more than one rotation period.

18. The semiconductor inspection tool system of claim 17, wherein: The processing unit is configured and operable to receive output data indicative of a plurality of rotation cycles and generate an image indicative of at least one vertex surface of a layer within the multi-layer stack, the at least one vertex surface comprising at least one slope of a layer within the multi-layer stack.

19. The semiconductor inspection tool system of claim 18, wherein: The processing unit is configured and operable to receive output data indicative of at least two rotational cycles at different focus positions and generate an all-in-focus image indicative of at least a segment of the vertex surface of the multi-layer stack.

20. The semiconductor inspection tool system according to claim 17 or 18, wherein: The processing unit comprises a control unit configured and operable to control the positioning and operation of at least one of: (i) at least some elements of at least the first lighting device or the second lighting device, (ii) the joint area sensor unit, the joint area sensor unit comprising at least one of the joint area sensor or an optical element that directs reflected radiation to the joint area sensor, if the joint area sensor is present, or (iii) the multilayer stack and the joint area.

21. The semiconductor inspection tool system of claim 20, wherein: The control unit is configured and operable to vary: an exposure rate of the joint area sensor unit and other exposure related parameters of the joint area sensor unit or of at least an element of the first lighting device or the second lighting device.

22. The semiconductor inspection tool system according to claim 20 or 21, wherein: The control unit is configured and operable to vary during a rotation cycle, in mid-rotation or at each rotation cycle: the exposure rate of the joint area sensor unit, and other exposure-related parameters of the joint area sensor unit and of elements of at least the first lighting device or the second lighting device.

23. A semiconductor inspection tool system according to any one of the preceding claims, wherein: The joining area sensor unit includes at least one of: (i) a vertex sensor, which is configured and capable of operating to collect radiation reflected from at least one area including the vertex area of ​​a layer of the multilayer stack, and the reflected radiation is guided in a normal direction of the edge of the multilayer stack of the wafer, or (ii) a side sensor, which is configured and capable of operating to collect reflected electromagnetic radiation from the joining area, and the reflected electromagnetic radiation is guided in a non-normal direction of the edge of the multilayer stack of the wafer.

24. The semiconductor inspection tool system of claim 23, wherein: The apex region defines at least one of: an apex surface in the junction region unfilled volume, an apex surface in a non-junction region, an apex surface on a distal edge of the junction layer, a top bevel, or a bottom bevel.

25. The semiconductor inspection tool system according to claim 23 or 24, wherein: The vertex sensor can be positioned facing the center of the multi-layer stack so that the focal plane of the vertex sensor is placed at one of the following locations: at a distal end of the junction area volume within the field of view of the vertex sensor, or at a distal end of the junction area unfilled volume.

26. The semiconductor inspection tool system of claim 25, wherein: The vertex sensor can be positioned such that a center of the field of view of the vertex sensor is directed toward a distal end of the engagement region volume.

27. The semiconductor inspection tool system according to any one of claims 23 to 26, wherein: The vertex sensor is configured and operable to collect radiation reflected from the top planar area or the bottom planar area.

28. The semiconductor inspection tool system according to any one of claims 23 to 27, wherein: The side sensor is configured and operable to be positioned at an angle to the normal direction, the angle being within a range of up to approximately + / - 80 degrees.

29. The semiconductor inspection tool system of any of the preceding claims, further comprising an optical element placed at an edge of the multilayer stack and configured and operable to deviate the path of the reflected electromagnetic radiation and direct the reflected electromagnetic radiation to the joint area sensor unit.

30. The semiconductor inspection tool system of claim 29, wherein: The optical element includes at least one of an optical lens, a beam splitter, a mirror, a prism, a reflective surface, a light pipe, or a fiber optic cable.

31. The semiconductor inspection tool system according to claim 29 or 30, wherein: The first illumination device is oriented opposite to the optical axis of the bonding area sensor with respect to a normal direction of the edge of the wafer to achieve simultaneous illumination and collection of reflected electromagnetic radiation.

32. A semiconductor inspection tool system according to any one of the preceding claims, wherein: The first illumination device is configured and operable to generate at least one first illumination radiation having a main direction defining a non-zero angle with a central plane of the engagement region.

33. A semiconductor inspection tool system according to any one of the preceding claims, wherein: At least one of the first lighting device and the second lighting device is arranged along a lighting arc.

34. A semiconductor inspection tool system according to any one of the preceding claims, wherein: At least one of the first lighting device and the second lighting device comprises at least one guiding element connected to a light source; Each of the at least one guiding element is configured and operable to direct the first optical radiation or the second optical radiation to a specific junction area of ​​the multilayer stack.

35. A semiconductor inspection tool system according to any one of the preceding claims, wherein: At least one of the first illumination device and the second illumination device is configured and operable to generate a collimated light beam.

36. The semiconductor inspection tool system of claim 35, wherein: Each of at least one of the first illumination device and the second illumination device includes at least one of a light source emitting at least one collimated light beam or a non-collimated light source optically coupled to any collimator element.

37. The semiconductor inspection tool system of claim 36, wherein: Each of the at least one of the first and second illumination devices is configured and operable to direct the at least one collimated light beam or non-collimated light beam to the interstitial space opening in a normal direction or a non-normal direction of an edge of the multilayer stack.

38. A semiconductor inspection tool system according to any one of the preceding claims, wherein: The bonding area sensor unit is configured and operable to collect reflected electromagnetic radiation from the bonding area volume, the reflected electromagnetic radiation being directed in a normal direction or a non-normal direction to an edge of the multilayer stack of a wafer.

39. The semiconductor inspection tool system of claim 38, wherein: The joint area sensor unit is configured and operable to be positioned at least one of: at an angle off normal to at least one of the first lighting device or the second lighting device or to the side of at least one of the first lighting device or the second lighting device.

40. A method for detection, comprising: generating at least one first illuminating radiation and directing the at least one first illuminating radiation to at least one junction region unfilled volume formed between two layers of the multilayer stack; generating at least one second illuminating radiation and directing the at least one second illuminating radiation at an edge of the multilayer stack, the at least one second illuminating radiation being configured for illuminating at least a normal edge of at least one layer, wherein the at least one second illuminating radiation has different radiation parameters than the first illuminating radiation; Reflected electromagnetic radiation from a joint region volume is collected and at least one sensing data indicative of the joint region is generated, wherein the reflected electromagnetic data is indicative of more than one rotation period.

41. The method of claim 40 further comprises receiving output data indicating a plurality of rotation cycles, and generating an image indicating at least one vertex surface of a layer within the multilayer stack, wherein the at least one vertex surface comprises at least one slope of a layer within the multilayer stack.

42. The method of claim 40 or 41 further comprising receiving output data indicating at least two rotational cycles at different focus positions and generating a fully focused image indicating at least one segment of the vertex surface of the multilayer stack.

43. The method according to any one of claims 40 to 42 also includes changing the exposure rate and other exposure-related parameters of the elements of the joint area sensor unit and at least the first lighting device or the second lighting device during a rotation cycle, in the middle of a rotation or at each rotation cycle.

44. The method of claim 43, wherein: Collecting reflected electromagnetic radiation from the junction region volume includes collecting radiation reflected from at least one region including an apex region of a layer of the multilayer stack.

45. The method of claim 44, wherein: The apex region defines at least one of: an apex surface in the junction region unfilled volume, an apex surface in a non-junction region, an apex surface on a distal edge of a junction layer, a top bevel, or a bottom bevel.

46. ​​The method of claim 45, wherein: Generating said at least one first illuminating radiation and collecting said reflected electromagnetic radiation from the engagement area volume are performed substantially simultaneously.

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