Phase shifter

Abstract

The embodiment of the invention provides a phase shifter. The phase shifter comprises a substrate; an insulating layer formed over the substrate; a capping layer formed over the insulating layer; the covering layer comprises at least one waveguide and at least one semiconductor region, and the waveguides and the semiconductor regions are alternately arranged in the first direction; the semiconductor region comprises at least one first semiconductor and at least one second semiconductor, the first semiconductors and the second semiconductors are alternately arranged in the second direction, and the doping types of the first semiconductors and the second semiconductors are different; the second direction is the extension direction of the waveguide, and the first direction and the second direction are not parallel; the metal layer is formed above the covering layer, the metal layer comprises at least one metal block, each metal block is used for electrically connecting the first semiconductor and the second semiconductor which are adjacent in the first direction or the second direction, and the electrically connected first semiconductor and the second semiconductor form a heating area or a cooling area; and the heating area or the cooling area is used for performing phase adjustment on the optical signal transmitted by the waveguide.

Description

Technical Field

[0001] The present disclosure relates to the technical field of photonic chips, and in particular to a phase shifter. Background Art

[0002] Optical phase shifters can include thermo-optic phase shifters (TOPS) and electro-optic phase shifters (EOPS). Thermo-optic phase shifters are based on the thermo-optic effect, which means that the refractive index of a material changes with temperature. The change in refractive index directly affects the phase of the light wave, thereby achieving precise control of the phase of the light wave.

[0003] At present, conventional thermo-optical phase shifters use Joule heat as a heat source and can only generate heat. In addition, the phase change of conventional thermo-optical phase shifters is positively correlated with the temperature change; if the thermo-optic coefficient of the material is positive (or negative), the phase change can only be positive (or negative), resulting in the phase shift range and power of the thermo-optical phase shifter being limited. Summary of the invention

[0004] An embodiment of the present disclosure provides a phase shifter.

[0005] In a first aspect, an embodiment of the present disclosure provides a phase shifter, the phase shifter comprising:

[0006] substrate;

[0007] an insulating layer formed above the substrate;

[0008] A covering layer is formed on the insulating layer; the covering layer comprises at least one waveguide and at least one semiconductor region, the waveguide and the semiconductor region are alternately arranged along a first direction; the semiconductor region comprises at least one first semiconductor and at least one second semiconductor, the first semiconductor and the second semiconductor are alternately arranged along a second direction, and the first semiconductor and the second semiconductor have different doping types; the second direction is an extension direction of the waveguide, and the first direction and the second direction are not parallel;

[0009] A metal layer is formed above the covering layer, the metal layer includes at least one metal block, each of the metal blocks is used to electrically connect the first semiconductor and the second semiconductor adjacent to each other along the first direction or the second direction, the electrically connected first semiconductor and the second semiconductor form a heating area or a cooling area, and the heating area or the cooling area is used to perform phase adjustment on the optical signal transmitted by the waveguide.

[0010] In some embodiments, there are multiple at least one semiconductor region, and the alternating order of the first semiconductor and the second semiconductor in adjacent semiconductor regions is different.

[0011] In some embodiments, the at least one metal block is in multiple numbers, and the multiple metal blocks include at least one first metal block and at least one second metal block, the first metal block corresponds to the heating area, and the second metal block corresponds to the cooling area;

[0012] The at least one first metal block and the at least one second metal block are respectively located above both sides of the semiconductor region along the first direction.

[0013] In some embodiments, the metal layer also includes a first power block and a second power block, the first power block and the second power block are respectively electrically connected to two semiconductors of the at least one first semiconductor and the at least one second semiconductor as a current inflow end and a current outflow end, the first power block receives a first voltage, and the second power block receives a second voltage; the first voltage and the second voltage are a pair of opposite voltages.

[0014] In some embodiments, at least one groove extending along the second direction is formed in the phase shifter, and the groove exposes a portion of the semiconductor region and / or the groove exposes a portion of the substrate.

[0015] In some embodiments, the groove is located between the heating area and the cooling area.

[0016] In some embodiments, the first semiconductor is a P-type semiconductor, and the second semiconductor is an N-type semiconductor;

[0017] In the heating area, current flows from the second semiconductor through the first metal block to the first semiconductor;

[0018] In the cooling region, current flows from the first semiconductor through the second metal block to the second semiconductor.

[0019] In some embodiments, the phase shifter further comprises a plurality of contact structures between the cover layer and the metal layer;

[0020] The metal layer is electrically connected to the first semiconductor and the second semiconductor through the plurality of contact structures.

[0021] In some embodiments, the metal block is formed above each of the waveguides.

[0022] In some embodiments, when the cover layer includes one waveguide or two waveguides, the metal block is used to electrically connect the first semiconductor and the second semiconductor adjacent to each other along the second direction;

[0023] In the case where the covering layer includes three or more waveguides, the metal blocks located on both sides of the covering layer are used to electrically connect the first semiconductor and the second semiconductor adjacent to each other along the second direction, and the remaining metal blocks are used to electrically connect the first semiconductor and the second semiconductor adjacent to each other along the first direction.

[0024] In a second aspect, an embodiment of the present disclosure provides a modulator, comprising a phase shifter as described in any one of the first aspects.

[0025] In a third aspect, an embodiment of the present disclosure provides a chip, comprising a phase shifter as described in any one of the first aspect, or a modulator as described in the second aspect.

[0026] The embodiment of the present disclosure provides a phase shifter, which includes: a substrate; an insulating layer formed on the substrate; a covering layer formed on the insulating layer; the covering layer includes at least one waveguide and at least one semiconductor region, the waveguide and the semiconductor region are alternately arranged along a first direction; the semiconductor region includes at least one first semiconductor and at least one second semiconductor, the first semiconductor and the second semiconductor are alternately arranged along a second direction, and the doping types of the first semiconductor and the second semiconductor are different; the second direction is the extension direction of the waveguide, and the first direction and the second direction are not parallel; a metal layer formed on the covering layer, the metal layer includes at least one metal block, each metal block is used to electrically connect the first semiconductor and the second semiconductor adjacent to each other along the first direction or the second direction, and the electrically connected first semiconductor and the second semiconductor form a heating area or a cooling area, and the heating area or the cooling area is used to adjust the phase of the optical signal transmitted by the waveguide. In this way, based on the Peltier effect, the present disclosure electrically connects the first semiconductor and the second semiconductor of different doping types to form a heating area or a cooling area, which can realize the on-chip cold source and the on-chip heat source at the same time; and the cold source and the heat source can be swapped by adjusting the positive and negative of the applied voltage, thereby improving the phase shift range of the phase shifter. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 A schematic diagram of the structure of a phase shifter provided in an embodiment of the present disclosure;

[0028] Figure 2 A schematic top view of a phase shifter provided in an embodiment of the present disclosure Figure 1 ;

[0029] Figure 3 A schematic top view of a phase shifter provided in an embodiment of the present disclosure Figure 2 ;

[0030] Figure 4 A schematic top view of a phase shifter provided in an embodiment of the present disclosure Figure 3 ;

[0031] Figure 5 A schematic top view of a phase shifter provided in an embodiment of the present disclosure Figure 4 ;

[0032] Figure 6 A schematic top view of a phase shifter provided in an embodiment of the present disclosure Figure 5 ;

[0033] Figure 7 A schematic diagram of the structure of a modulator provided in an embodiment of the present disclosure;

[0034] Figure 8 A schematic diagram of the composition structure of a chip provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0035] The following will be combined with the drawings in the embodiments of the present disclosure to clearly and completely describe the technical solutions in the embodiments of the present disclosure. It is understood that the specific embodiments described herein are only used to explain the relevant disclosure, rather than to limit the disclosure. It should also be noted that, for the convenience of description, only the parts related to the relevant disclosure are shown in the drawings.

[0036] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. The terms used herein are only for the purpose of describing the embodiments of the present disclosure and are not intended to limit the present disclosure.

[0037] In the following description, reference is made to “some embodiments”, which describe a subset of all possible embodiments, but it will be understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0038] It should be pointed out that the terms "first\second\third" involved in the embodiments of the present disclosure are merely used to distinguish similar objects and do not represent a specific ordering of the objects. It can be understood that "first\second\third" can be interchanged in a specific order or sequence where permitted, so that the embodiments of the present disclosure described here can be implemented in an order other than that illustrated or described here.

[0039] Optical phase shifters are basic units in optoelectronic integrated circuits. They can be integrated into integrated optical structures such as directional couplers and Mach-Zehnder interferometers as control units to achieve functions such as optical switches, optical phased arrays, photon matrix calculations, optical quantum bit control, and optical quantum calculations. Optical phase shifters are widely used in optical communication networks, laser radars, photonic neural networks, optical quantum networks, and other fields.

[0040] Existing optical phase shifters are generally implemented with wave guides (WG), which use electro-optical effect, acousto-optic effect, magneto-optical effect, thermo-optical effect, free carrier dispersion effect, etc. to change the effective refractive index of the wave guide structure, thereby achieving phase modulation of the optical signal in the wave guide. Thermo-optic phase shifters and electro-optic phase shifters are the two main phase shifter technologies in silicon-based optoelectronics, and they each have different characteristics.

[0041] Silicon-based electro-optic phase shifters are usually based on the carrier dispersion effect, which refers to the effect of adjusting the refractive index of the material by changing the concentration of free carriers in semiconductor materials, thereby affecting the propagation characteristics of light waves. Compared with thermo-optic phase shifters, electro-optic phase shifters can achieve faster optical phase modulation speeds and are suitable for high-frequency applications. Electro-optic phase shifters directly change the refractive index of the waveguide by applying an electric field, and their response speed is better than the thermo-optic effect based on temperature changes. However, the manufacturing process of electro-optic phase shifters is more complicated and relatively costly, so electro-optic phase shifters are usually used as high-speed modulators, and thermo-optic phase shifters are used as auxiliary operating point control for high-speed modulators.

[0042] Here, the operating point control of the Mach-Zehnder Modulator (MZM) refers to monitoring and adjusting the working state of the MZM modulator in the optical communication system to ensure that it operates at the optimal linear operating point. The MZM modulator is an optoelectronic modulator based on the principle of Mach-Zehnder interferometer, which modulates the optical signal by changing the phase in the optical path. In the optical communication system, the performance of the MZM modulator has an important impact on the link performance. The MZM modulator has three main static operating points: orthogonal bias point, minimum transmission point and maximum transmission point. Among them, the orthogonal bias point is a linear operating point with an optimal linear operating range, and can reduce the impact of signal nonlinear distortion on adjacent channels. The minimum transmission point and the maximum transmission point are nonlinear operating points, which will cause communication signal distortion. The purpose of operating point control is to keep the MZM modulator at the optimal linear operating point to achieve optimal modulation performance and minimum signal distortion. Due to factors such as ambient temperature changes and charge accumulation, the linear operating point of the MZM modulator may change, so it is necessary to monitor and adjust the working state of the MZM modulator in real time.

[0043] Thermo-optic phase shifters are based on the thermo-optic effect, which refers to the change in the refractive index of a material as the temperature changes. In silicon-based optoelectronics, the thermo-optic coefficient refers to the rate at which the refractive index of an optical material changes with temperature, also known as the temperature coefficient of refractive index. Thermo-optic phase shifters take advantage of the high thermo-optic coefficient of silicon, which is approximately 1.8×10 -4 K -1 (K stands for Kelvin temperature), which means that even small changes in temperature can cause significant changes in the refractive index of the silicon waveguide.

[0044] Thermo-optic phase shifters are favored for their simple production, low cost, low power consumption and low insertion loss, especially in the field of low-cost and low-frequency modulation. They use the thermo-optic effect of silicon materials to adjust the refractive index of the waveguide through temperature changes, thereby achieving control of the phase of the light wave. In related technologies, the phase shifter contains a heater inside, which is usually made of high-resistivity metal or doped waveguide. When current flows through the heater, its temperature rises, and the adjacent silicon waveguide also heats up, causing the refractive index to change. This change in refractive index directly affects the phase of the light wave, thereby achieving precise control of the phase of the light wave.

[0045] At present, the working principle of traditional thermo-optic phase shifters is to use the Joule heat generated by the current passing through the resistor as the heat source. The thermal power is proportional to the square of the current, which can only generate heat, and on-chip cooling cannot be achieved without an on-chip cold source. In addition, traditional thermo-optic phase shifters are based on the thermo-optic effect, and the phase change is positively correlated with the temperature change. When using traditional thermo-optic phase shifters, if the thermo-optic coefficient of the material is positive (or negative), the phase change can only be positive (or negative), resulting in the phase shift range and power of the thermo-optic phase shifter being limited.

[0046] Based on this, an embodiment of the present disclosure provides a phase shifter, which includes: a substrate; an insulating layer formed on the substrate; a covering layer formed on the insulating layer; the covering layer includes at least one waveguide and at least one semiconductor region, the waveguide and the semiconductor region are alternately arranged along a first direction; the semiconductor region includes at least one first semiconductor and at least one second semiconductor, the first semiconductor and the second semiconductor are alternately arranged along a second direction, and the doping types of the first semiconductor and the second semiconductor are different; the second direction is the extension direction of the waveguide, and the first direction and the second direction are not parallel; a metal layer formed on the covering layer, the metal layer includes at least one metal block, each metal block is used to electrically connect the first semiconductor and the second semiconductor adjacent to each other along the first direction or the second direction, and the electrically connected first semiconductor and the second semiconductor form a heating area or a cooling area, and the heating area or the cooling area is used to adjust the phase of the optical signal transmitted by the waveguide. In this way, based on the Peltier effect, the present disclosure electrically connects the first semiconductor and the second semiconductor of different doping types to form a heating area or a cooling area, which can realize the on-chip cold source and the on-chip heat source at the same time; and the cold source and the heat source can be swapped by adjusting the positive and negative of the applied voltage, thereby improving the phase shift range of the phase shifter.

[0047] The embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings.

[0048] In one embodiment of the present disclosure, see Figure 1 , which shows a schematic diagram of the composition structure of a phase shifter provided by an embodiment of the present disclosure, specifically a cross-sectional schematic diagram. Figure 1 As shown, the phase shifter 10 comprises:

[0049] Substrate 11;

[0050] an insulating layer 12 formed on the substrate 11;

[0051] A cover layer 13 is formed on the insulating layer 12; the cover layer 13 includes at least one waveguide 131 and at least one semiconductor region 132, the waveguide 131 and the semiconductor region 132 are alternately arranged along a first direction; the semiconductor region 132 includes at least one first semiconductor 1321 and at least one second semiconductor 1322, the first semiconductor 1321 and the second semiconductor 1322 are alternately arranged along a second direction, and the first semiconductor 1321 and the second semiconductor 1322 have different doping types; the second direction is the extension direction of the waveguide 131, and the first direction and the second direction are not parallel;

[0052] A metal layer 14 is formed above the cover layer 13, and the metal layer 14 includes at least one metal block 141 (only one number is shown in the figure). Each metal block 141 is used to electrically connect a first semiconductor 1321 and a second semiconductor 1322 that are adjacent to each other along a first direction or a second direction. The electrically connected first semiconductor 1321 and second semiconductor 1322 form a heating area a1 or a cooling area a2. The heating area a1 or the cooling area a2 is used to perform phase adjustment on an optical signal transmitted by the waveguide 131.

[0053] It should be noted that the embodiments of the present disclosure belong to the technical field of photonic chips or electro-optic modulators, and the phase shifter 10 can specifically be a silicon-based thermo-optical phase shifter based on the Peltier effect. It can be understood that the present disclosure uses the Peltier effect instead of the Joule thermal effect as the basic heat source, and based on the Peltier effect, the signal phase can be changed to achieve signal phase regulation.

[0054] The Peltier effect is a thermoelectric effect discovered by French physicist Jean Peltier in 1834. The Peltier effect refers to the phenomenon that when a circuit composed of two different conductors or semiconductor materials (usually P-type materials and N-type materials) is connected to a direct current, heat absorption or heat release occurs at the contact point. Specifically, when electrons flow from low-energy P-type materials to high-energy N-type materials, the electrons need to absorb heat, causing the temperature at the node to drop, forming a cold surface; on the contrary, when electrons flow from N-type materials to P-type materials, the electrons release heat, causing the temperature at the node to rise, forming a hot surface. Among them, P-type materials refer to materials formed by doping trivalent impurity elements (such as boron, gallium, aluminum, etc.) into semiconductor materials, and N-type materials refer to materials formed by doping pentavalent impurity elements (such as phosphorus, arsenic, etc.) into semiconductor materials.

[0055] In the embodiment of the present disclosure, the first semiconductor 1321 and the second semiconductor 1322 are doped differently, specifically, they are N-type semiconductor and P-type semiconductor, respectively, so that when the current flows through the metal block 141 through the first semiconductor 1321 and the second semiconductor 1322, a heating area a1 (also called a heat source) or a cooling area a2 (also called a cold source) is formed.

[0056] It should also be noted that the substrate 11 may be a silicon substrate or other semiconductor elements, such as germanium (Ge), or include semiconductor compounds, such as silicon carbide (SiC), gallium arsenide (GaAs), gallium phosphide (GaP), indium phosphide (InP), indium arsenide (InAs) or indium antimonide (InSb), or include other semiconductor alloys, such as silicon germanium (SiGe), gallium arsenic phosphide (GaAsP), aluminum indium arsenide (AlInAs), aluminum gallium arsenide (AlGaAs), gallium indium arsenide (GaInAs), gallium indium phosphide (GaInP), and / or gallium indium arsenide phosphide (GaInAsP) or a combination thereof, which is not specifically limited in the embodiments of the present disclosure. Exemplarily, the substrate 11 is a silicon substrate.

[0057] In addition, the insulating layer 12 is also called a buried oxide (BOX), and the material of the insulating layer 12 may be silicon dioxide (SiO2) or other insulating media, which is not specifically limited. The material of the metal layer (Metal) 14 may be aluminum (Al), copper (Cu) and its alloy, or gold (Au), etc., which is not specifically limited. The main material of the waveguide 131 and the semiconductor region 132 is silicon. In the covering layer 13, except for the waveguide 131 and the semiconductor region 132, the remaining materials may be silicon dioxide; the filling material of the remaining parts of the phase shifter 10 may also be silicon dioxide.

[0058] It should also be noted that the metal layer 14 is formed on a portion of the covering layer 13 , that is, the metal layer 14 does not completely cover the covering layer 13 .

[0059] For example, Figure 1 Only one waveguide 131 and one semiconductor region 132 are shown. In the disclosed embodiment, Figure 1 It is mainly used to indicate the height relationship between the substrate 11, the insulating layer 12, the cover layer 13 and the metal layer 14. For the specific position relationship between the waveguide 131, the first semiconductor 1321 and the second semiconductor 1322, please refer to the following Figures 2 to 6 To understand.

[0060] based on Figure 1 The phase shifter 10 shown in FIG. Figure 2 , which shows a schematic top view of a phase shifter provided by an embodiment of the present disclosure Figure 1 .like Figure 2 As shown, the first semiconductor 1321 and the second semiconductor 1322 are periodically arranged alternately along the second direction, and the number of the two semiconductors is not limited. For example, Figure 2 The semiconductor region 132 in FIG. 1 includes two first semiconductors 1321 and one second semiconductor 1322 .

[0061] It should be noted that in the embodiment of the present disclosure, the first direction and the second direction intersect, and the first direction and the second direction may be perpendicular to each other or may intersect at other angles, and no specific limitation is made to this. For example, the specific implementation of the embodiment of the present disclosure is described in detail by taking the first direction and the second direction being perpendicular to each other as an example. Figure 2 As shown, the second direction is the extension direction of the waveguide 131 , and the first direction is the extension direction of the first semiconductor 1321 or the second semiconductor 1322 .

[0062] In some embodiments, Figure 1 As shown, the phase shifter 10 may further include a plurality of contact structures 15 (only one reference numeral is shown in the figure) located between the cover layer 13 and the metal layer 14;

[0063] The metal layer 14 is electrically connected to the first semiconductor 1321 and the second semiconductor 1322 through a plurality of contact structures 15 .

[0064] It should be noted that a plurality of contact structures (Contact) 15 can form a connection layer for connecting the metal layer 14 and the semiconductor (the first semiconductor 1321 and the second semiconductor 1322). The material of the contact structure 15 can be indium tin oxide (ITO), tungsten (Tungsten) or other materials, which are not specifically limited.

[0065] It should also be noted that there is no specific limitation on the shape and number of the contact structures 15. If the volume of the contact structures 15 is small, each metal block 141 can be electrically connected to the first semiconductor 1321 and the second semiconductor 1322 through a large number of contact structures 15, for example, each metal block 141 is electrically connected to the first semiconductor 1321 and the second semiconductor 1322 through an array composed of a plurality of small square pillars; if the volume of the contact structures 15 is large, each metal block 141 can be electrically connected to the first semiconductor 1321 and the second semiconductor 1322 through a small number or one contact structure 15, for example, each metal block 141 is electrically connected to the first semiconductor 1321 and the second semiconductor 1322 through an integral large square pillar.

[0066] In some embodiments, Figure 1 or Figure 2 As shown, at least one groove 16 extending along the second direction is formed in the phase shifter 10 , and the groove 16 exposes a portion of the semiconductor region 132 and / or the groove 16 exposes a portion of the substrate 11 .

[0067] In this embodiment, the groove 16 acts as a heat-insulating groove to transfer heat with the air. The heat flux density can be calculated by formula (1):

[0068]

[0069] Where q represents the heat flux density, the unit is watts per square meter (W / m 2 ), λ is the thermal conductivity, the unit is W / (m·K), T is the temperature field, the unit is K, x is the distance, the unit is m. ΔT is the temperature difference, Δx is the distance difference.

[0070] It can be obtained from formula (1) that the larger the thermal conductivity λ is, the higher the temperature conduction efficiency is.

[0071] It should be noted that the thermal conductivity of silicon dioxide can reach 12W / (m·K), while the thermal conductivity of air is less than 0.03W / (m·K). When silicon dioxide is used as the filling material of the phase shifter 10, heat is more easily conducted away, heat dissipation is faster, and heat cannot be concentrated near the waveguide 131; and after the air groove is opened (forming the groove 16), the air groove can be used as an insulating groove to reduce heat transfer and make the heat more concentrated.

[0072] It should also be noted that the trench 16 does not contact the metal layer 14. In addition, the length of the trench 16 along the second direction is similar to the length of the waveguide 131, and the value is not specifically limited.

[0073] It should also be noted that grooves are usually formed on both sides of the waveguide 131. The closer the groove 16 is to the waveguide 131, the more concentrated the heat of the phase shifter 10 is, and the higher the thermal efficiency is. In this embodiment, the position of the groove 16 is not specifically limited. The groove 16 can be located in the semiconductor region 132, and / or the groove 16 is not located in the semiconductor region 132 but is located on one side of the waveguide 131. For example, Figure 2 As shown, the recess 16 is located in the semiconductor region 132 , that is, is grooved in the semiconductor region 132 .

[0074] In some embodiments, when the groove 16 is located in the semiconductor region 132 , the depth of the groove 16 is from the surface of the phase shifter 10 to the surface of the semiconductor region 132 ;

[0075] When the groove 16 is not located in the semiconductor region 132 but is located on the waveguide 131 side, the depth of the groove 16 is from the surface of the phase shifter 10 to the surface of the substrate 11 .

[0076] Preferably, in some embodiments, the groove 16 is located between the heating area a1 and the cooling area a2.

[0077] In the disclosed embodiment, the phase shifter 10 is based on the Peltier effect. The phase shifter 10 includes a heating area a1 and a cooling area a2. A groove is formed between the heating area a1 and the cooling area a2 to reduce heat conduction and improve thermal efficiency.

[0078] When the metal layer 14 includes only one metal block 141 , without changing the current flow direction, the first semiconductor 1321 and the second semiconductor 1322 electrically connected by the metal block 141 can only form the heating area a1 or the cooling area a2 .

[0079] In some embodiments, Figure 2 As shown, the number of at least one metal block 141 is multiple, and the multiple metal blocks 141 include at least one first metal block 1411 and at least one second metal block 1412. The first metal block 1411 corresponds to the heating area a1, and the second metal block 1412 corresponds to the cooling area a2;

[0080] At least one first metal block 1411 and at least one second metal block 1412 are respectively located above both sides of the semiconductor region 132 along the first direction.

[0081] That is, the metal block 141 in the heating area a1 is the first metal block 1411 , and the metal block 141 in the cooling area a2 is the second metal block 1412 .

[0082] It should be noted that the metal layer 14 is formed on a portion of the cover layer 13 . In each semiconductor region 132 , a plurality of metal blocks 141 are distributed along both sides of the first direction, with one side forming a heating region a1 and the other side forming a cooling region a2 .

[0083] Furthermore, in some embodiments, Figure 2 As shown, the metal layer 14 may also include a first power block 142 and a second power block 143, which are respectively electrically connected to two semiconductors serving as a current inflow end and a current outflow end in at least one first semiconductor 1321 and at least one second semiconductor 1322, the first power block 142 receives a first voltage, and the second power block 143 receives a second voltage; the first voltage and the second voltage are a pair of opposite voltages.

[0084] For example, Figure 2 As shown, the two first semiconductors 1321 serve as semiconductors at the current inflow end and the current outflow end respectively, and the first power block 142 and the second power block 143 are respectively located at two sides of the semiconductor region 132 along the first direction.

[0085] It should be noted that the first power block 142 is connected to one end of the DC power supply to receive a first voltage; the second power block 143 is connected to the other end of the DC power supply to receive a second voltage. One end of the DC power supply is the positive electrode of the power supply, and the other end is the negative electrode of the power supply. The first voltage and the second voltage are a pair of opposite voltages. For example, if the first voltage is 12 volts (Volt, V), the second voltage is -12V; or, if the first voltage is -12V, the second voltage is 12V. Here, the specific values ​​of the first voltage and the second voltage are not specifically limited.

[0086] It should also be noted that the first power block 142 and the second power block 143 can be electrically connected to the first semiconductor 1321 or the second semiconductor 1322 through a certain number of contact structures 15, and the shape and number of the contact structures 15 are not specifically limited. The first power block 142 and the second power block 143 are used to guide the current to the semiconductor via the contact structure 15; that is, the first semiconductor 1321 and the second semiconductor 1322 adjacent to each other in the first direction or the second direction are connected in series through the metal layer 14 and the contact structure 15 to form a heating area a1 or a cooling area a2.

[0087] In this embodiment, the phase shifter 10 can realize phase control, and is widely used in optical chips such as optical communication chips, optical quantum chips, optical computing chips, etc., which have the need to control the delay and phase of optical signals, such as adjustable optical delay lines, optical phased arrays, optical frequency combs, etc. By adjusting the positive and negative of the voltage (the first voltage and the second voltage), that is, adjusting the original positive voltage to a negative voltage and adjusting the original negative voltage to a positive voltage, the direction of the current can be changed, so that the heating area a1 and the cooling area a2 are swapped, so that the positive and negative of the phase change amount can be adjusted according to the positive and negative of the applied voltage based on the Peltier effect, and the phase shift range of the optical signal can be widened.

[0088] The first semiconductor 1321 and the second semiconductor 1322 have different doping types. When the positive and negative values ​​of the first voltage and the second voltage do not change, but the types of the first semiconductor 1321 and the second semiconductor 1322 change, the direction of the current will also change. Figure 2 As shown, the first semiconductor 1321 is a P-type semiconductor, and the second semiconductor 1322 is an N-type semiconductor;

[0089] In the heating area a1, the current flows from the second semiconductor 1322 to the first semiconductor 1321 through the first metal block 1411;

[0090] In the cooling area a2 , current flows from the first semiconductor 1321 to the second semiconductor 1322 through the second metal block 1412 .

[0091] It should be noted that the current starts from the first power block 142, passes through the first semiconductor 1321 and the second semiconductor 1322 electrically connected by the metal block 141, and flows to the second power block 143 to form a loop; or, the current starts from the second power block 143, passes through the first semiconductor 1321 and the second semiconductor 1322 electrically connected by the metal block 141, and flows to the first power block 142 to form a loop. Exemplarily, the specific implementation of the embodiment of the present disclosure is described in detail by taking the current flowing from the first power block 142 to the second power block 143 as an example. The phase shifter 10 provided in the present disclosure is based on the Peltier effect. When a current passes through a loop composed of different conductors (the first semiconductor 1321 and the second semiconductor 1322), heat absorption and heat release phenomena will occur in the joint area of ​​different conductors as the current direction changes, forming a cooling area a2 or a heating area a1. The current flow direction can be changed by adjusting the positive and negative voltage, thereby adjusting the positive and negative phase change of the optical signal and improving the phase shift range.

[0092] It should also be noted that the metal layer 14 includes at least one metal block 141, and the connection between the metal block 141 and the semiconductor ensures that the current direction on the same side (heating area a1 or cooling area a2) is consistent (flowing from the first semiconductor 1321 to the second semiconductor 1322 or from the second semiconductor 1322 to the first semiconductor 1321); the first power block 142 and the second power block 143 are used to guide the current to the semiconductor via the contact structure 15.

[0093] Further, see Figure 3 , which shows a schematic top view of a phase shifter provided by an embodiment of the present disclosure Figure 2 The semiconductor region 132 may include two first semiconductors 1321 and two second semiconductors 1322. The specific current flow direction is as follows: Figure 3 As shown, a first semiconductor 1321 and a second semiconductor 1322 are respectively used as semiconductors at the current inflow end and the current outflow end, and the first power block 142 and the second power block 143 are respectively located on the same side of the semiconductor region 132 along the first direction.

[0094] It should be noted that each metal block 141 is electrically connected to the first semiconductor 1321 and the second semiconductor 1322. In different situations, the positions of multiple metal blocks 141, the first power block 142 and the second power block 143 can be adjusted to ensure that the current direction on the same side (heating area a1 or cooling area a2) is consistent.

[0095] In some embodiments, a metal block is formed above each waveguide 131 .

[0096] That is, the first metal block 1411 and / or the second metal block 1412 in the metal layer 14 is located above the waveguide 131 .

[0097] In some embodiments, the first power block 142 and / or the second power block 143 are also located above the waveguide 131 .

[0098] In some embodiments, when the cover layer 13 includes one waveguide 131 or two waveguides 131 , the metal block 141 is used to electrically connect the first semiconductor 1321 and the second semiconductor 1322 adjacent to each other along the second direction;

[0099] When the covering layer 13 includes three or more waveguides 131, the metal blocks 141 located on both sides of the covering layer 13 are used to electrically connect the first semiconductor 1321 and the second semiconductor 1322 adjacent to each other along the second direction, and the remaining metal blocks 141 are used to electrically connect the first semiconductor 1321 and the second semiconductor 1322 adjacent to each other along the first direction.

[0100] like Figure 2 or Figure 3 As shown, the cover layer 13 includes a waveguide 131 and a semiconductor region 132, wherein the semiconductor region 132 is located on one side of the waveguide 131; and a plurality of second metal blocks 1412 are located above the waveguide 131. It can be understood that when the current flow direction is changed, the plurality of first metal blocks 1411 are located above the waveguide 131.

[0101] See also Figure 4 , which shows a schematic top view of a phase shifter provided by an embodiment of the present disclosure Figure 3 .like Figure 4 As shown, the phase shifter 10 includes two waveguides 131 and a semiconductor region 132, the semiconductor region 132 is located between the two waveguides 131, a plurality of first metal blocks 1411 are located above one waveguide 131, and a plurality of second metal blocks 1412 are located above the other waveguide 131. The heating region a1 is used to adjust the phase of the optical signal transmitted by the first waveguide 131, and the cooling region a2 is used to adjust the phase of the optical signal transmitted by the second waveguide 131, and the phase shift directions of the optical signals on the two waveguides 131 are opposite.

[0102] It should be noted that in one possibility, Figure 4 As shown, the phase shifter 10 may include a groove 16, and the groove 16 is located between the heating area a1 and the cooling area a2.

[0103] In another possibility, see Figure 5 , which shows a schematic top view of a phase shifter provided by an embodiment of the present disclosure Figure 4 .like Figure 5 As shown, the phase shifter 10 may include three grooves 16. In addition to the groove 16 located between the heating area a1 and the cooling area a2, grooves 16 may also be formed on the other side of the two waveguides 131 away from the semiconductor area 132 along the first direction.

[0104] See also Figure 6 , which shows a schematic top view of a phase shifter provided by an embodiment of the present disclosure Figure 5 .like Figure 6 As shown, the phase shifter 10 includes three waveguides 131 and two semiconductor regions 132 , each semiconductor region 132 is located between two adjacent waveguides 131 , a plurality of first metal blocks 1411 are located above at least one waveguide 131 , and a plurality of second metal blocks 1412 are located above the remaining waveguides 131 .

[0105] It should be noted that a heating region a1 and a cooling region a2 are sequentially formed on both sides of the first semiconductor region 132 along the first direction; and a cooling region a2 and a heating region a1 are sequentially formed on both sides of the second semiconductor region 132 along the first direction. It can be understood that by electrically connecting two adjacent semiconductor regions 132 along the first direction so that the two semiconductor regions 132 share one cooling region a2, the phase of the optical signal transmitted by the second waveguide 131 located in the middle is adjusted, and the two heating regions a1 are used to adjust the phase of the optical signals transmitted by the first and third waveguides 131.

[0106] It should also be noted that, according to actual conditions, the cover layer 13 may include more waveguides 131 and semiconductor regions 132 , for example, N semiconductor regions 132 (N is an integer greater than 1).

[0107] In one possibility, the cover layer 13 may include N+1 waveguides 131, and each semiconductor region 132 is located between two adjacent waveguides 131, that is, the cover layer 13 may include N+1 waveguides 131. Figure 6 The structure shown alternately forms a heating area a1 and a cooling area a2.

[0108] In another possibility, the cover layer 13 may include N waveguides 131 , and there is only one waveguide 131 next to the semiconductor region 132 on one side of the cover layer 13 .

[0109] In another possibility, the cover layer 13 may include N−1 waveguides 131 , and there is only one waveguide 131 next to each of the two semiconductor regions 132 located on both sides of the cover layer 13 .

[0110] In the embodiment of the present disclosure, the number of waveguides 131 and semiconductor regions 132 and the relationship between the two are not specifically limited.

[0111] In some embodiments, the number of at least one semiconductor region 132 is plural, and the alternating order of the first semiconductor 1321 and the second semiconductor 1322 in adjacent semiconductor regions 132 is different.

[0112] For example, Figure 6 As shown, the two semiconductor regions 132 each include three semiconductors. Specifically, the first semiconductor region 132 includes two first semiconductors 1321 and one second semiconductor 1322, and the alternating arrangement order is the first semiconductor 1321, the second semiconductor 1322, and the first semiconductor 1321; the second semiconductor region 132 includes one first semiconductor 1321 and two second semiconductors 1322, and the alternating arrangement order is the second semiconductor 1322, the first semiconductor 1321, and the second semiconductor 1322.

[0113] It should be noted that when the phase shifter 10 includes a plurality of semiconductor regions 132 , the types of semiconductors located at the same position along the second direction in different semiconductor regions 132 are different, so that a heating region a1 or a cooling region a2 can be formed.

[0114] The disclosed embodiment provides a phase shifter, firstly, a plurality of P-doping and N-doping are periodically and alternately performed on one side of the waveguide 131 to form two semiconductors (a first semiconductor 1321 and a second semiconductor 1322), and then the two semiconductors are connected in series through a metal layer 14 and a contact structure 15 to form a Peltier electrode, and the electrodes on both sides serve as a cold source (cooling area a2) and a heat source (heating area a1), respectively, and finally a groove is opened between the cold source and the heat source (forming a groove 16), so as to improve the thermal efficiency, and the cold source and the heat source can be swapped by adjusting the positive and negative voltage to improve the phase shift range. In other words, based on the Peltier effect, the disclosed embodiment can realize the on-chip cold source and the on-chip heat source at the same time, so as to double the phase shift range of the phase shifter 10.

[0115] In another embodiment of the present disclosure, see Figure 7 , which shows a schematic diagram of the structure of a modulator provided by an embodiment of the present disclosure. Figure 7 As shown, the modulator 20 at least includes the aforementioned phase shifter 10. The modulator 20 may also include a beam splitter 21, a phase modulator 22 and a beam combiner 23. For specific connection relationships, please refer to Figure 7 .

[0116] It should be noted that the beam splitter 21 may be a multi-mode interference (MMI) beam splitter, and the beam combiner 23 may be a MMI beam combiner. The beam splitter 21 may split the input optical signal into two or more beams, and the specific number is determined according to actual needs, and is not specifically limited to this. By way of example, the specific implementation of the embodiment of the present disclosure is described in detail by taking the beam splitter 21 splitting the input optical signal into two beams as an example.

[0117] For example, the structure of the phase shifter 10 is as follows: Figure 4As shown, it can be used for operating point control of the MZM electro-optical modulator. At this time, the modulator 20 is specifically an MZM modulator, which can keep the MZM modulator at the optimal linear operating point to achieve optimal modulation performance and minimum signal distortion. Specifically, after the optical signal is input by the waveguide 131, it is divided into two optical signals through the beam splitter 21, and then input to the phase shifter 10 after being electro-optically phase modulated by the phase modulator 22. The phase shifter 10 has two waveguides 131 at the cold source and the hot source respectively. When performing phase shifting, the phase shift directions of the optical signals transmitted by the two waveguides 131 are opposite, which can realize push-pull phase shifting and improve efficiency. After passing through the phase shifter 10, it is input to the combiner 23, which converts the phase modulation into intensity modulation, and finally outputs the combined optical signal.

[0118] It should be noted that the phase modulator 22 can adjust the two optical signals obtained after the splitting to have a phase difference of 90° (orthogonal point), 180° (minimum transmission point) or 0° (maximum transmission point).

[0119] It should also be noted that in the phase shifter 10, the two waveguides 131 sense opposite temperature changes, obtain phase modulation effects in opposite directions, and thus realize push-pull thermo-optical modulation. The refractive index of the corresponding waveguide 131 is changed by temperature change, thereby forming modulation effects in opposite directions in the two waveguides 131. In other words, the temperature and refractive index of the two waveguides 131 change at the same time, and the changes of the two are opposite, and the effects on the phase of the optical signal are also opposite, and finally push-pull phase shifting is realized.

[0120] In summary, the phase shifter 10 can realize on-chip cooling and heating, and improve the phase shift range of the phase shifter. In addition, the phase shifter 10 can realize push-pull operation when assisting the Mach-Zehnder structure electro-optic modulator to work and perform operating point control, thereby reducing device power consumption.

[0121] In the disclosed embodiment, the modulator 20 includes the aforementioned phase shifter 10 and has at least the same advantages as the phase shifter 10, which can simultaneously realize an on-chip cold source and an on-chip hot source, thereby increasing the phase shift range of the phase shifter 10 and improving thermal efficiency.

[0122] In another embodiment of the present disclosure, see Figure 8 , which shows a schematic diagram of the composition structure of a chip provided by an embodiment of the present disclosure. Figure 8 As shown, the chip 30 may include a phase shifter 10 , or a modulator 20 .

[0123] Specifically, in some embodiments, Figure 8 As shown in (a) of FIG. 1 , the chip 30 includes the aforementioned phase shifter 10. In other embodiments, as Figure 8 As shown in (b) of FIG. 8 , the chip 30 includes the aforementioned modulator 20 .

[0124] In the embodiment of the present disclosure, the chip 30 includes the aforementioned phase shifter 10 or modulator 20, and has at least the same advantages as the phase shifter 10 or modulator 20. It can simultaneously realize an on-chip cold source and an on-chip heat source, thereby increasing the phase shift range of the phase shifter 10 and improving thermal efficiency.

[0125] Details not disclosed in the embodiments of the present disclosure may be understood by referring to the description of the aforementioned embodiments.

[0126] The above description is only a preferred embodiment of the present disclosure and is not intended to limit the protection scope of the present disclosure.

[0127] It should be noted that in the present disclosure, the terms "include", "comprises" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "includes a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0128] The serial numbers of the above-mentioned embodiments of the present disclosure are only for description and do not represent the advantages or disadvantages of the embodiments.

[0129] The methods disclosed in several method embodiments provided in the present disclosure can be arbitrarily combined without conflict to obtain new method embodiments.

[0130] The features disclosed in several product embodiments provided in the present disclosure can be arbitrarily combined without conflict to obtain new product embodiments.

[0131] The features disclosed in several method or device embodiments provided in the present disclosure may be arbitrarily combined without conflict to obtain new method embodiments or device embodiments.

[0132] The above is only a specific embodiment of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art who is familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present disclosure, which should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.

Claims

1. A phase shifter, characterized in that: The phase shifter comprises: substrate; an insulating layer formed above the substrate; A covering layer is formed on the insulating layer; the covering layer comprises at least one waveguide and at least one semiconductor region, the waveguide and the semiconductor region are alternately arranged along a first direction; the semiconductor region comprises at least one first semiconductor and at least one second semiconductor, the first semiconductor and the second semiconductor are alternately arranged along a second direction, and the first semiconductor and the second semiconductor have different doping types; the second direction is an extension direction of the waveguide, and the first direction and the second direction are not parallel; A metal layer is formed above the covering layer, the metal layer includes at least one metal block, each of the metal blocks is used to electrically connect the first semiconductor and the second semiconductor adjacent to each other along the first direction or the second direction, the electrically connected first semiconductor and the second semiconductor form a heating area or a cooling area, and the heating area or the cooling area is used to perform phase adjustment on the optical signal transmitted by the waveguide.

2. The phase shifter according to claim 1, characterized in that: The number of the at least one semiconductor region is plural, and the alternating order of the first semiconductor and the second semiconductor in adjacent semiconductor regions is different.

3. The phase shifter according to claim 1, characterized in that The at least one metal block is in multiple numbers, and the multiple metal blocks include at least one first metal block and at least one second metal block, the first metal block corresponds to the heating area, and the second metal block corresponds to the cooling area; The at least one first metal block and the at least one second metal block are respectively located above both sides of the semiconductor region along the first direction.

4. The phase shifter according to claim 1, characterized in that: The metal layer also includes a first power block and a second power block, the first power block and the second power block are respectively electrically connected to two semiconductors of the at least one first semiconductor and the at least one second semiconductor as a current inflow end and a current outflow end, the first power block receives a first voltage, and the second power block receives a second voltage; the first voltage and the second voltage are a pair of opposite voltages.

5. The phase shifter according to claim 1, characterized in that: At least one groove extending along the second direction is formed in the phase shifter, and the groove exposes a portion of the semiconductor region and / or the groove exposes a portion of the substrate.

6. The phase shifter according to claim 5, characterized in that The groove is located between the heating area and the cooling area.

7. The phase shifter according to claim 3, characterized in that: The first semiconductor is a P-type semiconductor, and the second semiconductor is an N-type semiconductor; In the heating area, current flows from the second semiconductor through the first metal block to the first semiconductor; In the cooling region, current flows from the first semiconductor through the second metal block to the second semiconductor.

8. The phase shifter according to claim 1, characterized in that The phase shifter further includes a plurality of contact structures between the cover layer and the metal layer; The metal layer is electrically connected to the first semiconductor and the second semiconductor through the plurality of contact structures.

9. The phase shifter according to claim 1, characterized in that: The metal block is formed above each of the waveguides.

10. The phase shifter according to claim 9, characterized in that In the case where the cover layer includes one waveguide or two waveguides, the metal block is used to electrically connect the first semiconductor and the second semiconductor adjacent to each other along the second direction; In the case where the covering layer includes three or more waveguides, the metal blocks located on both sides of the covering layer are used to electrically connect the first semiconductor and the second semiconductor adjacent to each other along the second direction, and the remaining metal blocks are used to electrically connect the first semiconductor and the second semiconductor adjacent to each other along the first direction.

Images