Method for controlling a voltage source array and voltage source array

Abstract

The application relates to a control method of a voltage source array and the voltage source array, which are applied to a voltage source array circuit, the voltage source array circuit comprising a plurality of DAC chips and a plurality of amplifiers, each DAC chip comprising a digital signal input interface and a plurality of voltage output interfaces, and each voltage output interface being connected with an input end of an amplifier; wherein the method comprises the following steps: controlling at least one DAC chip to convert a received digital signal into an analog voltage signal and output the analog voltage signal through a target voltage output interface; and controlling a target amplifier corresponding to the target voltage output interface to be connected, amplifying the analog voltage signal, and enabling an output end of the target amplifier to output target power.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electronic circuit design, in particular to a control method of a voltage source array and the voltage source array. BACKGROUND

[0002] At present, in the application of precise signal control and multi-channel analog signal output, digital-to-analog converters (DACs) are widely used to provide high-precision voltage output.

[0003] With the increasing demand of modern electronics for high-precision analog voltage devices, especially in optical sensors, precision instruments and power management systems, traditional low-precision voltage sources cannot meet the requirements of high precision, stability and driving power generation. In order to meet these needs, the prior art needs to use DAC chips to achieve precise voltage output.

[0004] However, the existing DAC chips have certain limitations in output power and signal amplification, especially in the high-channel and multi-signal output scenarios, the power output and output precision of the DAC chips are often insufficient. SUMMARY

[0005] Therefore, it is necessary to provide a control method of a voltage source array and the voltage source array to at least achieve large-scale and multi-channel voltage input while improving the driving capability, output power and output precision of the voltage source array.

[0006] In a first aspect, the present application provides a control method of a voltage source array, applied to a voltage source array circuit, the voltage source array circuit comprising a plurality of DAC chips and a plurality of amplifiers, each DAC chip comprising a digital signal input interface and a plurality of voltage output interfaces, each voltage output interface being connected to an input end of an amplifier; wherein the method comprises: controlling at least one DAC chip to convert a received digital signal into an analog voltage signal and output the analog voltage through a target voltage output interface; controlling a target amplifier corresponding to the target voltage output interface to be connected to amplify the analog voltage signal, so that the output end of the target amplifier outputs a target power.

[0007] In one of the embodiments, the at least one DAC chip further performs the following steps: obtaining the amplified analog voltage signal; determining whether the absolute value of the voltage difference between the amplified analog voltage signal and the target voltage signal is greater than a preset error value; if the absolute value of the voltage difference between the amplified analog voltage signal and the target voltage signal is greater than the preset error value, calibrating the analog voltage signal according to the voltage difference between the amplified analog voltage signal and the target voltage signal until the absolute value of the voltage difference between the amplified analog voltage signal and the target voltage signal is less than or equal to the preset error value.

[0008] In one of the embodiments, the target power is greater than 300 mW.

[0009] In one of the embodiments, the amplified analog voltage signal is between -10 V and 10 V.

[0010] In one of the embodiments, the digital signal output range of each DAC chip is 0-65535.

[0011] In a second aspect, the application further provides a voltage source array, which comprises a plurality of DAC chips, a plurality of amplifiers, and a power supply module.

[0012] Each DAC chip comprises a digital signal input interface and a plurality of voltage output interfaces, each voltage output interface is connected with the input end of an amplifier, the digital signal input interface of each DAC chip is a serial communication interface for receiving a digital signal, and the output end of each amplifier is used for outputting a target power corresponding to the digital signal.

[0013] In one of the embodiments, the output end of each amplifier is further connected with the voltage feedback interface of the DAC chip corresponding to the amplifier, so as to amplify the voltage output by the DAC chip.

[0014] In one of the embodiments, the voltage source array further comprises a plurality of filter capacitor modules, which are formed between the output end of the power supply module and the plurality of DAC chips and / or between the output end of the power supply module and the plurality of amplifiers.

[0015] In one of the embodiments, the plurality of DAC chips, the power supply module, the plurality of filter capacitor modules, and the plurality of amplifiers are integrated on a printed circuit board.

[0016] In one of the embodiments, the plurality of DAC chips, the power supply module, the plurality of filter capacitor modules, and the plurality of amplifiers are integrated on a printed circuit board.

[0017] Thirdly, this application also provides a control device for a voltage source array, applied to a voltage source array circuit. The voltage source array circuit includes multiple DAC chips and multiple amplifiers. Each DAC chip includes a digital signal input interface and multiple voltage output interfaces. Each voltage output interface is connected to the input terminal of an amplifier. The device includes an analog voltage output module and a target power output module. The analog voltage output module is used to control at least one DAC chip to convert the received digital signal into an analog voltage signal and output the analog voltage through the target voltage output interface. The target power output module is used to control the connection of a target amplifier corresponding to the target voltage output interface to amplify the analog voltage signal so that the output terminal of the target amplifier outputs a target power.

[0018] Fourthly, this application also provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to perform the following steps:

[0019] Control at least one DAC chip to convert the received digital signal into an analog voltage signal, and output the analog voltage through the target voltage output interface;

[0020] The target amplifier corresponding to the target voltage output interface is connected to amplify the analog voltage signal so that the output terminal of the target amplifier outputs the target power.

[0021] Fifthly, this application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, performs the following steps:

[0022] Control at least one DAC chip to convert the received digital signal into an analog voltage signal, and output the analog voltage through the target voltage output interface;

[0023] The target amplifier corresponding to the target voltage output interface is connected to amplify the analog voltage signal so that the output terminal of the target amplifier outputs the target power.

[0024] Sixthly, this application also provides a computer program product, including a computer program that, when executed by a processor, performs the following steps:

[0025] Control at least one DAC chip to convert the received digital signal into an analog voltage signal, and output the analog voltage through the target voltage output interface;

[0026] The target amplifier corresponding to the target voltage output interface is connected to amplify the analog voltage signal so that the output terminal of the target amplifier outputs the target power.

[0027] The aforementioned control method and voltage source array, by forming a voltage source array circuit, meet the large-scale, multi-channel requirements of the voltage source array, and by using amplifiers and other devices in the voltage source array circuit to improve the driving power and output power, and by controlling the voltage source array to improve the output accuracy, can at least improve the driving capability, output power and output accuracy of the voltage source array while achieving large-scale, multi-channel voltage input. Attached Figure Description

[0028] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments of this application will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0029] Figure 1 This is a flowchart illustrating a control method for a voltage source array in one embodiment;

[0030] Figure 2 This is a flowchart illustrating the control method for a voltage source array in another embodiment;

[0031] Figure 3 This is a circuit diagram of the power module in one embodiment;

[0032] Figure 4 This is a circuit diagram of a DAC chip in one embodiment;

[0033] Figure 5 This is a circuit diagram of an amplifier in one embodiment;

[0034] Figure 6 This is a block diagram of the control structure of a voltage source array in one embodiment;

[0035] Figure 7 This is an internal structural diagram of a computer device in one embodiment.

[0036] Figure labels and descriptions:

[0037] Q1, Field-Effect Transistor; R1, First Resistor; R2, Second Resistor; R3, Third Resistor; R4, Fourth Resistor; R5, Fifth Resistor; C1, First Inductor; C2, Second Capacitor; C3, Third Capacitor; C4, Fourth Capacitor; C5, Fifth Capacitor; C6, Sixth Capacitor; C7, Seventh Capacitor; C8, Eighth Capacitor; C9, Ninth Capacitor; C10, Tenth Capacitor; C11, Eleventh Capacitor; C12, Twelfth Capacitor; LED, Light Emitting Diode; D1, First Schottky Diode D1, second Schottky diode; D2, third Schottky diode; D3, fourth Schottky diode; D4, first Schottky diode; U1, first boost converter chip; U2, first voltage regulator integrated chip; U3, second voltage regulator integrated chip; DAC, DAC chip; R6, sixth resistor; U4, amplifier; R8, eighth resistor; R9, ninth resistor; R10, tenth resistor; R11, eleventh resistor; R12, twelfth resistor; C13, thirteenth capacitor; C14, fourteenth capacitor. Detailed Implementation

[0038] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0039] The control method and voltage source array provided in this application can be applied to the field of electronic circuit design technology.

[0040] Please refer to Figure 1 In one exemplary embodiment, a control method for a voltage source array is provided, including the following steps S101 to S102.

[0041] Specifically, the control method for the voltage source array is applied to the voltage source array circuit, which includes multiple DAC chips (DAC) and multiple amplifiers (U4). Each DAC chip (DAC) includes a digital signal input interface (IN) and multiple voltage output interfaces (VDAs). Each VDA is connected to the input terminal of an amplifier (U4).

[0042] in:

[0043] Step S101: Control at least one DAC chip to convert the received digital signal into an analog voltage signal and output the analog voltage through the target voltage output interface.

[0044] Step S102: Control the connection of the target amplifier U4 corresponding to the target voltage output interface to amplify the analog voltage signal so that the output terminal of the target amplifier U4 outputs the target power.

[0045] Specifically, the at least one DAC chip further performs the following steps: acquiring an amplified analog voltage signal; determining whether the absolute value of the voltage difference between the amplified analog voltage signal and the target voltage signal is greater than a preset error value; if the absolute value of the voltage difference between the amplified analog voltage signal and the target voltage signal is greater than the preset error value, then calibrating the analog voltage signal according to the voltage difference between the amplified analog voltage signal and the target voltage signal until the absolute value of the voltage difference between the amplified analog voltage signal and the target voltage signal is less than or equal to the preset error value.

[0046] For example, please refer to Figure 2 In one exemplary embodiment, another method for controlling a voltage source array is provided, including the following steps S201 to S206. Wherein:

[0047] Step S201, Data Input: Input digital signals through the SPI interface.

[0048] Step S202, DAC signal conversion: The DAC converts the digital signal into an analog voltage.

[0049] Step S203, Signal Amplification: Amplifier U4 amplifies the voltage output by the DAC to -10V to 10V.

[0050] Step S204: Determine the calibration voltage value.

[0051] If the calibration voltage value is determined to be normal, then proceed to step S205. Output power: Each channel can provide more than 300mW of power output.

[0052] If the calibration voltage value is determined to be abnormal, proceed to step S206 to adjust the digital signal. After executing S206, repeat step S202 until the voltage value is normal.

[0053] The target power is greater than 300mW.

[0054] As an example, the target power can be 301mW, 310mW, 350mW, 400mW, 500mW, etc.

[0055] The amplified analog voltage signal is between -10V and 10V.

[0056] As an example, the amplified analog voltage signal can be -10V, -7V, -3V, 2V, 5V, 7V, 10V, etc.

[0057] Each DAC chip has a digital signal output range of 0-65535.

[0058] As an example, the digital signals that each DAC chip can output are 0, 1302, 27500, 52733, 65535, etc.

[0059] Specifically, the control method for the voltage source array is applied to the voltage source array circuit, which includes multiple DAC chips (DAC) and multiple amplifiers (U4). Each DAC chip (DAC) includes a digital signal input interface (IN) and multiple voltage output interfaces (VDAs). Each VDA is connected to the input terminal of an amplifier (U4).

[0060] Each DAC chip includes a digital signal input interface and multiple voltage output interfaces. Each voltage output interface is connected to the input terminal of an amplifier U4. The digital signal input interface of each DAC chip is a serial communication interface used to receive digital signals. The output terminal of each amplifier U4 is used to output the target power corresponding to the digital signal.

[0061] The output of each amplifier U4 is also connected to the voltage feedback interface of a corresponding DAC chip (DAC) to amplify the voltage output by the DAC chip.

[0062] The voltage source array also includes a power supply module, which supplies power to multiple DAC chips (DAC) and multiple amplifiers (U4).

[0063] The voltage source array also includes multiple filter capacitor modules, which are formed between the output terminal of the power supply module and multiple DAC chips (DAC) and / or between the output terminal of the power supply module and multiple amplifiers (U4).

[0064] The multiple DAC chips, the power supply module, the multiple filter capacitor modules, and the multiple amplifiers U4 are integrated on a printed circuit board.

[0065] For example, please refer to Figure 3 , Figure 3This is a circuit diagram of a power module in one embodiment. Specifically, the power module circuit includes a field-effect transistor Q1, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a first inductor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C8, a ninth capacitor C9, a tenth capacitor C10, an eleventh capacitor C11, a twelfth capacitor C12, a light-emitting diode (LED), a first Schottky diode D1, a second Schottky diode D2, a third Schottky diode D3, a fourth Schottky diode D4, a first boost converter chip U1, a first voltage regulator integrated chip, a second voltage regulator integrated chip U2, and a first voltage regulator integrated chip U3.

[0066] Among them, the field-effect transistor Q1 can be model WPM2015-3 / TR, the first boost converter chip U1 can be model MT3540, the first voltage regulator integrated chip can be model 79L12, and the second voltage regulator integrated chip U2 and the first voltage regulator integrated chip U3 can be model 79L13.

[0067] In this configuration, the gate (G) of MOSFET Q1 is connected to one end of the first resistor R1, and the other end of the first resistor R1 is grounded. The drain (D) of MOSFET Q1 is connected to the power supply terminal, and the source (S) of MOSFET Q1 is connected to the VIN pin of the first boost converter chip. One end of the second resistor R2 is connected to the source of MOSFET Q1, and the other end of the second resistor R2 is connected to one end of the first resistor R1. One end of the first capacitor is connected to one end of the first resistor R1, and the other end of the first capacitor is grounded. One end of the second capacitor C2 is connected to one end of the first resistor R1, and the other end of the second capacitor C2 is grounded. The circuit is grounded. One end of the third capacitor C3 is connected to one end of the first resistor R1, and the other end of the third capacitor C3 is grounded. One end of the third resistor R3 is connected to one end of the first resistor R1, and the other end of the third resistor R3 is connected to the positive terminal of the LED. The negative terminal of the LED is grounded. The EN pin of the first boost chip is connected to the vin pin of the first boost chip. The FB pin of the first boost chip is connected to one end of the fourth resistor R4, and the other end of the fourth resistor R4 is connected to the GND pin of the first boost chip. The GND pin of the first boost chip is grounded. The FB terminal of the chip is connected to one end of the fifth resistor R5, and the other end of the fifth resistor R5 is connected to the second voltage regulator integrated chip U2. The input terminal of U3 is connected to the second voltage regulator integrated chip U2. The output terminal of U3 outputs the second target voltage. One end of the fourth capacitor C4 is connected to the other end of the fifth resistor R5, and the other end of the fourth capacitor C4 is grounded. One end of the fifth capacitor C5 is connected to the other end of the fifth resistor R5, and the other end of the fifth capacitor C5 is grounded. One end of the sixth capacitor C6 is connected to the second voltage regulator integrated chip U2. The first voltage regulator chip is connected to the output of the second voltage regulator chip U2 and the first voltage regulator chip U3. The other end of the seventh capacitor C7 is grounded. One end of the seventh capacitor C7 is connected to the output of the second voltage regulator chip U2 and the first voltage regulator chip U3. The other end of the seventh capacitor C7 is grounded. One end of the first inductor C1 is connected to the vin pin of the first boost chip. The other end of the first inductor C1 is connected to the SW pin of the first boost chip. The SW pin of the first boost chip is also connected to the positive terminal of the first Schottky diode D1. The negative terminal of the first Schottky diode D1 is connected to the second voltage regulator chip U2 and the first voltage regulator chip U3.The input terminal of U3 is connected as follows: one end of the eighth capacitor C8 is connected to the other end of the first inductor C1, and the other end of the eighth capacitor C8 is connected to the negative terminal of the second Schottky diode D2. The positive terminal of the second Schottky diode D2 is connected to the input terminal of the first voltage regulator integrated chip. The positive terminal of the third Schottky diode D3 is connected to the other end of the eighth capacitor C8, and the negative terminal of the third Schottky diode D3 is connected to the negative terminal of the fourth Schottky diode D4. The positive terminal of the fourth Schottky diode D4 is connected to the input terminal of the first voltage regulator integrated chip. The negative terminal of the second Schottky diode D2 is grounded. One end of the ninth capacitor C9 is connected to the positive terminal of the fourth Schottky diode D4, and the other end of the ninth capacitor C9 is grounded. One end of the tenth capacitor C10 is connected to one end of the ninth capacitor C9, and the other end of the tenth capacitor C10 is grounded. One end of the eleventh capacitor C11 is connected to the output terminal of the first voltage regulator integrated chip, and the other end of the eleventh capacitor C11 is grounded. One end of the twelfth capacitor C12 is connected to the output terminal of the first voltage regulator integrated chip, and the other end of the twelfth capacitor C12 is grounded. ;

[0068] For example, a +5V voltage input to a power supply module can be boosted and regulated by the power supply module to obtain multiple voltage outputs such as +5V, +15V, and +12V.

[0069] For example, please refer to Figure 4 , Figure 4 This is a circuit diagram of a DAC chip (DAC) in one embodiment. The circuit of the DAC chip (DAC) includes: the DAC chip (DAC) and a sixth resistor (R6).

[0070] The DAC chip can be model DAC8568.

[0071] Specifically, one end of the sixth resistor R6 serves as the input terminal of the DAC chip DAC for receiving digital signals, and the other end of the sixth resistor R6 is connected to the serial data input pin (DIN) of the DAC chip DAC. The multiple voltage output terminals of the DAC chip DAC are respectively connected to the input terminal of an amplifier U4, and the feedback pin (VREF) of the DAC chip DAC is connected to the output terminal of the amplifier U4 to calibrate the output voltage.

[0072] As an example, taking the DAC8568 as an example, the DAC chip also includes the following pins: SYNC (Synchronization Signal) pin: active low, level-triggered control. This input is the frame synchronization signal for the input data. When SYNC is low, the input shift register inside the DAC is enabled, and data is sampled on all subsequent clock edges. The DAC updates the output after 32 clock cycles. If SYNC is set high in less than 32 clock cycles (i.e., a rising edge of SYNC occurs), the write sequence is ignored; LDAC (Load DACs) pin, used to control the loading of the DAC. In asynchronous reset mode, the falling edge of LDAC triggers data updates; CLR (Asynchronous Reset) pin, used for asynchronous reset function; DIN (Serial Data Input) pin, data is synchronized to the 32-bit input shift register on each falling edge of the serial clock input; SCLK (Serial Clock) pin, up to 50MHz, used to synchronize the data input; AVDD (Power Input) pin, power input, voltage range 2.7V to 5.5V, etc.

[0073] Here, the connection of pins that enable the DAC chip to work properly or that are unrelated to the inventive point of this application can be set by those skilled in the art based on experience, and will not be elaborated here.

[0074] For example, please refer to Figure 5 , Figure 5 This is a circuit diagram of amplifier U4 in one embodiment. The circuit of amplifier U4 includes: amplifier U4, eighth resistor R8, ninth resistor R9, tenth resistor R10, eleventh resistor R11, twelfth resistor R12, thirteenth capacitor C13, and fourteenth capacitor C14.

[0075] In this circuit, one end of the eighth resistor R8 is connected to one end of the ninth resistor R9, and the other end of the ninth resistor R9 is grounded. One end of the eighth resistor R8 also serves as the input terminal of the amplifier U4 circuit, connected to a voltage output terminal of the DAC chip. The other end of the eighth resistor R8 is connected to the positive input pin of the amplifier U4. One end of the tenth resistor R10 is grounded, and the other end of the tenth resistor R10 is connected to one end of the eleventh resistor R11. The other end of the eleventh resistor R11 is connected to the feedback pin of the DAC chip, and the other end of the eleventh resistor R11 is also connected to the negative input pin of the amplifier U4. The other end of resistor eleven is connected to one end of resistor eleven, which is connected to the output of amplifier U4. One end of capacitor thirteen is connected to one end of resistor eleven, and the other end of capacitor thirteen is connected to the other end of resistor eleven. One end of resistor twelfth is connected to the output of amplifier U4, and the other end of resistor twelfth is connected to the output of amplifier U4. The other end of resistor twelfth is used as the output of amplifier U4 to output the target power. One end of capacitor fourteenth is connected to the other end of resistor twelfth, which is grounded.

[0076] The power supply terminal of amplifier U4 is connected to the output terminal of the first voltage regulator integrated chip and the output terminal of the second voltage regulator integrated chip U2 and the first voltage regulator integrated chip U3, respectively.

[0077] In one embodiment of this application, a high-precision voltage source array of four DAC8568 chips can be integrated on a PCB board. By integrating multiple DAC chips, a power amplifier U4, a power supply module, and filter capacitors on a single PCB board, high-precision voltage output with up to 32 independent channels can be achieved. Each channel, after being amplified by amplifier U4, can provide a power output of over 300mW, thereby meeting the application requirements for high-precision, high-power, multi-channel voltage output.

[0078] Each DAC output channel is connected to an amplifier U4 to enhance the drive capability of the output voltage. Amplifier U4 is designed to amplify the low-power signal from the DAC output to a voltage source that meets power requirements greater than 300mW. By optimizing the amplification factor and bandwidth control of amplifier U4, the amplified signal maintains high accuracy and low distortion.

[0079] To ensure a stable power supply for the DAC chip and amplifier U4, a power module is integrated on the PCB to provide a stable power voltage. The power module is designed with multiple outputs, providing different voltage levels for the DAC chip and power amplifier U4 to ensure they operate at their optimal levels. By employing a high-efficiency voltage regulator circuit, power supply noise and ripple are reduced, ensuring the system's power supply stability.

[0080] Meanwhile, appropriate filter capacitors were designed between the power supply module and the DAC and amplifier U4 to filter high-frequency noise in the power supply and reduce the impact of power supply fluctuations on the DAC output accuracy. The addition of filter capacitors helps improve the system's anti-interference capability and ensures the purity and stability of the output voltage.

[0081] Specifically, in PCB design, signal interference between channels can be minimized by optimizing component layout and trace structure. The rational layout and signal shielding design of the DAC chip (DAC), amplifier U4, and power module reduce crosstalk between channels and ensure signal integrity. The grounding design employs a multi-point grounding method to reduce noise coupling and further improve system stability. It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Furthermore, at least some steps in the flowcharts of the embodiments described above may include multiple steps or stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least a portion of the steps or stages of other steps.

[0082] Based on the same inventive concept, this application also provides a voltage source array for implementing the control method of the voltage source array described above. The solution provided by this voltage source array is similar to the implementation scheme described in the above method; therefore, the specific limitations in the voltage source array embodiments provided below can be found in the limitations of the control method for the voltage source array described above, and will not be repeated here.

[0083] Based on the same inventive concept, this application also provides a control device for a voltage source array to implement the control method for the voltage source array described above. The solution provided by this device is similar to the solution described in the above method; therefore, the specific limitations in the control device embodiments of the voltage source array provided below can be found in the limitations of the control method for the voltage source array described above, and will not be repeated here.

[0084] Please refer to Figure 6In one exemplary embodiment, a control device for a voltage source array is provided, including: an analog voltage output module 31 and a target power output module 32. The analog voltage output module 31 is used to control at least one DAC chip to convert a received digital signal into an analog voltage signal and output an analog voltage through a target voltage output interface. The target power output module 32 is used to control a target amplifier connected to the target voltage output interface to amplify the analog voltage signal so that the output terminal of the target amplifier outputs a target power.

[0085] Each module in the control device of the aforementioned voltage source array can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in the processor of a computer device in hardware form or independent of it, or stored in the memory of a computer device in software form, so that the processor can call and execute the operations corresponding to each module.

[0086] In an exemplary embodiment, a computer device is provided, which may be a terminal. The computer device includes a processor, memory, input / output interface, communication interface, display unit, and input device. The processor, memory, and input / output interface are connected via a system bus, and the communication interface, display unit, and input device are also connected to the system bus via the input / output interface. The processor of the computer device provides computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and internal memory. The non-volatile storage medium stores an operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage medium. The input / output interface of the computer device is used for exchanging information between the processor and external devices. The communication interface of the computer device is used for wired or wireless communication with external terminals; wireless communication can be achieved through Wi-Fi, mobile cellular networks, Near Field Communication (NFC), or other technologies. When the computer program is executed by the processor, it implements a method for controlling a voltage source array. The display unit of the computer device is used to form a visually visible image and may be a display screen, a projection device, or a virtual reality imaging device. The display screen can be an LCD screen or an e-ink screen. The input device of the computer device can be a touch layer covering the display screen, or buttons, trackballs, or touchpads set on the casing of the computer device, or external keyboards, touchpads, or mice, etc.

[0087] Those skilled in the art will understand that Figure 7The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0088] In one exemplary embodiment, a computer device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to perform the following steps:

[0089] Control at least one DAC chip to convert the received digital signal into an analog voltage signal, and output the analog voltage through the target voltage output interface;

[0090] The target amplifier corresponding to the target voltage output interface is connected to amplify the analog voltage signal so that the output terminal of the target amplifier outputs the target power.

[0091] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, the computer program performing the following steps when executed by a processor:

[0092] Control at least one DAC chip to convert the received digital signal into an analog voltage signal, and output the analog voltage through the target voltage output interface;

[0093] The target amplifier corresponding to the target voltage output interface is connected to amplify the analog voltage signal so that the output terminal of the target amplifier outputs the target power.

[0094] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, artificial intelligence (AI) processors, etc., and are not limited to these.

[0095] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0096] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A control method of a voltage source array, characterized by, The application is applied to a voltage source array circuit, the voltage source array circuit comprises a plurality of DAC chips, a plurality of amplifiers, each DAC chip comprises a digital signal input interface and a plurality of voltage output interfaces, each voltage output interface is connected with an input end of an amplifier, and an output end of each amplifier is further connected with a voltage feedback interface of a DAC chip corresponding to the amplifier. The method comprises: controlling at least one DAC chip to convert the received digital signal into an analog voltage signal and output the analog voltage signal through a target voltage output interface; controlling a target amplifier corresponding to the target voltage output interface to amplify the analog voltage signal so that an output end of the target amplifier outputs a target power; acquiring the amplified analog voltage signal through the voltage feedback interface; judging whether an absolute value of a voltage difference between the amplified analog voltage signal and a target voltage signal is greater than a preset error value; if yes, calibrating the analog voltage signal according to the voltage difference until the absolute value is less than or equal to the error value.

2. The control method according to claim 1, characterized by, The DAC chip model is DAC8568. The digital signal input interface of each DAC chip further comprises a resistor. One end of the resistor is used as an input end of the DAC chip DAC for receiving a digital signal, and the other end is connected with a serial data input pin of the DAC chip DAC.

3. The control method according to claim 1, characterized by, The target power is greater than 300 mW.

4. The control method according to claim 2, characterized by, The amplified analog voltage signal is between -10 V and 10 V.

5. The control method according to claim 1, characterized by, The digital signal output range of each DAC chip is 0-65535.

6. A voltage source array, characterized by The voltage source array comprises a plurality of DAC chips and a plurality of amplifiers. Each DAC chip comprises a digital signal input interface and a plurality of voltage output interfaces, each voltage output interface is connected with an input end of an amplifier, the digital signal input interface of each DAC chip is a serial communication interface and is used for receiving a digital signal, and an output end of each amplifier is used for outputting a target power corresponding to the digital signal. An output end of each amplifier is further connected with a voltage feedback interface of a DAC chip corresponding to the amplifier. The at least one DAC chip acquires the amplified analog voltage signal through the voltage feedback interface, judges whether an absolute value of a voltage difference between the amplified analog voltage signal and a target voltage signal is greater than a preset error value, and if yes, calibrates the analog voltage signal according to the voltage difference until the absolute value is less than or equal to the error value.

7. The voltage source array of claim 6, wherein, The DAC chip model is DAC8568. The digital signal input interface of each DAC chip further comprises a resistor. One end of the resistor is used as an input end of the DAC chip DAC for receiving a digital signal, and the other end is connected with a serial data input pin of the DAC chip DAC.

8. The voltage source array of claim 7, wherein, Further comprising a power supply module, the power supply module is used for supplying power for the plurality of DAC chips and the plurality of amplifiers.

9. The voltage source array of claim 8, wherein, The voltage source array further comprises a plurality of filter capacitor modules, the plurality of filter capacitor modules are formed between an output end of the power supply module and the plurality of DAC chips and / or between the output end of the power supply module and the plurality of amplifiers.

10. The voltage source array of claim 9, wherein, The plurality of DAC chips, the power module, the plurality of filter capacitor modules and the plurality of amplifiers are integrated on a printed circuit board.

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