Extreme value triggering method and apparatus

Abstract

The application belongs to the technical field of digital system, and particularly relates to an extreme value triggering method and device, which comprises the following steps: starting a first counting process, obtaining a first counting value, judging whether the first counting value is the same as a preset triggering depth value, if yes, entering a waiting triggering state; starting a second counting process, obtaining a second counting value, judging whether the second counting value is the same as a preset gate value, if no, obtaining a dynamic threshold value from a data point of waveform data, traversing data points of the waveform data, judging whether the data points of the waveform data meet a target condition relative to the dynamic threshold value, if yes, changing the data points of the waveform data into the dynamic threshold value, and taking a storage position corresponding to the data points of the waveform data as a triggering address; until the second counting value is the same as the preset gate value, taking a current triggering address as a triggering condition, and completing triggering. The method can be used for signals with variable amplitudes and variable periods, so that triggering precision is greatly improved, and the possibility of false triggering and missed triggering is reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of digital system, in particular to an extreme value triggering method and device. BACKGROUND

[0002] Triggering mode is the core function of digital system, which realizes stable and repeated display of waveform on the screen. The common triggering mode of existing digital system, such as edge, pulse width, slope and other advanced triggers, is based on fixed level triggering, but the above triggering modes are difficult to trigger stably for signals with variable amplitude and variable period.

[0003] It should be noted that the information disclosed in the above background section is only used to strengthen the understanding of the background of the present disclosure, and therefore can include information that does not constitute prior art known to those of ordinary skill in the art. SUMMARY

[0004] In view of at least one of the above technical problems, the present application provides an extreme value triggering method and device.

[0005] In a first aspect, an extreme value triggering method is provided, applied to a digital system, comprising:

[0006] Obtaining a preset trigger position point, obtaining a preset time difference value, the preset time difference value being the difference value of the preset trigger position point relative to the time axis zero point;

[0007] According to the preset time difference value and the sampling frequency, a preset threshold value is obtained, and the sampling frequency is the real-time sampling frequency of the digital system;

[0008] According to the preset threshold value, a pre-trigger depth value is obtained;

[0009] Obtaining waveform data;

[0010] Starting a first counting process, obtaining a first count value, and determining whether the first count value is the same as the pre-trigger depth value, if yes, entering a waiting trigger state;

[0011] Starting a second counting process, obtaining a second count value, and determining whether the second count value is the same as the preset threshold value, if no, obtaining a dynamic threshold value from a data point of the waveform data, traversing the data points of the waveform data, and determining whether the data points of the waveform data meet a target condition relative to the dynamic threshold value, if yes, changing the data point of the waveform data to the dynamic threshold value, and taking the storage location corresponding to the data point of the waveform data as a trigger address;

[0012] Until the second count value is the same as the preset threshold value, taking the current trigger address as a trigger condition, and completing the trigger.

[0013] The method can be used for signals with variable amplitudes and variable periods, and can record the extreme value position of the input signal in a certain time as a trigger position by a digital system, so that the trigger precision is greatly improved, and the possibility of false triggering and missed triggering is reduced.

[0014] In some possible implementation manners, the pre-trigger depth value is obtained according to the preset gate value, and includes the following steps:

[0015] The pre-trigger depth value is generated according to the preset gate value and based on a first formula.

[0016] The first formula is: deep_num=num*L

[0017] Wherein, deep_num is the pre-trigger depth value, num is the preset gate value, and L is the number of parallel paths.

[0018] In some possible implementation manners, the number of parallel paths is the sampling frequency divided by the FPGA main clock frequency.

[0019] In some possible implementation manners, the target condition includes a maximum value target and a minimum value target.

[0020] In some possible implementation manners, the step of judging whether the data point of the waveform data meets the target condition with respect to the dynamic threshold value includes the following steps:

[0021] If not, the dynamic threshold value is unchanged, and the trigger address is unchanged.

[0022] In some possible implementation manners, the digital system includes a first counter and a second counter, the first counter is configured to generate a first count value, and the second counter is configured to generate a second count value.

[0023] In some possible implementation manners, the first counter and the second counter are not synchronized.

[0024] In some possible implementation manners, the digital system includes an ADC and a filter, the ADC is configured to obtain the waveform data, and the filter is configured to perform high-frequency filtering on the waveform data.

[0025] In a second aspect, an extreme value trigger device is provided, including:

[0026] A preset module is configured to obtain a preset trigger position point, obtain a preset time difference value, and obtain a preset gate value according to the preset time difference value and a sampling frequency, and obtain a pre-trigger depth value according to the preset gate value.

[0027] acquire waveform data;

[0028] the first counting value is the same as the pre-trigger depth value, entering a waiting trigger state;

[0029] the second counting value is the same as the preset gate value, obtaining a dynamic threshold value from a data point of the waveform data, traversing data points of the waveform data, judging whether the data points of the waveform data meet a target condition relative to the dynamic threshold value, if yes, changing the data points of the waveform data into the dynamic threshold value, and taking a storage location corresponding to the data points of the waveform data as a trigger address; and

[0030] In some possible implementation manners, judging whether the data points of the waveform data meet the target condition relative to the dynamic threshold value includes the following steps:

[0031] if no, the dynamic threshold value remains unchanged, and the trigger address remains unchanged.

[0032] The application will be further described below in conjunction with the accompanying drawings and embodiments. BRIEF DESCRIPTION OF DRAWINGS

[0033] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without any creative effort on the basis of these drawings.

[0034] Figure 1 a flow chart of an extreme value trigger method provided by the embodiments of the present application;

[0035] Figure 2 a structural block diagram of an extreme value trigger device provided by the embodiments of the present application; DETAILED DESCRIPTION

[0036] In order to make the above objectives, features and advantages of the present application more apparent, specific embodiments of the present application will be described in detail below with reference to the accompanying drawings. In the following description, a large number of specific details are set forth in order to facilitate a comprehensive understanding of the present application. However, the present application can be implemented in many different ways other than those described herein, and those skilled in the art can make similar improvements without departing from the spirit of the present application, so the present application is not limited to the specific embodiments disclosed below.

[0037] The common trigger mode of the existing digital system, such as edge, pulse width, slope and other advanced triggers, is based on the fixed level trigger, but the above trigger mode is difficult to trigger the signal with variable amplitude and variable period. The method can be used for the signal with variable amplitude and variable period, and the extreme value position of the input signal in a certain time is found, and the digital system records the extreme value position as the trigger position, so that the trigger precision is greatly improved, and the possibility of false trigger and missed trigger is reduced.

[0038] As shown in Figure 1 The extreme value trigger method provided by the embodiment of the application is applied to a digital system, and includes steps S100 to S700.

[0039] The digital system includes signal processing function, data storage function, data transmission function, operation and control function. The digital system can include a signal generator, a logic analyzer, a spectrum analyzer, a digital multimeter, a data acquisition system and an oscilloscope, which are not specifically limited herein. In the embodiment, the digital system is an oscilloscope.

[0040] S100, a preset trigger position point is obtained, and a preset time difference value is obtained, which is a difference value of the preset trigger position point relative to a time axis zero point.

[0041] S200, a preset threshold value is obtained according to the preset time difference value and a sampling frequency, and the sampling frequency is a real-time sampling frequency of the digital system.

[0042] S300, a pre-trigger depth value is obtained according to the preset threshold value.

[0043] In this step, the pre-trigger depth value is generated according to the preset threshold value and based on a first formula.

[0044] The first formula is: deep_num=num*L

[0045] Wherein, deep_num is the pre-trigger depth value, num is the preset threshold value, and L is the number of parallel paths.

[0046] The number of parallel paths is the sampling frequency divided by the FPGA main clock frequency.

[0047] S400, waveform data is obtained.

[0048] S500, a first counting process is started, a first count value is obtained, and it is determined whether the first count value is the same as the pre-trigger depth value. If yes, a trigger waiting state is entered.

[0049] In this step, if the first count value is less than the pre-trigger depth value, the trigger state is not entered and the second count process is not started. That is, the second count process needs the system to enter the waiting trigger state to start.

[0050] S600, starting the second count process, obtaining the second count value, judging whether the second count value is the same as the preset gate value, if not, obtaining the dynamic threshold value from a data point of the waveform data, traversing the data points of the waveform data, judging whether the data points of the waveform data meet the target condition with respect to the dynamic threshold value, if yes, changing the data point of the waveform data into the dynamic threshold value, and taking the storage location corresponding to the data point of the waveform data as the trigger address; if not, the dynamic threshold value remains unchanged and the trigger address remains unchanged.

[0051] The target condition includes a maximum value target and a minimum value target. The maximum value target triggers with the maximum value of the waveform data. When the data point of the waveform data is greater than the dynamic threshold value, the data point of the waveform data is changed into the dynamic threshold value, and the storage location corresponding to the data point of the waveform data is taken as the trigger address. The minimum value target triggers with the minimum value of the waveform data. When the data point of the waveform data is less than the dynamic threshold value, the data point of the waveform data is changed into the dynamic threshold value, and the storage location corresponding to the data point of the waveform data is taken as the trigger address.

[0052] When the target condition is the maximum value target, and taking the first three data points of the waveform data as an example. The first three data points of the waveform data are the first data point, the second data point and the third data point. The first data point is taken as the dynamic threshold value. Then, the second data point is compared with the dynamic threshold value, that is, the second data point is compared with the first data point. If the second data point is greater than the dynamic threshold value, the second data point is changed into the dynamic threshold value, and the storage location corresponding to the second data point is taken as the trigger address.

[0053] Then, the third data point is compared with the dynamic threshold value, that is, the third data point is compared with the second data point. If the third data point is greater than the dynamic threshold value, the third data point is changed into the dynamic threshold value, and the storage location corresponding to the second data point is taken as the trigger address. If the third data point is less than the dynamic threshold value, the dynamic threshold value remains unchanged and the trigger address remains unchanged.

[0054] S700, until the second count value is the same as the preset gate value, taking the current trigger address as the trigger condition, and completing the trigger.

[0055] In step 600, an extreme value search time can also be set, that is, the extreme value trigger method of the embodiment can also include the following steps:

[0056] The preset extreme value search time is set.

[0057] When the second count process is started, the timing is started.

[0058] When the timing time is the same as the preset search time, the current trigger address is output and the current trigger address is used as the trigger condition;

[0059] The timer is reset to zero.

[0060] By setting the extreme value search time, it can adapt to the real-time output of any continuous signal extreme value point, and can be used for extreme value calibration or synchronization of digital systems.

[0061] In some embodiments, the digital system includes a first counter and a second counter, wherein the first counter is configured to generate a first count value and the second counter is configured to generate a second count value. The first counter and the second counter operate asynchronously.

[0062] In some embodiments, the digital system includes an ADC and a filter. The ADC is used to acquire waveform data, and the filter is used to perform high-frequency filtering on the waveform data. The filter is not particularly limited and may include a low-pass filter, a hysteresis filter, a high-pass filter, a band-pass filter, and a band-stop filter. All of these filters can filter out interference or noise, thereby improving the accuracy of the extreme value search.

[0063] In this embodiment, the filter is a low-pass filter.

[0064] like Figure 2 As shown, the embodiment of the present application further provides an extreme value triggering device, comprising:

[0065] The preset module 100 is used to obtain a preset trigger position point and a preset time difference, where the preset time difference is the difference between the preset trigger position point and the zero point of the time axis; obtain a preset threshold value based on the preset time difference and a sampling frequency, where the sampling frequency is the real-time sampling frequency of the digital system; and obtain a pre-trigger depth value based on the preset threshold value;

[0066] An acquisition module 200 is used to acquire waveform data;

[0067] A preparation module 300 is configured to start a first counting process, obtain a first count value, determine whether the first count value is the same as a pre-trigger depth value, and if so, enter a wait-for-trigger state;

[0068] The triggering module 400 is configured to start a second counting process, obtain a second counting value, and determine whether the second counting value is the same as a preset threshold value. If not, a dynamic threshold value is obtained from a data point of the waveform data, data points of the waveform data are traversed, and it is determined whether the data points of the waveform data meet a target condition with respect to the dynamic threshold value. If yes, the data point of the waveform data is changed to the dynamic threshold value, and a storage location corresponding to the data point of the waveform data is used as a triggering address. If not, the dynamic threshold value remains unchanged, and the triggering address remains unchanged. Until the second counting value is the same as the preset threshold value, a current triggering address is used as a triggering condition, and triggering is completed.

[0069] In the description of the embodiments of the present application, unless otherwise specified, " / " represents the meaning of or, for example, A / B can represent A or B; "and / or" herein is only a description of the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B can represent: A alone, A and B exist together, and B alone. In addition, in the description of the embodiments of the present application, "multiple" means two or more than two.

[0070] Hereinafter, the terms "first" and "second" are only for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Therefore, the features defined with "first" and "second" can explicitly or implicitly include one or more of the features.

[0071] In addition, various aspects or features of the present application can be implemented as a method, apparatus or product using standard programming and / or engineering techniques. The term "product" used in the present application encompasses computer programs accessible from any computer-readable device, carrier or medium. For example, the computer-readable medium can include, but is not limited to: magnetic storage devices (for example, hard disks, floppy disks or magnetic tapes, etc.), optical discs (for example, compact discs (CD), digital versatile discs (DVD), etc.), smart cards and flash memory devices (for example, erasable programmable read-only memory (EPROM), cards, sticks or key drive, etc.). In addition, the various storage media described herein can represent one or more devices and / or other machine-readable media for storing information. The term "machine-readable medium" can include, but is not limited to, wireless channels and various other media capable of storing, containing and / or carrying instructions and / or data.

[0072] It should also be understood that, in the embodiments of the present application, the term "and / or" is merely an association relationship of the associated objects, and indicates that there can be three relationships. For example, A and / or B can represent three cases of A existing alone, A and B existing together, and B existing alone. In addition, the character " / " in the present application generally represents an "or" relationship between the associated objects.

[0073] Those skilled in the art can realize that the units and algorithm steps of each example described in combination with the embodiments disclosed in the present application can be realized in electronic hardware, computer software or a combination of both. In order to clearly illustrate the interchangeability of hardware and software, the components and steps of each example have been described in the above description in a general manner. Whether the functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. A person skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0074] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described system, device and unit can refer to the corresponding processes in the foregoing method embodiments, which will not be repeated here.

[0075] In several embodiments provided in the present application, it should be understood that the disclosed system, device and method can be implemented in other ways. For example, the device embodiments described below are only schematic, for example, the division of units is only a logical function division, and actual implementation can have another division manner, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the displayed or discussed objects can be indirect coupling or communication connection through some interfaces, devices or units, and can also be electrical, mechanical or other forms of connection.

[0076] The units described as separate components can or can not be physically separated, and the components shown as units can or can not be physical units, that is, they can be located in one place, or can be distributed on a plurality of network units. According to actual needs, part or all of the units can be selected to achieve the purpose of the embodiments of the present application.

[0077] The above merely describes the preferred embodiments of the present application, and is not intended to limit the present application in any form. Any person skilled in the art, without departing from the technical scheme of the present application, can make many possible changes and modifications to the technical scheme of the present application, or modify equivalent embodiments with equivalent changes. Therefore, any equivalent changes made according to the shape, structure and principle of the present application, without departing from the technical scheme of the present application, shall be covered within the protection scope of the present application.

Claims

1. An extreme value triggering method, applied to a digital system, characterized in that: include: Obtaining a preset trigger position point and obtaining a preset time difference, wherein the preset time difference is the difference between the preset trigger position point and the zero point of the time axis; Obtaining a preset threshold value according to a preset time difference and a sampling frequency, wherein the sampling frequency is a real-time sampling frequency of a digital system; Obtaining a pre-trigger depth value according to a preset gate value; wherein, the pre-trigger depth value is generated according to the preset gate value and based on a first formula; the first formula is: deep_num = num * L, where deep_num is the pre-trigger depth value, num is the preset gate value, and L is the number of parallel paths; the number of parallel paths is the sampling frequency divided by the FPGA master clock frequency; Get waveform data; Starting a first counting process, obtaining a first count value, determining whether the first count value is the same as the pre-trigger depth value, and if so, entering a wait-for-trigger state; Starting a second counting process, obtaining a second count value, determining whether the second count value is the same as the preset threshold value, and if not, obtaining a dynamic threshold value from a data point of the waveform data, traversing the data points of the waveform data, and determining whether the data point of the waveform data meets a target condition relative to the dynamic threshold value, and if so, changing the data point of the waveform data to the dynamic threshold value, and using the storage location corresponding to the data point of the waveform data as a trigger address; Until the second count value is the same as the preset threshold value, the trigger is completed with the current trigger address as the trigger condition.

2. The extreme value triggering method according to claim 1, characterized in that: The target conditions include: a maximum value target and a minimum value target.

3. The extreme value triggering method according to claim 1, characterized in that: The step of determining whether a data point of the waveform data meets a target condition relative to the dynamic threshold comprises the following steps: If not, the dynamic threshold remains unchanged, and the trigger address remains unchanged.

4. The extreme value triggering method according to claim 1, characterized in that: The digital system includes a first counter and a second counter, wherein the first counter is used to generate a first count value, and the second counter is used to generate a second count value.

5. The extreme value triggering method according to claim 4, characterized in that: The first counter and the second counter operate asynchronously.

6. The extreme value triggering method according to claim 1, characterized in that: The digital system includes an ADC and a filter. The ADC is used to acquire waveform data, and the filter is used to perform high-frequency filtering on the waveform data.

7. An extreme value triggering device, characterized in that: include: A preset module is used to obtain a preset trigger position point and obtain a preset time difference, where the preset time difference is the difference between the preset trigger position point and the zero point of the time axis; A preset gate value is obtained based on a preset time difference and a sampling frequency, where the sampling frequency is the real-time sampling frequency of the digital system; a pre-trigger depth value is obtained based on the preset gate value; wherein the pre-trigger depth value is generated based on the preset gate value and a first formula; the first formula is: deep_num=num*L, where deep_num is the pre-trigger depth value, num is the preset gate value, and L is the number of parallel paths; the number of parallel paths is the sampling frequency divided by the FPGA master clock frequency; Acquisition module, used to obtain waveform data; a preparation module, configured to start a first counting process, obtain a first count value, determine whether the first count value is the same as the pre-trigger depth value, and if so, enter a wait-for-trigger state; The trigger module is used to start a second counting process, obtain a second counting value, and determine whether the second counting value is the same as the preset gate value. If not, a dynamic threshold is obtained from a data point of the waveform data, and the data points of the waveform data are traversed to determine whether the data point of the waveform data meets the target condition relative to the dynamic threshold. If so, the data point of the waveform data is changed to the dynamic threshold, and the storage location corresponding to the data point of the waveform data is used as the trigger address; until the second counting value is the same as the preset gate value, the trigger is completed with the current trigger address as the trigger condition.

8. The extreme value triggering device according to claim 7, characterized in that: The step of determining whether a data point of the waveform data meets a target condition relative to the dynamic threshold comprises the following steps: If not, the dynamic threshold remains unchanged, and the trigger address remains unchanged.

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