Compatible SPI NOR Flash interface design method and device
By classifying and parameterizing the SPI NOR Flash commands, compatibility with SPI NOR Flash interfaces of different manufacturers and types is achieved, solving the problem of interface incompatibility in the existing technology, and reducing maintenance costs and dependencies.
Patent Information
- Application Number
- CN202411647704.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-18
- Publication Date
- 2025-03-11
AI Technical Summary
The existing technology is difficult to achieve compatibility with SPI NOR Flash interfaces of different manufacturers and types, resulting in consumer-grade SOC chips being easily affected by the supply manufacturer market and high maintenance costs of industrial-grade systems.
By classifying SPI NOR Flash commands of different manufacturers and different models, multiple command types are obtained, and the interface status and timing parameters of each command type are parameterized to achieve compatibility with SPI NOR Flash interfaces of different manufacturers and types.
It realizes compatibility with SPI NOR Flash interfaces of different manufacturers and types, reduces the dependence of consumer-grade SOC chips on suppliers, and reduces the maintenance costs of industrial-grade systems.
Smart Images
Figure CN119597356A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of computer technology, and in particular to a compatible SPI NOR Flash interface design method and device. Background Art
[0002] As a floating gate non-volatile memory device, Nor Flash is used in various storage scenarios due to its property of not losing data when power is off. However, with the increase in Nor Flash application scenarios in recent years and the sharp increase in demand for chip capacity, the complexity of Nor Flash functions has also increased rapidly. The commands and timings of different Nor Flash manufacturers are different. For example, for the reset command, micron uses 0x99h, while infineon uses 0xf0h. Moreover, even if the same command is used to achieve the same function, the timing is not exactly the same. For example, micron's 0xebh command does not have a continuous mode, but other manufacturers' commands have this mode; micron's 0x01h command can only write one byte, but other manufacturers' commands can write two bytes.
[0003] For consumer-grade SOC chips, they are often designed to be fully functional by binding one or two SPI NOR Flash models, or only select a few limited interface commands to run at a specific rate and mode, so they are easily affected by the market of NOR Flash suppliers. For industrial-grade systems, they often maintain a large list of NOR Flash suppliers and models, and run by calling pre-programmed NOR Flash parameters and drivers, which is costly. Summary of the invention
[0004] The present invention provides a compatible SPI NOR Flash interface design method and device, which realizes compatibility with different types of SPI NOR Flash interfaces from different manufacturers, solves the problem that consumer-grade SOC chips are easily affected by the market of suppliers and that industrial-grade systems maintain a large number of NOR Flash suppliers and model lists at high cost.
[0005] In a first aspect, the present invention provides a compatible SPI NOR Flash interface design method, comprising:
[0006] Classify the commands of SPI NOR Flash of different manufacturers and models to obtain at least two command types;
[0007] Parameterizing the interface state and the timing parameter in the interface state included in the command type to obtain a first parameter for representing the interface state and a second parameter for representing the timing parameter in the interface state;
[0008] An interface configuration is performed on the command according to the command type, the first parameter, and the second parameter.
[0009] Optionally, the interface state includes a command word sending state, an address sending state, a dummy state, a data reading state and a data writing state.
[0010] Optionally, the first parameters of different interface states are different.
[0011] Optionally, the performing interface configuration on the command according to the command type, the first parameter, and the second parameter includes:
[0012] For each of the commands described, execute:
[0013] Obtaining the first parameter and the second parameter included in the command;
[0014] The command type to which the command belongs is determined according to the first parameter, and the interface configuration is performed according to the execution order of the command type to enter the interface states in sequence; wherein, in each of the interface states, the command is executed according to the second parameter of the interface state.
[0015] Optionally, different command types are executed in different orders;
[0016] The execution sequence of the command types includes: sequentially entering the state of sending command words, sending address, dummy and reading data; sequentially entering the state of sending command words, sending address and reading data; sequentially entering the state of sending command words and reading data; sequentially entering the state of sending command words and writing data; sequentially entering the state of sending command words, sending address and writing data; sequentially entering the state of sending command words and sending address; sequentially entering the state of sending command words; sequentially entering the state of sending command words, dummy and reading data.
[0017] Optionally, after configuring the interface of the command according to the command type, the first parameter, and the second parameter, the method further includes:
[0018] S1: After receiving a command from any SPI NOR Flash, obtain the interface state and timing parameters in the interface state included in the command;
[0019] S2: determining a first parameter and a second parameter according to the interface state and a timing parameter under the interface state, and determining a target command type to which the command belongs according to the first parameter;
[0020] S3: after the command enters the sending command word state, determine whether the target command type includes the sending address state; if so, execute step S4; otherwise, execute step S5;
[0021] S4: Entering the sending address state and sending the address according to the second parameter of the sending address state, and then determining whether the target command type includes a dummy state, if so, executing step S6, otherwise executing step S7;
[0022] S5: if the target command type is the first type, the command ends; if the target command type is the second type, step S7 is executed; if the target command type is the third type, step S8 is executed; if the target command type is the fourth type, step S6 is executed;
[0023] S6: Entering the dummy state and filling according to the second parameter of the dummy state, then entering the data reading state and reading data according to the second parameter of the data reading state, and then the command ends;
[0024] S7: Entering the data writing state and writing data according to the second parameter of the data writing state, and then the command ends;
[0025] S8: Entering the data reading state and reading data according to the second parameter of the data reading state, and then the command ends;
[0026] S9: If the target command type is the fifth type, the command ends; if the target command type is the sixth type, execute step S8; if the target command type is the seventh type, execute step S7.
[0027] In a second aspect, the present invention provides a compatible SPI NOR Flash interface design device, comprising:
[0028] A classification module is used to classify commands of SPI NOR Flash of different models from different manufacturers to obtain at least two command types;
[0029] A parameterization module, used for parameterizing the interface state and the timing parameter in the interface state included in the command type, to obtain a first parameter for representing the interface state and a second parameter for representing the timing parameter in the interface state;
[0030] A configuration module is used to perform interface configuration on the command according to the command type, the first parameter and the second parameter.
[0031] Optionally, the configuration module is further configured to perform the following operations:
[0032] For each of the commands described, execute:
[0033] Obtaining the first parameter and the second parameter included in the command;
[0034] The command type to which the command belongs is determined according to the first parameter, and the interface configuration is performed according to the execution order of the command type to enter the interface states in sequence; wherein, in each of the interface states, the command is executed according to the second parameter of the interface state.
[0035] In a third aspect, an embodiment of the present invention further provides a computing device, comprising a memory and a target processor, wherein the memory stores a computer program, and when the target processor executes the computer program, the method described in any first aspect of this specification is implemented.
[0036] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium having a computer program stored thereon, which, when executed in a computer, enables the computer to execute the method described in any first aspect of this specification.
[0037] In a fifth aspect, an embodiment of the present invention further provides a computer program product, comprising computer instructions, which, when executed by a processor, implement the steps of the method described in any first aspect of this specification.
[0038] The present invention provides a compatible SPI NOR Flash interface design method and device. The method classifies commands of SPI NOR Flash of different models from different manufacturers to obtain multiple command types, and parameterizes the interface state of each command type and the timing parameters under the interface state, so that different command types can perform interface configuration according to the command, and obtain the first parameter and the second parameter after parameterization, thereby providing a universal configuration design method at an extremely low cost, thereby achieving compatibility with SPI NOR Flash interfaces of different manufacturers and types. BRIEF DESCRIPTION OF THE DRAWINGS
[0039] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0040] Figure 1 It is a flow chart of a compatible SPI NOR Flash interface design method provided by one embodiment of the present invention;
[0041] Figure 2An interface state transition diagram in a compatible SPI NOR Flash interface provided by an embodiment of the present invention;
[0042] Figure 3 is a hardware architecture diagram of a computing device provided by an embodiment of the present invention;
[0043] Figure 4 It is a structural schematic diagram of a compatible SPI NOR Flash interface design device provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0044] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.
[0045] like Figure 1 As shown, an embodiment of the present invention provides a compatible SPI NOR Flash interface design method, the method comprising:
[0046] Step 100, classifying commands of SPI NOR Flash of different models from different manufacturers to obtain at least two command types;
[0047] Step 102, parameterizing the interface state and the timing parameter in the interface state included in the command type to obtain a first parameter for representing the interface state and a second parameter for representing the timing parameter in the interface state;
[0048] Step 104: Perform interface configuration on the command according to the command type, the first parameter, and the second parameter.
[0049] In the present invention, commands of SPI NOR Flash of different manufacturers and different models are classified to obtain multiple command types, and the interface state of each command type and its timing parameters in the interface state are parameterized, so that different command types can perform interface configuration according to the command and the first parameter and the second parameter obtained after parameterization, thereby providing a universal configuration design method at an extremely low cost, thereby achieving compatibility with SPI NOR Flash interfaces of different manufacturers and types.
[0050] Described below Figure 1 How the various steps are performed.
[0051] In step 102, the interface state includes a command word sending state, an address sending state, a dummy state, a data reading state, and a data writing state.
[0052] In step 102, the first parameters of different interface states are different.
[0053] For example, by classifying the existing SPI NOR FLASH commands of various manufacturers and models, the following eight command types are obtained:
[0054] Command type 0: cmd->addr->dummy->rd_data->end
[0055] Command type 1: cmd->addr ->rd_data->end
[0056] Command type 2: cmd ->rd_data->end
[0057] Command type 3: cmd ->wr_data->end
[0058] Command type 4: cmd->addr ->wr_data->end
[0059] Command type 5: cmd->addr ->end
[0060] Command type 6: cmd ->end
[0061] Command type 7: cmd ->dummy->rd_data->end
[0062] Among them, 0 to 7 represent parameter numbers of different command types respectively; cmd is used to indicate the status of sending command words; addr is used to indicate the status of sending address; dummy is used to indicate the dummy status; rd_data is used to indicate the status of reading data; wr_data is used to indicate the status of writing data; and end is used to indicate the end status of the command.
[0063] For example, as described in the previous example, the interface status is parameterized, and the first parameter of the idle state is 0; the first parameter of the sending command word state is 2; the first parameter of the sending address state is 3; the first parameter of the dummy state is 4; the first parameter of the read data state is 5; the first parameter of the write data state is 6; and the first parameter of the command end state is 7.
[0064] For example, as described in the previous example, the timing parameters in the interface state are parameterized, including:
[0065] (1) When the command word is to be sent, the second parameter of cmd_mode (command mode) is 0, indicating that the command is transmitted on one line; the second parameter of the command mode is 1, indicating that the command is transmitted on two lines; the second parameter of the command mode is 2, indicating that the command is transmitted on four lines.
[0066] (2) In the send address state, the second parameter of addr_mode (addressing mode) is 0, indicating that the send address is transmitted on one line; the second parameter of the addressing mode is 1, indicating that the send address is transmitted on two lines; the second parameter of the addressing mode is 2, indicating that the send address is transmitted on four lines.
[0067] (3) In the dummy state, the second parameter of dummy_type (filling type) is 0, indicating dummy_N, that is, no bytes are transmitted; the second parameter of the filling type is 1, indicating dummy_M, first BYTE M, that is, the first byte sends M bytes; the second parameter of the filling type is 2, indicating dummy_W, first BYTE W, that is, the first byte sends W bytes; the second parameter of the filling type is 3, indicating dummy_P, first BYTE P, that is, the first byte sends P bytes. The second parameter of dummy_mode (filling mode) is 0, indicating that dummy is transmitted on one line; the second parameter of the filling mode is 1, indicating that dummy is transmitted on two lines; the second parameter of the filling mode is 2, indicating that dummy is transmitted on four lines. The second parameter of dummy_num is n, which means that the number of dummy clks is n, that is, the length of dummy is n clock cycles.
[0068] (4) In the data reading state, the second parameter of rd_data_mode (read mode) is 0, indicating that the read data is transmitted on one line; the second parameter of the read mode is 1, indicating that the read data is transmitted on two lines; the second parameter of the read mode is 2, indicating that the read data is transmitted on four lines. The second parameter of rd_data_num indicates the number of bytes of data to be read.
[0069] (5) In the data writing state, the second parameter of wr_data_mode (write mode) is 0, indicating that the written data is transmitted on one line; the second parameter of the write mode is 1, indicating that the written data is transmitted on two lines; the second parameter of the write mode is 2, indicating that the written data is transmitted on four lines. The second parameter of wr_data_num indicates the number of bytes of data to be written.
[0070] In step 104, the interface configuration of the command is performed according to the command type, the first parameter and the second parameter, including:
[0071] For each command, execute:
[0072] Obtain the first parameter and the second parameter included in the command;
[0073] The command type to which the command belongs is determined according to the first parameter, and the interface configuration is performed according to the execution order of the command type to enter the interface states in sequence; wherein, in each interface state, the command is executed according to the second parameter of the interface state.
[0074] In the present invention, for each command, the command type is determined according to its first parameter, and then the interface configuration is performed in sequence according to the execution order of the command type, so that different command types enter the interface state in sequence according to their respective execution orders, so that each command type has its own customized execution route. Therefore, when new command types appear in the future, the interface design of the new command type can still be performed according to the method, or the command type can be added on the basis of the original design method, thereby realizing the interface design compatible with different commands; at the same time, the user only needs to modify or add or subtract the existing configuration, which improves the user experience and reduces the operating cost of the industrial-grade system.
[0075] In a preferred embodiment, different command types are executed in different orders;
[0076] The execution sequence of the command types includes: entering the sending command word state, sending address state, dummy state and reading data state in sequence; entering the sending command word state, sending address state and reading data state in sequence; entering the sending command word state and reading data state in sequence; entering the sending command word state and writing data state in sequence; entering the sending command word state, sending address state and writing data state in sequence; entering the sending command word state and sending address state in sequence; entering the sending command word state; entering the sending command word state, dummy state and reading data state in sequence.
[0077] Specifically, as described in the previous example, for example, the command is cmd->addr->dummy->rd_data->end, then the command type to which the command belongs is 0, and the execution order of the command type is to enter the sending command word state, the sending address state, the dummy state and the reading data state in sequence.
[0078] After performing interface configuration on the command according to the command type, the first parameter and the second parameter in step 104, the method further includes:
[0079] S1: After receiving any SPI NOR Flash command, obtain the interface status and timing parameters in the interface status included in the command;
[0080] S2: determining a first parameter and a second parameter according to the interface state and the timing parameter under the interface state, and determining a target command type to which the command belongs according to the first parameter;
[0081] S3: After the command enters the send command word state, determine whether the target command type includes a send address state; if so, execute step S4; otherwise, execute step S5;
[0082] S4: Entering the send address state and sending the address according to the second parameter of the send address state, and then determining whether the target command type includes a dummy state, if so, executing step S6, otherwise executing step S7;
[0083] S5: If the target command type is the first type, the command ends; if the target command type is the second type, execute step S7; if the target command type is the third type, execute step S8; if the target command type is the fourth type, execute step S6;
[0084] S6: Enter the dummy state and fill according to the second parameter of the dummy state, then enter the read data state and read data according to the second parameter of the read data state, and then the command ends;
[0085] S7: Enter the data writing state and write data according to the second parameter of the data writing state, and then the command ends;
[0086] S8: Enter the data reading state and read the data according to the second parameter of the data reading state, and then the command ends;
[0087] S9: If the target command type is the fifth type, the command ends; if the target command type is the sixth type, execute step S8; if the target command type is the seventh type, execute step S7.
[0088] In the present invention, after the compatibility interface receives a command of a certain SPI NOR Flash, it can determine the target command type to which the command belongs by obtaining the parameterized interface state and the timing parameters under the interface state included in the command, and enter in sequence according to the order of the interface states included in the target command type, and finally end the command. In this way, the method can generate any timing waveform of any SPI NOR Flash command according to the designed compatibility interface and timing parameters, and adapt to all FLASH types.
[0089] In a specific embodiment, as shown in the previous example, after completing the interface configuration, the following is obtained: Figure 2The interface state transition diagram shown in the figure shows that when the first parameter of the configured compatibility interface is 0, the compatibility interface has not received any command; after receiving command a with a command type of 0, when the first parameter is 2, the interface is in the state of sending a command word, and the command word is 0xbb; cmd_type is 0, indicating that the interface is in the state of sending a command word. Figure 2 The command type 0 route in cmd_mode is 0, indicating that the command word is only transmitted on flash_io0. When the first parameter is 3, the interface is in the state of sending addresses, and the second parameter of addr_mode is 2, indicating that the address is transmitted on two lines flash_io0 / 1. When the first parameter is 4, the interface is in the dummy state; the second parameter of dummy_type is 1, indicating that the first byte of dummy sends M bytes; the second parameter of dummy_mode is 2, indicating that dummy is transmitted on two lines flash_io0 / 1; dummy_num=4, indicating that the dummy length is 4 clock cycles. When the first parameter is 5, the interface is in the state of reading data, the second parameter of rd_data_mode is 2, indicating that the read data is transmitted on two lines; rd_data_num=0x10, indicating that 16 bytes of data are to be read. When the first parameter is 7, the interface is in the state of command end.
[0090] like Figure 3 , Figure 4 As shown, an embodiment of the present invention provides a compatible SPI NOR Flash interface design device. The device embodiment can be implemented by software, or by hardware or a combination of software and hardware. From the hardware level, Figure 3 As shown in FIG. 1 , a hardware architecture diagram of a computing device where a compatible SPI NOR Flash interface design device provided by an embodiment of the present invention is located is shown in FIG. Figure 3 In addition to the processor, memory, network interface, and non-volatile memory shown in the figure, the computing device in which the device is located in the embodiment may also generally include other hardware, such as a forwarding chip responsible for processing messages, etc. Taking software implementation as an example, Figure 4 As shown, as a device in a logical sense, the CPU of the computing device in which it is located reads the corresponding computer program in the non-volatile memory into the internal memory and runs it. This embodiment provides a compatible SPI NOR Flash interface design device, which includes:
[0091] The classification module 400 is used to classify commands of SPI NOR Flash of different models from different manufacturers to obtain at least two command types;
[0092] A parameterization module 402, used to parameterize the interface state and the timing parameter in the interface state included in the command type, to obtain a first parameter for representing the interface state and a second parameter for representing the timing parameter in the interface state;
[0093] The configuration module 404 is used to perform interface configuration on the command according to the command type, the first parameter and the second parameter.
[0094] In some specific implementations, the classification module 400 may be used to execute the above step 100 , the parameterization module 402 may be used to execute the above step 102 , and the configuration module 404 may be used to execute the above step 104 .
[0095] In one embodiment of the present invention, the interface state includes a command word sending state, an address sending state, a dummy state, a data reading state, and a data writing state.
[0096] In one embodiment of the present invention, the first parameters of different interface states are different.
[0097] In one embodiment of the present invention, different command types are executed in different orders;
[0098] The execution sequence of the command types includes: entering the sending command word state, sending address state, dummy state and reading data state in sequence; entering the sending command word state, sending address state and reading data state in sequence; entering the sending command word state and reading data state in sequence; entering the sending command word state and writing data state in sequence; entering the sending command word state, sending address state and writing data state in sequence; entering the sending command word state and sending address state in sequence; entering the sending command word state; entering the sending command word state, dummy state and reading data state in sequence.
[0099] In one embodiment of the present invention, the configuration module 404 is further configured to perform the following operations:
[0100] For each command, execute:
[0101] Obtain the first parameter and the second parameter included in the command;
[0102] The command type to which the command belongs is determined according to the first parameter, and the interface configuration is performed according to the execution order of the command type to enter the interface states in sequence; wherein, in each interface state, the command is executed according to the second parameter of the interface state.
[0103] In one embodiment of the present invention, the configuration module 404 is further configured to perform the following operations:
[0104] S1: After receiving any SPI NOR Flash command, obtain the interface state and timing parameters in the interface state included in the command;
[0105] S2: determining a first parameter and a second parameter according to the interface state and the timing parameter under the interface state, and determining a target command type to which the command belongs according to the first parameter;
[0106] S3: After the command enters the send command word state, determine whether the target command type includes a send address state; if so, execute step S4; otherwise, execute step S5;
[0107] S4: Entering the send address state and sending the address according to the second parameter of the send address state, and then determining whether the target command type includes a dummy state, if so, executing step S6, otherwise executing step S7;
[0108] S5: If the target command type is the first type, the command ends; if the target command type is the second type, execute step S7; if the target command type is the third type, execute step S8; if the target command type is the fourth type, execute step S6;
[0109] S6: Enter the dummy state and fill according to the second parameter of the dummy state, then enter the read data state and read data according to the second parameter of the read data state, and then the command ends;
[0110] S7: Enter the data writing state and write data according to the second parameter of the data writing state, and then the command ends;
[0111] S8: Enter the data reading state and read the data according to the second parameter of the data reading state, and then the command ends;
[0112] S9: If the target command type is the fifth type, the command ends; if the target command type is the sixth type, execute step S8; if the target command type is the seventh type, execute step S7.
[0113] It is understandable that the structure illustrated in the embodiment of the present invention does not constitute a specific limitation on a compatible SPI NOR Flash interface design device. In other embodiments of the present invention, a compatible SPI NOR Flash interface design device may include more or fewer components than shown in the figure, or combine some components, or split some components, or arrange the components differently. The components shown in the figure may be implemented in hardware, software, or a combination of software and hardware.
[0114] The information interaction, execution process and other contents between the modules in the above-mentioned device are based on the same concept as the embodiment of the method of the present invention. For specific contents, please refer to the description in the embodiment of the method of the present invention, and no further description is given here.
[0115] An embodiment of the present invention further provides a computing device, including a memory and a target processor. The memory stores a computer program. When the target processor executes the computer program, a compatible SPINOR Flash interface design method in any embodiment of the present invention is implemented.
[0116] An embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the processor executes a compatible SPI NOR Flash interface design method in any embodiment of the present invention.
[0117] An embodiment of the present application also provides a computer program product, which includes a computer program. A processor of a computer device reads the computer program from a computer-readable storage medium, and the processor executes the computer program, so that the computer device executes a compatible SPI NOR Flash interface design method described in any of the above embodiments.
[0118] Specifically, a system or device equipped with a storage medium can be provided, on which software program code that implements the functions of any of the above-mentioned embodiments is stored, and a computer (or CPU or MPU) of the system or device can read and execute the program code stored in the storage medium.
[0119] In this case, the program code itself read from the storage medium can realize the function of any one of the above-mentioned embodiments, and thus the program code and the storage medium storing the program code constitute a part of the present invention.
[0120] The storage medium embodiments for providing the program code include a floppy disk, a hard disk, a magneto-optical disk, an optical disk (such as CD-ROM, CD-R, CD-RW, DVD-ROM, DVD-RAM, DVD-RW, DVD+RW), a magnetic tape, a non-volatile memory card, and a ROM. Alternatively, the program code can be downloaded from a server computer by a communication network.
[0121] In addition, it should be clear that the functions of any of the above embodiments can be implemented not only by executing the program code read by the computer, but also by enabling the operating system on the computer to complete part or all of the actual operations based on the instructions of the program code.
[0122] In addition, it can be understood that the program code read from the storage medium is written to a memory provided in an expansion board inserted into the computer or to a memory provided in an expansion module connected to the computer, and then based on the instructions of the program code, a CPU installed on the expansion board or expansion module is enabled to perform part or all of the actual operations, thereby realizing the functions of any of the above-mentioned embodiments.
[0123] It should be noted that, in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "comprise a ..." do not exclude the presence of other identical factors in the process, method, article or device including the elements.
[0124] A person of ordinary skill in the art can understand that all or part of the steps of implementing the above method embodiments can be completed by hardware related to program instructions, and the aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it executes the steps of the above method embodiments; and the aforementioned storage medium includes: ROM, RAM, magnetic disk or optical disk, etc., various media that can store program codes.
[0125] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims
1. A compatible SPINOR Flash interface design method, characterized in that: include: Classify the commands of SPINOR Flash of different manufacturers and models to obtain at least two command types; Parameterizing the interface state and the timing parameter in the interface state included in the command type to obtain a first parameter for representing the interface state and a second parameter for representing the timing parameter in the interface state; An interface configuration is performed on the command according to the command type, the first parameter, and the second parameter.
2. The method according to claim 1, characterized in that The interface state includes a command word sending state, an address sending state, a dummy state, a data reading state and a data writing state; and / or, The first parameters of different interface states are different.
3. The method according to claim 2, characterized in that The performing interface configuration on the command according to the command type, the first parameter, and the second parameter includes: For each of the commands described, execute: Obtaining the first parameter and the second parameter included in the command; The command type to which the command belongs is determined according to the first parameter, and the interface configuration is performed according to the execution order of the command type to enter the interface states in sequence; wherein, in each of the interface states, the command is executed according to the second parameter of the interface state.
4. The method according to claim 3, characterized in that The execution order of different command types is different; The execution sequence of the command types includes: sequentially entering the state of sending command words, sending address, dummy and reading data; sequentially entering the state of sending command words, sending address and reading data; sequentially entering the state of sending command words and reading data; sequentially entering the state of sending command words and writing data; sequentially entering the state of sending command words, sending address and writing data; sequentially entering the state of sending command words and sending address; sequentially entering the state of sending command words; sequentially entering the state of sending command words, dummy and reading data.
5. The method according to any one of claims 2 to 4, characterized in that: After configuring the interface of the command according to the command type, the first parameter and the second parameter, the method further includes: S1: After receiving a command from any SPINOR Flash, obtain the interface state and timing parameters in the interface state included in the command; S2: determining a first parameter and a second parameter according to the interface state and a timing parameter under the interface state, and determining a target command type to which the command belongs according to the first parameter; S3: after the command enters the sending command word state, determine whether the target command type includes the sending address state; if so, execute step S4; otherwise, execute step S5; S4: Entering the sending address state and sending the address according to the second parameter of the sending address state, and then determining whether the target command type includes a dummy state, if so, executing step S6, otherwise executing step S7; S5: if the target command type is the first type, the command ends; if the target command type is the second type, step S7 is executed; if the target command type is the third type, step S8 is executed; if the target command type is the fourth type, step S6 is executed; S6: Entering the dummy state and filling according to the second parameter of the dummy state, then entering the data reading state and reading data according to the second parameter of the data reading state, and then the command ends; S7: Entering the data writing state and writing data according to the second parameter of the data writing state, and then the command ends; S8: Entering the data reading state and reading data according to the second parameter of the data reading state, and then the command ends; S9: If the target command type is the fifth type, the command ends; if the target command type is the sixth type, execute step S8; if the target command type is the seventh type, execute step S7.
6. A compatible SPINOR Flash interface design device, characterized in that: include: A classification module is used to classify the commands of SPINOR Flash of different manufacturers and models to obtain at least two command types; A parameterization module, used for parameterizing the interface state and the timing parameter in the interface state included in the command type, to obtain a first parameter for representing the interface state and a second parameter for representing the timing parameter in the interface state; A configuration module is used to perform interface configuration on the command according to the command type, the first parameter and the second parameter.
7. The device according to claim 6, characterized in that The configuration module is also used to perform the following operations: For each of the commands described, execute: Obtaining the first parameter and the second parameter included in the command; The command type to which the command belongs is determined according to the first parameter, and the interface configuration is performed according to the execution order of the command type to enter the interface states in sequence; wherein, in each of the interface states, the command is executed according to the second parameter of the interface state.
8. A computing device, comprising a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the method according to any one of claims 1 to 5 is implemented.
9. A computer-readable storage medium having a computer program stored thereon, which, when executed in a computer, causes the computer to execute the method according to any one of claims 1 to 5.
10. A computer program product, characterized in that The method comprises computer instructions, which, when executed by a processor, implement the steps of the method according to any one of claims 1 to 5.