An automated system for generating photomask pattern data and a method for using the same
Through the design of the photomask graphic data automation generation system, the metadata structured shell and metadata database are used to uniformly process mask template information in different formats, solving the molding accuracy and information security problems caused by mask format differences, and achieving efficient and accurate chip molding and data security.
Patent Information
- Application Number
- CN202510143434.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-10
- Publication Date
- 2025-06-03
- Estimated Expiration
- 2045-02-10
AI Technical Summary
In the prior art, different mask factories adopt different formats, which leads to chip factories that need to save multiple sets of data in different formats, resulting in deviations in data details, making it impossible to accurately generate chips, increasing chip defect rate, and at the same time there is a risk of mask information leakage.
By designing a photomask graphic data automation generation system, using metadata structured shell and metadata database, uniformly processing mask template information in different formats, ensuring mold making accuracy and reducing the possibility of information leakage.
The unified processing of masks in different formats is realized, which ensures mold making accuracy, reduces chip defect rate, improves data security, and reduces the risk of information leakage.
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Figure CN119598949B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of electronic digital data processing, and in particular to an automated optical mask pattern data generation system and a method for using the same. Background Art
[0002] In high-precision processing fields such as semiconductor manufacturing and lithography technology, before an integrated circuit design company puts the designed chip into production, it needs to send the chip design draft to a mask factory, and the mask factory makes the mask. As in the prior art, the invention titled "Method for Manufacturing an Optical Mask and Layout Pattern for Manufacturing an Optical Mask" with the patent application number CN202310762744.6 discloses a method for manufacturing an optical mask, including providing a target pattern, generating a first offset pattern according to the target pattern and a first deviation value, then generating a second offset pattern according to the first offset pattern and a second deviation value, then performing a Boolean operation on the first offset pattern and the second offset pattern to obtain a first auxiliary feature, and then outputting the target pattern and the first auxiliary feature for manufacturing the optical mask. The optical mask formed thereby has a shortened manufacturing time and improved fidelity, helping to transfer the target pattern onto the semiconductor substrate as faithfully as possible.
[0003] It can be learned from this patent that the conventional requirements for data information accuracy are very high, and the formats adopted by different mask factories in the prior art are different, resulting in the need for chip factories to store multiple sets of data formats provided by different mask factories. Different formats are not interchangeable. Even if the mask template information is forcibly decoded through templates of different data formats occasionally, there will be deviations in some data details, resulting in the inability to accurately generate chips and an increase in the chip defect rate. At the same time, different chip factories are also worried that the mask information corresponding to the chips they design is easily obtained by other units and hope to further improve the confidentiality of their design documents. Summary of the Invention
[0004] The purpose of the present invention is to provide an automated optical mask pattern data generation system and a method for using the same, which can realize the unified processing of template information of masks in different formats through a complete set of systems. The processed data can be read out through a set of systems, and the mold-making accuracy after reading is guaranteed. At the same time, the possibility of leakage of the mask template information is also reduced.
[0005] In order to achieve the above-mentioned purpose, the present invention provides an automatic generation system for photomask graphic data, including making a metadata structured shell and establishing a corresponding metadata database based on the made metadata structured shell; the metadata structured shell is composed of a shell layer, a core layer and an environment adaptation layer, wherein the shell layer stores customer information and a mask molding data deployment system directory, while the core layer is provided with specific source files and a mask molding data deployment system, and the environment adaptation layer has an interface interconnected with a corresponding operating system to ensure that the metadata structured shell can be recognized by the corresponding operating system.
[0006] Preferably, the specific steps of making the metadata structured shell are: the system accesses the main chip layout database provided by the customer, obtains the database information, mask generation table and related files for auxiliary work provided by the customer from the main chip layout database and gives them to the customer engineering department; the customer engineering department plans the mask processing based on the information obtained from the main chip layout database and the specifications provided by the chip factory, clarifies the mask requirements and issues a data release notification, and then performs unit merging and design rule inspection and cleaning based on the data obtained from the above two data sources. If the unit merging and design rule inspection and cleaning are completed, it is directly sent to the mask data engineering department, combined with the mask grade specifications and mask-related quality specifications provided by the mask factory, to generate the source file and conversion data file recorded in the metadata structured shell. This method of making metadata structured shells can effectively improve the accuracy and standardization of the source file data. It accesses multiple databases, integrates the information and specifications of customers, chip factories and mask factories, uses standardized processes for data processing, and reduces human errors.
[0007] Preferably, when the unit merging and design rule checking and cleaning process is not completed, the design service and product department will conduct layout merging and design rule checking; after the layout merging and rule checking are completed, they will be placed in the metadata database, and a data release / revision notice will be issued, and the data will be sent to the mask data engineering department. Combined with the mask grade specifications and mask-related quality specifications provided by the mask factory, the source files and conversion data files recorded in the metadata structured shell are generated. This processing method can use the power of professional departments to solve key tasks that have not been completed in the early stage, ensure data compliance and completeness, ensure the smooth progress of the metadata structured shell generation process, and improve data quality and product reliability. Avoid the appearance of defective source files.
[0008] Preferably, in the mask data engineering department, the field layout is generated based on the acquired data. During the generation process of the field layout, data input and data segmentation of the mask molding data deployment system are required, and finally a workbench view is presented. The mask processing information is determined based on the workbench view, and the mask processing information is saved separately as a source file and a conversion data file.
[0009] Preferably, the specifications provided by the chip factory include at least a bias table, design rules, and specified mask level information. This is also to ensure that the structured shell of the fabricated metadata is indeed usable.
[0010] The present invention also includes a method of using an automated optical mask pattern data generation system, characterized in that when manufacturing a mask, the local device obtains a structured shell of metadata from the metadata database; the environment adaptation layer in the structured shell of metadata identifies the operating system where the local device is located and performs automatic configuration; the local device uploads customer information, compares the obtained customer information with the customer data in the shell layer to confirm the identity of the local device, and after determining the identity, selects the corresponding mask manufacturing data deployment system from the mask manufacturing data deployment system directory of the mask template, and decompresses the source file into device-readable data and software-readable data through the mask manufacturing data deployment system, configures the device using the obtained device-readable data, and manufactures the mask using the obtained software-readable data.
[0011] Preferably, when the mask manufacturing data deployment system parses the corresponding source file, the metadata database is connected to the mask manufacturing data deployment system, and the corresponding source file is obtained according to the converted data file in the mask manufacturing data deployment system. The mask manufacturing data deployment system at least includes: a database management system, a plate-making information processing system, a mask design final draft management system, and a mask import management system; the database management system includes a mask manufacturing login system and a mask manufacturing layout planning system; the mask manufacturing layout planning system is connected to the plate-making information processing system, and the plate-making information processing system is connected to the mask data processing system and the plate-making specification management system; in the plate-making information processing system, the source file is parsed into device-readable data and software-readable data, the plate-making information processing system is connected to the mask design final draft management system, and the mask design final draft management system is connected to the mask import management system; the metadata database outputs software-readable data in a standardized information format: reads plate-making information in different formats, decomposes the plate-making information into meta-manufacturing data and meta-mask information; the meta-manufacturing data includes layout frame information and component manufacturing information; the meta-mask information includes product code and production line information; and the mask template layer information that belongs to both the meta-manufacturing data and the meta-mask information.
[0012] Preferably, data, optical compensation information, a data file description table, and a layout diagram are formed in the mask import management system, and the mask import management system is connected to the mask data processing system through a process integration module.
[0013] Preferably, the layout frame information includes data plate frame layout information, test components information on the cutting line, and single-module test component information; after the data plate frame layout information is obtained, it is repackaged together and encrypted, and the encrypted file is added with the plate frame GDSII and CD diagram labels of the working file.
[0014] Preferably, the mask factory manufactures masks through the frame GDSII of the working file and the CD map label. The mask control system in the mask factory monitors the manufacturing process and conducts infeed quality control and final inspection on the masks.
[0015] Due to the adoption of the above technical solution, the present invention generates a metadata structured shell, which can serve as an intermediate layer in the chip design software and the manufacturing process management system. When designers conduct chip design, they input, store, and retrieve source files through the metadata structured shell. In the manufacturing link, production equipment and process control systems also obtain the source files required for chip manufacturing through this shell. The metadata structured shell plays a key role in organizing, protecting, and transmitting metadata in the field of chip manufacturing, which helps improve the efficiency and quality of chip design and manufacturing.
[0016] At the same time, by simplifying the communication and document exchange among chip manufacturers, mask manufacturers, and customers, it can be gradually expanded into an industry standard, thus simplifying the operation processes of each party. In addition, in outsourced production, the simplification of document exchange will enable partner factories to no longer need to interpret the processing mode again, nor to transmit the customer's processing mode, which greatly improves work efficiency and data security. The automated program for data processing is isolated and will not be affected by changes in the customer's processing mode, which further ensures the stability and efficiency of the process. These measures not only save development and testing costs but also reduce the risk of program modification. The design of the metadata structured shell is easy to read uniformly and reduce errors. It is not restricted by different databases and database structures, which greatly promotes the unobstructed circulation of data. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] The drawings are used to provide a further understanding of the present invention, and constitute a part of the specification. They are used together with the embodiments of the present invention to explain the present invention, and do not constitute a limitation to the present invention. In the drawings:
[0018] Figure 1 is the structure of the metadata structured shell of the optical mask pattern data automated generation system of the present invention.
[0019] Figure 2 is the manufacturing method of the metadata structured shell of the optical mask pattern data automated generation system of the present invention.
[0020] Figure 3 is a schematic structural diagram of the mask manufacturing data deployment system of the optical mask pattern data automated generation system of the present invention.
[0021] Figure 4 is a schematic flow diagram of the optical mask pattern data automated generation system of the present invention for obtaining data from source files.
[0022] Figure 5 It is a schematic diagram of a single mask layer fabricated using the automated generation system for photomask pattern data of the present invention in the embodiment.
[0023] Figure 6 It is a schematic structural diagram of a complete set of masks finally fabricated using the automated generation system for photomask pattern data of the present invention in the embodiment. Detailed implementation manners
[0024] The preferred embodiments of the present invention will be described below with reference to the accompanying drawings. It should be understood that the preferred embodiments described herein are only for the purpose of illustrating and explaining the present invention, and are not intended to limit the present invention.
[0025] In order to clearly express the content involved in the present invention, first, the meanings of some abbreviations involved in the present invention will be explained.
[0026] MPW: That is, "Multi - Project Wafer", which has special significance in the aspect of photomask data for chip manufacturing. Its background is to reduce the chip design cost, especially the cost in the small - batch production or chip prototype production stage. The operation mode is that the foundry receives the chip layout data of different customers according to rules and schedules, and after processing, reasonably arranges them in different areas of the same wafer. Multiple functional chip layouts can co - exist, and each chip simultaneously undergoes processes such as lithography and etching. Through MPW, the cost can be significantly reduced, and the R & D progress can be accelerated, enabling multiple design projects to quickly enter the manufacturing stage and shortening the cycle from design to testing.
[0027] GDSII: Graphic Data System II is a standard file format for integrated circuit layout data exchange. It is a data format widely used in the field of chip design and manufacturing, mainly used to describe the physical layout of integrated circuits (ICs). This file format can accurately record the geometric shapes, position information, and hierarchical relationships of various physical structures on the chip, etc.
[0028] MEBES: Manufacturing Electron - Beam Exposure Standard is a mask data format mainly used in electron - beam exposure systems. It plays an important role in the chip manufacturing process, especially in the high - precision mask manufacturing link. It is a format developed to meet the requirements of electron - beam lithography technology for the accuracy and complexity of mask data.
[0029] RDDS: Reticle Data Deployment System. RDDS data is mainly used for collecting reticle manufacturing data and generating it according to the process parameters of each technology node. It is a comprehensive data set that covers various key information of reticle manufacturing information from reception, processing to final application in the lithography process.
[0030] Mask: That is, mask or Reticle, which plays a key template role in the chip manufacturing process. It is like a "light-shielding plate" with patterns made according to the chip layout design. In the lithography process, light passes through the transparent part of the mask and irradiates the surface of the silicon wafer coated with photoresist, causing a chemical change in the photoresist, thereby transferring the pattern on the mask to the silicon wafer.
[0031] Metadata database: According to the general definition, a metadata database is a special database mainly used to store data about data, that is, metadata. In the present invention, the generated metadata structured shell, various source files, and part of the information parsed from the source files are all stored in the same database, and this database is named the metadata database.
[0032] As an embodiment, an automated optical mask pattern data generation system of the present invention includes making a metadata structured shell and establishing a corresponding metadata database based on the made metadata structured shell. As Figure 1 shown, the metadata structured shell is composed of a shell layer, a core layer, and an environment adaptation layer. Among them, the shell layer stores customer information and the directory of the reticle data deployment system, and the core layer is provided with specific source files and the reticle data deployment system. The environment adaptation layer has an interface interconnected with the corresponding operating system to ensure that the metadata structured shell can be recognized by the corresponding operating system.
[0033] As Figure 2As shown, the process is initiated by the customer, and the system accesses the main chip layout database provided by the customer. The main chip layout database (Main Chip Layout Data Base) is the basic layout data source for the entire chip manufacturing process. It carries key information such as the chip layout in a specific file format, and will be passed to other relevant departments for further operation and processing. The database information, mask generation table and related files for auxiliary work provided by the customer are obtained from the main chip layout database and given to the customer engineering department; the customer engineering department plans the mask processing based on the information obtained from the main chip layout database and the specifications provided by the chip factory, clarifies the mask requirements and issues a data release notification. At this time, the data obtained from the above two data sources are used to perform unit merging and design rule inspection and cleaning. If the unit merging and design rule inspection and cleaning are completed, it is sent directly to the mask data engineering department, combined with the mask grade specifications and mask-related quality specifications provided by the mask factory, to generate source files and conversion data files recorded in the metadata structured shell.
[0034] Among them, the main chip layout database is the key foundation of the chip manufacturing process, which includes the following important contents: Physical-layer Layout: This is the presentation of the physical structure of the chip on a plane. It records in detail the position, shape and size of each physical component in the chip (such as transistors, capacitors, resistors, etc.). For example, for a transistor, the specific location of its source, drain and gate and the distance between them are indicated. This information is crucial for processes such as lithography, because lithography needs to accurately transfer the patterns of these physical structures to silicon wafers. It also includes the layout of different functional modules on the chip (such as CPU core, cache, I / O interface, etc.). Taking the CPU core as an example, the positional relationship of its internal arithmetic logic unit (ALU), registers and other components will be clearly displayed in the layout to ensure that the signal transmission path between them meets the design requirements.
[0035] Metal - Wiring - layer Layout:
[0036] It mainly records the layout of metal wires in the chip. These metal wires are used to connect various physical components to achieve signal transmission. It contains information such as the width, thickness, and direction of the wires. For example, in advanced process chips, in order to reduce signal delay, metal wiring may adopt a multi-layer structure, and the wiring direction of each layer may be perpendicular to each other (such as one layer for horizontal wiring and the other layer for vertical wiring), and the main chip layout database will describe the specific layout of each layer of metal wiring in detail.
[0037] The Functional - Module Description includes the module type and function:
[0038] Specify the type of each functional module, such as Digital Signal Processing module (DSP), Analog Front - End module (AFE), etc. At the same time, describe the function of each module in detail. For example, the DSP module is responsible for operations such as digital signal filtering and modulation, and the database will record its specific algorithm implementation and the characteristics of input and output signals. For complex functional modules, such as the Graphics Processing Unit (GPU) in a System - on - Chip (SoC), it will include the supported graphics rendering algorithms (such as vertex shading, pixel shading, etc.) and the interaction methods with other modules (such as memory controller, display interface, etc.).
[0039] Module - Interface Information:
[0040] Record the interface signals of each functional module, including the signal name, type (such as digital signal or analog signal), level standard (such as TTL level, CMOS level), etc. For example, the interface signals of a storage module may include address bus signals, data bus signals, read - write control signals, etc., and the database will elaborate on information such as the bit width and transmission direction of these signals to ensure correct communication between modules.
[0041] It also includes design - rule - related data, such as Minimum - Size Constraints: which specify the minimum sizes of various physical structures in the chip. For example, the minimum channel length of a transistor, the minimum width of a metal wire, etc. These minimum - size constraints are set based on the capabilities of the chip manufacturing process to ensure that the chip can reliably implement the design functions during manufacturing. If these sizes are less than the specified values, it may lead to process deviations during manufacturing, such as short - circuits, leakage, etc. There are also minimum - size requirements for the gaps in the chip (such as the spacing between two adjacent metal wires). This is to prevent crosstalk between signals and ensure the independence and accuracy of signal transmission.
[0042] It also includes Spacing - Rules: In addition to the metal - wire spacing mentioned above, it also includes the spacing rules between different functional modules. For example, to avoid electromagnetic interference between analog and digital modules, the minimum distance between them is specified. At the same time, within the same functional module, there are also spacing requirements between different physical structures, such as the spacing between a transistor and a capacitor, to ensure that they do not affect each other during operation.
[0043] The above is the specific database information (D.B. Information): It is one of the important documents transmitted from the customer, containing various detailed data descriptions related to the chip layout database, etc. Here also includes the Mask Generation Table: It is a document guiding the planning related to mask manufacturing, specifying various specifications, requirements, etc. required for mask generation.
[0044] Others also include related documents: Some other auxiliary or supplementary documents related to chip layout, design, etc. For example, Electrical - Parameters: It contains the electrical parameters of each component of the chip, such as the threshold voltage, on - resistance of transistors, capacitance value of capacitors, resistance value of resistors, etc. These electrical parameters directly affect the performance of the chip, such as the operating speed and power consumption of the chip. For example, by adjusting the threshold voltage of transistors, the operating current of the chip can be controlled, thereby affecting the balance between power consumption and speed of the chip. For the power network in the chip, parameters such as power supply voltage, power supply current, and isolation requirements between different power domains are recorded to ensure that each part of the chip can stably obtain the required power supply. And some Process - Parameters: Parameters related to the chip manufacturing process, such as the resolution of lithography, depth control parameters of etching, etc. These parameters need to be strictly controlled during the chip manufacturing process. Recording these parameters in the main chip layout database can provide accurate operation basis for manufacturing equipment. For example, parameters such as exposure dose and focal length in the lithography process are adjusted according to the set values in the database to ensure that the chip layout can be accurately replicated onto the silicon wafer.
[0045] The Customer Engineering Department makes a reticle tooling planning for the mask based on the information obtained from the main chip layout database, combined with the specifications provided by the chip factory, clarifies the mask requirements and issues a data release notice. Among them, the reticle tooling planning refers to the overall planning of the mask processing link based on the content of documents such as the received Mask Generation Table, determining the arrangements for processing steps, sequences, process key points, etc. And the reticle requisition: It clarifies the specific requirements of the mask in terms of quantity, type, accuracy, etc. during the chip manufacturing process and forms corresponding documents. For the above data, a data release notice is issued: It is used to inform subsequent links which data are available or have been officially released, ensuring that each department can obtain and use the corresponding data at the appropriate time.
[0046] The chip factory provides a data table and design rules, which clarify various rules to be followed during the chip design process, such as wiring rules and component layout rules, to ensure the performance and manufacturability of the chip, etc., and specify the mask grade, which determines the mask grade required for each part according to factors such as different functional requirements and precision requirements of the chip.
[0047] At this time, based on the data obtained from the above two data sources, unit merging and checking and cleaning judgment of design rules are carried out. If the unit merging and checking and cleaning of design rules are completed, it is directly sent to the mask data engineering department, and combined with the mask grade specifications provided by the mask factory and the mask-related quality specifications, source files and conversion data files recorded in the metadata structured shell are generated. When it is determined that the unit merging and checking and cleaning process of design rules is not completed, layout merging and rule checking of design are carried out through the design service and product department. After the layout merging and rule checking are completed, it is placed in the metadata database, and a data release / revision notice is issued, and the data is sent to the mask data engineering department, and combined with the mask grade specifications provided by the mask factory and the mask-related quality specifications, source files and conversion data files recorded in the metadata structured shell are generated.
[0048] In the mask data engineering department, the generation of the field layout is realized according to the obtained data. The generation of the field layout is the technical focus of the present invention. According to the relevant files such as the chip layout transmitted previously, the layout structure of the field on the mask is generated, and the specific patterns, function divisions, etc. of different regions on the mask are determined, providing a detailed layout basis for the specific steps of subsequent mask manufacturing.
[0049] It specifically includes function area division: for a processor chip, this includes the CPU core area. Within this area, sub-areas such as an instruction decoding unit, an arithmetic logic unit (ALU), and a register bank are divided. For example, the ALU area is further subdivided according to its arithmetic functions (such as addition, multiplication, etc.) to ensure the reasonable layout of different arithmetic units and reduce signal transmission delay. For a memory chip, such as DRAM, a memory cell array area is divided. This area consists of a large number of memory cells (such as memory cells composed of capacitors and transistors), and there are peripheral circuit areas such as row decoders and column decoders for reading and writing operations on the memory cells.
[0050] For the input / output (I / O) area: including the physical areas corresponding to various interface pins, such as the chip's power pins, ground pins, data input and output pins, etc. The layout of these pins needs to take into account factors such as signal integrity and electromagnetic compatibility. For example, high-speed data interface pins will be placed in an area close to the edge of the chip and well isolated from each other to reduce signal reflection and crosstalk. There will also be buffer circuit areas for connecting the chip's internal functional modules and external devices, such as input buffers and output buffers, and their layout should facilitate the effective transmission of signals and the adaptation of driving capabilities.
[0051] For auxiliary functional area: including clock generation and distribution circuit area. Clock signal is the key to normal operation of the chip. The layout of this area should ensure that the clock signal can be evenly and quickly distributed to each required functional module. For example, a tree-shaped or mesh-shaped clock distribution network will be used, and its layout in the chip will be optimized according to the location of the functional module and the load requirements of the clock signal.
[0052] There is also a test circuit area for functional testing and fault diagnosis after chip manufacturing. The layout of these test circuits should facilitate the injection of test signals and the collection of test results without affecting the normal function of the chip.
[0053] After the area is divided, the pattern is generated and arranged. According to the requirements of the chip design, the specific layout pattern in each functional area is generated. Taking the transistor as an example, when generating the field layout, the pattern shape and size of the transistor's active area, gate, etc. will be determined. For metal wiring, the detailed pattern of each metal wire's direction, bending angle, connection method, etc. will be determined. These patterns are generated based on the layout information in the main chip layout database and combined with the requirements of the manufacturing process.
[0054] For some special structures, such as the via patterns between multi-layer metal interconnects in a chip, they will be designed based on the connection relationship between metal layers and electrical performance requirements. The size, shape, and distribution density of the vias will be determined during the field layout generation process to ensure good electrical connections between different metal layers.
[0055] The pattern arrangement follows certain symmetry and repetitive rules. In some chip functional modules, such as memory cell arrays, memory cells are arranged in a certain matrix form. This regular arrangement helps improve chip manufacturing efficiency and performance stability. For example, in DRAM chips, memory cells are arranged in rows and columns, and the spacing and alignment between rows and columns must comply with design rules and manufacturing process requirements.
[0056] At the same time, the relative position relationship between different patterns should be considered to avoid short circuits and interference. For example, in the analog circuit area of the chip, it is necessary to ensure that the analog signal routing is kept at a sufficient distance from the digital signal routing, and the layout is carried out according to certain shielding rules to prevent digital signals from interfering with analog signals.
[0057] It is also necessary to adapt the lithography field division and layout one by one. The basis for the division of the lithography field is to divide the entire field layout of the chip into multiple lithography fields according to the exposure area size and accuracy requirements of the lithography equipment. The size and shape of the lithography field are usually determined by the technical parameters of the lithography equipment. For example, for a common lithography equipment, its exposure field may be a square area with a side length of tens of millimeters. When the field layout is generated, the chip layout needs to be reasonably divided according to this size. Considering the complexity of the chip layout and the requirements of the manufacturing process, the division of the lithography field may also be combined with the functional areas of the chip. For example, try to divide a complete functional module (such as a small processor sub-module) into one lithography field to reduce the errors and performance impact that may occur when splicing different lithography fields.
[0058] The layout adaptation strategy is to adapt the layout of the chip layout within each lithography field. This includes adjusting the position and size of the pattern to ensure that the pattern can be accurately transferred to the silicon wafer during the lithography process. For example, for patterns close to the edge of the lithography field, appropriate scaling or offset may be performed to compensate for pattern deformation caused by edge effects during the lithography process.
[0059] It is also necessary to consider the stitching strategy between different lithography fields. In the intersection area of adjacent lithography fields, some special alignment marks and stitching patterns will be designed to achieve precise alignment and stitching during the lithography process to ensure the integrity and accuracy of the entire chip layout.
[0060] In the process of generating the field layout, RDDS data entry is required: the relevant RDDS data is input, and data fracturing is performed: the received relevant data is segmented. This provides the mask production system with necessary data support so that it can accurately produce masks according to design requirements.
[0061] Job Deck View: This is a preview of the mask pattern on a computer screen before the mask is made in the mask exposure machine. This helps to find possible errors in computer graphics conversion before the actual mask exposure costs are incurred.
[0062] Mask Tooling Information: It contains various process information involved in mask processing, such as the parameters of the processing equipment used, the specific time arrangement of the processing steps, etc., providing detailed guidance for the actual mask processing operation.
[0063] Save Source and Converted Data File.Doc.: Save the source files and related converted data files involved in the mask making process, facilitating subsequent traceability, review, and possible further optimization, etc., to ensure the data integrity and traceability of the entire mask making process.
[0064] When making a mask, the local device obtains the metadata structured shell from the metadata database; the environment adaptation layer in the metadata structured shell identifies the operating system where the local device is located and performs automatic configuration; the local device uploads customer information, compares the obtained customer information with the customer data in the shell layer to confirm the identity of the local device, and after determining the identity, selects the corresponding mask template manufacturing data deployment system from the mask template manufacturing data deployment system directory, and decompresses the source file into device - recognizable device - used data and software - used data through this mask template manufacturing data deployment system, configures the device using the obtained device - used data, and manufactures the mask using the obtained software - used data. As Figure 3 shown, when the mask template manufacturing data deployment system parses the corresponding source file, the metadata database is connected to the mask template manufacturing data deployment system, and the corresponding source file is obtained according to the conversion data file in the mask template manufacturing data deployment system. The mask template manufacturing data deployment system at least includes: a database management system, a plate - making information processing system, a mask design final draft management system, and a mask import management system; the database management system contains a mask manufacturing login system and a mask manufacturing layout planning system; the mask manufacturing layout planning system is connected to the plate - making information processing system, and the plate - making information processing system is connected to the mask data processing system and the plate - making specification management system; in the plate - making information processing system, the source file is parsed into device - used data and software - used data, the plate - making information processing system is connected to the mask design final draft management system, and the mask design final draft management system is connected to the mask import management system; the software - used data in the standardized information format is output from the metadata database: read the plate - making information in different formats, and decompose the plate - making information into meta - manufacturing data and meta - mask information; the meta - manufacturing data includes layout frame information and component manufacturing information; the meta - mask information includes product code and production line information; there is also the mask template layer information that belongs to both the meta - manufacturing data and the meta - mask information. The mask import management system forms data, optical compensation information, a data file description table, and a layout diagram, and the mask import management system is connected to the mask data processing system through a process integration module.
[0065] As shown Figure 4 in the figure, the software data after outputting the standardized information format in the metadata database: reads the plate-making information in different formats, decomposes the plate-making information into meta-molding data and meta-mask information; the meta-molding data includes layout frame information and component molding information; the meta-mask information includes product code and production line information; there is also the mask layer information that belongs to both the meta-molding data and the meta-mask information. The layout frame information includes data plate frame layout information, test components information on the cutting line, and single-module test component information; after the data plate frame layout information is obtained, it is repackaged together and encrypted, and the frame GDSII and CD map labels of the working file are added to the encrypted file. The data source after the standardized information format is paper plate-making materials or electronic files, and the paper plate-making materials are manually input into the metadata database. In the mask import management system, data, optical compensation information, data file description table, and layout diagram are formed. The mask import management system is connected to the mask data processing system through the process integration module. Through the mask plate-making material deployment system, a script file for the Boolean operation of mask plate data processing is generated. The format and syntax of the Boolean operation of the script file for the Boolean operation are similar to:
[0066] FINAL = ((Operand-1)|(Operand-2 {operator Operand-2}*))
[0067] Operator = (AND|OR|NOT|XOR|…)
[0068] Operand-1 = {REVERSE}* Pattern
[0069] Operand-2 = Pattern {(SIZING value)*|(SCALE value)|(ORIENTATIONvalue)}*
[0070] Pattern = (Layers|MEBES|OASIS.MASK|CFLT|CREF)
[0071] Layers = {[DB#]}*L(ID){( <space>{[DB#]}*L(ID))+}*
[0072] ID = (0-9)+{(,0-9)+}*{;(0-9)+{(,0-9)+}*}*。
[0073] The instruction file for Boolean operations in mask data processing is made into a specific instruction file combined with forms. For example:
[0074] General Information for Mask Tooling
[0075] *********************************************************************
[0076] STEPPER:ASML Magnification : 1X FLOW : F1001BIWT Unit : MM
[0077] PROCESS:BIM35WET
[0078] ORDER:9876543
[0079] OPIMIZED ARRAY=8 X 5
[0080] FIELD STEP SIZE X =25.92000 Y =27.90000
[0081] FIELD EXPOSURE SIZE X= 26.00000 Y = 27.98000
[0082] FIELD LAYOUT COORDINATES XLB=-13.00000 YLB = -14.86500
[0083] XLT = -13.00000 YLT = 13.11500
[0084] XRB =13.00000 YRB = -14.86500
[0085] XRT= 13.00000 YRT =13.11500
[0086] ARRAY OFFSET X=0.000000 Y = -0.875000
[0087] *********************************************************************
[0088] 1) MAIN CHIP CODE : 9876543
[0089] 2) LAYOUT WINDOW SIZE: X = 3.160000 Y = 5.500000
[0090] 3) STREET WIDTH X = 0.080000 Y = 0.080000
[0091] 4) CHIP SIZE X = 3.240000 Y = 5.580000
[0092] 5) POSITION LIST : (1X)
[0093] CHIP NAME X-COODINATE Y-COODINATE
[0094] =========== ============= =============
[0095] MAINCHIP_0_8 -11.340000 -12.035000
[0096] MAINCHIP_0_8 -8.100000 -12.035000
[0097] MAINCHIP_0_8 -4.860000 -12.035000
[0098] MAINCHIP_0_8 -1.620000 -12.035000
[0099] MAINCHIP_0_8 1.620000 -12.035000
[0100] MAINCHIP_0_8 4.860000 -12.035000
[0101] MAINCHIP_0_8 8.100000 -12.035000
[0102] MAINCHIP_0_8 11.340000 -12.035000
[0103] MAINCHIP_1_8 -11.340000 -6.455000
[0104] MAINCHIP_1_8 -8.100000 -6.455000
[0105] MAINCHIP_1_8 -4.860000 -6.455000
[0106] MAINCHIP_1_8 -1.620000 -6.455000
[0107] MAINCHIP_1_8 1.620000 -6.455000
[0108] MAINCHIP_1_8 4.860000 -6.455000
[0109] MAINCHIP_1_8 8.100000 -6.455000
[0110] MAINCHIP_1_8 11.340000 -6.455000
[0111] MAINCHIP_2_8 -11.340000 -0.875000
[0112] MAINCHIP_2_8 -8.100000 -0.875000
[0113] MAINCHIP_2_8 -4.860000 -0.875000
[0114] MAINCHIP_2_8 -1.620000 -0.875000
[0115] …”
[0116] As Figure 2 shown, the mask factory is actually the final application party of the metadata structured shell of the present invention. On the one hand, it provides data for generating the metadata structured shell. The data provided here includes mask grade specifications (Mask Grade Spec.): Based on the relevant files such as the specified mask grade passed from the previous link, the specific mask grade specifications are further refined and determined to guide the process selection and quality control in the mask manufacturing process, etc.
[0117] There are also the incoming and outgoing quality specifications for masks (Mask - Incoming & Outgoing QC Spec.): Establish quality inspection specifications for masks when they are incoming and outgoing, clarify various quality indicators, inspection methods, etc., to ensure that the masks meet the corresponding quality requirements when entering the factory and when shipped after production, and guarantee the quality stability of the mask link in the entire chip manufacturing chain.
[0118] On the other hand, after receiving the documents transferred by the mask data engineering, mask making is carried out: Based on the data, specifications, etc. provided in all the previous links, the actual mask making work is carried out. Through a series of complex processes such as lithography and etching, the designed mask layout is transformed into an actual mask product.
[0119] Reticle Incoming QC (IQC) is carried out on the manufactured masks: Carry out incoming quality control on the masks entering the factory. According to the pre - set quality specifications, check whether the masks meet the requirements through various inspection means to prevent masks with quality problems from entering the production link and guarantee the basic quality of subsequent chip manufacturing.
[0120] Here, in fact, the reticle final inspection needs to be combined with the mask control system of the chip factory: After the mask is manufactured, the final inspection work is carried out to comprehensively check various quality indicators of the mask to ensure that it fully meets the design requirements and quality standards. Only the masks that pass the final inspection can be used in the subsequent chip manufacturing process to ensure the quality and performance of chip manufacturing. Figure 5 It is a single - layer mask structure obtained, and Figure 6 The figure shows the multi - layer masks finally generated one by one for chip manufacturing. Figure 6 The mask structure in [reference] is a conventional chip mask structure, so it will not be specifically described here. However, it should be noted that for the same chip, the design factory designs it first. This design process is to first design the metal layer according to the instructions, and then design the entire semiconductor device starting from the metal layer. Finally, the metal layer information is combined with the semiconductor device information and integrated into the frame GDSII file of the working document. And the frame GDSII of this working document is shelled. The mask factory then makes this mask according to the information obtained from the document. Through such a series of sequential department collaborations, document transfers, and operation processes, the complete chip manufacturing - related links from the initial layout data of the chip to the completion of the final mask manufacturing are promoted.
[0121] Although the present invention is disclosed above in preferred embodiments, it is not intended to limit the scope of the present invention. Any person of ordinary skill in the art, without departing from the scope of the present invention, can make some improvements. That is, all equivalent improvements made in accordance with the present invention should be covered by the scope of the present invention. In the description of this specification, the description with reference to the terms "one embodiment / way", "some embodiments / ways", "example", "specific example", or "some examples", etc. means that the specific features, structures, materials, or characteristics described in connection with the embodiment / way or example are included in at least one embodiment / way or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment / way or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments / ways or examples. In addition, without contradiction, those skilled in the art can combine and combine the different embodiments / ways or examples described in this specification and the features of different embodiments / ways or examples.
[0122] In addition, the terms "first" and "second" are used only for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one of such features. In the description of the present application, the meaning of "a plurality" is at least two, such as two, three, etc., unless otherwise specifically defined.
[0123] Those skilled in the art should understand that the above embodiments are only for clearly explaining the present disclosure and not for limiting the scope of the present disclosure. For those skilled in the art, other changes or variations can be made on the basis of the above disclosure, and these changes or variations are still within the scope of the present disclosure.< / space>
Claims
1. A system for automatically generating photomask pattern data, characterized in that: The method includes making a metadata structured shell, and establishing a corresponding metadata database based on the metadata structured shell; the metadata structured shell is composed of a shell layer, a core layer and an environment adaptation layer, wherein the shell layer stores customer information and a mask molding material deployment system directory, while the core layer is provided with specific source files and a mask molding material deployment system, and the environment adaptation layer has an interface interconnected with a corresponding operating system to ensure that the metadata structured shell can be recognized by the corresponding operating system; wherein the specific steps of making the metadata structured shell are: the system accesses the main chip layout database provided by the customer, obtains the database information, mask generation table and related files for auxiliary work provided by the customer from the main chip layout database and gives them to the customer engineering department; the customer engineering department processes the mask based on the information obtained from the main chip layout database and in combination with the specifications provided by the chip factory Planning, clarify mask requirements and issue data release notifications. At this time, based on the information obtained from the main chip layout database and the data release notifications issued by the chip factory, the customer engineering department will conduct unit merging and design rule inspection and cleaning. If the unit merging and design rule inspection and cleaning are completed, it will be sent directly to the mask data engineering department. Combined with the mask grade specifications provided by the mask factory and the mask-related quality specifications, the source files and conversion data files recorded in the metadata structured shell are generated. In the mask data engineering department, the field layout is generated according to the acquired data. In the process of generating the field layout, data input and data segmentation of the mask plate molding data deployment system are required, and finally the workbench view is presented. The mask processing information is determined according to the workbench view, and the mask processing information is saved as source files and conversion data files respectively.
2. A photomask pattern data automatic generation system as claimed in claim 1, characterized in that: When it is determined that the unit merging and design rule checking and cleaning process is not completed, the layout merging and design rule checking are carried out through the design service and product department; after the layout merging and rule checking are completed, it is placed in the metadata database, and a data release / revision notice is issued, and the data is sent to the mask data engineering department. Combined with the mask grade specifications provided by the mask factory and the mask-related quality specifications, the source files and conversion data files recorded in the metadata structured shell are generated.
3. The photomask pattern data automatic generation system according to claim 1, characterized in that: The specifications provided by the chip factory include at least bias tables, design rules, and specified mask level information.
4. A method for using the photomask pattern data automatic generation system as claimed in claim 1, characterized in that: When making a mask, the local device obtains the metadata structured shell from the metadata database; The environment adaptation layer in the metadata structured shell identifies the operating system of the local device and automatically configures it; the local device uploads customer information, and compares the acquired customer information with the customer information in the shell layer to confirm the identity of the local device. After the identity is determined, the corresponding mask molding data deployment system is selected from the mask molding data deployment system directory, and the open source file is decoded by the mask molding data deployment system into device data and software data that can be recognized by the local device, and the acquired device data is used to configure the device, and the acquired software data is used for molding.
5. The method for using the photomask pattern data automatic generation system as claimed in claim 4, characterized in that: When the mask mold making data deployment system parses the corresponding source file, the metadata database is connected to the mask mold making data deployment system, and the mask mold making data deployment system obtains the corresponding source file according to the conversion data file. The mask mold making data deployment system at least includes: a database management system, a plate making information processing system, a mask design completion management system, and a mask import management system; the database management system includes a mask mold making login system and a mask mold making typesetting planning system; the mask mold making typesetting planning system is connected to the plate making information processing system, and the plate making information processing system is connected to the mask data processing system and the plate making information processing system. Plate specification management system; parsing source files into equipment data and software data in the plate making information processing system, connecting the plate making information processing system to the mask design manuscript management system, and connecting the mask design manuscript management system to the mask import management system; outputting software data in a standardized information format in the metadata database: reading plate making information in different formats, and decomposing the plate making information into meta-molding data and meta-mask information; meta-molding data including typesetting frame information and component molding information; meta-mask information including product code and production line information; and mask layer information belonging to both meta-molding data and meta-mask information.
6. The method for using the photomask pattern data automatic generation system as claimed in claim 5, characterized in that: Data and optical compensation information, a data file description table and a layout diagram are formed in the mask import management system, and the mask import management system is connected to the mask data processing system through a process integration module.
7. The method for using the photomask pattern data automatic generation system as claimed in claim 5, characterized in that: The layout frame information includes data frame layout information, test component information on the cutting line, and single modular test component information; After the data layout information is acquired, it is repackaged and encrypted, and the encrypted file is added with the layout GDSII of the working file and the CD image label.
8. The method for using the photomask pattern data automatic generation system as claimed in claim 7, characterized in that: The mask factory uses the work file's frame GDSII and CD image label to produce masks. The mask control system in the mask factory monitors the production process and performs incoming material quality control and final inspection on the masks.
Citation Information
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