Wiring method

Abstract

The invention relates to a wiring method applied to printed circuit board design. The method comprises the following steps: dividing a to-be-optimized wiring area of a circuit board to form a plurality of annular areas, further dividing the annular areas into a plurality of quadrants, screening out all to-be-corrected quadrants in the annular areas, and connecting all to-be-corrected quadrants to obtain a global shortest path. And finally, carrying out circuit layout on quadrants contained in the global shortest path corresponding to the annular region from inside to outside in sequence until the wiring of the to-be-optimized wiring region on the circuit board is completed. According to the method, the to-be-optimized wiring area can be automatically analyzed and processed through the wiring mode, so that optimization of the wiring area is achieved, manpower input in the design process of the printed circuit board can be greatly saved, the manufacturing cost is saved, meanwhile, the line design quality of the printed circuit board can be effectively improved, and the design efficiency of the printed circuit board is improved. And the performance and the reliability of the printed circuit board are further ensured.

Description

Technical Field

[0001] The present application relates to the technical field of printed circuit board design, and in particular to a wiring method. Background Art

[0002] Wiring is the work of connecting a group of pins with the same potential on a printed circuit board (PCB) according to relevant design rules. It is also the most complex and time-consuming part of the printed circuit board manufacturing process.

[0003] Traditional printed circuit board design usually requires designers to manually layout, which is time-consuming, labor-intensive and error-prone, especially for complex design tasks, and the layout efficiency is lower. Due to human factors and experience limitations, traditional methods often cannot guarantee the quality and stability of layout, which may lead to problems such as signal integrity, thermal management, EMI, etc., affecting the performance and reliability of printed circuit boards. Summary of the invention

[0004] In order to solve the above technical problems, the present application provides a wiring method applied in printed circuit board design, comprising:

[0005] Generate the wiring area to be optimized according to the circuit schematic diagram;

[0006] Dividing the wiring area to be optimized into a plurality of nested annular areas;

[0007] A plurality of dividing lines are spread outward from the center of the wiring area to be optimized as the origin, so as to divide the annular area into a plurality of quadrants;

[0008] Calculate the routing density in each quadrant in the annular area, and determine the state of the routing density in each quadrant; when the routing density of the quadrant is less than a preset value, identify the quadrant as a standard quadrant, and when the routing density of the quadrant is greater than the preset value, identify the quadrant as a quadrant to be corrected;

[0009] Screening out all the quadrants to be corrected in the annular area, and obtaining a global shortest path by connecting all the quadrants to be corrected, wherein an average routing density of the quadrants included in the global shortest path is less than a preset value;

[0010] Taking the center of the wiring area to be optimized as the origin, the quadrants included in the global shortest path corresponding to each of the annular areas are laid out in sequence from the inside to the outside until the wiring of the wiring area to be optimized is completed.

[0011] In one embodiment, all the quadrants to be corrected in each of the annular regions are screened out, and the global shortest path is obtained by connecting all the quadrants to be corrected, which specifically includes:

[0012] When the number of the quadrants to be corrected screened out in each annular area is equal to two, the quadrants to be corrected are connected to obtain a first undetermined path, and the first undetermined path is selected as the global shortest path.

[0013] In one embodiment, all the quadrants to be corrected in each of the annular regions are screened out, and the global shortest path is obtained by connecting all the quadrants to be corrected, specifically including:

[0014] When the number of the quadrants to be corrected screened out in each annular area is greater than two, any two of the quadrants to be corrected are connected to obtain a number of second paths to be determined, and the number of the second paths to be determined are processed to obtain the global shortest path.

[0015] In one embodiment, processing a plurality of the second undetermined paths to obtain the global shortest path specifically includes:

[0016] When the maximum path range in the second pending path includes all the quadrants to be corrected, selecting the maximum path value in the second pending path as the global shortest path;

[0017] When the maximum path range in the second pending path does not include all of the quadrants to be corrected, a complementary path to the second pending path is selected as the global shortest path.

[0018] In one embodiment, obtaining the first pending path and the second pending path specifically includes:

[0019] Calculate the inverse quadrant value of each quadrant to be corrected; wherein the inverse quadrant value X j =jt, where j is the serial number of the quadrant to be corrected, and t is the number of quadrants contained in the annular area;

[0020] The inverse quadrant values ​​of any two of the quadrants to be corrected are calculated to obtain the first pending path or the second pending path, satisfying the formula:

[0021] f ab =min(ab|,|a-b+t|,|b-a+t)

[0022] Wherein, a and b represent the inverse quadrant values ​​corresponding to any two quadrants to be corrected, and t represents the total number of quadrants in the annular area.

[0023] In one embodiment, the maximum path value in the second undetermined path is selected to satisfy the formula:

[0024] f=max(f ab , fac ....);

[0025] Select a complementary path to the second undetermined path, satisfying the formula:

[0026] f1=t-f;

[0027] Wherein, c represents the inverse quadrant value corresponding to a quadrant to be corrected which is different from a and b.

[0028] In one embodiment, the average routing density of the quadrant included in the global shortest path is less than a preset value, specifically including:

[0029] If the average routing density of the quadrant to be corrected and the standard quadrant contained in the path range of the global shortest path is less than a preset value, all routings located under the global shortest path are evenly distributed in all quadrants covered by the global shortest path;

[0030] If the average routing density of the quadrant to be corrected and the standard quadrant contained in the path range of the global shortest path is greater than a preset value, the first sub-average routing density is determined; if the first sub-average routing density is less than the preset value, a wiring operation is performed; if the first sub-average routing density is greater than the preset value, the second sub-average routing density is determined;

[0031] Among them, the first sub-average routing density is the average routing density of the quadrant to be corrected and the standard quadrant contained in the global shortest path range, and at least one of the first standard quadrants adjacent to the global shortest path; the second sub-average routing density is the average routing density of the quadrant to be corrected and the standard quadrant contained in the global shortest path range, at least one of the standard quadrants adjacent to the global shortest path, and at least one second standard quadrant adjacent to the first standard quadrant.

[0032] In one embodiment, the area of ​​each of the quadrants is the same.

[0033] In one of the embodiments, in the direction of spreading outward from the origin, the areas of the plurality of annular regions increase proportionally.

[0034] In one of the embodiments, the boundary of the wiring area to be optimized is proportionally reduced to form the boundary of the annular area.

[0035] In one embodiment, the boundary of the to-be-optimized wiring area is proportionally reduced to form the boundary of the annular area, specifically including:

[0036] The length of each of the annular regions satisfies the formula:

[0037]

[0038] The width of each of the annular regions satisfies the formula

[0039]

[0040] Among them, N is the N annular areas divided into the wiring area to be optimized; i is the serial number of the annular area, and i ranges from 1 to N; L is the length of the wiring area to be optimized, and W is the width of the wiring area to be optimized.

[0041] The present application also provides a computer terminal storage medium storing computer terminal executable instructions, wherein the computer terminal executable instructions are used to execute the wiring method mentioned in any of the above embodiments.

[0042] The technical solution provided by the embodiments of the present application may have the following beneficial effects:

[0043] It can be seen from the above embodiments that the present application first divides the wiring area to be optimized on the circuit board to form a number of annular areas, and then further divides the annular area into a number of quadrants, and then screens out all the quadrants to be corrected in the annular area, and obtains the global shortest path by connecting all the quadrants to be corrected, and finally performs line layout on the quadrants contained in the global shortest path corresponding to the annular area from the inside to the outside, until the wiring of the wiring area to be optimized on the circuit board is completed. Through this wiring method, the present application can automatically analyze and process the wiring area to be optimized to achieve optimization of the wiring, which can not only greatly save the manpower investment in the printed circuit board design process and save manufacturing costs, but also effectively improve the line design quality of the printed circuit board, thereby ensuring the performance and reliability of the printed circuit board.

[0044] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0046] Figure 1 It is a flowchart of a wiring method provided in an embodiment of the present application.

[0047] Figure 2 A schematic diagram of an annular area provided in an embodiment of the present application.

[0048] Figure 3 This is a schematic diagram of dividing an annular area into several quadrants provided in an embodiment of the present application. DETAILED DESCRIPTION

[0049] With the continuous advancement of technology, the functional requirements of electronic products are getting higher and higher, and the appearance is also very focused on being short, small, light and thin. For this reason, multi-layer integrated functional circuit boards are increasingly being adopted, especially high-density interconnect (HDI) boards. HDI boards are high-precision, fine-line, small-aperture, ultra-thin printed boards. They introduce blind buried holes and fine line width and line spacing in conventional circuit boards, and can manufacture thin, multi-layer, stable circuit boards that cannot be achieved by conventional multi-layer board technology, which can reduce the cost of printed circuit boards (PCBs), increase line density, and reduce PCB board thickness.

[0050] However, as mentioned in the background technology, various constraints and design requirements need to be considered during the HDI board design process, such as the minimum spacing between components, signal transmission path length restrictions, heat dissipation component locations, etc. It is difficult to effectively meet these requirements using traditional methods. Under traditional design methods, once the layout is completed, it is difficult to adjust and optimize, requiring a lot of manual re-operation, which is inefficient and prone to errors. The disconnection between the printed circuit board design process and the manufacturing process will lead to differences between the design and actual manufacturing, which may affect the production cycle and cost of the product.

[0051] Based on this, the present application provides a wiring method in printed circuit board design, a wiring method applied to printed circuit board design, the wiring method automatically distributes and calculates the wiring density in the wiring area to be optimized, and optimizes the area that does not meet the wiring density requirements layer by layer until the optimization design of the entire wiring area to be optimized is completed. This automated wiring method can save manufacturing costs while also improving the performance and reliability of the printed circuit board.

[0052] Reference Figure 1 , the wiring method includes steps S10 to S60.

[0053] Step S10: Generate a wiring area to be optimized according to the circuit schematic.

[0054] First, use circuit design software to draw a circuit schematic and define the components and connections in the circuit. Place components on the circuit board according to the circuit schematic and perform circuit layout. When laying out the circuit, you need to consider the function, size, thermal management of the components, and the overall design of the circuit board.

[0055] Secondly, set the wiring rules in the design software, including line width, line spacing, routing angle, etc., to meet the requirements of electrical performance and manufacturing process. Use the automatic wiring function of the design software. According to the set rules and constraints, the software will generate a preliminary wiring plan. However, this wiring plan has problems such as signal interference, electromagnetic compatibility, thermal management problems or excessive density. On this basis, determine the scope of the wiring area that needs to be optimized to form the wiring area to be optimized.

[0056] Specifically, the circuit design software may be Altium Designer, Eagle, OrCAD, etc., which will not be described in detail here.

[0057] Step S20: Divide the wiring area to be optimized into a plurality of nested annular areas.

[0058] It should be noted that when dividing the regions, the coordinates of the outer boundary and the inner boundary of each annular region must be defined to ensure that several annular regions can completely cover the routing region to be optimized.

[0059] In some embodiments, the shape and number of the annular area in the present application can be designed according to the actual circuit board, and its shape can be adapted to the outer contour of the circuit board, which is not limited here. For example, the annular area can be a circular annular area, a rectangular annular area, a polygonal annular area, etc.

[0060] In one embodiment, the width of each annular region is the same, and the width of each annular region may also be different.

[0061] In some implementations, the center of the wiring area to be optimized is taken as the origin, and the area of ​​the annular area increases proportionally in the direction of spreading outward from the origin. The proportional coefficient can be set according to actual design requirements and is not limited here.

[0062] In some implementations, the boundaries of the wiring area to be optimized are proportionally reduced to form the boundaries of the annular area. Specifically, the length of each annular area satisfies the formula:

[0063]

[0064] The width of each annular region satisfies the formula

[0065]

[0066] Among them, N is the N annular areas divided into the wiring area to be optimized; i is the serial number of the annular area, and i ranges from 1 to N; L is the length of the wiring area to be optimized, and W is the width of the wiring area to be optimized.

[0067] It should be noted that, in some embodiments, the boundary of the wiring area to be optimized can also be understood as the perimeter of the outer frame of the circuit board, the length of the wiring area to be optimized is equivalent to the length of the outer frame of the circuit board, and the width of the wiring area to be optimized is equivalent to the width of the circuit board. The boundary of the annular area can be understood as the perimeter of the outer ring in the annular area.

[0068] In one embodiment, referring to Figure 2 In this embodiment, the wiring area to be optimized (circuit board) is divided into six annular areas, and from the outer frame of the circuit board to the inside, the sixth annular area 206, the fifth annular area 205, the fourth annular area 204, the third annular area 203, the second annular area 202, and the boundary lines of the first annular area 201 are proportionally reduced. It is worth noting that the middle part of the first annular area 201 can be reduced as the area of ​​the first annular area 201 decreases, until it is negligible.

[0069] Step S30: Taking the center of the wiring area to be optimized as the origin, a number of dividing lines are spread outward to divide the annular area into a number of quadrants. Preferably, the area of ​​each quadrant is the same. This setting can simplify the design process of wiring optimization, and at the same time, it can make the wiring on the circuit board evenly distributed, optimize the heat dissipation of the circuit board, reduce electromagnetic interference, and improve signal integrity.

[0070] Step S40: Calculate the routing density in each quadrant in the annular area and determine the state of the routing density in each quadrant. When the routing density of the quadrant is less than a preset value, the quadrant is identified as a standard quadrant, and when the routing density of the quadrant is greater than the preset value, the quadrant is identified as a quadrant to be corrected.

[0071] Specifically, the calculation of the routing density of each quadrant includes the following factors:

[0072] 1. The number of point-to-point routing lines is k1 to kn. Here, "point" can be understood as component pins, connection points, test points, points on signal paths, power and location, wiring reference points, etc. It is the same as conventional technology and will not be repeated here.

[0073] 2. Set up different routing network rules (circuit principles), including default line width, spacing settings, and line width and spacing settings for special networks.

[0074] 3. The number of routing intersections in the ring area is m.

[0075] Based on the above, the routing density of the quadrant is calculated to satisfy the formula:

[0076]

[0077] Among them, P jrepresents the routing density of the jth quadrant, i represents the serial number of the ring area, L i represents the perimeter (boundary) of the outer ring of the i-th annular area, k represents the routing, and w k Indicates the line width of the trace, s k Indicates the line spacing of the line, m k Indicates the number of crossing points of the routing.

[0078] It should be noted that the routing density represents the ratio between the space required for routing and the actual space. If the routing density in the quadrant is greater than 1, it means that the routing density in the area is too high, and the area in the quadrant does not meet the requirements for routing to complete the coverage of the area. Some routing needs to be completed with the help of adjacent quadrants. In the actual design process, usually P≤1, and only the routing density P in each quadrant needs to be paid attention to. j No correction or optimization is required, so this application only focuses on the situation where the routing density P>1 in the quadrant exists.

[0079] Accordingly, when the routing density of a quadrant is less than a preset value, the quadrant is identified as a standard quadrant. A standard quadrant can be understood as a current quadrant in which the routing density is less than 1, and the routing can be completed without the help of adjacent quadrants, and no optimized wiring is required.

[0080] Furthermore, when the routing density of a quadrant is greater than a preset value, the quadrant is identified as a quadrant to be corrected. The quadrant to be corrected can be understood as a quadrant in which the routing density of the current quadrant is greater than 1, and the routing needs to be completed with the help of an adjacent quadrant, and optimized wiring is required.

[0081] Specifically, judging the state of the routing density in each quadrant can yield the following results:

[0082] 1. Any P j ≤1(j=1~t), t represents the number of quadrants, and j represents the sequence number of the quadrant in t. This result indicates that the routing density of all quadrants in the annular area is less than 1, which means that all routing in the annular area can be completed in the corresponding quadrant nearby, and the routing can be laid out in the nearest quadrant area. There is no need to route the current annular area, and the current annular area can be skipped directly and the next annular area can be screened and optimized.

[0083] It is worth noting that if the routing density in all quadrants of all annular areas is less than 1, that is, the quadrants in the wiring area to be optimized are all standard quadrants, then the wiring optimization of the wiring area to be optimized is terminated.

[0084] 2. Assume that there is only one quadrant of P j >1, calculate whether the average routing density of this quadrant and the two adjacent quadrants meets If it satisfies, P j>1, the routing part of the jth quadrant crosses the area and goes to the adjacent two quadrants; if it still does not meet the requirements, then the routing is carried out in the +2 way to the adjacent quadrants until Then finish the wiring.

[0085] 3. There are two or more P j >1, execute step S50.

[0086] Step S50: Filter out all the quadrants to be corrected in the annular area, then filter out all the quadrants whose routing density of a single quadrant is greater than 1 in all the quadrants, and obtain the global shortest path by connecting all the quadrants to be corrected. The average routing density of the quadrants included in the global shortest path is less than a preset value.

[0087] In one embodiment, when the number of quadrants to be corrected screened out in each annular region is equal to two, the following steps S501 to S503 are performed.

[0088] Step S501: respectively calculating the inverse quadrant values ​​of two quadrants to be corrected, wherein the inverse quadrant value is jt, wherein t is the number of quadrants included in the annular region, and j is the sequence number of the quadrant to be corrected in the t quadrants.

[0089] Step S502: Calculate the inverse quadrant values ​​of the two to-be-corrected quadrants to obtain a first to-be-determined path, and the calculation satisfies the formula:

[0090] f ab =min(|ab|,|a-b+t|,|b-a+t|)

[0091] Among them, a represents the inverse quadrant value corresponding to one of the quadrants to be corrected, b represents the inverse quadrant value corresponding to the other quadrant to be corrected, and t represents the total number of quadrants in the annular area.

[0092] Step S503: directly select f ab is the global maximum path.

[0093] Specifically, the following embodiments are provided to facilitate understanding.

[0094] Embodiment 1; Reference Figure 3 , starting from the center of the area to be optimized as the origin, seven dividing lines are spread outward, and the second annular area 202 is divided into eight quadrants (t=8), namely the first quadrant 301, the second quadrant 302, the third quadrant 303, the fourth quadrant 304, the fifth quadrant 305, the sixth quadrant 306, the seventh quadrant 307 and the eighth quadrant 308. Among them, the second quadrant 302 and the eighth quadrant 308 are quadrants to be corrected (the routing density is greater than 1), and the two are selected and the first undetermined path connecting the two is calculated, that is, the global shortest path is determined.

[0095] The first step is to calculate the inverse quadrant values ​​of the second quadrant 302 and the eighth quadrant 308. The inverse quadrant value of the second quadrant 302 is 2-8=-6, and the inverse quadrant value of the eighth quadrant 308 is 8-8=0;

[0096] The second step is to calculate the first pending path.

[0097] f=min(|(-6)-0|,|(-6)-0+8|,|0-(-6)+8|)

[0098] After selecting the minimum value among 6, 2, and 14, the first pending path is finally obtained to be equal to 2.

[0099] Step 3: Determine the first undetermined path as the global shortest path, that is, determine the global shortest path as the distance between the second quadrant 302 and the eighth quadrant 308 .

[0100] In one embodiment, when the number of quadrants to be corrected screened out in each annular area is greater than two, the following steps S511 to S516 are performed.

[0101] Step S511: Calculate the inverse quadrant values ​​of any two quadrants to be corrected. The calculation process is the same as above and will not be repeated here. It should be noted that for ease of understanding and distinction from subsequent content, the two quadrants to be corrected here can be referred to as the first quadrant group.

[0102] Step S512: Calculate the inverse quadrant value of the quadrant to be corrected in the first quadrant group to obtain the first sub-undetermined path. It is noted that the first sub-undetermined path here is the second undetermined path, and for ease of understanding and to distinguish from subsequent content, it is named the first sub-undetermined path here.

[0103] Step S513: Calculate the inverse quadrant values ​​of any two quadrants to be corrected again. The two quadrants to be corrected here can be called the second quadrant group. The quadrants to be corrected in the first quadrant group and the second quadrant group are not completely the same. For example, the first quadrant group and the second quadrant group can share one quadrant to be corrected, or they can be completely different.

[0104] Step S514: Calculate the inverse quadrant value of the quadrant to be corrected in the second quadrant group to obtain the second sub-undetermined path. The second sub-undetermined path here is the second undetermined path, which is named the second sub-undetermined path here for ease of understanding and to distinguish from subsequent content.

[0105] Step S515: Select the maximum value of the first pending sub-path and the second pending sub-path (two different second pending sub-paths) as the third pending sub-path.

[0106] Step S516: Determine the global shortest path. Specifically including:

[0107] When the maximum path range in the third sub-path to be determined includes all the quadrants to be corrected, the maximum path value in the third sub-path to be determined is selected as the global shortest path.

[0108] When the maximum path range in the third sub-path to be determined does not include all the quadrants to be corrected, the complementary path to the third sub-path to be determined is selected as the global shortest path. The complementary path to the third sub-path to be determined is selected to satisfy the formula f1=t-f. f1 is the complementary path, and f is the third sub-path to be determined.

[0109] Specifically, the following embodiments are provided to facilitate understanding.

[0110] Embodiment 2: Continue to refer to Figure 3 , referring to the first embodiment, the second annular area 202 is divided into eight quadrants. Assuming that the first quadrant 301, the third quadrant 303, the fifth quadrant 305 and the eighth quadrant 308 are quadrants to be corrected (the routing density is greater than 1), the second undetermined path connecting the four quadrants is calculated, and the second undetermined path is processed to obtain the global shortest path.

[0111] In the first step, the inverse quadrant values ​​of the fifth quadrant 305 and the eighth quadrant 308 are calculated. The inverse quadrant value of the fifth quadrant 305 is -3, and the inverse quadrant value of the eighth quadrant 308 is 0.

[0112] The second step is to calculate the first sub-path to be determined. The calculation formula is the same as above, that is, the minimum value 3 is selected from 3, 5, and 11 as the first sub-path to be determined. That is, the path distance between the fifth quadrant 305 and the eighth quadrant 308 is 3 quadrants.

[0113] The third step is to calculate the inverse quadrant values ​​of the fifth quadrant 305 and the third quadrant 303. The inverse quadrant value of the fifth quadrant 305 is -3, and the inverse quadrant value of the third quadrant 303 is -5.

[0114] Step 4: Calculate the second sub-path to be determined. The calculation formula is the same as above, that is, select the minimum value 2 from 2, 10, and 6 as the second sub-path to be determined, that is, the path distance between the fifth quadrant 305 and the third quadrant 303 is 2 quadrants.

[0115] Step 5: Select the maximum value between the first sub-path to be determined and the second sub-path to be determined as the third sub-path to be determined. That is, select the maximum value 3 as the third sub-path to be determined. That is, select the distance between the fifth quadrant 305 and the eighth quadrant 308 as the third sub-path to be determined.

[0116] Step 6: Determine the global shortest path.

[0117] As can be seen from the figure, the path between the fifth quadrant 305 and the eighth quadrant 308 does not include the first quadrant 301 and the third quadrant 303, so the third sub-undetermined path cannot be selected as the global shortest path. Only the complementary path to the third sub-undetermined path can be selected as the global shortest path, that is, the eighth quadrant 308-first quadrant 301-second quadrant 302-third quadrant 303-fourth quadrant 304-fifth quadrant 305 is the global shortest path.

[0118] In some implementations, an average routing density of a quadrant included in the global shortest path is less than a preset value.

[0119] Specifically, if the average routing density of the quadrant to be corrected and the standard quadrant contained in the path range of the global shortest path is less than a preset value, all routings under the global shortest path are evenly distributed in all quadrants covered by the global shortest path.

[0120] Exemplarily, taking the above-mentioned embodiment 1 as an example, the shortest path distance between the second quadrant 302 and the eighth quadrant 308 is two quadrants, namely the second quadrant 302 (quadrant to be corrected)-the first quadrant 301 (standard quadrant)-the eighth quadrant 308 (quadrant to be corrected). After part of the routing in the second quadrant 302 and the eighth quadrant 308 is pulled to the first quadrant 301, the average routing density of the first quadrant 301, the second quadrant 302 and the eighth quadrant 308 is calculated according to the formula. If the average routing density is less than 1, it means that the routing density of the quadrant in the current annular area meets the standard after optimization, and the wiring of the current annular area is ended, and the optimization of the wiring of the next annular area continues.

[0121] Furthermore, if the average routing density of the quadrant to be corrected and the standard quadrant contained in the path range of the global shortest path is greater than a preset value, the first sub-average routing density is determined, if the first sub-average routing density is less than the preset value, then the wiring operation is performed, if the first sub-average routing density is greater than the preset value, then the second sub-average routing density is determined. Among them, the first sub-average routing density is the average routing density of the quadrant to be corrected and the standard quadrant contained in the global shortest path range and the two first standard quadrants adjacent to the global shortest path; the second sub-average routing density is the average routing density of the quadrant to be corrected and the standard quadrant contained in the global shortest path range, the two standard quadrants adjacent to the global shortest path, and the two second standard quadrants adjacent to the first standard quadrant.

[0122] Exemplarily, still taking the above-mentioned embodiment 1 as an example, the shortest path distance between the second quadrant 302 and the eighth quadrant 308 is two quadrants, namely the second quadrant 302 (quadrant to be corrected)-the first quadrant 301 (standard quadrant)-the eighth quadrant 308 (quadrant to be corrected). After part of the routing lines in the second quadrant 302 and the eighth quadrant 308 are pulled to the first quadrant 301, the average routing density of the first quadrant 301, the second quadrant 302 and the eighth quadrant 308 is calculated according to the formula. If the average routing density is greater than 1, the following operations are performed.

[0123] The first step is to extend the wiring to the third quadrant 303 (first standard quadrant) adjacent to the second quadrant 302 and the seventh quadrant 307 (standard quadrant) adjacent to the eighth quadrant 308, and then calculate the average routing density of the first quadrant 301, the second quadrant 302, the third quadrant 303, the seventh quadrant 307 and the eighth quadrant 308, and record it as the first sub-average routing density.

[0124] Step 2: Determine the average routing density of the first sub-area. If the average routing density of the first sub-area is less than 1, it means that the routing density of the quadrant in the current annular area meets the standard after optimization, and the routing of the current annular area is terminated, and the optimization of the routing of the next annular area is continued. If the average routing density of the first sub-area is greater than 1, the optimization is continued.

[0125] Step 3: Extend the wiring to the fourth quadrant 304 (second standard quadrant) adjacent to the third quadrant 303 (first standard quadrant) and the sixth quadrant 306 (second standard quadrant) adjacent to the seventh quadrant 307 (second standard quadrant). Then calculate the average routing density of the first quadrant 301, the second quadrant 302, the third quadrant 303, the fourth quadrant 304, the sixth quadrant 306, the seventh quadrant 307 and the eighth quadrant 308, and record it as the second average routing density.

[0126] Step 4: Determine the second sub-average routing density. If the second sub-average routing density is less than 1, it means that the routing density of the quadrant in the current annular area meets the standard after optimization, and the routing of the current annular area is terminated, and the optimization of the routing of the next annular area is continued. If the second sub-average routing density is greater than 1, the optimization is continued.

[0127] The subsequent steps are the same as the above steps, and the third standard quadrant, the fourth standard quadrant, etc. will be generated in sequence, and then the third sub-average density, the fourth sub-average density, etc. will be generated until the quadrant routing density of the current annular area meets the standard, and the optimization ends. I will not go into details here.

[0128] Step S60: taking the center of the wiring area to be optimized as the origin, performing line layout for the quadrants included in the global shortest path corresponding to each of the annular areas from the inside to the outside, until the wiring of the wiring area to be optimized is completed.

[0129] The present application also provides a computer terminal storage medium storing computer terminal executable instructions, where the computer terminal executable instructions are used to execute the wiring method in any of the above embodiments.

Claims

1. A wiring method used in printed circuit board design, characterized in that: include: Generate the wiring area to be optimized according to the circuit schematic diagram; Dividing the wiring area to be optimized into a plurality of nested annular areas; A plurality of dividing lines are spread outward from the center of the wiring area to be optimized as the origin, so as to divide the annular area into a plurality of quadrants; Calculate the routing density in each quadrant in the annular area, and determine the state of the routing density in each quadrant; when the routing density of the quadrant is less than a preset value, identify the quadrant as a standard quadrant, and when the routing density of the quadrant is greater than the preset value, identify the quadrant as a quadrant to be corrected; Screening out all the quadrants to be corrected in the annular area, and obtaining a global shortest path by connecting all the quadrants to be corrected, wherein an average routing density of the quadrants included in the global shortest path is less than a preset value; Taking the center of the wiring area to be optimized as the origin, the quadrants included in the global shortest path corresponding to each of the annular areas are laid out in sequence from the inside to the outside until the wiring of the wiring area to be optimized is completed.

2. The wiring method according to claim 1, characterized in that: Screening out all the quadrants to be corrected in each of the annular regions, and connecting all the quadrants to be corrected to obtain a global shortest path, specifically comprising: When the number of the quadrants to be corrected screened out in each annular area is equal to two, the quadrants to be corrected are connected to obtain a first undetermined path, and the first undetermined path is selected as the global shortest path.

3. The wiring method according to claim 1, characterized in that: Screening out all the quadrants to be corrected in each of the annular regions, and connecting all the quadrants to be corrected to obtain a global shortest path, specifically including: When the number of the quadrants to be corrected screened out in each annular area is greater than two, any two of the quadrants to be corrected are connected to obtain a number of second paths to be determined, and the number of the second paths to be determined are processed to obtain the global shortest path.

4. The wiring method according to claim 3, characterized in that: Processing the plurality of second undetermined paths to obtain the global shortest path specifically includes: When the maximum path range in the second pending path includes all the quadrants to be corrected, selecting the maximum path value in the second pending path as the global shortest path; When the maximum path range in the second pending path does not include all of the quadrants to be corrected, a complementary path to the second pending path is selected as the global shortest path.

5. The wiring method according to claim 2 or 3, characterized in that: Obtaining the first pending path and the second pending path specifically includes: Calculate the inverse quadrant value of each quadrant to be corrected; wherein the inverse quadrant value X j =jt, where j is the serial number of the quadrant to be corrected, and t is the number of quadrants contained in the annular area; The inverse quadrant values ​​of any two of the quadrants to be corrected are calculated to obtain the first pending path or the second pending path, satisfying the formula: f ab =min(a-b|,|a-b+t|,|b-a+t) Wherein, a and b represent the inverse quadrant values ​​corresponding to any two quadrants to be corrected, and t represents the total number of quadrants in the annular area.

6. The wiring method according to claim 5, characterized in that: Select the maximum path value in the second pending path, satisfying the formula: f=max(f ab ,f ac ....); Select a complementary path to the second undetermined path, satisfying the formula: f1=t-f; Wherein, c represents the inverse quadrant value corresponding to a quadrant to be corrected which is different from a and b.

7. The wiring method according to claim 1, characterized in that: The average routing density of the quadrant included in the global shortest path is less than a preset value, specifically including: If the average routing density of the quadrant to be corrected and the standard quadrant contained in the path range of the global shortest path is less than a preset value, all routings located under the global shortest path are evenly distributed in all quadrants covered by the global shortest path; If the average routing density of the quadrant to be corrected and the standard quadrant contained in the path range of the global shortest path is greater than a preset value, the first sub-average routing density is determined; if the first sub-average routing density is less than the preset value, a wiring operation is performed; if the first sub-average routing density is greater than the preset value, the second sub-average routing density is determined; Among them, the first sub-average routing density is the average routing density of the quadrant to be corrected and the standard quadrant contained in the global shortest path range, and at least one of the first standard quadrants adjacent to the global shortest path; the second sub-average routing density is the average routing density of the quadrant to be corrected and the standard quadrant contained in the global shortest path range, at least one of the standard quadrants adjacent to the global shortest path, and at least one second standard quadrant adjacent to the first standard quadrant.

8. The wiring method according to claim 1, characterized in that: The area of ​​each of the quadrants is the same.

9. The wiring method according to claim 1, characterized in that: In the direction of spreading outward from the origin, the areas of the plurality of annular regions increase proportionally.

10. The wiring method according to claim 1, characterized in that: The edge of the wiring area to be optimized is reduced in proportion to form the edges of several annular areas.

11. The wiring method according to claim 10, characterized in that: The boundary of the wiring area to be optimized is proportionally reduced to form the boundary of the annular area, specifically including: The length of each of the annular regions satisfies the formula: The width of each of the annular regions satisfies the formula Among them, N is the N annular areas divided into the wiring area to be optimized; i is the serial number of the annular area, and the range of i is from 1 to N; L is the length of the wiring area to be optimized, and W is the width of the wiring area to be optimized.

12. A computer terminal storage medium storing computer terminal executable instructions, characterized in that: The computer terminal executable instructions are used to execute the wiring method according to any one of claims 1-11.

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