Surge protector and surge protection method

Abstract

The invention relates to a surge protector and a surge protection method. Exemplary surge protectors and surge protection methods provide precise clamp level control during voltage transients and surge events. An exemplary surge protector includes a shunt transistor having a source coupled to ground and a drain coupled to a conductor at a supply voltage; and an operational amplifier having an output coupled to the gate of the shunt transistor, an inverting input coupled to a reference voltage Vref, and a non-inverting input coupled to receive a sense voltage, the sense voltage being a fixed fraction f of the supply voltage, the operational amplifier is configured to drive the shunt transistor to shunt any overcurrent when the supply voltage reaches a clamp voltage Vc = Vref / f.

Description

Technical Field

[0001] The present disclosure relates generally to surge protectors and transient voltage suppressors, and more particularly to surge protection methods and designs that provide such protection with minimal area and energy requirements while achieving accurate clamping level control. Background Art

[0002] Many electronic devices are powered by a direct current (DC) voltage derived from an alternating current (AC) power source, such as an electrical outlet connected to an electrical grid. Electrical grids are large, complex, and susceptible to a variety of events and faults that may cause surges and transients in the supply voltage, which may damage unprotected electronic devices. Therefore, most electronic devices are equipped with protection against surges and transients, most typically in the form of transient voltage suppression (TVS) diodes. Such diodes may result in undesirably large area requirements to adequately limit the maximum voltage caused by standard voltage surge tests, such as the maximum voltage specified by the International Electrotechnical Commission standard IEC 61000-4-5 current pulse, which has an 8 microsecond wavefront time and a 20 microsecond duration, with a maximum value of 40 amperes, often abbreviated as "(8μs / 20μs):40A".

[0003] Various attempts have been made to address this problem, including U.S. Patent Application Publication 2015 / 0303678, entitled “Precision Surge Clamp with Constant Clamping Voltage and Near-Zero Dynamic Resistance under various Thermal, Power, and Current Levels”; U.S. Patent Application Publication 2017 / 0373490, entitled “Surge Protection Circuit”; and U.S. Patent Application Publication 2018 / 0138696, entitled “Surge Protection Circuit with Feedback Control”. These attempts have been evaluated and found to exhibit significant and undesirable variations in clamping voltage at different surge currents and at different temperatures. Summary of the invention

[0004] Thus, disclosed herein are exemplary surge protectors and surge protection methods that achieve precise clamping level control during voltage transient and surge events.

[0005] According to one aspect of the present disclosure, a surge protector is provided, characterized in that it includes: a shunt transistor having a source coupled to ground and a drain coupled to a conductor at a supply voltage; and an operational amplifier having: an output terminal coupled to the gate of the shunt transistor, an inverting input terminal coupled to a reference voltage Vref, and a non-inverting input terminal coupled to receive a sensing voltage, the sensing voltage being a fixed fraction f of the supply voltage, the operational amplifier being configured to drive the shunt transistor to shunt any overcurrent when the supply voltage reaches a clamping voltage Vc=Vref / f.

[0006] In one embodiment, the surge protector is characterized in that the operational amplifier comprises a differential amplifier, and the surge protector comprises a power controller configured to disable the differential amplifier when the supply voltage is below a threshold voltage.

[0007] In one embodiment, the surge protector is characterized by further comprising a voltage divider configured to provide a sense voltage to the non-inverting input terminal.

[0008] In one embodiment, the surge protector is characterized in that the voltage divider includes a first impedance and a second impedance in series, the first impedance being formed by a first resistor connected in parallel with a first capacitor, and the second impedance being formed by a second resistor connected in parallel with a second capacitor.

[0009] In an embodiment the surge protector is characterized in that the surge protector further comprises a power controller configured to disable the voltage divider when the supply voltage is below a threshold voltage.

[0010] In one embodiment, the surge protector is characterized by further comprising a reference circuit including a reverse biased Zener diode driven by a current source.

[0011] In one embodiment, the surge protector is characterized in that the surge protector further comprises a power controller configured to disable the reference circuit when the supply voltage is below a threshold voltage.

[0012] In one embodiment, the surge protector is characterized by a threshold voltage that matches a clamping voltage Vc.

[0013] According to another aspect, a surge protection method is provided, characterized in that: a sense voltage is derived as a fixed fraction f of the supply voltage; the sense voltage is compared with a reference voltage Vref; and based on the comparison, a transistor is driven to shunt any excess current when the supply voltage reaches a clamping voltage Vc=Vref / f.

[0014] In one embodiment, the surge protection method is characterized in that the comparison is performed by a differential amplifier, the derived sensing voltage is performed using a voltage divider, and the reference voltage is provided by a reference circuit, and the surge protection method includes: when the supply voltage is lower than a threshold voltage, disabling at least one of the differential amplifier, the voltage divider and the reference circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 is a block diagram of an exemplary electronic device.

[0016] Figure 2 is a block diagram of an exemplary surge protector.

[0017] Figure 3 is a circuit diagram of an exemplary surge protector.

[0018] Figure 4 Graphs of supply voltage and shunt current during an exemplary surge event.

[0019] Figure 5 is a flow chart of an exemplary surge protection method. DETAILED DESCRIPTION

[0020] The following description and drawings are provided for the purpose of explanation, not limitation of the present disclosure. Rather, they provide a basis for one of ordinary skill in the art to understand all modifications, equivalents, and alternatives that fall within the scope of the claims.

[0021] Figure 1 1 is a block diagram of an exemplary electronic device including an integrated circuit 102 coupled to a power supply 104 via a conductor 103 to receive a DC supply voltage Vin. Typical examples of Vin would include 3V, 5V, 6V, 9V, 12V, 15V, 16V, and 24V, but higher and lower values ​​are possible. A surge protector 106 is coupled between the conductor 103 and ground to limit the supply voltage to a maximum value. The surge protector 106 is configured to suppress fast voltage transients as well as longer voltage surges, including at least standard IEC 61000-4-5 (8μs / 20μs): 40A current surges.

[0022] Surge protector 106 may be integrated onto the same substrate or into the same multi-chip module as integrated circuit 102. Alternatively, surge protector 106 may be integrated into a power supply circuit responsible for converting AC voltage to DC supply voltage. As yet another alternative, surge protector 106 may be packaged as a discrete component to be mounted on a printed circuit board with integrated circuit 102, or otherwise routed between power rails of the integrated circuit.

[0023] Figure 21 shows a block diagram of an exemplary implementation of a surge protector 106. The surge protector includes a shunt transistor 202 configured to shunt excess current from the conductor 103 to ground when the supply voltage reaches the clamping voltage Vc, thereby preventing the supply voltage from exceeding the clamping voltage Vc during a surge event. The "excess current" is the portion of the current that is not consumed by the load, which would further increase the voltage of the conductor 103 if it were not shunted to ground. Figure 2 In , the shunt transistor is shown as a power metal oxide semiconductor field effect transistor (power n-MOSFET) having an n-type channel, with its source connected to ground and its drain connected to a supply voltage conductor. Such a transistor turns on when its gate-source voltage rises above a threshold voltage, which can be tailored to the application but can typically be about 2 volts. MOSFETs may be particularly desirable for shunt transistors due to their fast response and negligible leakage current, but other transistor types may also be suitable, including bipolar junction transistors and junction gate field effect transistors.

[0024] The gate of the shunt transistor is coupled to the output of the operational amplifier 204 to receive the drive signal Vdrv. The operational amplifier 204 has an inverting input coupled to the reference circuit 206 to receive the reference voltage Vref, and a non-inverting input coupled to the voltage divider 208 to receive the sensing voltage Vsen. When the sensing voltage Vsen is lower than the reference voltage Vref, the drive signal Vdrv is low, thereby maintaining the shunt transistor in a non-conducting "OFF" state. When the sensing voltage Vsen reaches the reference voltage Vref, the operational amplifier 204 drives the shunt transistor 202 to a conducting "ON" state to shunt the excess current as long as the sensing voltage is at or above the reference voltage.

[0025] Reference circuit 206 may be any suitable type of reference voltage generator that provides a reference voltage that is largely independent of temperature, supply voltage, and process variations, including a bandgap voltage reference, a Zener diode reference, an avalanche diode reference, and a V BE Multiplier Reference. As discussed further below, reference circuit 206 is disabled in the absence of a surge event, and therefore need not be designed to minimize power consumption, especially where such a design would unnecessarily increase the complexity or physical area required to implement the circuit.

[0026] The voltage divider 208 derives the sense voltage Vsen as a fixed fraction f of the supply voltage Vin. The term "fixed" is used here to indicate that the fraction f is a constant and does not depend on the supply voltage. Any dependence on temperature or process variations is also expected to be negligible. The voltage divider can generally incorporate capacitive and / or inductive elements to make the fraction f a complex number with a frequency-dependent amplitude, but the exemplary implementation employs a voltage divider that provides a real-valued fraction f without significant frequency dependence. An exemplary range of f will be 0.1 to 0.8, and as will become apparent from the discussion below, the exact value selected will balance various considerations, including the relationship between Vin (the source voltage of the operational amplifier 204) and the desired clamping voltage, and the availability of the reference circuit 206 to provide a suitable reference voltage.

[0027] Because the sense voltage Vsen is not allowed to exceed the reference voltage Vref, the clamp voltage Vc can be derived as:

[0028] V sen =fV in ≤V ref

[0029] V in ≤V ref / f=V c

[0030] The reference voltage Vref may be determined by the design of the reference circuit 206, and the voltage divider 208 may be designed to provide a fraction f that sets the clamping voltage Vc to a desired value.

[0031] The exemplary implementation also includes a power controller 210. When the supply voltage Vin is above the threshold voltage, the power controller 210 provides the supply voltage Vin as the power supply voltage Vpwr to the operational amplifier 204, the reference circuit 206, and the voltage divider 208, otherwise when the supply voltage Vin is below the threshold voltage, the power controller decouples the supply voltage Vin from these components. The threshold voltage is preferably matched to the clamping voltage Vc, which means that the threshold voltage is lower than but almost equal to the clamping voltage Vc, so that the components 204-208 are enabled only when they may be needed. The gap between the expected threshold voltage and the expected clamping voltage can be large enough to ensure that the threshold voltage is guaranteed to be less than the clamping voltage under expected process and parameter variations, such as a 2 volt-4 volt gap.

[0032] Although n-channel transistors are shown in the exemplary implementation, p-channel transistors may also function as shunt transistors with inversion of source and drain connections and corresponding adjustment of gate signal voltage, which may be accomplished by swapping the inverting and non-inverting inputs of the operational amplifier.

[0033] Figure 3FIG. 1 is a circuit diagram of an exemplary implementation of the surge protector 106. Figure 3 In the embodiment of the present invention, the power controller includes a set of reverse biased Zener diodes 302 connected in series with a set of forward biased Zener diodes 304, the series combination forming a diode arrangement that enables current to flow only after the supply voltage reaches a threshold voltage level. The reverse biased Zener diodes 302 have a breakdown voltage that increases with increasing temperature, while the forward biased Zener diodes 304 have a forward conduction voltage that decreases with temperature. The diode arrangement can be designed so that these temperature dependencies cancel out, so that the series combination of Zener diodes provides a consistent threshold voltage over a wide temperature range.

[0034] The diode arrangement couples the supply voltage Vin to the gate and drain of an n-type transistor 306, the source of which is coupled to ground. The transistor 306 converts the current flowing through the diode arrangement into a corresponding gate voltage. The matching transistor 308 acts as a current mirror transistor, that is, it is placed in a current mirror arrangement with the transistor 306 to convert the gate voltage into a corresponding current flowing through a biasing diode 310 (shown here as a reverse biased Zener diode), thereby generating a voltage drop between the source and gate of the p-type power transistor 314, coupling the supply voltage Vin to the power supply voltage Vpwr. In the absence of current flowing through the current mirror, the pull-up resistor 312 pulls the gate voltage of the power transistor 314 to the supply voltage, thereby decoupling the power supply voltage Vpwr from the supply voltage Vin. The diode arrangement combined with the transistor 306 provides a customizable threshold voltage such as about 22 volts. As previously mentioned, when the supply voltage exceeds the threshold voltage, the power controller 210 couples the supply voltage Vin to other components 204 to 208.

[0035] The voltage divider 208 includes a first resistor 321 connected in parallel with a first capacitor 331 to generate a first impedance, and a second resistor 322 connected in parallel with a second capacitor 332 to form a second impedance. The first impedance and the second impedance are connected in series between the power supply voltage Vpwr and the ground, wherein the intermediate node provides a sensing voltage Vsen:

[0036]

[0037] Where Z 1 and Z 2 are the first impedance and the second impedance, respectively, selected to provide a real-valued fraction f. The impedance of the power transistor 314 is expected to be negligible, but if it is too large to be negligible, it may be included as part of the first impedance when expressing the sense voltage in terms of the source voltage:

[0038]

[0039] In at least one contemplated implementation, the first impedance and the second impedance are integer multiples of the base impedance Z, for example, Z 1 = mZ and Z 2 =nZ, where m and n are integers. (The base impedance Z may be the impedance of the power transistor 314 in the on state.) The sensed voltage may then be expressed as:

[0040]

[0041] where f is a fixed fraction defined by voltage divider 208 .

[0042] The reference circuit 206 includes a current source enabled by the power supply voltage Vpwr. The current source provides a current flowing through a reverse biased Zener diode to generate a reference voltage Vref. The Zener diode (and the Zener diode 310 of the power controller) can be a diode with a breakdown voltage of 5.6 volts, where the temperature coefficient of the avalanche breakdown process cancels the temperature coefficient of the Zener breakdown process, thereby minimizing any temperature dependence of the reference voltage.

[0043] The operational amplifier 204 includes a differential transistor pair 341, 342 driven by a current source 343. The transistors 341, 342 are shown as p-type MOSFETs, whose sources are connected to the current source 343. The drain of the transistor 341 is coupled to the drain and gate of the n-type MOSFET 344, thereby converting the current flowing through the transistor 341 into the gate voltage of the current mirror transistor 345. The gate of the transistor 341 receives the sensing voltage Vsen, and the gate of the transistor 342 receives the reference voltage Vref. As long as the sensing voltage Vsen is less than the reference voltage Vref, the current from the current source 343 is mainly directed through the transistors 341 and 344. The transistor 342 passes less current than the current mirror transistor 345, thereby discharging the gate of the output transistor 346. When the output transistor 346 is in a non-conducting state, the pull-down resistor 348 pulls the drive voltage Vdrv down. In this case, the shunt transistor 202 is disconnected.

[0044] When the sense voltage Vsen reaches or exceeds the reference voltage Vref, the current from the current source 343 is directed through the transistor 342 because the current mirror transistor 345 draws less current, thereby charging the gate of the output transistor 346. When the output transistor 346 is in the on state, the pull-up resistor 347 pulls the drive voltage Vdrv high. In this case, the shunt transistor 202 is in the on state, enabling the overcurrent to be drawn from the supply voltage Vin, thereby providing accurate feedback control of the supply voltage.

[0045] Figure 4is a graph showing the supply voltage Vin as a function of time during a standard IEC 61000-4-5 (8μs / 20μs): 40A surge event. The solid line represents a rapid voltage rise from zero volts to a clamping voltage of 26.5 volts, where it is capped by shunting the overcurrent, as indicated by the dotted line. Once the overcurrent is shunted at about 32 microseconds, the voltage drops below the upper limit and the shunt transistor is turned off, causing the voltage to gradually decay thereafter. The surge protector exhibits a dynamic resistance of 1 milliohm at 27C, and the maximum supply voltage is 26.8 volts when the shunt current peaks at 40A. Over the range of temperature and parameter variations, the surge protector performs well, limiting the supply voltage to a maximum of 27.99 volts, with a dynamic resistance of 7.9 milliohms, which represents a substantial improvement over previous methods. The current leakage measured after the power controller disables the supply voltage Vpwr is about 4nA, and the measured input capacitance is 106pF. The expected footprint (area requirement) of the surge protector is no more than approximately 1.1 mm x 1.1 mm.

[0046] Figure 5 Flowchart of a method that can be implemented by the surge protector 106. In box 502, the surge protector (more accurately, the power controller 210) loops until it determines that the supply voltage is above a threshold. When the threshold is exceeded, in box 504, the power controller 210 enables various circuit components of the surge protector 106 (e.g., the reference circuit 206, the voltage divider 208, and the operational amplifier 204). In box 506, the operational amplifier 204 determines whether the supply voltage exceeds the clamping voltage. If the supply voltage exceeds the clamping voltage, the drive voltage is increased in box 508 to increase the shunt current through the shunt transistor 202, and the method returns to box 506. If the supply voltage does not exceed the clamping voltage, the power controller 210 determines in box 510 whether the supply voltage remains above the threshold. If the supply voltage remains above the threshold, that is, if the supply voltage is between the threshold voltage and the clamping voltage, then in box 512, the operational amplifier 204 reduces the drive voltage to reduce the shunt current and loops back to box 506. On the other hand, if the supply voltage has dropped below the threshold voltage, then in block 514 the power controller 210 disables other circuit components of the surge protector 106 and returns to block 502 .

[0047] Although the method is shown and described as a series of operations for the sake of clarity, in practice, various operations can be implemented simultaneously and asynchronously by different components of the surge protector. The method can be implemented as an assembly of a dedicated integrated circuit or discrete electronic components. Once the above disclosure is fully understood, these and many other modifications, equivalents and alternatives will become apparent to those skilled in the art. It is intended that the following claims be interpreted as including all such modifications, equivalents and alternatives where applicable.

[0048] In summary, various exemplary surge protectors and surge protection methods have been disclosed herein, enabling precise clamping level control during voltage transients and surge events. An exemplary surge protector includes: a shunt transistor having a source coupled to ground and a drain coupled to a conductor at a supply voltage; and an operational amplifier having: an output coupled to the gate of the shunt transistor, an inverting input coupled to receive a reference voltage Vref, and a non-inverting input coupled to receive a sense voltage, the sense voltage being a fixed fraction f of the supply voltage, the operational amplifier being configured to drive the shunt transistor to shunt any excess current when the supply voltage reaches a clamping voltage Vc=Vref / f.

[0049] An exemplary surge protection method includes: deriving a sense voltage that is a fixed fraction f of the supply voltage (e.g., using a voltage divider 208); comparing the sense voltage to a reference voltage Vref (e.g., using an operational amplifier 204); and based on the comparison, driving a transistor to shunt any excess current when the supply voltage reaches a clamping voltage Vc=Vref / f (e.g., via the operational amplifier 204).

[0050] An exemplary method for providing surge protection includes: providing a shunt transistor configured to couple a conductor at a supply voltage to ground when the shunt transistor is enabled; coupling an output of an operational amplifier to a gate of the shunt transistor; coupling a reference voltage from a reference circuit to an inverting input of the operational amplifier; and coupling a sense voltage from a voltage divider to a non-inverting input of the operational amplifier, the sense voltage being a fixed fraction f of the supply voltage, the operational amplifier being configured to enable the shunt transistor to shunt any excess current when the supply voltage reaches a clamping voltage Vc=Vref / f.

[0051] Each of the foregoing surge protectors and surge protection methods may be employed individually or in combination, and may include one or more of the following features in any appropriate combination: 1. The operational amplifier includes a differential amplifier. 2. A power controller configured to disable the differential amplifier when the supply voltage is below a threshold voltage. 3. A voltage divider configured to provide a sense voltage to a non-inverting input terminal. 4. The voltage divider includes a first impedance and a second impedance in series, the first impedance being formed by a first resistor in parallel with a first capacitor, and the second impedance being formed by a second resistor in parallel with a second capacitor. 5. A power controller configured to disable the voltage divider when the supply voltage is below a threshold voltage. 6. A reference circuit including a reverse biased Zener diode driven by a current source. 7. A power controller configured to disable the reference circuit when the supply voltage is below a threshold voltage. 8. The threshold voltage matches the clamping voltage Vc. 9. The threshold voltage is set by a series combination of a Zener diode and a current mirror transistor.

Claims

1. A surge protector, characterized in that: include: a shunt transistor having a source coupled to ground and a drain coupled to a conductor at a supply voltage; as well as An operational amplifier, the operational amplifier having: an output terminal coupled to a gate of the shunt transistor, an inverting input terminal coupled to receive a reference voltage Vref, and a non-inverting input terminal coupled to receive a sense voltage, the sense voltage being a fixed fraction f of the supply voltage, The operational amplifier is configured to drive the shunt transistor to shunt any excess current when the supply voltage reaches a clamping voltage Vc=Vref / f.

2. The surge protector according to claim 1, characterized in that: The operational amplifier includes a differential amplifier, and the surge protector includes a power controller configured to disable the differential amplifier when the supply voltage is below a threshold voltage.

3. The surge protector according to any one of claims 1 to 2, characterized in that: The surge protector also includes a voltage divider configured to provide the sense voltage to the non-inverting input terminal.

4. The surge protector according to claim 3, characterized in that: The voltage divider includes a first impedance and a second impedance connected in series, the first impedance being formed by a first resistor connected in parallel with a first capacitor, and the second impedance being formed by a second resistor connected in parallel with a second capacitor.

5. The surge protector according to claim 3, characterized in that: The surge protector also includes a power controller configured to disable the voltage divider when the supply voltage is below a threshold voltage.

6. The surge protector according to any one of claims 1 to 2, characterized in that: The surge protector also includes a reference circuit including a reverse biased Zener diode driven by a current source.

7. The surge protector according to claim 6, characterized in that: The surge protector also includes a power controller configured to disable the reference circuit when the supply voltage is below a threshold voltage.

8. The surge protector according to claim 7, characterized in that: The threshold voltage matches the clamping voltage Vc.

9. A surge protection method, characterized in that: include: deriving a sense voltage as a fixed fraction f of the supply voltage; Comparing the sensed voltage with a reference voltage Vref; as well as Based on the comparison, a transistor is driven to shunt any excess current when the supply voltage reaches a clamping voltage Vc=Vref / f.

10. The surge protection method according to claim 9, characterized in that: The comparison is performed by a differential amplifier, the deriving of the sensed voltage is performed using a voltage divider, and the reference voltage is provided by a reference circuit, and the surge protection method includes disabling at least one of the differential amplifier, the voltage divider and the reference circuit when the supply voltage is below a threshold voltage.

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