Tunneling silicon oxide selective passivation contact solar cell, preparation method thereof, photovoltaic module and photovoltaic system

Abstract

The embodiment of the invention provides a tunneling silicon oxide selective passivation contact solar cell, a preparation method of the tunneling silicon oxide selective passivation contact solar cell, a photovoltaic module and a photovoltaic system. The solar cell comprises a silicon substrate which comprises a first surface and a second surface which are opposite to each other; the first passivation layer, the first polycrystalline silicon layer and the phosphorus-doped polycrystalline silicon layer are located on the second surface and sequentially stacked in the first direction, and the phosphorus-doped polycrystalline silicon layer is provided with a metallization area and a non-metallization area; the phosphorus-carbon co-doped polycrystalline silicon layer is positioned in the non-metallization region; and the first antireflection layer is positioned on the phosphorus-doped polycrystalline silicon layer and the phosphorus-carbon co-doped polycrystalline silicon layer in the metallization region. According to the embodiment of the invention, by designing a new tunneling oxidation passivation contact structure, the passivation performance of the surface of the silicon wafer can be improved, and the contact resistance caused by C / N doping can be reduced.

Description

Technical Field

[0001] The present application relates to the technical field of solar cells, and in particular to a tunneling silicon oxide selective passivation contact solar cell and a preparation method thereof, a photovoltaic module, and a photovoltaic system. Background Art

[0002] Tunneling oxide passivation contact (TOPCon) technology is a representative passivation contact technology, which mainly grows an ultra-thin nano-silicon oxide (SiO) layer on the surface of the silicon wafer. x ) is used to eliminate dangling bonds on the surface and prepare a layer of heavily doped polysilicon on the ultra-thin silicon oxide to achieve field passivation effect. Thanks to the TOPCon structure's better passivation performance and the compatibility of the production process, TOPCon cells have become the mainstream technology for industrial silicon cell expansion.

[0003] However, in terms of improving battery efficiency, the current TOPCon technology has shown certain limitations. The passivation performance of the TOPCon structure based on conventional polysilicon is slightly inferior to that of another representative passivation contact technology - heterojunction (HJT). The passivation performance of the TOPCon structure needs to be further improved. For example, the patent with the publication number "CN117936597A" and the name "A functional polysilicon tunneling silicon oxide passivation contact structure and its preparation method" uses doping engineering to prepare new polysilicon with different functions, namely carbon-doped (C) polysilicon, nitrogen-doped (N) polysilicon and carbon and nitrogen co-doped polysilicon layers, to achieve passivation in the silicon wafer and on the surface, thereby obtaining a TOPCon structure with ultra-high passivation performance. However, the doping of C / N inhibits the diffusion of the P source, resulting in an increase in the contact resistivity and affecting the metal contact.

[0004] It should be noted that the above content is not necessarily prior art, nor is it intended to limit the scope of patent protection of this application. Summary of the invention

[0005] The embodiments of the present application provide a tunneling silicon oxide selective passivation contact solar cell and its preparation method, photovoltaic module, and photovoltaic system, aiming to solve the problem that the traditional passivation contact structure suppresses the diffusion of the P source due to the doping of C / N, resulting in increased contact resistivity.

[0006] In a first aspect, an embodiment of the present application provides a tunneling silicon oxide selective passivation contact solar cell, comprising: a silicon substrate including a first surface and a second surface opposite to each other; A first passivation layer, a first polysilicon layer, and a phosphorus-doped polysilicon layer are located on the second surface and sequentially stacked along a first direction, wherein the phosphorus-doped polysilicon layer has a metallized region and a non-metallized region; a phosphorus-carbon co-doped polysilicon layer located in the non-metallized area; A first anti-reflection layer is located on the phosphorus-doped polysilicon layer in the metallization region and on the phosphorus-carbon co-doped polysilicon layer.

[0007] In summary, by arranging a phosphorus-carbon co-doped polysilicon layer in the non-metallized area to utilize the excellent hydrogen capture ability of carbon atoms, the interfacial hydrogen content of the phosphorus-carbon co-doped polysilicon layer is greatly increased, which is beneficial to passivate more defect states and thus reduce the interface state density; in addition, the hydrogen content of the phosphorus-carbon co-doped polysilicon layer itself will also increase, which is beneficial to the surface passivation of the phosphorus-carbon co-doped polysilicon layer, thereby improving the passivation performance; in addition, since the metallized area does not contain a phosphorus-carbon co-doped polysilicon layer, but only contains the first polysilicon layer and the phosphorus-doped polysilicon layer, it can avoid the situation where the phosphorus source diffusion degree caused by carbon doping becomes smaller, thereby causing the contact resistance to increase, and solves the problem that the traditional passivation contact structure suppresses the diffusion of the P source due to the doping of C / N, resulting in an increase in contact resistivity.

[0008] Optionally, it further comprises a first electrode, wherein the first electrode sequentially penetrates the first anti-reflection layer and the phosphorus-doped polysilicon layer on the metallized region and contacts the first polysilicon layer on the metallized region; The first polysilicon layer is a first intrinsic polysilicon layer or a first doped polysilicon layer.

[0009] Optionally, along the second direction, a P-type emitter, a second passivation layer, a second anti-reflection layer, and a second electrode are sequentially stacked on the first surface; The second direction is opposite to the first direction; The thickness of the P-type emitter is 0.01-0.02 μm, and the square resistance of the P-type emitter is 100-180 ohm / sq.

[0010] Optionally, the thickness of the phosphorus-doped polysilicon layer is 10-50 nm, and the thickness of the phosphorus-carbon co-doped polysilicon layer is 10-30 nm.

[0011] In a second aspect, an embodiment of the present application provides a method for preparing a tunneling silicon oxide selective passivation contact solar cell, the preparation method comprising: Providing a silicon substrate, the silicon substrate comprising a first surface and a second surface opposite to each other; Depositing a first passivation layer, a first polysilicon layer, and a phosphorus-doped polysilicon layer in sequence on the second surface and along a first direction, wherein the phosphorus-doped polysilicon layer has a metallized region and a non-metallized region; Depositing a phosphorus-carbon co-doped polysilicon layer in the non-metallized area; A first anti-reflection layer is deposited on the phosphorus-doped polysilicon layer in the metallization region and on the phosphorus-carbon co-doped polysilicon layer.

[0012] Optionally, a phosphorus source flow rate when depositing the phosphorus-doped polysilicon layer is 1.5-3 times a phosphorus source flow rate when depositing the first polysilicon layer.

[0013] Optionally, when depositing the phosphorus-carbon co-doped polysilicon layer, the ratio of the carbon source flow rate to the silicon source flow rate is 0.3-5:1.

[0014] Optionally, the ratio of the phosphorus source flow rate required for depositing the phosphorus-carbon co-doped polysilicon layer to the phosphorus source flow rate required for depositing the phosphorus-doped polysilicon layer is 0.8-1.2:1.

[0015] In a third aspect, an embodiment of the present application provides a photovoltaic module, including the above-mentioned tunneling silicon oxide selective passivation contact solar cell.

[0016] In a fourth aspect, an embodiment of the present application provides a photovoltaic system, comprising the above-mentioned photovoltaic assembly. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In the accompanying drawings, unless otherwise specified, the same reference numerals throughout the multiple drawings represent the same or similar parts or elements. These drawings are not necessarily drawn to scale. It should be understood that these drawings only depict some embodiments disclosed in the present application and should not be regarded as limiting the scope of the present application.

[0018] Figure 1 It is a schematic diagram of the structure of a solar cell provided in the first embodiment of the present application.

[0019] Description of reference numerals: 110 - silicon substrate; 120 - first passivation layer; 130 - first polysilicon layer; 140 - phosphorus-doped polysilicon layer; 150 - phosphorus-carbon co-doped polysilicon layer; 160 - mask layer; 170 - first anti-reflection layer; 180 - P-type emitter; 190 - second passivation layer; 200 - second anti-reflection layer; 210 - second electrode; 220 - first electrode. DETAILED DESCRIPTION

[0020] Embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings. In the accompanying drawings, for clarity, the sizes of layers, regions, elements and their relative sizes may be exaggerated. Wherein the same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and cannot be understood as limitations on the present application. It should be noted that, in the absence of conflict, the embodiments in the present application and the features in the embodiments can be combined with each other.

[0021] It should be understood that when an element or layer is referred to as "on, below, adjacent to, connected to, or coupled to other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. In contrast, when an element is referred to as "directly on, below, directly adjacent to, directly connected to, or directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, or part from another element, component, region, layer, or part. Therefore, without departing from the teachings of the present application, the first element, component, region, layer, or part discussed below may be represented as a second element, component, region, layer, or part. When discussing a second element, component, region, layer or section, it does not necessarily mean that the first element, component, region, layer or section must be present.

[0022] In this application, unless otherwise clearly specified and limited, the terms "set", "install", "connect", "connect", "fix" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral one; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0023] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the terms used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein, for example. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0024] The embodiment of the present application proposes a tunneling silicon oxide selective passivation contact solar cell, which can simultaneously improve the surface passivation performance of the silicon wafer and reduce the contact resistance caused by C / N doping by constructing a new tunneling oxide passivation contact structure. Specifically, the phosphorus and carbon co-doped polysilicon layer in the non-metallized area benefits from the excellent H-trapping ability of C atoms, so the content of H at the interface increases, passivating more defect states and reducing the interface state density; in addition, the H content in the C-doped polysilicon is also increased, which is beneficial to surface passivation and can improve the passivation performance, and the absence of N-type doped carbon in the metallized area can avoid the situation where the P source diffusion degree caused by C doping decreases, thereby causing the contact resistance to increase.

[0025] Hereinafter, exemplary embodiments according to the present application will be described in more detail with reference to the accompanying drawings. It should be noted that these exemplary embodiments can be implemented in many different forms and should not be construed as being limited to the embodiments described herein.

[0026] like Figure 1 As shown, the embodiment of the present application provides a tunneling silicon oxide selective passivation contact solar cell, which includes: A silicon substrate 110 includes a first surface and a second surface relative to each other; a first passivation layer 120, a first polysilicon layer 130, and a phosphorus-doped polysilicon layer 140 located on the second surface and stacked in sequence along a first direction, wherein the phosphorus-doped polysilicon layer 140 has a metallized region and a non-metallized region; a phosphorus-carbon co-doped polysilicon layer 150 located in the non-metallized region; and a first anti-reflection layer 170 located on the phosphorus-doped polysilicon layer 140 in the metallized region and on the phosphorus-carbon co-doped polysilicon layer 150.

[0027] In some embodiments, the first surface refers to the light-receiving surface, and the second surface refers to the backlight surface. The light-receiving surface can be understood as the outermost surface of the solar cell facing the sunlight, and the backlight surface can also be understood as the outermost surface facing away from the sunlight.

[0028] The silicon substrate 110 is used to receive incident light and generate photogenerated carriers. The silicon substrate 110 includes but is not limited to a doped semiconductor substrate made of silicon or germanium. For example, in some embodiments, the material of the silicon substrate 110 can be a doped single crystal silicon material. Further, the doping element of the silicon substrate 110 can be N-type or P-type. When the doping type of the silicon substrate 110 is N-type doping, the corresponding dopant can include any one or more of phosphorus (P), arsenic (As), bismuth (Bi) and antimony (Sb) in the V group elements; when the doping type of the silicon substrate 110 is P-type doping, the corresponding dopant can include any one or more of boron (B), aluminum (Al), gallium (Ga) and indium (In) in the III group elements. In addition, in some embodiments, the first surface and the second surface of the silicon substrate 110 will also have certain morphological changes based on the morphology of the battery film layer and other features. For example, the light-receiving surface can be a velvet structure; and the backlight surface can be a planar structure, and the other part of the backlight surface can also be a velvet structure.

[0029] The first passivation layer 120 is located on the surface of the first surface, that is, the passivation contact layer is located on the surface of the backlight side of the silicon substrate 110. By setting the first passivation layer 120, the recombination of carriers on the surface of the silicon substrate 110 can be reduced, thereby increasing the open circuit voltage of the solar cell and improving the photoelectric conversion efficiency of the solar cell.

[0030] Specifically, the first passivation layer 120 reduces the interface defect state density of the first surface of the substrate by saturating the dangling bonds on the surface of the substrate, thereby reducing the recombination center of the first surface of the substrate to reduce the carrier recombination rate. Wherein, the thickness of the first passivation layer 120 is less than or equal to 3 nanometers. Exemplarily, the thickness of the first passivation layer 120 can be 3nm, 2nm, 1nm, 0.5nm, etc. The material of the first passivation layer 120 can be a dielectric material, for example, the first passivation layer 120 is at least one of silicon oxide, amorphous silicon, polycrystalline silicon, silicon carbide, silicon nitride, silicon oxynitride, aluminum oxide or titanium oxide. Wherein, in some embodiments, the dielectric material may contain doping elements of the same type as the doping elements of the substrate.

[0031] The first polysilicon layer 130 is located on the surface of the first passivation layer 120 away from the silicon substrate 110. The first polysilicon layer may be a first intrinsic polysilicon layer or a first doped polysilicon layer. For example, the doping element of the first polysilicon layer 130 may include phosphorus. In some embodiments, it is an N-type low-doped polysilicon layer. By maintaining a low concentration of phosphorus doping, its contact performance with the first passivation layer 120 can be ensured. In addition, the thickness of the first polysilicon layer 130 is 3 nanometers to 50 nanometers. Exemplarily, the thickness of the first polysilicon layer 130 may be 3nm, 10nm, 20nm, 30nm, 40nm, 50nm, etc. By setting the first polysilicon layer 130 to be thinner and lower in concentration, the light parasitic absorption of the first polysilicon layer 130 can be reduced, and the short-circuit current of the battery can be increased. Therefore, the battery efficiency can be effectively improved.

[0032] The phosphorus-doped polysilicon layer 140 is located on the surface of the first polysilicon layer 130 away from the silicon substrate 110. In some embodiments, the thickness of the phosphorus-doped polysilicon layer 140 is 10 nanometers to 50 nanometers. If the phosphorus-doped polysilicon layer 140 is too thick, parasitic absorption will be serious, and if it is too thin, the screen will be easily burned through. By setting the thickness of the phosphorus-doped polysilicon layer 140 in a suitable range, parasitic absorption can be reduced and screen burning can be avoided. Exemplarily, the thickness of the phosphorus-doped polysilicon layer can be 10nm, 20nm, 30nm, 40nm, 50nm, etc.

[0033] The phosphorus-carbon co-doped polysilicon layer 150 is located on the surface of the first polysilicon layer 130 away from the silicon substrate 110. In some embodiments, the doping elements of the phosphorus-carbon co-doped polysilicon layer 150 may also include nitrogen. The thickness of the phosphorus-carbon co-doped polysilicon layer 150 is 10 nanometers to 30 nanometers. If the thickness of the phosphorus-carbon co-doped polysilicon layer 150 is too thick, the parasitic absorption is serious. If the thickness of the phosphorus-carbon co-doped polysilicon layer 150 is too thin, the carbon content is low and the passivation effect is poor. By setting the thickness of the phosphorus-carbon co-doped polysilicon layer 150 within a suitable range, the parasitic absorption can be reduced and the passivation performance of the battery can be improved. Exemplarily, the thickness of the phosphorus-carbon co-doped polysilicon layer 150 can be 10nm, 20nm, 30nm, etc.

[0034] Furthermore, in some embodiments, the doping types of the first polysilicon layer, the phosphorus-doped polysilicon layer, and the phosphorus-carbon co-doped polysilicon layer are all N-type.

[0035] In some embodiments, the battery may also have a mask layer 160, which is deposited on the phosphorus-carbon co-doped polysilicon layer and is used to protect the phosphorus-carbon co-doped polysilicon layer in the non-metallized area when etching the phosphorus-carbon co-doped polysilicon layer in the metallized area. The mask layer 160 may be retained to play a similar passivation role. In some embodiments, the mask layer 160 may also be removed. The mask layer 160 may be one of silicon nitride, silicon oxynitride, and silicon oxide thin films.

[0036] In some embodiments, the first anti-reflection layer 170 can be one of silicon nitride, silicon oxynitride, and silicon oxide films, and the first anti-reflection layer 170 can include one or more layers of silicon nitride, silicon oxynitride, and silicon oxide films. The total thickness of the first anti-reflection layer 170 is 40-100nm. Exemplarily, the thickness of the first anti-reflection layer 170 can be 40nm, 70nm, 100nm, and so on.

[0037] The P-type emitter 180 is located on the second surface of the silicon substrate 110. The P-type emitter 180 is arranged to form a PN junction with the silicon substrate. In some embodiments, the thickness of the P-type emitter 180 is 0.01-0.02 μm. If the thickness of the P-type emitter 180 is too thick, the recombination is serious. If the thickness of the P-type emitter 180 is too thin, the metal contact becomes poor. By setting the thickness of the P-type emitter 180 within a suitable range, a better surface concentration and junction depth can be obtained and the contact resistance is small. In addition, the square resistance of the P-type emitter 180 is 100-180 ohm / sq, so that the resistance generated by the P-type emitter 180's obstruction to the current is moderate. Exemplarily, the square resistance of the P-type emitter 180 can be 100ohm / sq, 140ohm / sq, 180ohm / sq, and the like.

[0038] In some embodiments, the second passivation layer 190 is AlO x The second anti-reflection layer 200 is a single layer or a multi-layer SiN x By providing the second passivation layer 190, recombination can be reduced and the passivation effect can be improved. By providing the second anti-reflection layer 200, the reflection of light can be greatly reduced.

[0039] In some embodiments, the first electrode 220 sequentially penetrates the second anti-reflection layer 200 and the second passivation layer 190, and makes ohmic contact with the P-type emitter 180. The second electrode 210 sequentially penetrates the first anti-reflection layer 170 and the phosphorus-doped polysilicon layer 140, and makes ohmic contact with the first polysilicon layer 130, so as to further improve the metal contact, which is beneficial to the gain fill factor.

[0040] In some embodiments, the material of the first electrode 220 and the second electrode 210 includes but is not limited to one or more of aluminum (Al), titanium (Ti), nickel (Ni), cobalt (Co), silver (Ag), copper (Cu) and tin (Sn). In the embodiment of the present application, the first electrode 220 and the second electrode 210 are metal gate lines.

[0041] The tunneling silicon oxide selective passivation contact solar cell provided in the embodiment of the present application comprises a silicon substrate, a P-type emitter, a second anti-reflection layer and a second electrode located on the front side of the silicon substrate and stacked in sequence, and a back first passivation layer, a polysilicon layer, a first anti-reflection layer and a first electrode located on the back side of the silicon substrate and stacked in sequence. Among them, the polysilicon layer includes a lightly doped P layer, a heavily doped P layer and a polysilicon layer doped with C in the heavily doped P, thereby forming a new tunneling oxide passivation contact structure. Since the N-type phosphorus-carbon co-doped polysilicon layer in the non-metallized area can capture more hydrogen, the content of H at the interface increases, passivating more defect states and reducing the interface state density; in addition, the H content in the N-type phosphorus-carbon co-doped polysilicon layer is also increased, which is beneficial to surface passivation and can bring about an improvement in passivation performance. The structure without N-type doped carbon in the metallized area can avoid the situation where the P diffusion degree caused by C doping becomes smaller, thereby causing the contact resistance to increase. The two work together to improve the conversion efficiency of the solar cell.

[0042] The present application embodiment provides a method for preparing the above-mentioned tunneling silicon oxide selective passivation contact solar cell, comprising: Providing a silicon substrate, the silicon substrate comprising a first surface and a second surface opposite to each other; Depositing a first passivation layer, a first polysilicon layer, and a phosphorus-doped polysilicon layer in sequence on the second surface and along a first direction, wherein the phosphorus-doped polysilicon layer has a metallized region and a non-metallized region; Depositing a phosphorus-carbon co-doped polysilicon layer in the non-metallized area; A first anti-reflection layer is deposited on the phosphorus-doped polysilicon layer in the metallization region and on the phosphorus-carbon co-doped polysilicon layer.

[0043] For example: Step S01: depositing a first passivation layer on the second surface of the silicon substrate; Step S02: depositing a first polysilicon layer on the surface of the first passivation layer; Step S03: depositing a phosphorus-doped polysilicon layer on the surface of the first polysilicon layer; Step S04: depositing a phosphorus-carbon co-doped polysilicon layer on the surface of the phosphorus-doped polysilicon layer; Step S05: depositing a mask layer on the surface of the phosphorus-carbon co-doped polysilicon layer located in the non-metallized area by a magnetron sputtering method; Step S06: etching the phosphorus-carbon co-doped polysilicon layer located in the metallization area using an alkaline solution; Step S07: depositing a first anti-reflection layer on the surface of the mask layer and the exposed phosphorus-doped polysilicon layer; Step S08: metallizing the back side of the silicon substrate.

[0044] In some embodiments, the ratio of the phosphorus source flow rate required to deposit the phosphorus-carbon co-doped polysilicon layer to the phosphorus source flow rate required to deposit the phosphorus-doped polysilicon layer is 0.8-1.2:1, that is, the phosphorus doping concentration in the phosphorus-carbon co-doped polysilicon layer is almost the same as or equal to the phosphorus doping concentration in the phosphorus-doped polysilicon layer.

[0045] In some embodiments, when depositing the phosphorus-carbon co-doped polysilicon layer, the ratio of the required carbon source flow rate to the required silicon source flow rate is 0.3-5:1. Since it is difficult to measure the carbon doping concentration in the phosphorus-carbon co-doped polysilicon layer in the actual production process, based on this, by determining the ratio of the required carbon source flow rate to the required silicon source flow rate when depositing the phosphorus-carbon co-doped polysilicon layer, the carbon doping concentration in the phosphorus-carbon co-doped polysilicon layer can be determined. If the ratio of the required carbon source flow rate to the required silicon source flow rate is too low, it will affect the passivation effect. If the ratio of the required carbon source flow rate to the required silicon source flow rate is too high, it will increase the contact resistance and affect the contact performance. By setting the ratio of the required carbon source flow rate to the required silicon source flow rate in an appropriate range, the phosphorus-carbon co-doped polysilicon layer can have excellent hydrogen capture ability. Exemplarily, when depositing the phosphorus-carbon co-doped polysilicon layer, the ratio of the required carbon source flow rate to the required silicon source flow rate can be 0.3:1, 1.5:1, 2.6:1, 3.8:1, 5:1, and the like.

[0046] In some embodiments, the phosphorus source flow rate required for depositing the phosphorus-doped polysilicon layer is 1.5-3 times the phosphorus source flow rate required for depositing the first polysilicon layer, that is, the phosphorus doping concentration of the phosphorus-doped polysilicon layer is 1.5-3 times the phosphorus doping concentration in the first polysilicon layer, so that the phosphorus-doped polysilicon layer is a heavily doped layer, and the first polysilicon layer (the first intrinsic polysilicon layer or the first doped polysilicon layer) is a low-doped layer, so as to ensure the contact performance of each layer while reducing the degree of phosphorus diffusion. Exemplarily, the phosphorus source flow rate required for depositing the phosphorus-doped polysilicon layer can be 1.5 times, 2.3 times, 3 times, etc. of the phosphorus source flow rate required for depositing the first polysilicon layer.

[0047] In some embodiments, after depositing the structure on the back side of the silicon substrate, the preparation method further comprises: Step S09: depositing a P-type emitter on the first surface of the silicon substrate; Step S10: depositing a second passivation layer on the surface of the P-type emitter; Step S11: depositing a second anti-reflection layer on the surface of the second passivation layer; Step S12: depositing a second electrode on the surface of the second anti-reflection layer.

[0048] The following specific examples further illustrate the present application, but should not be construed as limiting the present application. Without departing from the spirit and substance of the present application, modifications or replacements made to the methods, steps or conditions of the present application are within the scope of the present application.

[0049] [Example 1] (1) N2O was introduced at a flow rate of 8000 sccm, the deposition temperature was 400°C, the pressure was 5000 mtor, and the deposition time was 200 s to deposit a first passivation layer on the second surface of the silicon substrate; (2) introducing SiH4, H2, and PH3 at flow rates of 10000 sccm, 9000 sccm, and 400 sccm, respectively, at a deposition temperature of 400°C, a pressure of 5000 mtor, and a deposition time of 110 s to deposit a first polysilicon layer on the surface of the first passivation layer; (3) SiH4, H2, and PH3 are introduced at flow rates of 10000 sccm, 9000 sccm, and 600 sccm, respectively, at a deposition temperature of 400°C, a pressure of 5000 mtor, and a deposition time of 110 s to deposit a phosphorus-doped polysilicon layer on the surface of the first polysilicon layer; (4) introducing CH4, SiH4, H2, and PH3 at flow rates of 600 sccm, 2000 sccm, 10000 sccm, and 600 sccm, respectively, at a deposition temperature of 400°C, a pressure of 5000 mtor, and a deposition time of 150 s to deposit a phosphorus-carbon co-doped polysilicon layer on the surface of the phosphorus-doped polysilicon layer; (5) depositing a mask layer on the surface of the phosphorus-carbon co-doped polysilicon layer located in the non-metallized area by a magnetron sputtering method; (6) etching the phosphorus-carbon co-doped polysilicon layer located in the metallization area using a sodium hydroxide solution; (7) introducing SiH4 and NH3 at flow rates of 5000 sccm and 110000 sccm, respectively, at a deposition temperature of 400°C, a pressure of 4000 mtor, and a deposition time of 160 s to deposit a first anti-reflection layer on the surface of the mask layer and the exposed phosphorus-doped polysilicon layer; (8) Metallizing the back side of the silicon substrate; (9) After the front side of the silicon wafer is textured, 220 sccm BCl3, 800 sccm O2, the temperature is 950°C, the deposition time is 225 s, and the pressure is 425 Pa to deposit a P-type emitter on the front side of the silicon wafer; (10) Trimethylaluminum and water were introduced at flow rates of 50 sccm and 50 sccm, respectively, at a deposition temperature of 300 °C and a deposition time of 300 s to deposit a second passivation layer on the surface of the P-type emitter; (11) introducing SiH4 and NH3 at flow rates of 5500 sccm and 5500 sccm, respectively, at a deposition temperature of 400°C, a pressure of 4200 mtor, and a deposition time of 210 s to deposit a second anti-reflection layer on the surface of the second passivation layer; (12) Depositing a second electrode on the surface of the second anti-reflection layer.

[0050] [Example 2] - [Example 5] The tunneling silicon oxide selective passivation contact solar cells of Examples 2 to 5 were prepared by referring to the preparation method of Example 1, except that the phosphorus source flow rate required for depositing the phosphorus-doped polysilicon layer, the phosphorus source flow rate required for depositing the first polysilicon layer, the carbon source flow rate required for depositing the phosphorus-carbon co-doped polysilicon layer, the silicon source flow rate required for depositing the phosphorus-carbon co-doped polysilicon layer, and the phosphorus source flow rate required for depositing the phosphorus-carbon co-doped polysilicon layer were adjusted, as shown in Table 1 below: Table 1

[0051] In order to more clearly illustrate the technical effects of the embodiments of the present application, the embodiments of the present application also provide the structure and preparation method of the tunneling silicon oxide selective passivation contact solar cell of [Comparative Example 1]-[Comparative Example 2].

[0052] [Comparative Example 1] Comparative Example 1 is substantially the same as Example 1, except that the phosphorus-carbon co-doped polysilicon layer and the mask layer are deleted, that is, no carbon element exists in the non-metallized region and the non-metallized region.

[0053] [Comparative Example 2] Comparative Example 2 is basically the same as Example 1, except that a phosphorus-carbon co-doped polysilicon layer is also provided in the metallization region, and the phosphorus-carbon co-doped polysilicon layer on the metallization region is also stacked on the phosphorus-doped polysilicon layer, and the mask layer is deleted.

[0054] The following is a performance test of the tunneling silicon oxide selective passivation contact solar cells provided in Examples 1-5 and Comparative Examples 1-2 of the present application, so as to obtain the open circuit voltage Voc, short circuit current density Jsc, fill factor FF, and photoelectric conversion efficiency PCE of the corresponding tunneling silicon oxide selective passivation contact solar cells. The test results are shown in Table 2 below: Table 2

[0055] Data result analysis: According to Table 2, compared with Comparative Example 1 and Comparative Example 2, the open circuit voltage, fill factor and photoelectric conversion efficiency of the tunneling silicon oxide selective passivation contact solar cells prepared in Examples 1-5 of the present application are significantly improved, which indicates that the tunneling silicon oxide selective passivation contact solar cells in Examples 1-5 of the present application can simultaneously improve the passivation performance of the silicon wafer surface and reduce the contact resistance caused by C / N doping by constructing a new tunneling oxide passivation contact structure, thereby effectively improving the battery performance.

[0056] In the embodiment of the present application, since the N-type phosphorus-carbon co-doped polysilicon layer in the non-metallized area can capture more hydrogen, the content of H at the interface is increased, more defect states are passivated, and the interface state density is reduced; in addition, the H content in the N-type phosphorus-carbon co-doped polysilicon layer is also increased, which is beneficial to surface passivation and can improve the passivation performance. The structure without N-type doped carbon in the metallized area can avoid the situation where the P diffusion degree caused by C doping becomes smaller, thereby causing the contact resistance to increase. The two work together to improve the conversion efficiency of the solar cell.

[0057] The embodiment of the present application further provides a photovoltaic module (not shown), comprising the above-mentioned tunneling silicon oxide selective passivation contact solar cell.

[0058] The embodiment of the present application also provides a photovoltaic system, including the photovoltaic components in any of the above embodiments. The advantages of the above photovoltaic components are also possessed by the photovoltaic system, which will not be repeated here. The above photovoltaic system has a wide range of applications, not only limited to photovoltaic power stations, such as ground power stations, rooftop power stations and water power stations, but also includes various equipment and devices that use solar energy to generate electricity, such as user solar power supplies, solar street lights, solar cars and solar buildings. Of course, it can be understood that the application scenarios of the photovoltaic system are not limited to this, that is to say, the photovoltaic system can be used in all fields where solar energy is required for power generation. Taking the photovoltaic power generation system network as an example, the photovoltaic system may include a photovoltaic array, a junction box and an inverter. The photovoltaic array may be an array combination of multiple photovoltaic components. For example, multiple photovoltaic components may form multiple photovoltaic arrays. The photovoltaic array is connected to a junction box. The junction box can converge the current generated by the photovoltaic array. The converged current flows through the inverter and is converted into the alternating current required by the mains power grid, and then connected to the mains network to realize solar power supply.

[0059] It should be noted that the terms "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc. are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. The orientation words "inside" and "outside" refer to the inside and outside relative to the outline of each component itself. For example, if the device in the accompanying drawings is inverted, the device described as "above other devices or structures" or "above other devices or structures" will be positioned as "below other devices or structures" or "below other devices or structures". Therefore, the exemplary term "above..." can include both "above..." and "below..." orientations. The device can also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatial relative descriptions used here are interpreted accordingly.

[0060] It should also be noted that "one embodiment", "another embodiment", "embodiment", etc. mentioned in this application refer to the specific features, structures or characteristics described in conjunction with the embodiment included in at least one embodiment generally described in this application. The same expression appearing in multiple places in the specification does not necessarily refer to the same embodiment. Further, when describing a specific feature, structure or characteristic in conjunction with any embodiment, it is claimed that the realization of such feature, structure or characteristic in conjunction with other embodiments also falls within the scope of this application.

[0061] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0062] It should also be noted that the above are only preferred embodiments of the present application, and the patent protection scope of the present application is not limited thereto. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly used in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A tunneling silicon oxide selective passivation contact solar cell, characterized in that: include: a silicon substrate including a first surface and a second surface opposite to each other; A first passivation layer, a first polysilicon layer, and a phosphorus-doped polysilicon layer are located on the second surface and sequentially stacked along a first direction, wherein the phosphorus-doped polysilicon layer has a metallized region and a non-metallized region; a phosphorus-carbon co-doped polysilicon layer located in the non-metallized area; A first anti-reflection layer is located on the phosphorus-doped polysilicon layer in the metallization region and on the phosphorus-carbon co-doped polysilicon layer.

2. The tunneling silicon oxide selective passivation contact solar cell according to claim 1, characterized in that: It also includes a first electrode, which sequentially penetrates the first anti-reflection layer and the phosphorus-doped polysilicon layer on the metallization area and contacts the first polysilicon layer; The first polysilicon layer is a first intrinsic polysilicon layer or a first doped polysilicon layer.

3. The tunneling silicon oxide selective passivation contact solar cell according to claim 1, characterized in that: Along the second direction, a P-type emitter, a second passivation layer, a second anti-reflection layer, and a second electrode are sequentially stacked on the first surface; The second direction is opposite to the first direction; The thickness of the P-type emitter is 0.01-0.02 μm, and the square resistance of the P-type emitter is 100-180 ohm / sq.

4. The tunneling silicon oxide selective passivation contact solar cell according to any one of claims 1 to 3, characterized in that: The thickness of the phosphorus-doped polysilicon layer is 10-50 nm, and the thickness of the phosphorus-carbon co-doped polysilicon layer is 10-30 nm.

5. A method for preparing a tunneling silicon oxide selective passivation contact solar cell, characterized in that: The preparation method comprises: Providing a silicon substrate, the silicon substrate comprising a first surface and a second surface opposite to each other; Depositing a first passivation layer, a first polysilicon layer, and a phosphorus-doped polysilicon layer in sequence on the second surface and along a first direction, wherein the phosphorus-doped polysilicon layer has a metallized region and a non-metallized region; Depositing a phosphorus-carbon co-doped polysilicon layer in the non-metallized area; A first anti-reflection layer is deposited on the phosphorus-doped polysilicon layer in the metallization region and on the phosphorus-carbon co-doped polysilicon layer.

6. The method for preparing a tunneling silicon oxide selective passivation contact solar cell according to claim 5, characterized in that: The phosphorus source flow rate when depositing the phosphorus-doped polysilicon layer is 1.5-3 times the phosphorus source flow rate when depositing the first polysilicon layer.

7. The method for preparing a tunneling silicon oxide selective passivation contact solar cell according to claim 5, characterized in that: When depositing the phosphorus-carbon co-doped polysilicon layer, the ratio of the carbon source flow rate to the silicon source flow rate is 0.3-5:

1.

8. The method for preparing a tunneling silicon oxide selective passivation contact solar cell according to claim 5, characterized in that: The ratio of the phosphorus source flow rate required for depositing the phosphorus-carbon co-doped polysilicon layer to the phosphorus source flow rate required for depositing the phosphorus-doped polysilicon layer is 0.8-1.2:

1.

9. A photovoltaic module, characterized in that: A tunneling silicon oxide selective passivation contact solar cell comprising the method according to any one of claims 1 to 4.

10. A photovoltaic system, characterized in that: Comprising the photovoltaic module as claimed in claim 9.

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