A leakage test method for intelligent power module

Abstract

The present invention relates to a leakage test method for an intelligent power module, comprising: S1, providing an intelligent power module, which comprises a control chip, an inverter unit and a pin assembly, wherein the inverter unit comprises an upper bridge arm circuit connected to a U / V / W phase output terminal and the control chip, and a lower bridge arm circuit connected to a NU / NV / NW phase output terminal and the control chip; S2, short-circuiting the U phase output terminal with a bootstrap voltage VBU, the V phase output terminal with a bootstrap voltage VBV, and the W phase output terminal with a bootstrap voltage VBW; S4, starting a 15V low-voltage power supply and a 5V low-voltage power supply; S5, starting a high-voltage power supply DC to apply a 600V voltage from the U / V / W phase output terminal to the NU / NV / NW phase output terminal; S6, completing the leakage test after reading the leakage values ​​of the U phase output terminal, the V phase output terminal, the W phase output terminal, the NU phase output terminal, the NV phase output terminal and the NW phase output terminal through a monitoring device; and S7, disconnecting a relay and a power supply in sequence. The method provided by the present invention not only improves the product test yield, but also ensures the reliability and test safety of the product.

Description

Technical Field

[0001] The invention belongs to the technical field of electronic circuits, and in particular relates to a leakage testing method for an intelligent power module. Background Art

[0002] The Intelligent Power Module (IPM) is a power drive product that combines power electronics and integrated circuit technology. It combines the advantages of GTR (high power transistor) high current, low saturation voltage, high withstand voltage, and MOSFET (field effect transistor) high input impedance, high switching frequency and low drive power. After the intelligent power module is manufactured, the last step requires final testing, also known as electrical parameter testing. One of the tests is the leakage current ICES test, which is a key parameter of power devices. The detected parameter value directly affects the reliability of the module. The larger the leakage current, the more heat the module generates during operation. The smaller the leakage current, the lower the heat generation and the better the reliability.

[0003] However, the existing leakage test method for intelligent power modules uses the traditional single-tube (transistor) test method, which is to connect the positive output of the high-voltage DC power supply device to the collector of the transistor and the negative output to the emitter, and then measure the leakage value of a certain voltage. This method has defects when used in IPM systems. Because the intelligent power module integrates a high-voltage driver IC, the traditional test method will lead to inaccurate test data, affecting test judgment.

[0004] Therefore, the present invention provides a leakage testing method for an intelligent power module to solve the above technical problems. Summary of the Invention

[0005] In view of the above problems, the present invention aims to provide a leakage testing method for an intelligent power module, which not only improves the product test yield but also ensures product reliability and test safety.

[0006] The present invention provides a leakage testing method for an intelligent power module, which comprises:

[0007] S1, providing an intelligent power module, the intelligent power module includes a control chip, an inverter unit and a pin assembly, the pin assembly includes a high voltage input terminal P, a PWM signal input terminal IN UH , PWM signal input terminal IN VH , PWM signal input terminal IN WH , Temperature analog signal output terminal R TH , IC power supply output terminal VCC, IC power supply output terminal COM, PWM signal input terminal IN VL , PWM signal input terminal IN UL , PWM signal input terminal INWL , module enable input EN, module enable output V FAULT , U-phase output terminal, V-phase output terminal, W-phase output terminal, NU-phase output terminal, NV-phase output terminal, NW-phase output terminal and output terminal ITIRP, the inverter unit includes an upper bridge arm circuit connected to the high-voltage input terminal P, the U-phase output terminal, the V-phase output terminal, the W-phase output terminal and the control chip at the same time, and a lower bridge arm circuit connected to the upper bridge arm circuit, the NU-phase output terminal, the NV-phase output terminal, the NW-phase output terminal and the control chip at the same time;

[0008] S2, the high voltage input terminal P is suspended, and the PWM signal input terminal IN is UH , PWM signal input terminal IN VH , the PWM signal input terminal IN WH , the temperature simulation signal output terminal R TH , the PWM signal input terminal IN VL , the PWM signal input terminal IN UL , the PWM signal input terminal IN WL Connect to the ground terminal;

[0009] S3, provide relay K1, relay K2, relay K3, 15V low-voltage power supply, 5V low-voltage power supply, bootstrap voltage VBU, bootstrap voltage VBV and bootstrap voltage VBW; connect one end of the relay K1 to the U-phase output end, and the other end to the positive end of the high-voltage power supply DC, connect one end of the relay K2 to the V-phase output end, and the other end to the positive end of the high-voltage power supply DC, connect one end of the relay K3 to the W-phase output end, and the other end to the positive end of the high-voltage power supply DC, and connect the negative end of the high-voltage power supply DC to the NU-phase output end, the NV-phase output end and the NW-phase output end; the IC power supply output end VCC is connected to the 15V low-voltage power supply, and the module enable input end EN and the module enable output end V FAULT Connected to the 5V low-voltage power supply; the U-phase output terminal is short-circuited with the bootstrap voltage VBU, the V-phase output terminal is short-circuited with the bootstrap voltage VBV, and the W-phase output terminal is short-circuited with the bootstrap voltage VBW;

[0010] S4, start the 15V low-voltage power supply and the 5V low-voltage power supply, so that the voltage value of the IC power supply output terminal VCC is 15V, the module enable input terminal EN and the module enable output terminal V FAULT The voltage value is 5V, the PWM signal input terminal IN UH , the PWM signal input terminal IN VH, the PWM signal input terminal IN WH , the PWM signal input terminal IN VL , the PWM signal input terminal IN UL and the PWM signal input terminal IN WL The voltage value is 0;

[0011] S5, starting the high-voltage power supply DC and closing the relays K1, K2, and K3 to stably apply a 600V voltage from the U-phase output terminal, V-phase output terminal, and W-phase output terminal to the NU-phase output terminal, NV-phase output terminal, and NW-phase output terminal, respectively;

[0012] S6, after reading the leakage values ​​of the U-phase output terminal, the V-phase output terminal, the W-phase output terminal, the NU-phase output terminal, the NV-phase output terminal, and the NW-phase output terminal through the monitoring device, the leakage test is completed;

[0013] S7 , disconnecting the relay K1 , the relay K2 , the relay K3 , the 5V low-voltage power supply, the 15V low-voltage power supply, and the high-voltage power supply DC in sequence.

[0014] Preferably, the upper bridge arm circuit includes a first triode transistor 003, a second triode transistor 004 and a third triode transistor 005, and the lower bridge arm circuit includes a fourth triode transistor 006, a fifth triode transistor 007 and a sixth triode transistor 008, the drain of the first triode transistor 003 is connected to the high voltage input terminal P, the source of the first triode transistor 003 is connected to the drain of the fourth triode transistor 006 and the U phase output terminal, the source of the fourth triode transistor 006 is connected to the NU phase output terminal, the gate of the first triode transistor 003 and the gate of the fourth triode transistor 006 are connected to the control chip, the drain of the second triode transistor 004 is connected to the high voltage input terminal P The source of the second triode transistor 004 is connected to the drain of the fifth triode transistor 007 and the V-phase output terminal, the source of the fifth triode transistor 007 is connected to the NV-phase output terminal, the gate of the second triode transistor 004 and the gate of the fifth triode transistor 007 are connected to the control chip, the drain of the third triode transistor 005 is connected to the high-voltage input terminal P, the source of the third triode transistor 005 is connected to the drain of the sixth triode transistor 008 and the W-phase output terminal, the source of the sixth triode transistor 008 is connected to the NW-phase output terminal, and the gate of the third triode transistor 005 and the gate of the sixth triode transistor 008 are connected to the control chip.

[0015] Preferably, the intelligent power module further includes a high-frequency filter capacitor C4 and a high-frequency filter capacitor C6, the first end of the high-frequency filter capacitor C4 is connected to the control chip and the IC power supply output terminal VCC, the second end of the high-frequency filter capacitor C4 is connected to the control chip and the IC power supply output terminal COM, the first end of the high-frequency filter capacitor C6 is connected to the control chip and the IC power supply output terminal COM, and the second end of the high-frequency filter capacitor C6 is connected to the control chip and the output terminal ITIRP.

[0016] Preferably, the module enable input terminal EN and the module enable output terminal V FAULT A resistor R1 is connected in series with the 5V low-voltage power supply.

[0017] Compared with the related art, the present invention provides a leakage test method for an intelligent power module, including: S1, providing an intelligent power module, which includes a control chip, an inverter unit and a pin assembly, the inverter unit including an upper bridge arm circuit connected to the U / V / W phase output terminal and the control chip and a lower bridge arm circuit connected to the NU / NV / NW phase output terminal and the control chip; S2, short-circuiting the U phase output terminal with the bootstrap voltage VBU, the V phase output terminal with the bootstrap voltage VBV, and the W phase output terminal with the bootstrap voltage VBW; S4, starting a 15V low-voltage power supply and a 5V low-voltage power supply; S5, starting a high-voltage power supply DC to apply a 600V voltage from the U / V / W phase output terminal to the NU / NV / NW phase output terminal; S6, completing the leakage test after reading the leakage values ​​of the U phase output terminal, the V phase output terminal, the W phase output terminal, the NU phase output terminal, the NV phase output terminal and the NW phase output terminal through a monitoring device; S7, disconnecting the relay and the power supply in sequence. In the above test method, by short-circuiting the U / V / W phase output terminals through the bootstrap voltage VBU / VBV / VBW, the gate potential of the triode transistor in the lower bridge arm circuit can be effectively lowered to a level close to the emitter potential, thereby ensuring that the triode transistor in the lower bridge arm circuit is in a completely off state. In this way, when performing a leakage test, it is possible to more accurately detect whether the triode transistor in the lower bridge arm circuit has a leakage problem, and avoid erroneous judgments and potential dangers caused by accidental conduction of the triode transistor in the lower bridge arm circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 A schematic flow chart of a leakage test method for an intelligent power module according to the present invention;

[0019] Figure 2 This is a schematic diagram of the circuit structure of the connection between the intelligent power module and the detection equipment in the present invention. DETAILED DESCRIPTION

[0020] The present invention provides a leakage test method for an intelligent power module, aiming to solve the problems of inaccurate test data and test safety in existing leakage test methods.

[0021] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0022] Please see the attached Figure 1 As shown, the present invention provides a leakage test method for an intelligent power module, which includes: S1, providing an intelligent power module 10, the intelligent power module including a control chip 1, an inverter unit 2 and a pin component 3, the pin component including a high voltage input terminal P, a PWM signal input terminal IN UH , PWM signal input terminal IN VH , PWM signal input terminal IN WH , Temperature analog signal output terminal R TH , IC power supply output terminal VCC, IC power supply output terminal COM, PWM signal input terminal IN VL , PWM signal input terminal IN UL , PWM signal input terminal IN WL , module enable input EN, module enable output V FAULT , U-phase output terminal, V-phase output terminal, W-phase output terminal, NU-phase output terminal, NV-phase output terminal, NW-phase output terminal and output terminal ITIRP, the inverter unit 2 includes an upper bridge arm circuit 21 connected to the high-voltage input terminal P, the U-phase output terminal, the V-phase output terminal, the W-phase output terminal and the control chip 1 at the same time, and a lower bridge arm circuit 22 connected to the upper bridge arm circuit 21, the NU-phase output terminal, the NV-phase output terminal, the NW-phase output terminal and the control chip 1 at the same time;

[0023] S2, the high voltage input terminal P is suspended, and the PWM signal input terminal IN is UH , PWM signal input terminal IN VH , the PWM signal input terminal IN WH , the temperature simulation signal output terminal R TH , the PWM signal input terminal IN VL , the PWM signal input terminal IN UL , the PWM signal input terminal IN WL Connect to the ground terminal;

[0024] S3, provide relay K1, relay K2, relay K3, 15V low-voltage power supply, 5V low-voltage power supply, bootstrap voltage VBU, bootstrap voltage VBV and bootstrap voltage VBW; connect one end of the relay K1 to the U-phase output end, and the other end to the positive end of the high-voltage power supply DC, connect one end of the relay K2 to the V-phase output end, and the other end to the positive end of the high-voltage power supply DC; connect one end of the relay K3 to the W-phase output end, and the other end to the positive end of the high-voltage power supply DC, and connect the negative end of the high-voltage power supply DC to the NU-phase output end, the NV-phase output end and the NW-phase output end; the IC power supply output end VCC is connected to the 15V low-voltage power supply, and the module enable input end EN and the module enable output end V FAULT Connected to the 5V low-voltage power supply; the U-phase output terminal is short-circuited with the bootstrap voltage VBU, the V-phase output terminal is short-circuited with the bootstrap voltage VBV, and the W-phase output terminal is short-circuited with the bootstrap voltage VBW;

[0025] S4, start the 15V low-voltage power supply and the 5V low-voltage power supply, so that the voltage value of the IC power supply output terminal VCC is 15V, the module enable input terminal EN and the module enable output terminal V FAULT The voltage value is 5V, the PWM signal input terminal IN UH , the PWM signal input terminal IN VH , the PWM signal input terminal IN WH , the PWM signal input terminal IN VL , the PWM signal input terminal IN UL and the PWM signal input terminal IN WL The voltage value is 0;

[0026] S5, starting the high-voltage power supply DC and closing the relays K1, K2, and K3 to stably apply a 600V voltage from the U-phase output terminal, V-phase output terminal, and W-phase output terminal to the NU-phase output terminal, NV-phase output terminal, and NW-phase output terminal, respectively;

[0027] S6, after reading the leakage values ​​of the U-phase output terminal, the V-phase output terminal, the W-phase output terminal, the NU-phase output terminal, the NV-phase output terminal, and the NW-phase output terminal through the monitoring device, the leakage test is completed;

[0028] S7 , disconnecting the relay K1 , the relay K2 , the relay K3 , the 5V low-voltage power supply, the 15V low-voltage power supply, and the high-voltage power supply DC in sequence.

[0029] Specifically, the upper bridge arm circuit 21 includes a first triode transistor 003, a second triode transistor 004 and a third triode transistor 005, and the lower bridge arm circuit includes a fourth triode transistor 006, a fifth triode transistor 007 and a sixth triode transistor 008. The drain of the first triode transistor 003 is connected to the high-voltage input terminal P, the source of the first triode transistor 003 is connected to the drain of the fourth triode transistor 006 and the U-phase output terminal, the source of the fourth triode transistor 006 is connected to the NU-phase output terminal, the gate of the first triode transistor 003 and the gate of the fourth triode transistor 006 are connected to the control chip 1, and the drain of the second triode transistor 004 is connected to the high-voltage input terminal P. The source of the second triode transistor 004 is connected to the drain of the fifth triode transistor 007 and the V-phase output terminal, the source of the fifth triode transistor 007 is connected to the NV-phase output terminal, the gate of the second triode transistor 004 and the gate of the fifth triode transistor 007 are connected to the control chip 1, the drain of the third triode transistor 005 is connected to the high-voltage input terminal P, the source of the third triode transistor 005 is connected to the drain of the sixth triode transistor 008 and the W-phase output terminal, the source of the sixth triode transistor 008 is connected to the NW-phase output terminal, and the gate of the third triode transistor 005 and the gate of the sixth triode transistor 008 are connected to the control chip 1.

[0030] In the above structure, by short-circuiting the U / V / W phase output terminals through the bootstrap voltage VBU / VBV / VBW, the gate potential of the triode transistor in the lower bridge arm circuit 22 can be effectively lowered to a level close to the emitter potential, thereby ensuring that the triode transistor in the lower bridge arm circuit 22 is in a completely off state. In this way, when performing a leakage test, it is possible to more accurately detect whether the triode transistor in the lower bridge arm circuit 22 has a leakage problem, and avoid erroneous judgments and potential dangers caused by accidental conduction of the triode transistor in the lower bridge arm circuit 22.

[0031] In this embodiment, in order to filter out high-frequency signals, the intelligent power module further includes a high-frequency filter capacitor C4 and a high-frequency filter capacitor C6. The first end of the high-frequency filter capacitor C4 is connected to the control chip 1 and the IC power supply output terminal VCC, and the second end of the high-frequency filter capacitor C4 is connected to the control chip and the IC power supply output terminal COM. The first end of the high-frequency filter capacitor C6 is connected to the control chip 1 and the IC power supply output terminal COM, and the second end of the high-frequency filter capacitor C6 is connected to the control chip 1 and the output terminal ITIRP.

[0032] It is worth mentioning that the module enable input terminal EN and the module enable output terminal VFAULT A resistor R1 is connected in series with the 5V low-voltage power supply.

[0033] Compared with the related art, the present invention provides a leakage test method for an intelligent power module, including: S1, providing an intelligent power module, which includes a control chip, an inverter unit and a pin assembly, the inverter unit including an upper bridge arm circuit connected to the U / V / W phase output terminal and the control chip and a lower bridge arm circuit connected to the NU / NV / NW phase output terminal and the control chip; S2, short-circuiting the U phase output terminal with the bootstrap voltage VBU, the V phase output terminal with the bootstrap voltage VBV, and the W phase output terminal with the bootstrap voltage VBW; S4, starting a 15V low-voltage power supply and a 5V low-voltage power supply; S5, starting a high-voltage power supply DC to apply a 600V voltage from the U / V / W phase output terminal to the NU / NV / NW phase output terminal; S6, completing the leakage test after reading the leakage values ​​of the U phase output terminal, the V phase output terminal, the W phase output terminal, the NU phase output terminal, the NV phase output terminal and the NW phase output terminal through a monitoring device; S7, disconnecting the relay and the power supply in sequence. In the above test method, by short-circuiting the U / V / W phase output terminals through the bootstrap voltage VBU / VVU / VWU, the gate potential of the triode transistor in the lower bridge arm circuit can be effectively lowered to a level close to the emitter potential, thereby ensuring that the triode transistor in the lower bridge arm circuit is in a completely off state. In this way, when performing a leakage test, it is possible to more accurately detect whether the triode transistor in the lower bridge arm circuit has a leakage problem, and avoid erroneous judgments and potential dangers caused by accidental conduction of the triode transistor in the lower bridge arm circuit.

[0034] It should be noted that the above-described embodiments are to be understood as illustrative and not limiting of the scope of protection of the present invention, which is subject to the claims. It will be apparent to those skilled in the art that non-essential improvements and adjustments to the present invention, without departing from the spirit and scope of the present invention, still fall within the scope of protection of the present invention.

Claims

1. A leakage test method for an intelligent power module, characterized in that: The leakage test method specifically includes: S1, providing an intelligent power module, the intelligent power module includes a control chip, an inverter unit and a pin assembly, the pin assembly includes a high voltage input terminal P, a PWM signal input terminal IN UH , PWM signal input terminal IN VH , PWM signal input terminal IN WH , Temperature analog signal output terminal R TH , IC power supply output terminal VCC, IC power supply output terminal COM, PWM signal input terminal IN VL , PWM signal input terminal IN UL , PWM signal input terminal IN WL , module enable input EN, module enable output V FAULT , U-phase output terminal, V-phase output terminal, W-phase output terminal, NU-phase output terminal, NV-phase output terminal, NW-phase output terminal and output terminal ITIRP, the inverter unit includes an upper bridge arm circuit connected to the high-voltage input terminal P, the U-phase output terminal, the V-phase output terminal, the W-phase output terminal and the control chip at the same time, and a lower bridge arm circuit connected to the upper bridge arm circuit, the NU-phase output terminal, the NV-phase output terminal, the NW-phase output terminal and the control chip at the same time; S2, the high voltage input terminal P is suspended, and the PWM signal input terminal IN is UH , PWM signal input terminal IN VH , the PWM signal input terminal IN WH , the temperature simulation signal output terminal R TH , the PWM signal input terminal IN VL , the PWM signal input terminal IN UL , the PWM signal input terminal IN WL Connect to the ground terminal; S3, provide relay K1, relay K2, relay K3, 15V low-voltage power supply, 5V low-voltage power supply, bootstrap voltage VBU, bootstrap voltage VBV and bootstrap voltage VBW; connect one end of the relay K1 to the U-phase output end, and the other end to the positive end of the high-voltage power supply DC, connect one end of the relay K2 to the V-phase output end, and the other end to the positive end of the high-voltage power supply DC; connect one end of the relay K3 to the W-phase output end, and the other end to the positive end of the high-voltage power supply DC, and connect the negative end of the high-voltage power supply DC to the NU-phase output end, the NV-phase output end and the NW-phase output end; the IC power supply output end VCC is connected to the 15V low-voltage power supply, and the module enable input end EN and the module enable output end V FAULT Connected to the 5V low-voltage power supply; the U-phase output terminal is short-circuited with the bootstrap voltage VBU, the V-phase output terminal is short-circuited with the bootstrap voltage VBV, and the W-phase output terminal is short-circuited with the bootstrap voltage VBW; S4, start the 15V low-voltage power supply and the 5V low-voltage power supply, so that the voltage value of the IC power supply output terminal VCC is 15V, the module enable input terminal EN and the module enable output terminal V FAULT The voltage value is 5V, the PWM signal input terminal IN UH , the PWM signal input terminal IN VH , the PWM signal input terminal IN WH , the PWM signal input terminal IN VL , the PWM signal input terminal IN UL and the PWM signal input terminal IN WL The voltage value is 0; S5, starting the high-voltage power supply DC and closing the relays K1, K2, and K3 to stably apply a 600V voltage from the U-phase output terminal, V-phase output terminal, and W-phase output terminal to the NU-phase output terminal, NV-phase output terminal, and NW-phase output terminal, respectively; S6, after reading the leakage values ​​of the U-phase output terminal, the V-phase output terminal, the W-phase output terminal, the NU-phase output terminal, the NV-phase output terminal, and the NW-phase output terminal through the monitoring device, the leakage test is completed; S7 , disconnecting the relay K1 , the relay K2 , the relay K3 , the 5V low-voltage power supply, the 15V low-voltage power supply, and the high-voltage power supply DC in sequence.

2. The leakage testing method of an intelligent power module according to claim 1, characterized in that: The upper bridge arm circuit includes a first triode transistor, a second triode transistor, and a third triode transistor, and the lower bridge arm circuit includes a fourth triode transistor, a fifth triode transistor, and a sixth triode transistor. The drain of the first triode transistor is connected to the high-voltage input terminal P, the source of the first triode transistor is connected to the drain of the fourth triode transistor and the U-phase output terminal, the source of the fourth triode transistor is connected to the NU-phase output terminal, the gate of the first triode transistor and the gate of the fourth triode transistor are connected to the control chip, the drain of the second triode transistor is connected to the high-voltage input terminal P, and the The source of the second triode transistor is connected to the drain of the fifth triode transistor and the V-phase output terminal, the source of the fifth triode transistor is connected to the NV-phase output terminal, the gate of the second triode transistor and the gate of the fifth triode transistor are connected to the control chip, the drain of the third triode transistor is connected to the high-voltage input terminal P, the source of the third triode transistor is connected to the drain of the sixth triode transistor and the W-phase output terminal, the source of the sixth triode transistor is connected to the NW-phase output terminal, and the gate of the third triode transistor and the gate of the sixth triode transistor are connected to the control chip.

3. The leakage testing method of an intelligent power module according to claim 1, characterized in that: The intelligent power module also includes a high-frequency filter capacitor C4 and a high-frequency filter capacitor C6. The first end of the high-frequency filter capacitor C4 is connected to the control chip and the IC power supply output terminal VCC, and the second end of the high-frequency filter capacitor C4 is connected to the control chip and the IC power supply output terminal COM. The first end of the high-frequency filter capacitor C6 is connected to the control chip and the IC power supply output terminal COM, and the second end of the high-frequency filter capacitor C6 is connected to the control chip and the output terminal ITIRP.

4. The leakage testing method of an intelligent power module according to claim 1, characterized in that: The module enable input terminal EN and the module enable output terminal V FAULT A resistor R1 is connected in series with the 5V low-voltage power supply.

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