Electrophoretic display with micro-canting gaps

Abstract

An electrophoretic display with micro-joint gaps includes a control substrate having a first surface and a second surface; a drive circuit layer and a control electrode layer disposed on the second surface in sequence; an opposite substrate having a third surface and a fourth surface, and the third surface is opposite to the second surface; a micro-compartment structure is formed between the second surface and the third surface, the micro-compartment structure includes a plurality of compartment walls to define a plurality of chambers filled with a colloidal solution; wherein the electrophoretic display includes a plurality of micro-joints, wherein a micro-joint is embedded in a chamber and there is a gap between the micro-joint and the compartment wall of the chamber.

Description

Technical Field

[0001] This invention relates to a display, and more particularly to an electrophoretic display with micro-clamping gaps. Background Technology

[0002] Electronic paper displays, such as electrophoretic displays (EPDs), are characterized by their thinness, portability, and low power consumption, and they also retain images even when the power is off. Besides applications in e-readers, mobile phones, and wearable devices, electronic paper displays can also be used in supermarket shelf labels and bus stop instant messaging billboards, achieving both energy conservation and sustainability goals.

[0003] Figure 1A A cross-sectional view of a known electrophoretic display 100 is shown. This electrophoretic display 100 is a monochrome electrophoretic display 100. The electrophoretic display 100, for example, includes, from top to bottom, a substrate 12 (e.g., a transparent plastic substrate), a common electrode layer 14 (e.g., a transparent conductive electrode layer), an electrophoretic layer 20, a control electrode layer PEL, a driving circuit layer 30a, and a control substrate 10 (e.g., a glass substrate). Figure 1A In the architecture shown, the viewing plane is approximately in the direction relative to the substrate 12. Furthermore, as... Figure 1A As shown, the electrophoretic layer 20 comprises multiple hollow cavities 22 (only one is shown in the illustration), and each hollow cavity 22 contains a colloidal solution 24 containing multiple suspended charged color particles 26 (e.g., charged black particles 26B and charged white particles 26W). The hollow cavity 22 serves as a container for electronic ink (or electrophoretic material). The hollow cavity 22 is, for example, made of an organic polymer material and used to fill the charged color particles 26. Furthermore, the charged color particles 26 can be combinations of two colors (black / white), three colors (black / red / white, black / yellow / white), four colors (black / red / yellow / white, cyan / yellow / magenta / white), etc. Figure 1A In the structure shown, the charged color particles 26 are, for example, a combination of two colors and include charged black particles 26B and charged white particles 26W.

[0004] The common electrode layer 14 is generally connected to ground potential (0V) to provide a common voltage Vcom, while the underlying control substrate 10 typically uses a TFT array process to fabricate the driving circuit layer 30a. The driving switches of the driving circuit layer 30a mostly contain thin-film transistors fabricated using amorphous silicon (a-Si) processes (detailed below). Amorphous silicon is an abundant and low-cost material; however, its electron mobility is very low (approximately 1 cm⁻¹). 2 / V*s), and physically does not support high refresh rates. However, amorphous silicon has the characteristics of high voltage resistance and ultra-low leakage current, which are necessary conditions for electronic paper control. The charged color particles 26 have a predetermined polarity of charge, for example, the charged black particles 26B are positively charged and the charged white particles 26W are negatively charged. By controlling the electrical properties and voltage of each control electrode PE by the driving circuit layer 30a, the charged black particles 26B can be attracted and the charged white particles 26W can be repelled for each pixel (so that the pixel appears white on the viewing surface opposite to the control electrode PE), or the charged white particles 26W can be attracted and the charged black particles 26B can be repelled for each pixel (so that the pixel appears black on the viewing surface opposite to the control electrode PE).

[0005] Figure 1B This shows a cross-sectional view of another known electrophoretic display 100, which is a color electrophoretic display 100. The structure of this color electrophoretic display 100 is generally similar to... Figure 1A The black and white electrophoretic display 100 shown has a structure in which a color filter layer CF is bonded to the opposite substrate 12 with optical adhesive 13, and the color filter layer CF is disposed on an upper glass substrate 16.

[0006] Electrophoretic displays with arrays of color filters rely on area sharing and color mixing to produce visual color. Available display areas are shared among three or four primary colors, such as red / green / blue (RGB) or red / green / blue / white (RGBW), and the filters can be arranged in a one-dimensional (striped) or two-dimensional (2x2) repeating pattern. Three subpixels (in the case of an RGB display) or four subpixels (in the case of an RGBW display), if small enough, can be interpreted as high resolution, visually blending together to form a single pixel with uniform color. An inherent drawback of area sharing is the constant presence of colorant and the fact that color can only be modulated by switching the corresponding pixel of the underlying monochrome display to white or black (turning the corresponding primary color on or off). For example, in an ideal RGBW display, each of the red, green, blue, and white primary colors occupies a quarter of the display area (one of the four subpixels), and the white subpixel is as bright as the white of the underlying monochrome display, so the combined contribution of the three colored subpixels is no more than that of a single white subpixel.

[0007] Multicolor displays utilize charged particles of various colors. By employing different physical and electrical conditions—such as the polarity (positive or negative), quantity, density, and volume of these particles—their movement within the colloidal solution varies. This difference in movement controls the distance these particles travel to the viewing surface, thus producing different colors. Examples include three-color displays (black, white, and red; black, white, and yellow) and four-color displays (black, white, red, and yellow). Similar to monochrome electrophoretic displays, electrophoretic displays with three or four reflective colors operate like simple monochrome displays. However, because the required color particles are driven to the viewing surface, the driving scheme is far more complex than that for displays with only black and white.

[0008] See Figure 2A and 2B To explain separately Figure 1A A schematic diagram of the operation of a known monochrome electrophoretic display 100 and an equivalent circuit diagram of the control electrode layer PEL / driving circuit layer 30a. (See diagram below.) Figure 2A As shown, by controlling the electrical properties and voltage of each control electrode PE in the control electrode layer PEL through the driving circuit layer 30a, black and white pixels can be formed on the viewing surface (near the opposite substrate 12). If the driving circuit layer 30a controls... Figure 2A The control electrodes PE1 and PE3 shown are at a positive voltage, which attracts negatively charged white particles 26W and pushes positively charged black particles away from the electrode contact surface and towards the viewing surface. This results in a relatively large number of positively charged black particles 26B on the viewing surface, providing black pixels. Conversely, if the driving circuit layer 30a controls... Figure 2A The control electrode PE2 shown is at a negative voltage, which will attract positively charged black particles 26B and push negatively charged white particles away from the electrode contact surface and move them to the viewing surface, resulting in a relatively large number of negatively charged white particles 26W on the viewing surface, so as to provide white pixels on the viewing surface.

[0009] like Figure 2A As shown, and in conjunction with [see also] Figure 2B The common electrode layer 14 is typically electrically connected to ground potential (0V, i.e., Vcom potential) and sandwiched between it and the control electrode layer PEL, with an electrophoretic layer 20 between them. The control electrode PE of the control electrode layer PEL and the Vcom potential form a capacitor (electrophoretic capacitor Cp). Due to the relatively thick electrophoretic layer, this capacitor is very small, and the charge on the control electrode quickly interacts with the charged particles to reach equilibrium. The distance the charged particles travel is very small. To increase the energy of each drive, a storage capacitor must be added in the drive circuit layer 30a. One end of the storage capacitor is connected to the control electrode, and the other end forms a parallel-plane capacitor Cs on the conductor opposite the control electrode to the electrophoretic layer. Figure 2BThe equivalent circuit of the electrophoretic layer 20 is represented as an electrophoretic capacitor Cp connected in parallel with a resistor R (the energy consumed by the movement of the equivalent charged color particles), and also includes the aforementioned storage capacitor Cs. For example... Figure 2B As shown, the driving circuit layer 30a includes multiple thin-film transistors 32, and the gate metal Mg of each thin-film transistor 32 is electrically connected to the gate line GL, the source metal Ms is electrically connected to the data line DL, and the drain metal Md is electrically connected to the corresponding control electrode (also called pixel electrode) PE. Based on the potential applied to the gate metal Mg by the gate line GL, it can be determined whether the thin-film transistor 32 is on or off; thereby determining whether the voltage from the source metal Ms is transferred to the drain metal Md via the data line DL, and further transferred to the corresponding control electrode PE to charge the storage capacitor Cs to the same voltage as the data line. The control electrode PE also applies the voltage from the corresponding data line to the electrophoretic layer 20. In principle, the driving circuit layer includes multiple thin-film transistors, multiple gate lines, and multiple data lines. Each gate line is electrically connected to the gate of the multiple thin-film transistors, each data line is electrically connected to the drain or source of the multiple thin-film transistors, and multiple control electrodes, each of which is connected to the source or drain of a thin-film transistor.

[0010] The electrophoretic layer includes an electrophoretic material comprising several charged color particles disposed in a colloidal solution and capable of moving through the solution under the influence of an electric field. These charged color particles include positively charged and / or negatively charged particles. The charged color particles 26 move slowly within the colloidal solution 24 of the electrophoretic layer 20, which has appropriate viscosity, under the influence of the electric field. The driving circuit layer 30a first rapidly stores energy in a storage capacitor Cs, and then the storage capacitor Cs slowly releases the energy to the electrophoretic layer 20 via the control electrode PE as the energy source for the movement of the charged color particles 26. The larger the capacitance of the storage capacitor Cs, the more energy it can store, the fewer times it needs to be repeatedly stored, and the faster the screen update speed of the electrophoretic display 100. Therefore, the electrophoretic display 100 maximizes the area of ​​the storage capacitor Cs in its circuit layout design to increase the capacitance value. However, in systems with multi-colored charged particles, in order to precisely control the distance and direction of the movement of the charged particles, the capacitance value of the storage capacitor Cs is appropriately reduced to reduce the energy supply and increase the accuracy of controlling the distance of the charged particles. However, this requires more energy storage cycles, which comes at the cost of reducing the refresh rate of the electrophoretic display.

[0011] See Figure 2CThis is a cross-sectional view illustrating the formation method of the storage capacitor Cs in the prior art. As shown in the figure, the gate metal Mg of the thin-film transistor 32 and the first electrode CE1 of the storage capacitor Cs are typically fabricated together with the gate line GL during the fabrication of the first metal layer M1. Furthermore, the source metal Ms / drain metal Md of the thin-film transistor 32 and the second electrode CE2 of the storage capacitor Cs are fabricated together with the data line DL during the fabrication of the second metal layer M2. In the prior art, the first electrode CE1 for the storage capacitor Cs can be fabricated simultaneously during the fabrication of the first metal layer M1, the insulating layer CI for the storage capacitor Cs can be fabricated simultaneously during the fabrication of the gate insulating layer, and the second electrode CE2 for the storage capacitor Cs can be fabricated simultaneously during the fabrication of the second metal layer M2. Therefore, a structure like... Figure 2C The capacitor structure shown is a metal (first electrode CE1) - insulating layer (insulating layer CI) - metal (second electrode CE2). However, the gate metal Mg and source metal Ms / d drain metal Md must be made of metal to reduce impedance, which in turn requires the first metal layer M1 and the second metal layer M2 to also be made of metal. This imposes a limitation on the material selection of the first electrode CE1 / second electrode CE2 of the storage capacitor Cs in the known electrophoretic display 100, which in turn causes the storage capacitor Cs to block light, reducing the aperture ratio of the control substrate of the known electrophoretic display, that is, the overall aperture ratio of the control substrate end components (including the control substrate 10, the drive circuit layer 30a and the control electrode layer PEL).

[0012] Furthermore, known technologies suffer from drawbacks. They involve moving charged particles towards the viewing surface by pushing them away. The farther the particles are pushed, the weaker the driving force of the charge on the control electrode. Conversely, as more particles with opposite polarities to the control electrode are attracted to its surface, the electric field of the electrophoretic layer decreases, further weakening the driving force on the moving particles. Under these dual influences, the speed of charged particles moving towards the viewing surface decreases, requiring higher energy and more time to move them to the desired viewing position. This is the primary reason for the slow refresh rate of displays using known technologies.

[0013] Furthermore, charged particles moving towards the viewing surface will undergo lateral movement due to differences in voltage and polarity between different control electrodes. This phenomenon, known as particle diffusion, causes decreased contrast in black and white displays, resulting in blurred images and ghosting at edges. This problem is particularly severe in color displays, causing significant ghosting, reduced color saturation, and color distortion. This explains why electrophoretic displays, using known technology, cannot display true colors like LCDs and exhibit ghosting (different from the edge ghosting in black and white displays) when turning pages. Repeated uneven diffusion causes charged particles to move laterally over increasingly greater distances, resulting in uneven density of charged particles of different colors, degrading the display. When the display degrades to a certain extent, the monitor's lifespan ends.

[0014] When charged particles move toward the viewing surface, they attract charges on the common electrode, causing them to move closer and attract each other. This charge movement across the common electrode interferes with each other, pushing away particles with the same charge that were originally on the viewing surface, resulting in incorrect display. The constant changes in charge density at the positions corresponding to each control electrode on the common electrode also cause unwanted lateral movement of charged particles (particle diffusion), exacerbating the ghosting problem in color displays and affecting lifespan. Furthermore, the drive circuit switches the gate line voltage with extreme voltage differences, and the resulting pulsed collision waves can cause sudden charge movement on the common electrode layer connected to ground (GND), affecting the display.

[0015] The common electrode layer is the largest conductor area on the display, making it easily susceptible to static electricity, which can alter the image state. All these drawbacks have slowed the progress of color electrophoretic displays, necessitating a radical overhaul of the viewing surface, the source of the problem. Summary of the Invention

[0016] This invention discloses an electrophoretic display with micro-clamp gaps, the electrophoretic display comprising:

[0017] A control substrate having a first surface and a second surface;

[0018] A driving circuit layer is located on the second surface of the control substrate and includes a plurality of thin film transistors, a plurality of gate lines and a plurality of data lines. At least one of the gate lines is electrically connected to the gate of the plurality of thin film transistors, and at least one of the data lines is electrically connected to the drain or source of the plurality of thin film transistors.

[0019] A control electrode layer is located on a surface of the drive circuit layer away from the control substrate, and includes a plurality of control electrodes, at least one of which is electrically connected to the source or drain of a thin film transistor.

[0020] A substrate has a third surface and a fourth surface, wherein the third surface is opposite to the second surface;

[0021] A microcompartment structure is disposed between the opposing substrate and the control substrate. The microcompartment structure is made of polymer material and includes multiple compartment walls to define multiple tanks for filling electrophoretic materials. The two ends of these tanks are the bottom end and the top end of the tank, respectively.

[0022] Multiple micro-clamps, one of which is embedded in the top of the slot, and the micro-clamp has a gap of no more than 50 micrometers between it and the partition wall of the slot.

[0023] The electrophoretic material includes multiple charged color particles disposed in a colloidal solution and capable of moving through the colloidal solution under the influence of an electric field. The multiple charged color particles include positively charged color particles and / or negatively charged color particles.

[0024] In the production process of electrophoretic displays, filling microcups or encapsulating electronic ink within microcapsules is the part that has the greatest impact on yield. Since electronic ink is made by mixing a colloidal solution with charged color particles, the density and viscosity of the colloidal solution must be increased to achieve particle suspension. This results in gaps at the bottom because the colloidal solution, with its high surface tension, cannot completely fill the microcups or microcells during filling, leaving voids. These voids, where color particles cannot reach, cause image errors and quality degradation, which is a key factor in the poor yield of electronic paper production. The micro-clamps of this invention completely solve this problem. By using the volume of the colloidal solution embedded in the microcell, the volume of the colloidal solution is pressed into the microcell, filling the internal voids. The void problem can be solved by adjusting the thickness of the micro-clamps to determine the compressed volume, greatly contributing to improving production yield. Furthermore, the micro-clamps embedded in the micro-cells also prevent airflow. After the colloidal solution is filled in a vacuum, the perimeter of the panel can be bonded with frame adhesive instead of optical adhesive. Atmospheric pressure is used to uniformly and tightly press the two substrates with micro-cells and micro-clamps together. Even if there are defects in the frame adhesive and air leakage occurs, the air will be blocked by the micro-clamps and micro-cells, which will not affect the bonding force of the substrates. The reduced thickness of optical adhesive can reduce the distance between charged color particles and control electrodes, increase the image refresh rate, and reduce the driving voltage. All these benefits are built upon the ingenious design of these micro-clamps. Attached Figure Description

[0025] Figure 1A Show a cross-sectional view of a known black-and-white electrophoretic display.

[0026] Figure 1B Show a cross-sectional view of a known color electrophoretic display.

[0027] Figure 2A illustrate Figure 1A A schematic diagram of the operation of a known black and white electrophoretic display.

[0028] Figure 2B Illustrate the equivalent circuit diagram of the control electrode layer / drive circuit layer.

[0029] Figure 2C Explain the design method of the storage capacitor.

[0030] Figure 3A A cross-sectional view illustrating an embodiment of the electrophoretic display of the present invention.

[0031] Figure 3B This is a cross-sectional view of some components of an electrophoretic display according to an embodiment of the present invention.

[0032] Figure 3C For the corresponding Figure 3B The top view.

[0033] Figure 4A A partial component cross-sectional view illustrating an electrophoretic display according to another embodiment of the present invention.

[0034] Figure 4B For the corresponding Figure 4A The top view.

[0035] Figure 4C This is a top view of some components of an electrophoretic display according to another embodiment of the present invention.

[0036] Figure 5A A partial component cross-sectional view illustrating an electrophoretic display according to another embodiment of the present invention.

[0037] Figure 5B For the corresponding Figure 5A The top view.

[0038] Figure 5C A partial component cross-sectional view illustrating an electrophoretic display according to another embodiment of the present invention.

[0039] Figure 6A This is a diagram illustrating the structure of a known thin-film transistor.

[0040] Figure 6B This is a top view of a known thin-film transistor and other related components.

[0041] Figure 6C This is an embodiment of a thin-film transistor according to the present invention.

[0042] Figure 6D Examples of aperture ratios at different resolutions designed according to the present invention.

[0043] Figure 7A This is a cross-sectional view of a known color electrophoretic display.

[0044] Figure 7B This is a cross-sectional view of a color electrophoretic display according to an embodiment of the present invention.

[0045] Figure 7C for Figure 7B Partial sectional view.

[0046] Figure 8A This is a cross-sectional view of a color electrophoretic display according to an embodiment of the present invention.

[0047] Figure 8B for Figure 8A Partial sectional view.

[0048] Figure 9A The image shown is a schematic diagram of a color filter layer.

[0049] Figure 9B The image shown is another schematic diagram of the color filter layer.

[0050] Figure 10A This is a top view of a known electrophoretic display with microcup compartments and associated color filter layers.

[0051] Figure 10B This is a top view of a microcompartment according to an embodiment of the present invention.

[0052] Figure 10C This is another top view of a microcompartment according to an embodiment of the present invention.

[0053] Figure 10D This is a top view of a microcompartment according to another embodiment of the present invention.

[0054] Figures 11A to 11C This is a schematic diagram of the process for fabricating a microcompartment structure according to an embodiment of the present invention.

[0055] Figures 12A to 12C This is a schematic diagram of the process for fabricating a microcompartment structure according to another embodiment of the present invention.

[0056] Figures 13A to 13C This is a schematic diagram of the process for fabricating a microcompartment structure according to another embodiment of the present invention.

[0057] Figures 14A to 14C This is a schematic diagram of the process for fabricating a microcompartment structure according to another embodiment of the present invention.

[0058] Figure 14D This is a cross-sectional view of a microcompartment structure according to another embodiment of the present invention.

[0059] Figure 14E This is a cross-sectional view of a microcompartment structure according to another embodiment of the present invention.

[0060] Figure 14F This is a top view of a micro-clamp according to an embodiment of the present invention.

[0061] Figure 15A This is a partial top view of a transparent dual-color electrophoretic display fabricated according to the present invention.

[0062] Figures 15B to 15D A cross-sectional view of a transparent dual-color / color electrophoretic display fabricated according to the present invention.

[0063] Figure 16A-16D A cross-sectional view of a transparent double-sided electrophoretic display fabricated according to other embodiments of the present invention.

[0064] Figure 17A-17F This is a flowchart illustrating the fabrication process of the partition walls for micro-compartments.

[0065] Figure 18A This is a schematic diagram of a color filter layer according to an embodiment of the present invention.

[0066] Figure 18B To explain Figure 18A A diagram illustrating the operation.

[0067] Figure 19 This is a schematic diagram of an embedded touch screen in an electrophoretic display according to the present invention.

[0068] Figures 20A-20C This is a schematic diagram of an embodiment of the electrophoretic display with a double-sided control substrate of the present invention.

[0069] Explanation of symbols in the attached diagram:

[0070] 100: Electrophoretic display;

[0071] 10: Control board;

[0072] 10U: Second control board (upper control board);

[0073] 10D: First control board (lower control board);

[0074] 12: Relative to the substrate;

[0075] 13: Optical adhesive;

[0076] 14: Common electrode layer;

[0077] 15: Transparent protective layer;

[0078] 16: Top glass substrate;

[0079] 20,20a: Electrophoretic layer;

[0080] 22: Hollow cavity / microcup;

[0081] 24: Colloidal solution;

[0082] 26: Charged colored particles;

[0083] 26B: Charged black particles;

[0084] 26W: Charged white particles;

[0085] 26C: Charged cyan particles;

[0086] 26M: Charged magenta particles;

[0087] 26Y: Charged yellow particles;

[0088] 30, 30a: Driver circuit layer;

[0089] 30U: Second driving circuit layer (upper driving circuit layer);

[0090] 30D: First driving circuit layer (lower driving circuit layer);

[0091] PEL: Control Electrode Layer;

[0092] PE: Control electrode;

[0093] PELU: Second control electrode layer (upper control electrode layer);

[0094] PELD: First control electrode layer (lower control electrode layer);

[0095] PEU: Second control electrode;

[0096] PED: First control electrode;

[0097] PE1, PE2, PE3: Control electrodes;

[0098] CF: Color filter layer;

[0099] CF1, CF2, CF3, CFR, CFG, CFB, CFW: Filter color blocks;

[0100] CF-1: First color filter layer;

[0101] CF-2: Second color filter layer;

[0102] Vcom: Common voltage;

[0103] Cp: ​​Electrophoretic capacitor;

[0104] Cs: Storage capacitance;

[0105] R: Resistance;

[0106] 32: Thin-film transistor;

[0107] 320: Insulation layer;

[0108] 322: Doped layer;

[0109] 324: Insulating protective layer;

[0110] Mg: Gate metal;

[0111] Ms: Source metal;

[0112] Md: Drain metal;

[0113] M1: First metal layer;

[0114] M2: Second metal layer;

[0115] CE1: First electrode;

[0116] CE2: Second electrode;

[0117] CI: Insulating layer;

[0118] V1, V2: Through holes;

[0119] ITO1: First transparent conductive layer;

[0120] ITO2: Second transparent conductive layer;

[0121] ITO3: Third transparent conductive layer;

[0122] PLN: Planarization layer;

[0123] AS: Semiconductor Division;

[0124] GL: Gate line;

[0125] DL: Data cable;

[0126] GLITO: Transparent conductive gate wire;

[0127] DLITO: Transparent conductive data cable;

[0128] BM: Light-shielding layer;

[0129] L1, L2 incident light;

[0130] Ve: Common voltage line;

[0131] 50: Micro-compartment structure;

[0132] 52: Partition wall;

[0133] 54: Tank;

[0134] 56: Gap;

[0135] D: Length;

[0136] 60: Micro-clamp;

[0137] VCL: Common Voltage Layer;

[0138] L: Gate channel length;

[0139] W: Gate channel width;

[0140] W1, W2: Width;

[0141] PRA: First residual photoresist (first polymer material stack);

[0142] PRB: Second residual photoresist (second polymer material stack);

[0143] PR1: First layer of photoresist;

[0144] PR2: Second layer of photoresist;

[0145] PM: Light mask;

[0146] H: Hole;

[0147] Tx1, Tx2, TxN: Touch emission electrodes;

[0148] Rx1, Rxn, RxM: Touch receiving electrodes;

[0149] 200: Display Touch Integrated Driver (Display Driver);

[0150] S: gap;

[0151] T: Partition wall thickness;

[0152] H1: Compartment wall height (micro-compartment structure thickness). Detailed Implementation

[0153] For a detailed description and technical content of the present invention, please refer to the following detailed description and accompanying drawings. However, it should be understood that the following figures are merely illustrative of various embodiments of the invention, and some components are shown in a manner easily understood, not to represent actual component dimensions.

[0154] As used herein, the terms "above" and "on" can refer to the relative position of a component with respect to other components or the sequence of manufacturing processes. For example, "component A is on top of component B" or "component A is above component B" does not mean that component A and component B are in direct contact; there may be other components between component A and component B. Furthermore, "component A is on top of component B" or "component A is above component B" indicates the order of manufacturing processes; the manufacturing process of component B precedes that of component A, and there may be other components between component A and component B. Moreover, the terms "above" and "below" are used merely for ease of illustration and do not represent the specific location of the invention during use.

[0155] As used herein, the term "between" can refer to a relative position of a component with respect to other components or a sequential order in the manufacturing process. For example, "component A between components B and C" does not mean that component A is in direct contact with components B and C; there may be other components between component A and components B and C. Furthermore, "component A between components B and C" indicates the order of their manufacture; the manufacturing process of component B precedes that of component A, or vice versa. There may be other components between component A and component B, or between component A and component C. Moreover, the terms "between" are used merely for ease of illustration and do not represent the intended location of the component in use.

[0156] 1. High aperture ratio electrophoretic display

[0157] To achieve a viewing surface on the control substrate, the key is to increase the aperture ratio of the control substrate. Aperture ratio refers to the ratio between the area of ​​the display area through which light can pass after removing all opaque areas (such as the metal electrodes of thin-film transistors) and the total area of ​​the display area. Since the display area is typically composed of display pixels, it is also equivalent to expressing the ratio of the area within a single display pixel that can transmit light to the area of ​​that pixel. Known technologies use a metal layer as a storage capacitor in its driving circuit layer 30a, resulting in an aperture ratio of less than 20% within each pixel. Therefore, it is impossible to move the viewing surface to the same side as the control substrate. This invention increases the aperture ratio to at least 70%, preferably at least 80%, and most preferably at least 90%. The key to increasing the aperture ratio is first to partially replace the non-transparent storage capacitor electrodes with transparent conductive materials; secondly, to reduce the area of ​​the thin-film transistor (TFT); and finally, to limit the linewidth of the gate and data lines to achieve the high aperture ratio requirement.

[0158] See Figure 3AThe diagram illustrates a cross-sectional view of an electrophoretic display 100 according to an embodiment of the present invention. This electrophoretic display 100 is, for example, a monochrome electrophoretic display 100, and includes, from top to bottom, a substrate 12 (e.g., a plastic substrate, a glass substrate, or a metal substrate), a common electrode layer 14 (e.g., a transparent conductive electrode layer, an opaque conductive metal layer, or other conductive material), an electrophoretic layer 20, a control electrode layer PEL containing multiple transparent control electrodes PE, a high aperture ratio driving circuit layer 30 (hereinafter referred to as the driving circuit layer 30), and a control substrate 10 (e.g., a glass substrate, a transparent PI substrate, or other substrate material with a light transmittance greater than 90%). The common electrode layer may be omitted under specific supporting measures. Figure 3A As shown, the electrophoretic layer 20 includes multiple hollow cavities 22 (only one is shown in the figure), and a colloidal solution 24 filled in each hollow cavity 22 contains multiple charged colored particles (e.g., charged black particles 26B and charged white particles 26W). The hollow cavity 22 structure serves as a container for electronic ink. According to one embodiment of the present invention, the material of the first electrode CE1 / second electrode CE2 of the storage capacitor Cs in the high aperture ratio driving circuit layer 30 is a transparent conductive material or partially transparent material, so as to increase the aperture ratio of this electrophoretic display 100. In addition, it is more helpful for users to view this electrophoretic display 100 from the control substrate 10 side, so as to attract charged black particles 26B or charged white particles 26W from the control electrode layer PEL near the viewing side, thereby achieving the purpose of solving the above-mentioned disadvantages of the known technology. According to other embodiments of the present invention (not shown), the hollow cavity 22 may also be filled with a colloidal solution 24, which contains a colored fluid (e.g., black) and multiple charged particles of a single color (e.g., white particles). When the control electrode layer PEL attracts the charged color particle, the color of the particle (e.g., white) is displayed on the viewing surface; when the control electrode layer PEL repels the charged color particle, the color of the fluid (e.g., black) is displayed on the viewing surface. It can be defined that the electrophoretic layer includes an electrophoretic material comprising a plurality of charged color particles disposed in a colloidal solution and capable of moving through the colloidal solution under the influence of an electric field, the plurality of charged color particles including positively charged color particles and / or negatively charged color particles.

[0159] See Figure 3B This is a partial component cross-sectional view of an electrophoretic display 100 according to an embodiment of the present invention, mainly showing the control electrode layer PEL, the driving circuit layer 30, and the control substrate 10 according to the present invention. See also Figure 3C , for the corresponding Figure 3BThe top view. According to an embodiment of the present invention, the viewing surface is viewed from the direction close to the control substrate 10 of the control electrode layer PEL. Therefore, the displayed color is the color of the charged color particles in the colloidal solution 24 attracted by the potential of each control electrode PE of the control electrode layers PEL. See also: [Compatibility details omitted]. Figure 1A and Figure 3A ,exist Figure 1AIn the known electrophoretic display 100 shown, the electrical properties and voltage of each control electrode PE are controlled by the driving circuit layer 30a. This allows for the attraction of charged black particles 26B and the repulsion of charged white particles 26W for each pixel (making the pixel appear white on the viewing surface opposite to the control electrode layer PEL), or the attraction of charged white particles 26W and the repulsion of charged black particles 26B for each pixel (making the pixel appear black on the viewing surface opposite to the control electrode layer PEL). Since the viewing surface is located relatively far from the control electrode layer PEL on the opposite substrate 12, and the electric field weakens the further away from the control electrode layer PEL, the weaker the force repelling the charged color particles 26B becomes, resulting in various defects in the screen of the known electrophoretic display 100. In contrast, in the electrophoretic display 100 of the present invention, the driving circuit layer 30 is close to the viewing surface (located on the control substrate 10 side). By controlling the electrical properties and voltage of each control electrode PE through the driving circuit layer 30, each pixel can either attract charged black particles 26B and repel charged white particles 26W (making the pixel appear black on the viewing side close to the control electrode layer PEL), or attract charged white particles 26W and repel charged black particles 26B (making the pixel appear white on the viewing side close to the control electrode layer PEL). In other words, the multiple control electrodes PE on the control electrode layer PEL attract charged color particles (such as charged black particles 26B or charged white particles 26W) with opposite polarities to the control electrodes PE and accumulate on the side of the electrophoretic layer 20 close to the control electrode layer PEL (which contains multiple control electrodes PE).Since the viewing surface is relatively close to the control substrate 10 side of the control electrode layer PEL, and the closer to the control electrode layer PEL, the stronger the electric field, the stronger the attraction force on the charged color particles 26. The charged particles 26 near the electrode layer can be firmly locked. In this way, the electrophoretic display 100 of the present invention can achieve excellent screen refresh rate, brightness, contrast, saturation and other advantages. Moreover, since the charge on the control electrode does not move when the thin film transistor 32 is not conducting, it is in a locked state. Therefore, the charged color particles 26 can be stably attracted, unlike known technologies where the charged color particles 26 move with the movement of the charge on the common electrode (voltage kickback problem, caused by the discharge of the storage capacitor and flow to the common electrode). The charge on the electrode layer, for example, when the common electrode presents mostly white particles with a white background and black text, it means that a large proportion of positive charge is condensed on the surface of the common electrode. This is not conducive to the approach of positively charged black particles, and the black particles will be forced back to the control electrode side, commonly known as voltage kickback, which makes the original black text thinner or disappear. The greater the difference between the black and white ratio on the screen, the more serious the problem (or it will cause color distortion in color display). Moreover, the moved particles will not return to their original positions, causing the image on the viewing surface to be distorted. Using the solution of this invention, there will be no phenomenon of charged color particles 26 moving, spreading and being forced back (color mixing problem, saturation reduction problem) or the inability to move to the new correct position when the screen is updated (ghosting problem).

[0160] Furthermore, the present invention provides an improved design for the drive circuit layer 30 to increase the aperture ratio when viewed from the control substrate 10. For example... Figure 3B As shown, according to one embodiment of the present invention, the first electrode CE1 of the storage capacitor Cs is made of a transparent conductive material, such as indium tin oxide (ITO) or a similar transparent conductive material. Furthermore, the second electrode CE2 of the storage capacitor Cs is also made of a transparent conductive material, such as indium tin oxide (ITO) or a similar transparent conductive material. The insulating layer CI of the storage capacitor Cs can be fabricated simultaneously with the step of fabricating the gate insulating layer (see below for details).

[0161] See compound combination Figure 3CThe topmost control electrode (also known as the pixel electrode) PE is also made of a transparent conductive material, such as indium tin oxide (ITO) or a similar transparent conductive material, and is electrically connected to the first transparent conductive layer ITO1 (first electrode CE1) of the storage capacitor Cs via a via V1; furthermore, the control electrode PE is also electrically connected to the drain metal Md via a via V2. When fabricating the storage capacitor Cs according to the present invention, the corresponding metal layer portion (corresponding to the electrode portion of the storage capacitor Cs) of the original first metal layer M1 in the prior art is replaced by the first transparent conductive layer ITO1 made of a transparent conductive material (e.g., ITO). According to one embodiment of the present invention, the first metal layer M1 can be fabricated first, followed by the first transparent conductive layer ITO1, or vice versa. Basically, there can be no insulating layer between the first metal layer M1 and the first transparent conductive layer ITO1; of course, adding an insulating layer between the first metal layer M1 and the first transparent conductive layer ITO1 does not change the function.

[0162] Furthermore, the corresponding metal portion of the original second metal layer M2 in the known technology is replaced by a second transparent conductive layer ITO2 made of a transparent conductive material (e.g., ITO). The second transparent conductive layer ITO2, viewed from the projection direction, is located between the control electrode PE and the first transparent conductive layer ITO1 and is electrically connected to a common voltage Vcom or a DC voltage source such as 0V. Moreover, according to one embodiment of the present invention, the second metal layer M2 can be fabricated first, followed by the second transparent conductive layer ITO2, or vice versa. Essentially, there may be no insulating layer between the second metal layer M2 and the second transparent conductive layer ITO2; however, adding an insulating layer between the second metal layer M2 and the second transparent conductive layer ITO2 does not change the functional difference.

[0163] As disclosed above, by Figures 3A to 3C The disclosed electrophoretic display 100, because the two electrodes of the storage capacitor Cs are respectively made of a first transparent conductive layer ITO1 and a second transparent conductive layer ITO2, and the spacing between the first transparent conductive layer ITO1 and the second transparent conductive layer ITO2 is extremely small (the thickness of the insulating layer CI is approximately between 0.1 micrometers and 0.5 micrometers), can increase the capacitance value of the storage capacitor Cs. Furthermore, because the first transparent conductive layer ITO1, the second transparent conductive layer ITO2, and the control electrode do not block light, it helps to improve the aperture ratio of the control substrate when the electrophoretic display 100 is viewed from the control substrate 10.

[0164] See compound combination Figures 3A to 3CAccording to the present invention, when fabricating the electrophoretic display 100, for the control substrate 10 side portion, a metal thin film can first be fabricated on the upper surface of the control substrate 10 using a deposition or sputtering process, and a first metal layer M1 can be fabricated using a lithography process. This first metal layer M1 is used to form the gate metal Mg and the gate line GL. Subsequently, a transparent conductive material thin film is fabricated using a sputtering process, and a first transparent conductive layer ITO1 is fabricated using a lithography process. The two steps described above can also be interchanged, that is, the first transparent conductive layer ITO1 is formed first, and then the first metal layer M1 is formed. Subsequently, a capacitor insulating layer CI (e.g., SiNx, SiO2) for the storage capacitor Cs and an a-Si layer AS are deposited, and the semiconductor portion of the thin-film transistor is defined using a lithography process. Subsequently, a metal thin film is fabricated on the obtained structure using a deposition or sputtering process, and a second metal layer M2 is fabricated using a lithography process. This second metal layer M2 is used to form the source metal Ms, the drain metal Md, and the data line DL. Then, a transparent conductive material thin film is fabricated using a sputtering process, and a second transparent conductive layer ITO2 is fabricated using a lithography process. The two steps described above can also be interchanged, i.e., the second transparent conductive layer ITO2 is formed first, followed by the second metal layer M2. Subsequently, a planarization layer PLN is fabricated on the obtained structure using a coating and lithography process, and then a control electrode PE (i.e., the third transparent conductive layer ITO3) is fabricated using a sputtering process to form a transparent conductive material thin film and a lithography process. Subsequently, an electrophoretic layer 20 can be attached to or fabricated on the control electrode layer PEL (containing a hollow cavity 22). This hollow cavity 22 is formed by creating a resin film on a multi-molecular substrate, pressing indentations into the resin film using a roller to create the hollow cavity 22 structure, and then hardening it. The hollow cavity 22 structure serves as a container for electronic ink. A colloidal solution 24 containing charged color particles 26 is then injected into the hollow cavity 22 structure, and finally sealed with adhesive to harden it into a sealed cavity, forming the electrophoretic layer 20. For detailed fabrication procedures, please refer to Taiwan Patent Application No. 93100767, or use the micro-segment structure of this invention, which will be detailed later. Then, the opposing substrate 12 portion is fabricated. A common electrode layer 14 can be formed on the opposing substrate 12, or the common electrode layer 14 can be omitted from the opposing substrate 12. Finally, the control substrate 10 with the electrophoretic layer 20 on one side is bonded to the opposite substrate 12 with optical adhesive or with frame adhesive using the micro-clamp structure of the present invention (detailed below). The above-mentioned deposition process (CVD, PECVD), sputter deposition process, coating process, and insulating layer fabrication are all mature processes commonly used in display panels, which can produce the electrophoretic display 100 of the present invention with many advantages such as high aperture ratio and high screen refresh rate.

[0165] In practice, electronic paper manufacturers first form a common electrode layer 14 on the aforementioned substrate 12 and then bond a microcup film containing electronic ink to form electronic paper. Module manufacturers can also complete the electrophoretic display 100 by bonding the prepared control substrate 10 to the electronic paper. However, since the microcup is formed by pressing indentations into the resin, the electronic paper is structurally very fragile, resulting in a low yield during production and thus increasing costs. The micro-cell structure in this invention can significantly improve this problem.

[0166] See Figure 4A This is a partial component cross-sectional view illustrating an electrophoretic display 100 according to another embodiment of the present invention, mainly showing the control electrode layer PEL, the drive circuit layer 30, and the control substrate 10 according to the present invention. See also Figure 4B , for the corresponding Figure 4A The top view. In addition, Figure 4A and 4B The control electrode layer PEL, drive circuit layer 30, and control substrate 10 shown can also be used Figure 3A In the architecture shown, the viewing surface is viewed from the control substrate 10, which is close to the control electrode layer PEL. Therefore, its image display principle utilizes the potential of the control electrode layer PEL to attract rather than repel charged color particles 26 in the colloidal solution 24, achieving better display effects and higher screen refresh rates, among other advantages. Furthermore, this invention provides an improved design for the driving circuit layer 30 to enhance the aperture ratio and light transmittance when viewed from the control substrate 10. Figure 4A The disclosed embodiments are similar. Figure 3A The disclosed embodiments, however Figure 4A The control electrode (also known as the pixel electrode) PE also serves as... Figure 3B The role of the first electrode CE1 in the first transparent conductive layer ITO1, and in Figure 4A The second electrode CE2 is fabricated in the first transparent conductive layer ITO1, which is a replacement for Figure 3B The second electrode CE2, located in the second transparent conductive layer ITO2, plays a role. In other words, in Figure 4A and 4BIn the illustrated embodiment, the first electrode CE1 (control electrode PE) and the second electrode CE2 (electrically connected to a common voltage Vcom or a DC voltage such as 0V) of the storage capacitor Cs are provided by the control electrode PE and the first transparent conductive layer ITO1, respectively, formed of a transparent conductive material. The insulating layer of the storage capacitor Cs can be fabricated simultaneously with the step of fabricating the gate insulating layer. The control electrode PE, viewed from the projection direction, is on top of the first transparent conductive layer ITO1. Furthermore, the common voltage line Ve of the first transparent conductive layer ITO1 (the second electrode CE2 of the storage capacitor Cs) also extends in the same direction as the gate line GL of the first metal layer M1 (i.e., the common voltage line Ve is electrically connected to the first transparent conductive layer ITO1 and is substantially parallel to a gate line GL of the driving circuit layer 30).

[0167] Similarly, in Figure 4A and 4B In the illustrated embodiment, because the first electrode CE1 and the second electrode CE2 of the storage capacitor Cs are both formed of transparent conductive material, the aperture ratio of the electrophoretic display 100 can be increased. Furthermore, in this embodiment, the control electrode PE, directly formed of transparent conductive material, also serves as the first electrode CE1 of the storage capacitor Cs. This simplifies the structure and reduces the manufacturing process. In addition, Figure 4A and 4B The illustrated embodiments can also be applied to Figure 3A The architecture, that is, the viewing surface is on the control substrate 10 side. Figure 4A and 4B The disclosed control electrode layer PEL, drive circuit layer 30, and control substrate 10 are applied to Figure 3A In terms of architecture, the driving circuit layer 30 can be positioned closer to the viewing surface (located on the control substrate 10 side), giving the electrophoretic display 100 of this invention excellent display effects and a high screen refresh rate, among other innovative features. Furthermore, due to... Figure 4A Stack ratio Figure 3B The stacked layers have one less transparent conductive layer, thus providing better light transmittance.

[0168] See compound combination Figure 4A and 4BIn fabricating the electrophoretic display 100, for the control substrate 10 side, a metal thin film can first be fabricated on the upper surface of the control substrate 10 using a deposition or sputtering process, followed by a photolithography process to fabricate a first metal layer M1. This first metal layer M1 is used to form the gate metal Mg and the gate line GL. Subsequently, a transparent conductive material thin film is fabricated using a sputtering process, followed by a photolithography process to fabricate a first transparent conductive layer ITO1 and a common voltage line Ve. The two steps described above can also be interchanged, i.e., the first transparent conductive layer ITO1 is formed first, followed by the first metal layer M1. Subsequently, a capacitor insulating layer CI (e.g., SiNx, SiO2) and an a-Si layer AS are deposited, and the semiconductor portion of the thin-film transistor is defined using a photolithography process. Subsequently, a metal thin film is fabricated on the obtained structure using a deposition or sputtering process, followed by a lithography process to create a second metal layer M2. This second metal layer M2 forms the source metal Ms, drain metal Md, and data line DL. A transparent conductive material thin film is then fabricated using a sputtering process, followed by a lithography process to create the control electrode layer PEL (ITO2). Alternatively, the two steps can be interchanged, i.e., the control electrode layer PEL (ITO2) can be formed first, followed by the second metal layer M2, as long as there is partial overlap between the control electrode layer PEL (ITO2) and the drain metal Md in the second metal layer M2 to achieve electrical connection. Finally, a planarization layer PLN is fabricated on the obtained structure using a coating and lithography process. Subsequently, an electrophoretic layer 20 can be laminated or fabricated on the planarization layer PLN (containing a hollow cavity 22, which is formed by forming a resin film on a plastic substrate and using a roller to press indentations into the resin film to create the hollow cavity 22 structure, which serves as a container for electronic ink; then, a colloidal solution 24 containing charged color particles 26 is injected into the hollow cavity 22 structure, and then sealed with adhesive to form a sealed cavity, thus forming the electrophoretic layer 20. For detailed fabrication process, please refer to Taiwan Patent Application No. 93100767, or use the micro-segment structure of this invention, which will be detailed later). Then, the portion opposite the substrate 12 is fabricated. A common electrode layer 14 can be formed on the opposite substrate 12, or the common electrode layer 14 can be omitted from the opposite substrate 12. Finally, the control substrate 10 with the electrophoretic layer 20 on one side is bonded to the opposite side of the substrate 12 with optical adhesive or with frame adhesive using the micro-clamp structure of the present invention (detailed below). The above-mentioned deposition process (CVD, PECVD), sputter deposition process, and coating process are all mature processes commonly used in display panels, which can be used to manufacture the electrophoretic display 100 of the present invention with a high aperture ratio and high screen refresh rate and other innovative features.

[0169] See Figure 4CThis is a top view of some components of an electrophoretic display 100 according to another embodiment of the present invention, mainly showing the control electrode layer PEL and the drive circuit layer 30 according to the present invention. This embodiment is similar. Figure 4A and 4B In the illustrated embodiment, the gate line GL portion, originally fabricated by the first metal layer M1, is replaced with a first transparent conductive layer ITO1 to form a transparent conductive gate line GLITO, while the data line DL portion of the second metal layer M2 is replaced with a second transparent conductive layer, namely the control electrode layer PEL (ITO2), to form a transparent conductive data line DLITO. In other words, the fabrication process of the first metal layer M1 mainly forms the gate metal Mg of the thin-film transistor, while the fabrication process of the second metal layer M2 mainly forms the source metal Ms / dulge metal Md of the thin-film transistor. The first electrode CE1 of the storage capacitor Cs is provided by the control electrode PE, while the second electrode CE2 of the storage capacitor Cs is provided by the first transparent conductive layer ITO1. Similarly, since the gate line portion of the first metal layer M1 is replaced with the first transparent conductive layer ITO1, the common voltage line Ve, which is used by the first transparent conductive layer ITO1 to apply the common voltage Vcom, also extends in the same direction as the transparent conductive gate line GLITO (that is, the common voltage line Ve and the transparent conductive gate line GLITO are approximately parallel). Therefore, replacing the metal gate line GL with the transparent conductive material GLITO and replacing the metal data line DL with the transparent conductive material DLITO, either simultaneously or only one of these replacements, falls within the scope of this invention. Furthermore, the gate line GL can also be partially replaced with the first transparent conductive layer ITO1, while the remaining portion is still made with the first metal layer M1; and the data line DL can also be partially replaced with the second transparent conductive layer ITO2, while the remaining portion is still made with the second metal layer M2, all of which are within the scope of this invention.

[0170] Similarly, in Figure 4C In the illustrated embodiment, since the first electrode CE1 and the second electrode CE2 of the storage capacitor Cs are both formed of transparent conductive material, and the transparent conductive gate line GLITO and the transparent conductive data line DLITO are both formed of transparent conductive material, or at least partially of either, are formed of transparent conductive material, this is within the scope of the present invention, increasing the aperture ratio of the electrophoretic display 100. Furthermore, the first electrode CE1 of the storage capacitor Cs must be electrically connected to the control electrode PE in operation; however, in this embodiment, the control electrode PE, formed of transparent conductive material, is directly used as the first electrode CE1 of the storage capacitor Cs. This simplifies the structure and further reduces the manufacturing process. In addition, Figure 4C The illustrated embodiments can also be applied to Figure 3A The architecture, that is, the viewing surface is on the control substrate 10 side, therefore, in the... Figure 4C The disclosed control electrode layer PEL, drive circuit layer 30, and control substrate 10 are applied to Figure 3A In terms of architecture, the driving circuit layer 30 can also be positioned close to the viewing surface (located on the control substrate 10 side), thereby enabling the electrophoretic display 100 of this invention to possess excellent display effects and multiple innovative features such as a high screen refresh rate and reflectivity. Furthermore, Figure 4C The manufacturing process of the structure shown is similar to Figure 4A and 4B The manufacturing process of the structure shown, but in Figure 4A and 4B In the first metal layer M1 process, the gate line is not fabricated. Instead, in the first transparent conductive layer ITO1 process, both the transparent conductive gate line GLITO and the common voltage line Ve are fabricated simultaneously. Furthermore, in Figure 4A and 4B In the process of fabricating the second metal layer M2, the data lines are not fabricated. Instead, in the process of fabricating the second transparent conductive layer ITO2, the transparent conductive data lines DLITO are fabricated simultaneously. By using transparent conductive materials for the gate lines and data lines, the aperture ratio of the control substrate 10 can be further increased to over 90%.

[0171] See Figure 5A This is a partial component cross-sectional view illustrating another embodiment of the electrophoretic display 100 according to the present invention, mainly showing another implementation of the control electrode layer PEL, the driving circuit layer 30, and the control substrate 10 according to the present invention. See also Figure 5B , for the corresponding Figure 5A The top view. In addition, Figure 5A and 5B The control electrode layer PEL, drive circuit layer 30, and control substrate 10 shown can also be used Figure 3A In the architecture shown, the viewing surface is viewed from the control substrate 10, which is close to the control electrode layer PEL. Therefore, its image display principle utilizes the potential of the control electrode layer PEL to attract rather than repel charged color particles in the colloidal solution 24, thereby achieving better display effects and higher screen refresh rates, among other advantages. Furthermore, this invention provides an improved design for the driving circuit layer 30 to increase the aperture ratio when viewed from the control substrate 10.

[0172] like Figure 5A As shown, this embodiment is similar. Figure 4A In this embodiment, the control electrode PE and the first transparent conductive layer ITO1 are both fabricated on the second metal layer M2. Similarly, the first electrode CE1 of the storage capacitor Cs is provided by the control electrode PE, while the second electrode CE2 of the storage capacitor Cs is provided by the first transparent conductive layer ITO1. Furthermore, since the control electrode PE and the first transparent conductive layer ITO1 are both fabricated on the planarization layer PLN, they do not require fabrication processes involving the first metal layer M1 and the second metal layer M2. This embodiment, compared to... Figure 4AIn this embodiment, the flexibility of the manufacturing process is increased, and the planarization layer PLN can also be omitted. The first transparent conductive layer ITO1 is fabricated on the second metal layer M2, or the second metal layer M2 is fabricated on the first transparent conductive layer ITO1 (this will be discussed later). Figure 5C (Explanation). Furthermore, such as Figure 5B As shown, a portion of the first transparent conductive layer ITO1 extends in the same direction as the data line DL to form a common voltage line Ve that receives the common voltage Vcom (i.e., the common voltage line Ve is approximately parallel to the data line DL).

[0173] Similarly, in Figure 5A and 5B In the illustrated embodiment, because the first electrode CE1 and the second electrode CE2 of the storage capacitor Cs are formed of transparent conductive material, the aperture ratio of the control substrate 10 in the electrophoretic display 100 can be increased. Furthermore, the first electrode CE1 of the storage capacitor Cs must be electrically connected to the control electrode PE in operation; however, in this embodiment, the control electrode PE, formed of transparent conductive material, is directly used as the first electrode CE1 of the storage capacitor Cs. This simplifies the structure and further reduces the manufacturing process. In addition, Figure 5A and 5B The illustrated embodiments can also be applied to Figure 3A The architecture, that is, the viewing surface is on the control substrate 10 side, therefore, in the... Figure 5A and 5B The control electrode layer PEL, drive circuit layer 30, and control substrate 10 disclosed herein are applied to Figure 3A In terms of architecture, the driving circuit layer 30 can also be positioned close to the viewing surface (located on the control substrate 10 side), thereby enabling the electrophoretic display 100 of the present invention to have excellent display effects and a high screen refresh rate, among other creative features.

[0174] also, Figure 5A and 5BThe fabrication method of the illustrated embodiment, for the control substrate 10 side portion, involves first fabricating a metal thin film on the upper surface of the control substrate 10 using a deposition or sputtering process and then fabricating a first metal layer M1 using a photolithography process. This first metal layer M1 forms the gate metal Mg and the gate line GL. Subsequently, an insulating layer (e.g., SiNx) and an a-Si layer AS are deposited, and the semiconductor layer of the thin-film transistor is defined using a photolithography process. Then, a second metal layer M2 is fabricated on the resulting structure using a deposition or sputtering process and a photolithography process. This second metal layer M2 forms the source metal Ms, the drain metal Md, and the data line DL. Finally, a planarization layer PLN and a via VIA are fabricated on the resulting structure using a coating and photolithography process. Subsequently, a transparent conductive material thin film is fabricated using a sputtering process, and a first transparent conductive layer ITO1 is fabricated using a lithography process to serve as the second electrode CE2 of the storage capacitor Cs. An insulating material is deposited, and a capacitor insulating layer CI of the storage capacitor Cs is fabricated using a lithography process. A transparent conductive material thin film (second transparent conductive layer ITO2) is fabricated using a sputtering process, and a control electrode PE of the control electrode layer PEL is fabricated using a lithography process to serve as the first electrode CE1 of the storage capacitor Cs. An insulating protective layer is then fabricated. An electrophoretic layer 20 can then be laminated or fabricated (for example, a hollow cavity 22 is formed by forming a resin film on a plastic substrate and using a roller to press indentations into the resin film to create the hollow cavity 22 structure, which serves as a container for electronic ink. A colloidal solution 24 containing charged color particles 26 is then injected into the hollow cavity 22 structure, and the cavity is sealed with adhesive to form a sealed cavity, thus creating the electrophoretic layer 20. For detailed fabrication processes, please refer to Taiwan Patent Application No. 93100767). Subsequently, the portion opposite the substrate 12 is fabricated, and a common electrode layer 14 and an insulating layer are formed on the opposite substrate 12. Finally, the side of the control substrate 10 with the electrophoretic layer 20 and the side of the opposite substrate 12 with the common electrode and insulating layer are bonded together with optical adhesive. The above-mentioned deposition process (CVD, PECVD), sputter deposition process, and coating process are all mature processes commonly used in display panels, which can be used to fabricate the electrophoretic display 100 of the present invention, which has multiple creative features such as high aperture ratio and high screen refresh rate.

[0175] See Figure 5C The following is a partial component cross-sectional view of an electrophoretic display 100 according to another embodiment of the present invention, mainly showing another implementation of the control electrode layer PEL, the drive circuit layer 30 and the control substrate 10 according to the present invention. Figure 5C The control electrode layer PEL, drive circuit layer 30, and control substrate 10 shown can also be used Figure 3AIn the architecture shown, the viewing surface is viewed from the control substrate 10, which is close to the control electrode layer PEL. Therefore, its image display principle utilizes the potential of the control electrode layer PEL to attract rather than repel charged color particles in the colloidal solution 24, thereby achieving better display effects and higher screen refresh rates, among other advantages. Furthermore, this invention provides an improved design for the driving circuit layer 30 to increase the aperture ratio when viewed from the control substrate 10.

[0176] like Figure 5C As shown, this embodiment is similar. Figure 5A In this embodiment, the first electrode CE1 of the storage capacitor Cs is provided by the control electrode PE, and the second electrode CE2 of the storage capacitor Cs is provided by the first transparent conductive layer ITO1. However, the control electrode PE and the first transparent conductive layer ITO1 are not fabricated on the planarization layer PLN. Because the first electrode CE1 and the second electrode CE2 of the storage capacitor Cs are formed of transparent conductive materials, the aperture ratio of the control substrate 10 in the electrophoretic display 100 can be increased. Furthermore, the first electrode CE1 of the storage capacitor Cs must be electrically connected to the control electrode PE in operation, and in this embodiment, the control electrode PE, formed of transparent conductive material, is directly used as the first electrode CE1 of the storage capacitor Cs. This simplifies the structure and further reduces the manufacturing process. In addition, Figure 5C The illustrated embodiments can also be applied to Figure 3A The architecture, that is, the viewing surface is on the control substrate 10 side, therefore, in the... Figure 5C The control electrode layer PEL, drive circuit layer 30, and control substrate 10 disclosed herein are applied to Figure 3A In terms of architecture, the driving circuit layer 30 can also be positioned close to the viewing surface (located on the control substrate 10 side), thereby enabling the electrophoretic display 100 of the present invention to have excellent display effects and a high screen refresh rate, among other creative features.

[0177] also, Figure 5CThe fabrication method of the illustrated embodiment, for the control substrate 10 side, involves first fabricating a metal thin film on the upper surface of the control substrate 10 using a deposition or sputtering process, followed by a lithography process to form a first metal layer M1. This first metal layer M1 forms the gate metal Mg and the gate line GL. Subsequently, an insulating layer (e.g., SiNx) and an a-Si layer AS are deposited, and the semiconductor layer of the thin-film transistor is defined using a lithography process. Then, a metal thin film is fabricated on the resulting structure using a deposition or sputtering process, followed by a lithography process to form a second metal layer M2. This second metal layer M2 forms the source metal Ms, the drain metal Md, and the data line DL. Subsequently, a transparent conductive material thin film is fabricated using a sputtering process, followed by a lithography process to form a first transparent conductive layer ITO1 and a common voltage line Ve. The two steps described above can also be interchanged, i.e., the first transparent conductive layer ITO1 is formed first, followed by the second metal layer M2. Essentially, the first transparent conductive layer ITO1 and the second metal layer M2 are on the same layer or located close in height. Subsequently, an insulating layer is deposited, and the insulating layer CI for storing capacitor Cs is defined using a photolithography process. Then, a transparent conductive material film is fabricated using a sputtering process, followed by a photolithography process to fabricate the control electrode layer PEL (ITO2). Optionally, a planarization layer PLN or an insulating layer can be fabricated on the resulting structure using a coating process and a photolithography process. Afterwards, an electrophoretic layer 20 is laminated or fabricated (containing a hollow cavity 22, which is formed by forming a resin film on a plastic substrate and using a roller to press indentations into the resin film to create the hollow cavity 22 structure, which serves as a container for electronic ink. A colloidal solution 24 containing charged color particles 26 is then injected into the hollow cavity 22 structure, and the cavity is sealed with adhesive to form a sealed cavity, thus creating the electrophoretic layer 20. For detailed fabrication processes, please refer to Taiwan Patent Application No. 93100767, or use the micro-segment structure of this invention, which will be detailed later). Subsequently, the portion facing the substrate 12 is fabricated. A common electrode layer 14 may or may not be formed on the facing substrate 12. Finally, the side of the control substrate 10 with the electrophoretic layer 20 is bonded to the side of the facing substrate 12 using optical adhesive or using frame adhesive with the micro-clamp structure of the present invention (detailed below). The aforementioned deposition processes (CVD, PECVD), sputter deposition, and coating processes are all mature processes commonly used in display panels, thus enabling the fabrication of the electrophoretic display 100 of the present invention, which possesses various innovative features such as high aperture ratio and high screen refresh rate. Figure 3B-3CIn the examples 4A-4C and 5A-5C, according to one feasible method, at least one storage capacitor Cs includes a transparent first electrode CE1, a transparent second electrode CE2, and an insulating layer CI between the first electrode CE1 and the second electrode CE2; according to another feasible method, all storage capacitors Cs respectively include a transparent first electrode CE1, a transparent second electrode CE2, and an insulating layer CI between the first electrode CE1 and the second electrode CE2; according to yet another feasible method, at least the storage capacitors Cs in the viewing area of ​​the electrophoretic display each include a transparent first electrode CE1, a transparent second electrode CE2, and an insulating layer CI between the first electrode CE1 and the second electrode CE2.

[0178] exist Figures 3A-3C , Figures 4A-4C and Figures 5A-5C In the illustrated embodiment, because the common electrode layer 14 is located away from the viewing surface, it does not need to be made of a conductive transparent material. For example, the common electrode layer 14 can be made of an opaque conductive material, such as an aluminum thin film. Since the viewing surface is not on the opposite substrate side, not providing the common electrode layer 14 on the opposite substrate is also an embodiment of the present invention. Furthermore, according to... Figures 3A-3C , Figures 4A-4C and Figures 5A-5C In the illustrated embodiment, the aperture ratio is increased to at least 70%, preferably to at least 80%, and most preferably to at least 90%. According to one embodiment of the present invention, the aperture ratio can be further improved by designing the sum of the linewidths of the gate line and the data line to be no greater than 20 micrometers (for large-size displays or low-resolution displays) or no greater than 10 micrometers (for medium-size, small-size displays or high-resolution displays).

[0179] In addition, Figures 3A-3C , Figures 4A-4C and Figure 5A and 5C In the illustrated embodiment, the area of ​​the semiconductor portion AS of the thin-film transistor 32 may not exceed 1000 square micrometers, the overlap area between the thin-film transistor 32 and the gate line GL may not be less than 20 square micrometers, and the overlap area between the thin-film transistor 32 and the data line DL may not be less than 5 square micrometers. Furthermore, the linewidth of the gate line GL may not exceed 5 micrometers or 10 micrometers, and the linewidth of the data line DL may not exceed 5 micrometers or 10 micrometers; the sum of the linewidths of the gate line GL and the data line DL may not exceed 20 micrometers. Moreover, the first electrode CE1 and the second electrode CE2 of the storage capacitor Cs overlap each other in the projection direction, and their overlap area is not less than 30% of the pixel area. Figures 3A-3C , Figures 4A-4C and Figure 5A and 5CIn the electrophoretic display 100 to which the illustrated embodiment applies, the electrophoretic layer 20 may have the features of the present invention. Figure 11A-11C , Figures 12A-12C , Figures 13A-13C and Figures 14A-14E The microcompartment structure shown is implemented in a similar manner, and the electrophoretic display 100 may also have a corresponding microcompartment structure. Figure 14C-14E , Figure 16A-16D The micro-clamp 60 is implemented in a corresponding or similar manner. Those skilled in the art should be able to appropriately modify the micro-compartments and micro-clamps disclosed in the above embodiments for application in this invention. Figures 3A-3C , Figures 4A-4C and Figure 5A and 5C In the illustrated embodiment. Furthermore, if using Figures 3A-3C , Figures 4A-4C and Figure 5A and 5C The electrophoretic display 100 of the illustrated embodiment has a color filter layer, which can have the characteristics of the present invention. Figure 18A The structure shown, namely the color filter layer CF, comprises multiple color filter blocks of different colors (CFR, CFG, CFB), each color filter block containing multiple holes H, and at least one of these holes H having an area not exceeding 100 square micrometers. Furthermore, using... Figures 3A-3C , Figures 4A-4C and Figure 5A and 5C The electrophoretic display 100 of the illustrated embodiment can also be as follows: Figure 19 The architecture shown connects the common voltage lines Ve to a display driver 200 or a display touch integrated driver 200. During touch operation of the electrophoretic display 100, the display touch integrated driver 200 connects multiple data lines DL together as a single touch emitter electrode. The display touch integrated driver 200 connects multiple common voltage lines Ve together as a single touch receiver electrode, or the touch emitter electrode and touch receiver electrode can be interchanged.

[0180] 2. Fabricating thin-film transistors on the gate line

[0181] See Figure 6AThis diagram illustrates the structure of a known thin-film transistor (TFT). The fabrication process of a TFT typically involves five photomask steps. In the first photomask step, a first metal layer M1 is formed on a glass substrate (e.g., control substrate 10), defining the gate metal Mg and the gate line GL in conjunction with the lithography process of the first photomask. In known electrophoretic displays, this first metal layer M1 also serves as the first electrode CE1 of the storage capacitor Cs. Subsequently, an insulating layer 320 (e.g., SiNx, SiO2) and an a-Si layer are deposited, and the semiconductor portion (i.e., the a-Si layer AS) is defined in conjunction with the lithography process of the second photomask. Then, an ion implantation process is performed to form a doped layer 322. A second metal layer M2 is then formed, defining the source metal Ms / drain metal Md and the data lines in conjunction with the lithography process of the third photomask. In known electrophoretic displays, this second metal layer M2 also serves as the second electrode CE2 of the storage capacitor Cs. A transparent conductive layer (ITO) is then fabricated using a sputtering process, and the contact points between the control electrode PE and the source metal Ms are created using a lithography process in conjunction with the fourth photomask. An insulating protective layer (passivation layer) 324 is then deposited, and the remaining exposed metal surfaces are defined using a lithography process in conjunction with the fifth photomask.

[0182] See Figure 6B The figure shows a top view of the known thin-film transistor 32 and other related components. As shown, the source metal Ms of the thin-film transistor is electrically connected to the data line DL, the drain metal Md is connected to the control electrode PE through a via V1, and the gate metal Mg is electrically connected to the gate line GL. Furthermore, the semiconductor layer of the thin-film transistor 32, i.e., the semiconductor portion AS, does not overlap with the gate line GL or the data line DL in the projection angle, as the amorphous silicon TFT design would occupy a larger area, affecting the aperture ratio of the control substrate.

[0183] See Figure 6C To further improve the aperture ratio of the control substrate, according to a thin-film transistor embodiment of the present invention, the a-Si layer (i.e., semiconductor portion) AS of the thin-film transistor 32 overlaps at least partially with one of the gate line GL or the data line DL, or the a-Si layer AS of the thin-film transistor 32 overlaps at least partially with both the gate line GL and the data line DL. Furthermore, the via V1 of the thin-film transistor 32 also overlaps with the gate line GL. In other words, the present invention increases the aperture ratio of the electrophoretic display 100 by moving the thin-film transistor 32, originally placed in the control electrode PE region, to the intersection point relative to the data line and the gate line. Under optimal conditions, the electrophoretic display 100 of the present invention can have the following aperture ratios:

[0184] refer to Figure 6DUsing the design examples of this invention.

[0185] (a) At a monochrome resolution of 166 PPI (pixel size 150 μm x 150 μm), the aperture ratio of the control substrate can reach 95.5%. (b) At a monochrome resolution of 250 PPI (pixel size 100 μm x 100 μm), the aperture ratio of the control substrate can reach 92.88%. (c) At a monochrome resolution of 300 PPI (pixel size 85 μm x 85 μm), the aperture ratio of the control substrate can reach 91.39%. (d) At a color resolution of 200 PPI (pixel size 120 μm x 120 μm, RGB subpixels each 40 μm x 120 μm), the aperture ratio of the control substrate can reach 87.67%. According to the present invention, using a conservative design scheme at most application resolutions, adjusting the gate line width to 5 μm and the data line width to 5 μm (that is, the width of the gate line plus the width of the data line is no more than 10 μm), the aperture ratio can reach over 80% under the above resolution conditions. Furthermore, according to one embodiment of the present invention, by adjusting the gate line width to 10 micrometers and the data line width to 10 micrometers (that is, the sum of the gate line width and the data line width is no more than 20 micrometers), the aperture ratio can reach over 70% under the above-mentioned resolution conditions. According to another embodiment of the present invention, by replacing the areas of the gate line and data line that do not overlap with the AS region (semiconductor region) of the TFT with a transparent conductive material, that is, by replacing a portion of the gate line area or a portion of the data line area with a transparent conductive material, the aperture ratio can reach over 90% under the above-mentioned resolution conditions.

[0186] Current standard display driver circuit designs all use the original LCD circuit design as a template. When using amorphous silicon thin-film transistors (a-Si), the slow drift speed of a-Si results in high on-resistance. Therefore, TFTs typically use a high (gate channel width W / gate channel length L) ratio, causing the thin-film transistors to occupy a large proportion of the area, especially at higher resolutions. Since thin-film transistors are opaque, a higher area ratio means a lower aperture ratio. Because the liquid crystal turnover speed in LCDs is much higher than the movement speed of charged particles in electrophoretic displays, LCDs can provide a higher refresh rate. However, in electrophoretic displays, the movement speed of charged particles in the colloidal solution is very slow, resulting in a slow refresh rate. Therefore, the design considerations for thin-film transistors in LCD driver circuits should differ from those in LCDs. LCD thin-film transistor designs must consider using low on-resistance, while electrophoretic displays allow for higher on-resistance designs. See also... Figure 6CIn the driving circuit layer 30 of the electrophoretic display, the thin-film transistors 32 can have their area reduced to increase the aperture ratio. According to one embodiment of the invention, such as... Figure 6C The diagram illustrates how the gate channel length L and gate channel width W of a thin-film transistor (TFT) are adjusted for an electrophoretic display to increase the aperture ratio. In typical LCD driving circuits, the W / L ratio of TFTs is greater than 10:1, meaning the gate channel length L is much smaller than the gate channel width W. According to one embodiment of the present invention, the ratio of the gate channel width W to the gate channel length L of the TFT is 1:1, meaning the gate channel length L equals the gate channel width W, thereby increasing the aperture ratio of the electrophoretic display 100.

[0187] See also Figure 6C According to one embodiment of the present invention, the a-Si layer (semiconductor portion) AS area of ​​this thin-film transistor 32 is less than 1000 square micrometers (µm). 2 The semiconductor portion AS of this thin-film transistor 32 overlaps with the data line DL in an area greater than 5 square micrometers (µm). 2 The overlap area between the semiconductor portion AS and the gate line GL of this thin-film transistor 32 is greater than 20 square micrometers (µm). 2In other words, according to one embodiment of the present invention, the main part of the semiconductor layer AS is constructed on the gate line GL; since the gate line GL is generally formed of a non-transparent conductive material, by constructing the main part of the semiconductor layer AS of the thin-film transistor 32 on the gate line GL, the aperture ratio of the control substrate of the electrophoretic display 100 can be significantly improved. Furthermore, to further optimize the design parameters of the thin-film transistor 32 for use in the electrophoretic display 100, according to one embodiment of the present invention, the gate channel length L of the thin-film transistor 32 is less than 10 μm, and the gate channel width W is less than 25 μm. According to one embodiment of the present invention, the gate channel length L is 5 μm, and the gate channel width W is 5 μm. The design requires that the width of the gate channel is not greater than 5 times the gate channel length, that is, the W / L ratio is less than 5 times. Different design specifications apply to displays of varying sizes. Larger displays typically have lower resolutions, so to improve production yield, they use wider data and gate lines, such as 10 micrometers for both, meaning the sum of the gate and data line widths is no more than 20 micrometers. Smaller displays require finer line widths, such as 5 micrometers for both, again with the sum of the gate and data line widths not exceeding 10 micrometers. This allows for a substrate aperture ratio greater than 80%. The same principle applies to transistor channel design. For large displays, the gate channel length L is no more than 10 micrometers, and with a W / L ratio of 5, the gate channel width W is no more than 50 micrometers. For smaller displays, the gate channel length L is no more than 5 micrometers, and with a W / L ratio of 5, the gate channel width W is no more than 25 micrometers.

[0188] Figure 6C The thin-film transistor 32 architecture, at least partially constructed on the gate line GL, can be applied to the high aperture ratio drive circuit layer 30 of the present invention to further improve the overall aperture ratio of the electrophoretic display 100. For example, Figure 6C The thin-film transistor 32 architecture can be applied to this invention. Figures 3A-3C , Figures 4A-4C and Figures 5A-5C The high aperture ratio driving circuit layer 30 is shown. This further increases the overall aperture ratio of the electrophoretic display 100, beyond the first electrode CE1 / second electrode CE2 which are constructed from transparent conductive material to store the capacitor Cs. However... Figure 6C The thin-film transistor 32 architecture can also be utilized in known drive circuit layers 30a, for example... Figure 1A-1B In the known electrophoretic display 100 shown, this allows for an increase in the aperture ratio of the control board of the electrophoretic display 100 without changing the design of the storage capacitor Cs.

[0189] Furthermore, in the use of, such as Figure 6C In an electrophoretic display 100 with a thin-film transistor 32 architecture partially built on the gate line GL and a gate channel width / length design, the electrophoretic layer 20 may have the features of the present invention. Figure 11A-11C , Figures 12A-12C , Figures 13A-13C and Figures 14A-14E The microcompartment structure shown is implemented in a similar manner, and the electrophoretic display 100 may also have a corresponding microcompartment structure. Figure 14C-14E , Figure 16A-16D The micro-clamp 60 is implemented in a corresponding or similar manner. Those skilled in the art should be able to appropriately modify the micro-compartments and micro-clamps disclosed in the above embodiments for application in situations such as... Figure 6C In an electrophoretic display 100, a thin-film transistor 32 architecture partially built on the gate line GL and a gate channel width / length design are used. Furthermore, if using, for example... Figure 6C If the electrophoretic display 100, which is partially constructed on the gate line GL and has an electrophoretic interface with gate channel width / length design, has a color filter layer, then the color filter layer can have the characteristics of the present invention. Figure 18A The structure shown, namely the color filter layer CF, comprises multiple color filter blocks of different colors (CFR, CFG, CFB), each color filter block containing multiple holes H, and at least one of these holes H having an area not exceeding 100 square micrometers. Furthermore, using... Figure 6C The electrophoretic display 100, with its thin-film transistor 32 architecture partially built on the gate line GL and its gate channel width / length design, can also be like... Figure 19 The architecture shown connects the common voltage lines Ve to a display driver 200 or a display touch integrated driver 200. During touch operation of the electrophoretic display 100, the display touch integrated driver 200 connects multiple data lines DL together as a single touch emitter electrode. The display touch integrated driver 200 connects multiple common voltage lines Ve together as a single touch receiver electrode, or the touch emitter electrode and touch receiver electrode can be interchanged.

[0190] 3. The color filter layer is moved to the control substrate.

[0191] refer to Figure 7A The image shows a cross-sectional view of a known color electrophoretic display 100. This color electrophoretic display 100, for example, includes, from top to bottom, an upper glass substrate 16, a color filter layer CF, an optical adhesive 13, a counter substrate 12 (e.g., a transparent plastic substrate), a common electrode layer 14 (e.g., a transparent conductive electrode layer), an electrophoretic layer 20, a control electrode layer PEL, a driving circuit layer 30, and a control substrate 10 (e.g., a glass substrate). Furthermore, as... Figure 7AAs shown, the electrophoretic layer 20 comprises multiple hollow cavities 22 (only one is shown in the illustration) and a colloidal solution 24 containing multiple charged color particles 26 (e.g., charged black particles 26B and charged white particles 26W) filled in each hollow cavity 22. The hollow cavity 22 structure serves as a container for electronic ink. However, in Figure 7A In the color electrophoretic display 100 shown, the color filter layer CF is spaced from the charged color particles by a thickness approximately 100-200 μm, equal to the thickness of the substrate 12, the cavity film of the hollow cavity 22, and the optical adhesive 13. This thickness causes incident light of a certain color to be absorbed by other color filter pigments after reflection, resulting in no reflected light penetrating to the outside and reducing the visible brightness. For example... Figure 7A As shown, incident light L1 first enters through the second color filter block CF2, is reflected by contact charged color particles (e.g., charged white particles 26W), and then exits the color electrophoretic display 100 through the second color filter block CF2 again. However, this incident light L1 must pass through the substrate 12 and the second color filter block CF2 to reach the charged white particles 26W, resulting in a certain degree of attenuation. Furthermore, this incident light L1 may pass through the second color filter block CF2 again to exit the color electrophoretic display 100, causing secondary filtering attenuation.

[0192] For example Figure 7A As shown, an even worse situation occurs when another incident light L2 first enters through the second color filter CF2, is reflected by contacting charged color particles (e.g., charged white particles 26W), and then exits the color electrophoretic display 100 through a third color filter CF3 of a different color. Because the third color filter CF3 (e.g., blue) is different in color from the second color filter CF2 (e.g., green), the incident light L2 is completely absorbed and cannot exit the color electrophoretic display 100, thus failing to reproduce the color produced by the charged white particles 26W in conjunction with the second color filter CF2. The greater the travel distance of the incident light from the filter pigment incident surface, to the contacting charged color particles, and then from the filter pigment exit surface, the more severe the problem becomes. In short, the thicker the substrate 12, the thicker the cavity film of the hollow cavity 22, the greater the thickness of the optical adhesive, or the higher the resolution, the more severe the problems of color distortion, reduced visible brightness, and insufficient saturation become. For many years, this problem has plagued the development of color electronic paper displays using color filter layers, and the screen resolution of color electrophoretic displays has been severely limited, preventing them from developing towards higher resolutions.

[0193] refer to Figure 7BIn this invention, the color filter layer CF is fabricated on or near the control substrate 10. This reduces the distance between the color filter layer CF and the reflective particles. When the viewing surface is on the same side of the control substrate 10, the distance between the color filter layer CF and the charged color particles 26 is reduced to less than 30 μm (reducing the thickness of the substrate 12), thus solving the aforementioned problem. If the hollow cavity 22 of the electrophoretic layer 20 is constructed using the micro-spacing of this invention (described later), the distance between the color filter layer CF and the charged color particles 26 can be further reduced to less than 3 μm or even to zero distance of direct contact, thereby achieving the optimal display quality of the color electrophoretic display 100.

[0194] like Figure 7B As shown, for ease of explanation, and to provide a clearer comparison with known electrophoretic displays; even though the electrophoretic display 100 of the present invention is viewed from the control board 10 side, however... Figure 7B In the structure shown, the control substrate 10 remains at the bottom of the structure. According to this embodiment, the electrophoretic display 100 of the present invention includes, from bottom to top, a control substrate 10, a color filter layer CF, a high aperture ratio driving circuit layer 30 (hereinafter referred to as the driving circuit layer 30), a control electrode layer PEL, an electrophoretic layer 20, a common electrode layer 14 (e.g., a transparent conductive electrode layer or an opaque metallic conductive layer), and a opposing substrate 12. Similarly, the electrophoretic layer 20 includes a plurality of hollow cavities 22 (only one is shown in the figure), and a colloidal solution 24 containing a plurality of charged color particles 26 (e.g., charged black particles 26B and charged white particles 26W) is filled in each hollow cavity 22. The hollow cavity 22 is, for example, a hollow cavity made of an organic polymer material, and is used to fill the colloidal solution 24 containing the charged color particles 26. According to other embodiments of the present invention (not shown), the hollow cavity 22 may also be filled with a colloidal solution 24 containing a colored fluid (e.g., black) and a plurality of charged particles of a single color (e.g., white particles), and the hollow cavity 22 structure serves as a container for electronic ink.

[0195] The electronic ink in this invention is defined as comprising a plurality of charged color particles, which are disposed in a colloidal solution and can move through the colloidal solution under the influence of an electric field, and which include positively charged color particles and / or negatively charged color particles.

[0196] like Figure 7C As shown, this is the corresponding Figure 7B The partial cross-sectional view of the embodiment mainly shows the control substrate 10, the color filter layer CF, the high aperture ratio drive circuit layer 30, and the control electrode layer PEL. Figure 7C The high aperture ratio drive circuit layer 30 can adopt a similar approach. Figure 5AThe structure, namely the control electrode PE and the first transparent conductive layer ITO1, are both fabricated on the planarization layer PLN. The two electrode layers (first electrode CE1 and second electrode CE2) of the storage capacitor Cs are provided by the control electrode PE and the first transparent conductive layer ITO1, respectively. Furthermore, the source metal Ms / d of the thin-film transistor 32 is formed by the second metal layer M2, and the drain metal Md is connected to the control electrode PE through a via V1. Figure 7C As shown, since both electrode layers (first electrode CE1 and second electrode CE2) of the storage capacitor Cs are made of transparent conductive material (e.g., ITO), they do not block light, thus increasing the aperture ratio of the electrophoretic display of this high aperture ratio driving circuit layer 30. Furthermore, the thickness of the insulating layer CI of the storage capacitor Cs can be reduced according to the design, thereby maximizing the capacitance value of the storage capacitor Cs without affecting the aperture ratio of the control substrate of the electrophoretic display 100. Moreover, a transparent protective layer 15 of silicon nitride, silicon oxide, or a composite of both can be present between the driving circuit layer 30 and the color filter layer CF.

[0197] In addition, in production Figure 7B and 7C When the electrophoretic display 100 is shown, it can be followed in a similar manner. Figure 5AThe steps of the illustrated embodiment are as follows. However, before forming the thin-film transistor on the upper surface of the control substrate 10, a color filter layer CF is first formed. The formation method of this color filter layer CF can vary depending on the colorant material, such as pigment or dye, and involves different processes. For pigments, printing, electrodeposition, coating followed by exposure and development, or etching can be used; for dyes, dyeing or coating followed by exposure and development or etching can be used, thereby forming a color filter layer CF containing multiple colors on the upper surface of the control substrate 10. Since the thicker the color filter layer, the greater the light loss and the less light can pass through, the thickness of the color filter layer is practically limited to within 5 micrometers (µm), that is, the thickness of the color filter block of the color filter layer does not exceed 5 micrometers. After fabricating the color filter layer CF, a transparent protective layer 15 of silicon nitride, silicon oxide, or a composite of both can be formed on the surface of the color filter layer CF. Subsequently, a metal thin film is formed on the upper surface of the control substrate 10 using a deposition or sputtering process, and a first metal layer M1 is formed using a lithography process. This first metal layer M1 is used to form the gate metal Mg and the gate line GL. Then, an insulating layer (e.g., SiNx, SiO2) and an a-Si layer are deposited, and the semiconductor portion AS of the thin-film transistor is defined using a lithography process. Next, a metal thin film is formed on the resulting structure using a deposition or sputtering process, and a second metal layer M2 is formed using a lithography process. This second metal layer M2 is used to form the source metal Ms, the drain metal Md, and the data line DL. Finally, a planarization layer PLN and vias are formed on the resulting structure. Subsequently, a transparent conductive material film is fabricated using a sputtering process, and a first transparent conductive layer ITO1 is fabricated using a photolithography process to serve as the second electrode CE2 of the storage capacitor Cs. An insulating material is deposited to serve as the capacitor insulating layer CI of the storage capacitor Cs. A transparent conductive material film (ITO2) is fabricated using a sputtering process, and a control electrode PE of the control electrode layer PEL is fabricated using a photolithography process to serve as the first electrode CE1 of the storage capacitor Cs. An electrophoretic layer 20 (containing a hollow cavity 22) can then be laminated or fabricated. This hollow cavity 22 is formed by forming a resin film on a plastic substrate and using a roller to press indentations into the resin film. The hollow cavity 22 serves as a container for electronic ink. A colloidal solution 24 containing charged color particles 26 is then injected into the hollow cavity 22, and the cavity is sealed with adhesive to form a sealed cavity, thus creating the electrophoretic layer 20. For detailed fabrication processes, please refer to Taiwan Patent Application No. 93100767 or the micro-compartment structure of this invention. Subsequently, the portion facing the substrate 12 is fabricated, and a common electrode layer 14 and an insulating layer can be formed on the facing substrate 12. Finally, the side of the control substrate 10 with the electrophoretic layer 20 formed is bonded to the side of the facing substrate 12 with the common electrode and insulating layer formed using optical adhesive or by using a frame adhesive with the micro-clamp structure of the present invention (described in detail later). Furthermore, when the viewing surface is not on the facing substrate 12 side, it is not necessary to provide a common electrode layer 14 on the facing substrate 12.The aforementioned deposition process (CVD, PECVD), sputter deposition process, and coating process are all mature processes commonly used in display panels, which can be used to manufacture the electrophoretic display 100 of the present invention with high aperture ratio and high screen refresh rate.

[0198] However, in the above process, if the material of the color filter layer (CF) is affected by the temperature during the subsequent thin-film transistor (TFT) process, the TFT process method must be selected. For example, the TFT can be a low-temperature process a-Si TFT (temperature below 200°C), or an even lower process temperature organic TFT (temperature below 100°C).

[0199] like Figure 7B and 7C As shown, in the electrophoretic display 100 according to the present invention, the viewing surface is on the control substrate 10 side, and the color filter layer CF is moved onto the control substrate 10. Furthermore, the combined total thickness of the driving circuit layer 30 and the control electrode layer PEL is much smaller than... Figure 7A The thickness of the relative substrate 12 in the control substrate 10 side reduces the distance between the light incident from the control substrate 10 side and the electrophoretic layer 20. Furthermore, as mentioned earlier, the charged color particles 26 (e.g., charged black particles 26B and charged white particles 26W) attracted by the high aperture ratio drive circuit layer 30 can reach the side of the electrophoretic layer 20 near the control electrode layer PEL more quickly, further reducing the distance between the light incident from the control substrate 10 side and the charged color particles 26, thereby increasing the color accuracy, color saturation and contrast, brightness, and other creative features of the electrophoretic display 100.

[0200] Figure 8A This figure shows a cross-sectional view of an electrophoretic display 100 according to another embodiment of the present invention. The structure shown in this figure is similar. Figure 7B The structure shown, namely the color filter layer CF, is also located near the control substrate 10. However, in Figure 8A In the shown structure, the position of the color filter layer CF is moved above the control electrode layer PEL. In practice, it can also be disposed between the driving circuit layer and the control electrode layer. The control electrode can be electrically connected to the source or drain of the transistor through a via on the color filter layer. Therefore, the electrophoretic display 100 of this embodiment includes, from bottom to top, a control substrate 10, a high aperture ratio driving circuit layer 30, a control electrode layer PEL, a color filter layer CF, an electrophoretic layer 20, a common electrode layer 14 (e.g., a transparent conductive electrode layer or an opaque metallic conductive layer), and a counter substrate 12, wherein the control electrode layer PEL and the color filter layer CF can be interchanged.

[0201] like Figure 8B As shown, this is the corresponding Figure 8A The partial cross-sectional view of the embodiment mainly shows the control substrate 10, the color filter layer CF, the high aperture ratio drive circuit layer 30, and the control electrode layer PEL. Figure 8B The high aperture ratio drive circuit layer 30 can adopt a similar approach. Figure 5A The structure is such that both the control electrode PE and the first transparent conductive layer ITO1 are fabricated on the planarization layer PLN. The two electrode layers (first electrode CE1 and second electrode CE2) of the storage capacitor Cs are provided by the control electrode PE and the first transparent conductive layer ITO1, respectively. Furthermore, the source metal Ms / d drain metal Md of the thin-film transistor 32 is formed by the second metal layer M2 and is connected to the control electrode PE (ITO2) through a via V1. Figure 8B As shown, since both electrode layers (the first conductive layer and the second conductive layer) of the storage capacitor Cs are made of transparent conductive material (e.g., ITO), they do not block light. Furthermore, the insulating layer CI of the storage capacitor Cs can be thinned according to the design, thus maximizing the capacitance value of the storage capacitor Cs without affecting the aperture ratio of the electrophoretic display 100.

[0202] In addition, in production Figure 8A and 8B When the electrophoretic display 100 is shown, it can be followed in a similar manner. Figure 5A The steps of the illustrated embodiment are as follows. However, after forming the thin-film transistor 32 and the control electrode PE on the upper surface of the control substrate 10, a color filter layer CF is formed on the thin-film transistor 32 and the control electrode PE. The formation method of this color filter layer CF can vary depending on the colorant material, such as pigment or dye, and there are different processes. For pigments, printing, color photoresist exposure and development, or etching can be used; for dyes, etching or color photoresist exposure and development can be used, thereby forming a color filter layer CF containing multiple colors on the thin-film transistor 32 and the control electrode PE. After fabricating the color filter layer CF, a transparent protective layer made of acrylic resin or epoxy resin can be optionally formed on the surface of the color filter layer CF, or an inorganic material such as SiNx or SiO2 can be used to make a protective film, or none of these methods can be used.

[0203] See compound combination Figure 8ASubsequently, an electrophoretic layer 20 is laminated or fabricated on the color filter layer CF (or the transparent protective layer). This layer contains a hollow cavity 22, which is formed by creating a resin film on a plastic substrate and pressing indentations into the resin film using a roller. The hollow cavity 22 serves as a container for electronic ink. A colloidal solution 24 containing charged color particles 26 is then injected into the hollow cavity 22, and the cavity is sealed with adhesive to form a sealed cavity, thus creating the electrophoretic layer 20. For detailed fabrication procedures, please refer to Taiwan Patent Application No. 93100767 or the micro-segment structure of this invention. Next, the portion opposite the substrate 12 is fabricated, and a common electrode layer 14 can be formed on the opposite substrate 12. Finally, the side of the control substrate 10 with the electrophoretic layer 20 and the side of the opposite substrate 12 with the common electrode are bonded together with optical adhesive or bonded together with frame adhesive using the micro-clamp structure of the present invention (detailed below). When the viewing surface is not on the opposite substrate 12 side, the common electrode layer 14 may not be provided on the opposite substrate 12. The above-mentioned deposition process (CVD, PECVD), sputter deposition process, and coating process are all mature processes commonly used in display panels, which can be used to manufacture the electrophoretic display 100 of the present invention with high aperture ratio and high screen refresh rate.

[0204] like Figure 8A and 8B As shown, in the electrophoretic display 100 according to the present invention, the viewing surface is on the control substrate 10 side, and the color filter layer CF is disposed on the control substrate 10. Furthermore, the color filter layer CF is almost in contact with the electrophoretic layer 20, so the distance between the light incident from the control substrate 10 side and the electrophoretic layer 20 after passing through the color filter layer CF can be reduced, thereby increasing the color accuracy, color saturation, contrast, and visible brightness of the electrophoretic display 100.

[0205] Because electronic ink contains black charged particles with sufficient black saturation, a black masking layer (BM) is not needed to increase black saturation. Therefore, the black masking layer (BM) used in thin-film transistors with black borders to shield metal lines can be replaced with white or transparent material. The color filter layer is made by exposing photoresist materials of various colors to a photomask. The development process washes away the unexposed areas, leaving the exposed areas (negative photoresist). For example, to form red, green, and blue photoresist materials, different photomasks can be used to retain photoresist materials in different locations. Furthermore, during the fabrication of the color filter layer, the exposed color photoresist can also be washed away, leaving the unexposed areas (positive photoresist). In other words, through multiple color photoresist exposure processes, the required color photoresist is laid in the designated locations, and the color photoresist can be coated to achieve different required thicknesses.

[0206] like Figure 9AAs shown, color filter layers are typically designed with three regions (red, green, and blue, i.e., red filter color block CFR, green filter color block CFG, and blue filter color block CFB). For example... Figure 9B As shown, the color filter layer can also be divided into four regions (red, green, blue, and white, namely red filter color block CFR, green filter color block CFG, blue filter color block CFB, and white filter color block CFW). The white part of the region does not need to be filled with light resist to maintain transparency.

[0207] In electronic paper display devices, the black masking layer (BM) area, originally used to increase black saturation, no longer needs to be black, as the black saturation of electronic paper is already sufficient. Therefore, this area can be replaced with black, white, or uncolored transparent material. The color filter layer is divided into three blocks filled with red, blue, and green, plus a black border (BM), for a total of four colors. (This text is repeated three times in the original.)

[0208] To expand the grayscale range, the color filter layer can also perform grayscale compensation. Therefore, it can be divided into four color blocks, each filled with red, blue, green, and transparent, plus a black border (BM), for a total of four colors. Alternatively, the color filter layer can be divided into four blocks filled with red, blue, green, transparent, and a white border (BM), for a total of four colors. Or, the color filter layer can be divided into four blocks filled with red, blue, green, transparent, and a transparent border (BM), for a total of three colors. Transparent areas are left empty without any color photoresist.

[0209] Furthermore, in the use of, such as Figures 7B-7C and Figures 8A-8B A color filter layer is disposed in an electrophoretic display 100 near the control substrate 10. The electrophoretic layer 20 may have the features of the present invention. Figure 11A-11C , Figures 12A-12C , Figures 13A-13C and Figures 14A-14E The microcompartment structure shown is implemented in a similar manner, and the electrophoretic display 100 may also have a corresponding microcompartment structure. Figure 14C-14E , Figure 16A-16D The micro-clamp 60 is implemented in a corresponding or similar manner. Those skilled in the art should be able to appropriately modify the disclosure of the micro-compartment and micro-clamp of the above embodiments for application in situations such as... Figures 7B-7C and Figures 8A-8B A color filter layer is disposed on an electrophoretic display 100 close to the control substrate 10. Furthermore, when using, for example... Figures 7B-7C and Figures 8A-8BA color filter layer is disposed in an electrophoretic display 100 near the control substrate 10. This color filter layer may have the characteristics of the present invention. Figure 18A The structure shown, namely the color filter layer CF, comprises multiple color filter blocks of different colors (CFR, CFG, CFB), each color filter block containing multiple holes H, and at least one of these holes H having an area not exceeding 100 square micrometers. Furthermore, using... Figures 7B-7C and Figures 8A-8B The color filter layer can also be placed on the electrophoretic display 100 close to the control substrate 10, as shown in the example. Figure 19 The architecture shown connects the common voltage lines Ve to a display driver 200 or a display touch integrated driver 200. During touch operation of the electrophoretic display 100, the display touch integrated driver 200 connects multiple data lines DL together as a single touch emitter electrode. The display touch integrated driver 200 connects multiple common voltage lines Ve together as a single touch receiver electrode, or the touch emitter electrode and touch receiver electrode can be interchanged.

[0210] 4. Micro-compartment design

[0211] The electronic paper used in known technologies for manufacturing electronic paper displays is made using microcapsule and microcup technology. The production cost of electronic paper is high due to yield issues. Furthermore, during the subsequent electrophoretic display manufacturing process, the prepared electronic paper must be peeled off its protective film and laminated onto the control substrate. Foreign matter and air bubbles on the contact surface during lamination can cause significant yield losses. Because the electronic paper structure is very fragile, it is easily broken and damaged during the process of peeling off the protective film, also resulting in significant production losses. The purpose of this invention is to reduce the production cost of electronic paper and eliminate the lamination process, thus avoiding yield losses, by directly integrating the electronic paper into the display. Currently, the most commonly used electronic paper employs a microcup structure, and the production method is mostly roll-to-roll. During manufacturing, convex rollers are used to press indentations into the resin film to create the microcup structure. The microcup structure serves as a container for electronic ink, and the resin film is soft and easily broken under pressure. Therefore, the electronic paper product must be well protected, causing significant difficulties in the manufacturing process. Secondly, the thickness of the microcup (the distance extending perpendicular to the viewing surface) is approximately 25-50 μm, thus requiring extremely high manufacturing precision. In roller molding production, the thinner the microcup, the easier it is for the resin matrix to crack and peel off, adhering to the roller and causing damage, resulting in lower production yield. Thicker microcups consume more electronic ink, and due to the viscosity and surface tension of the resin solution, voids form at the bottom of the microcup during filling, preventing complete filling and causing the resulting display to fail due to poor display quality. All these factors contribute to the high cost of electronic paper. Furthermore, a thicker microcup increases the distance between the control electrode and the common electrode, slowing down the movement of charged color particles. The increased movement distance requires higher driving voltage and longer positioning time, affecting the image refresh rate and display quality. When used in electronic paper readers, this results in a poor user experience. This invention addresses all these drawbacks.

[0212] refer to Figure 10A This is a top view of a known electrophoretic display's microcup compartments and associated color filter layer. The microcup compartment wall thickness (see the present invention). Figure 11A The thickness of the partition wall in this invention is indicated by T. Figure 10A The thickness of the partition wall of the microcup 22 (which extends parallel to the drawing) needs to be greater than 10µm to provide sufficient support. Furthermore, it is known that the microcup 22 of an electrophoretic display, viewed from above at a projection angle, often employs a hexagonal partition structure to increase structural strength. Charged color particles cannot reach the area within the microcup wall, which can be considered a key factor affecting the display aperture ratio. It is known that electrophoretic displays do not have charged color particles 26 at this location. When... Figure 10A The microcup compartments and control substrate shown (e.g.) Figure 1AWhen the control substrate 10 shown is bonded, it will block the electrodes on the control substrate, causing the display color part to be blocked, which will form background textures and affect the imaging quality. It will also cause color distortion due to the unevenness of the microcup wall blocking position on the color filter layer.

[0213] refer to Figure 10B According to one embodiment of the present invention, micro-segments are fabricated on a substrate, allowing for precise alignment of pixel electrodes (control electrodes PE). The partition walls 52 of the micro-segment structure 50 are located in the non-display area between pixels. In the projection direction of the viewing surface, the overlap area between the partition walls and the control electrodes should be as small as possible, ideally less than 50% of the control electrode area. In other words, according to the design of the present invention, the partition walls 52 of the micro-segment structure 50 can be fabricated into a rectangular structure close to the pixel, and can better conform to the pixel boundaries without affecting the display. According to the present invention, for example, a photomask can be used to develop the pattern of a photoresist film to fabricate the micro-segment wall surface, wherein the photoresist film can be made of a material with high hardness (e.g., a transparent photoresist made of acrylic). Furthermore, according to other embodiments of the present invention, the partition walls 52 of the micro-segment structure 50 can also be made of polymer materials (such as planarization materials, resins, or acrylic materials). Furthermore, as... Figure 10B As shown, the partition walls 52 of the micro-cell structure 50 can be aligned with a portion of the gate line GL or the data line DL. More specifically, the plurality of partition walls 52 overlap with a portion of the data line DL and / or a portion of the gate line GL when viewed from a vertical projection direction (e.g., perpendicular to the viewing plane).

[0214] Because this invention uses a rigid polymer material (such as a transparent photoresist material) as the partition wall 52 of the micro-partition structure 50, its hardness can reach a pencil hardness of 3H or higher, far exceeding the resin material used in known microcup containers (hardness less than 1H). Therefore, this invention can support the weight and pressure of the upper and lower substrates with a thinner wall thickness. The wall thickness T of the micro-partition (see [reference needed]) Figure 11A It can be less than 10µm. (Reference) Figure 10C Because the partition walls 52 of the microcell structure 50 of the present invention can be accurately positioned in the non-display area of ​​the pixel (between pixels), it does not affect the display quality. Its high precision leads to a high yield rate and reduces production costs. A greater advantage is the elimination of the costs associated with using microcup-based electronic paper, and the elimination of substrate bonding saves on optical adhesive costs and reduces yield losses during bonding, allowing for the fabrication of thinner electrophoretic displays. Furthermore, the microcell structure 50 can be fabricated using planarization layer (PLN) materials, where the area outside the wall is etched to complete the microcell. The microcell structure 50 of the present invention can be used to fabricate thinner electrophoretic displays, and an electrophoretic layer 20 with a thickness of less than 25 μm (microcell wall height H1 (see attached diagram)) can be easily fabricated. Figure 11A(It can be less than 25um). The thinner the electrophoretic layer made by the micro-segment structure 50 of the present invention, the closer the control electrode and the common electrode will be, the greater the electric field strength will be, the lower the driving voltage can be, the faster the movement of charged color particles will be, and the shorter the distance that needs to be moved will be, which greatly improves the screen update speed and solves the screen update problem that plagues electrophoretic displays. This problem is especially important for color electrophoretic displays.

[0215] refer to Figure 10D This is a top view of a microcompartment structure according to another embodiment of the present invention. According to this embodiment, the compartment walls 52 of the microcompartment structure 50 (shown with oblique lines to better highlight their shape) are prone to breakage and damage when used in flexible electrophoretic displays due to the use of a high-hardness material as the substrate for fabricating the microcompartments. To improve this problem, the compartment walls 52 of the microcompartment structure 50 can be made into a discontinuous shape, as shown in the reference... Figure 10D The cross-shaped partition wall 52 has a slot 56 that can serve as a space for expansion and contraction when the partition wall 52 is compressed due to substrate bending. According to one embodiment of the invention, the area of ​​the slot 56 is no greater than 50% of the area of ​​the partition wall 52, or the length D of the slot 56 is no greater than 50% of the length of the partition wall 52. According to one embodiment of the invention, the length D of the slot 56 can be greater than 0.5 μm to provide space for expansion and contraction when the partition wall 52 is compressed. According to one embodiment of the invention, the slot formed by the cross-shaped partition wall 52 can accommodate a pixel, for example, a pixel composed of different color filter blocks (CFR, CFG, CFB). Furthermore, although... Figure 10D The illustrated partition wall 52 is cross-shaped from a top view to provide a slot when there is a gap between adjacent partition walls 52; however, the partition wall 52 of the present invention can also be other shapes from a top view, such as T-shaped or U-shaped, as long as there is a gap 56 between at least some of the adjacent partition walls 52. Furthermore, although Figure 10D In the illustrated embodiment, the gaps 56 on the partition wall 52 are evenly distributed. However, it should be noted that in actual manufacturing, the gaps 56 may have different lengths due to process errors. In addition, the gaps 56 do not necessarily have to penetrate the partition wall 52 in the thickness direction, as long as they can provide space for expansion and contraction when the partition wall 52 is compressed.

[0216] See Figures 11A to 11C These are schematic diagrams illustrating the process of fabricating a microcompartment structure 50 according to an embodiment of the present invention. The diagrams show the fabrication process along... Figure 10C Cross-sectional views of the structure at different stages of the AA process. In this embodiment, the micro-cell structure 50 is fabricated on top of the drive circuit layer 30 (i.e., on the control substrate 10 side). See also Figure 11AFirst, a driving circuit layer 30, a transparent control electrode layer (PEL), and an insulating protective layer are fabricated on the control substrate 10. Then, the partition walls 52 of the micro-partition structure 50 are fabricated using a transparent photoresist and exposure and development process. Since the developable depth is causally related to the intensity and number of irradiations during the development process, in practice, due to production cost and yield considerations, the thickness of the developable photoresist is usually less than 5 μm. When the electrophoretic layer is too thin, the number of color particles that can be placed is limited, which in turn affects the number of color particle stacking layers. Insufficient color particle stacking layers affect reflectivity, resulting in insufficient reflected light and reduced visible brightness. Therefore, the thickness of the electrophoretic layer is usually not less than 5 μm (micro-partition wall height H1 (see attached diagram)). Figure 11A (Not less than 5µm). See also Figures 17A to 17F This document describes the steps for fabricating a partition wall 52 on a substrate side (e.g., the control substrate side 10 or the opposite substrate side 12) according to an embodiment of the present invention. According to the present invention, the partition wall 52 can be fabricated directly on a substrate surface using a transparent photoresist and an exposure and development process. Alternatively, other structures may exist on the substrate surface, such as a transparent control electrode layer (PEL), an insulating layer, a protective layer, a driving circuit layer 30, a color filter layer (CF), or a common electrode layer 14, and the partition wall 52 can be fabricated directly on these structures using a transparent photoresist and an exposure and development process. Furthermore, a planarization layer (PLN) can be added to other structures on the substrate (e.g., the transparent control electrode layer (PEL), the driving circuit layer 30, the color filter layer (CF),) before fabricating the partition wall 52 using a transparent photoresist and an exposure and development process. Therefore, although... Figures 17A to 17F The initial structure is schematically shown as substrate 10 / 12, but it is not limited to whether there are other structures on it. For example... Figure 17A As shown, cleaning is first performed on a substrate 10 / 12, which may be a control substrate 10 or a counterpart substrate 12, and its cleaning surface may have other structures. See then... Figure 17B A first layer of photoresist PR1, for example a transparent photoresist material, is coated on the substrate 10 / 12. See then... Figure 17C A photomask PM is used for exposure to expose the location where the partition wall 52 is to be formed, thereby defining the first residual photoresist PRA (i.e., the first polymer material stack). According to one embodiment of the invention, the first photoresist PR1 is a negative photoresist material, meaning that the exposed portion remains after development; however, according to another feasible embodiment of the invention, the first photoresist PR1 is also a positive photoresist material, and the photomask PM needs to be redesigned accordingly. See then... Figure 17D A second photoresist layer PR2, which is also a transparent photoresist material, is coated on the substrate 10 / 12. See then... Figure 17EThen, a photomask PM is used for exposure, i.e., repeated exposure, to expose the location where the partition wall 52 is to be formed, to define the second residual photoresist PRB (i.e., the second polymer material stack). The area of ​​the second residual photoresist layer can be smaller than the area of ​​the first residual photoresist layer, forming an upwardly decreasing shape. See last. Figure 17F The resulting structure is developed to leave a first residual photoresist PRA and a second residual photoresist PRB. The resulting structure (a first polymer material stack layered with a second polymer material stack) is the partition wall 52 of this invention. According to the above method, through repeated photoresist coating and exposure, and finally development, the developer removes the unwanted parts (hollowed-out areas), leaving a sufficiently high micro-partition wall surface. The photoresist coating and exposure can be repeated more than once, or more than twice, with the area of ​​each exposure decreasing to thin the partition wall. The diameter of each partition wall layer can be reduced to less than 5 μm (W1-W2). See also... Figure 11B After the partition wall 52 is fabricated, a colloidal solution is filled into the chamber 54 defined by the partition wall 52 under vacuum conditions. This avoids air residue within the micro-compartment structure, which could cause filling failure. The filling method involves first covering the non-display area with a shielding plate (not shown), and then using a spraying device to spray the heated colloidal solution onto the display area. To improve the yield of subsequent colloidal solution filling, due to alignment errors in each layer exposure, according to one embodiment of the invention, the wall thickness is designed to decrease with each growing layer. This prevents unevenness in the wall surface, which would reduce the contact area during colloidal solution filling, resulting in more unfilled voids and defective products. In practice, the linewidth of the first coated photoresist layer (i.e., the first polymer material layer) is the largest and then decreases with each subsequent layer. For example, the width (cross-sectional width) of each polymer material layer used to fabricate the partition wall decreases to less than 5 micrometers, resulting in a micro-compartment wall shape that is thicker at the bottom and thinner at the top. Figure 17F As shown, the width difference (reduction) between the width W2 of the second polymer material stack and the width W1 of the first polymer material stack is less than 5 micrometers.

[0217] In this embodiment, the process can be performed after the fabrication of the transparent control electrode layer (PEL). Figures 17A to 17F The partition wall 52 process can also be performed after fabricating a planarization layer PLN on the transparent control electrode layer PEL. Figures 17A to 17FThe partition wall 52 process. The material of the aforementioned planarization layer PLN can be an organic insulating material, an inorganic insulating material, or a combination thereof. According to one embodiment, the organic insulating material can be polyimide (PI), polyamic acid (PAA), polyamide (PA), polyvinyl alcohol (PVA), polyvinylcinnamate (PVCi), poly(methyl methacrylate) or other suitable photoresist materials or combinations thereof. Furthermore, the inorganic insulating material can be silicon oxide, silicon nitride, silicon oxynitride, siloxane, or a combination thereof.

[0218] See compound combination Figure 11A In this invention, for ease of explanation, the thickness of the microcompartment structure 50 is defined as the height H of the compartment wall 52, and the thickness of the compartment wall 52 is T. According to this invention, the thickness of the microcompartment structure 50 (i.e., the height H1 of the compartment wall) is greater than 5 micrometers and less than 25 micrometers, and the thickness T of the compartment wall is less than or equal to 10 micrometers. Furthermore, see also... Figure 11A and Figure 17F The average width of the cross-sectional area of ​​the compartment wall 52 of the microcompartment structure 50 is no greater than 10 micrometers. See also Figure 11B After the partition wall 52 is fabricated, a colloidal solution is filled into the tank 54 defined by the partition wall 52. This colloidal solution contains charged black particles and / or charged white particles; or the colloidal solution contains charged colored particles, such as… Figure 11B The charged cyan particle 26C, charged magenta particle 26M, charged yellow particle 26Y, and charged white particle 26W are shown. See also... Figure 11C The process involves attaching a substrate to the substrate, either by providing a substrate 12 with a conductive thin film (e.g., a common electrode layer 14) or a substrate 12 without a common electrode layer 14 (when the viewing surface is not on the side of the substrate 12). Optical adhesive 13 is applied between the substrate 12 and the partition wall 52, or frame adhesive is applied to the four edges of the display area before bonding. After bonding, the substrates are placed in a gas-pressurized chamber for heating and pressurization, thus extruding the adhesive solution and filling the gaps within the micro-partition structure 50. Finally, the optical adhesive or frame adhesive is cured to complete the production of the electrophoretic display 100. Figure 11C As shown, the overlap area between the partition wall 52 and any control electrode PE is less than 50% of the area of ​​the control electrode (the electrode in the control electrode layer PEL).

[0219] See Figures 12A to 12CThis is a schematic flowchart illustrating the fabrication of a microcompartment structure 50 according to another embodiment of the present invention. In this embodiment, the microcompartment structure 50 is fabricated after the driving circuit layer 30, and the electrophoretic display 100 is a color electrophoretic display 100. Figure 12A As shown, firstly, a driving circuit layer 30, a transparent control electrode layer PEL, and an insulating protective layer (not shown) are fabricated on the control substrate 10, and then a color filter layer CF is fabricated. In this embodiment, the process can be performed after the color filter layer CF is completed. Figures 17A to 17F The partition wall 52 process can also be performed after fabricating a planarization layer PLN on the color filter layer CF. Figures 17A to 17F The process for fabricating partition wall 52. The material of the aforementioned planarization layer PLN can be an organic insulating material, an inorganic insulating material, or a combination thereof. See [link / details] after the partition wall 52 is fabricated. Figure 12B Under vacuum operating conditions, a colloidal solution containing charged black particles 26B and charged white particles 26W is filled into the tank 54 defined by the partition wall 52. See then. Figure 12C The process of attaching a relative substrate is performed, that is, providing a relative substrate 12 with a conductive thin film (e.g., common electrode layer 14) or a relative substrate 12 without a common electrode layer 14 (when the viewing surface is not on the side of the relative substrate 12). Optical adhesive 13 is used between the relative substrate 12 and the partition wall 52, or frame adhesive is applied to the four edges of the display area and then the substrates are attached. After completion, the substrates are sent into a gas pressurization chamber for heating and pressurization to complete the extrusion of the adhesive solution into and fill the gaps in the micro-partition structure. Finally, the optical adhesive or frame adhesive is cured to produce the electrophoretic display 100 finished product.

[0220] See Figures 13A to 13C This is a schematic diagram illustrating the process of fabricating a microcompartment structure 50 according to another embodiment of the present invention. In this embodiment, the microcompartment structure 50 is fabricated on a color filter layer CF. Figure 13A As shown, a color filter layer CF is first fabricated on the substrate 12, and then a common electrode layer 14 is fabricated on the color filter layer CF. The fabrication processes of these two layers can be reversed, with the common electrode layer 14 fabricated first and the color filter layer fabricated later. Then, a transparent photoresist and an exposure and development process are used on the common electrode layer 14 or the color filter layer to fabricate the partition walls 52 of the micro-segment structure 50.

[0221] In this embodiment, the process can be performed directly on the color filter layer CF or the common electrode layer 14. Figures 17A to 17F The partition wall 52 process can also be performed after fabricating a planarization layer PLN on the color filter layer CF or the common electrode layer 14. Figures 17A to 17F The partition wall 52 process. The material of the aforementioned planarization layer PLN can be an organic insulating material, an inorganic insulating material, or a combination thereof.

[0222] See Figure 13BAfter the partition wall 52 is fabricated, a colloidal solution containing charged black particles 26B and charged white particles 26W is filled into the chamber 54 defined by the partition wall 52 under vacuum conditions. (See following...) Figure 13C The process involves attaching a control substrate, specifically a control substrate 10 having a control electrode layer (PEL) and a drive circuit layer 30. The control substrate 10 is then bonded to the opposing substrate 12 with pre-fabricated micro-segments using optical adhesive 13 or by applying frame adhesive to the four edges of the display area. After bonding, the two substrates are heated and pressurized in a gas-pressurized chamber to extrude a gel solution and fill the gaps within the micro-segment structure. Finally, the optical adhesive or frame adhesive is cured to produce the electrophoretic display 100. In this embodiment, since the drive circuit layer 30 is not located near the viewing surface, a wider design range is possible, eliminating the need for the high aperture ratio drive circuit layer 30 of this invention. Furthermore, because this embodiment uses transparent photoresist (e.g., photoresist made of acrylic) to create the partition walls 52 of the micro-segment structure 50, the height H1 of the partition walls 52 can be less than 25 μm. In other words, the distance between the drive circuit layer 30 and the common electrode layer 14 can be less than 25 μm, which significantly increases the electric field applied to the electronic ink, increasing the screen refresh rate and other innovative features. Furthermore, since the colloidal solution is filled into the tank 54 defined by the partition wall 52 under vacuum working conditions, the filling rate of the colloidal solution in the tank 54 can reach more than 70%. With the help of the micro-clamp of the present invention, the colloidal solution of the same volume as the micro-clamp can be further squeezed into the tank, and the filling rate of the colloidal solution in the tank 54 can reach more than 90%.

[0223] See Figures 14A to 14C This is a schematic flowchart illustrating the fabrication of a microcompartment structure 50 according to another embodiment of the present invention. In this embodiment, the microcompartment structure 50 is fabricated on a conductive layer (e.g., common electrode layer 14). Figure 14A As shown, a common electrode layer 14 and a selective insulating layer are first formed on the opposing substrate 12, and then an insulating layer is formed on the common electrode layer 14. Figures 17A to 17F The partition wall 52 is fabricated using a process. The insulating layer can be made of silicon nitride, silicon oxide, or a composite layer of both using a deposition method on the common electrode layer 14.

[0224] In this embodiment, the process can be performed directly on the common electrode layer 14. Figures 17A to 17F The partition wall 52 process can also be performed after fabricating a planarization layer PLN on the common electrode layer 14. Figures 17A to 17F The partition wall 52 process. The material of the aforementioned planarization layer PLN can be an organic insulating material, an inorganic insulating material, or a combination thereof.

[0225] like Figure 14BAs shown, under vacuum operating conditions, a colloidal solution is filled into the chamber 54 defined by the partition wall 52 of the microcompartment structure 50. This colloidal solution contains charged cyan particles 26C, charged magenta particles 26M, charged yellow particles 26Y, and charged white particles 26W. See also... Figure 14C A control substrate 10 with micro tenons 60 is prepared, and the control substrate 10 is fixed to the opposing substrate 12 by aligning the micro tenons 60 with the cavity 54 defined by the partition wall 52, thereby achieving a tight bond between the two substrates and allowing the colloidal solution to fill the entire cavity 54. More specifically, a drive circuit layer 30, such as the high aperture ratio drive circuit layer 30 of the present invention, is first grown on the control substrate 10; then a control electrode layer PEL is formed, and the micro tenons 60 are formed on the control electrode layer PEL. Furthermore, details of the micro tenons 60 are described below.

[0226] 5. Micro-clamp

[0227] In the production of electronic paper, filling microcups or encapsulating electronic ink within microcapsules is the most impactful part of the entire process, affecting yield and representing the highest investment in production equipment. Since electronic ink is made by mixing a colloidal solution with charged color particles, the density and viscosity of the colloidal solution must be increased to achieve particle suspension. This results in gaps at the bottom of the microcups or microcells due to the high surface tension and viscosity of the colloidal solution. These gaps degrade image quality, a key factor contributing to poor yield in electronic paper production. The micro-clamping mechanism of this invention solves this problem. When the micro-clamping mechanism is inserted into the microcell, it further compresses the colloidal solution into the microcell, filling its internal space. The volume of compression can be adjusted by regulating the thickness of the micro-clamping mechanism, thus addressing the gap issue and significantly improving production yield. Furthermore, the micro-clamps embedded in the micro-cells also prevent air from entering. Therefore, after filling the colloidal solution in a vacuum, the perimeter of the panel can be bonded with frame adhesive instead of optical adhesive. Atmospheric pressure is used to uniformly and tightly press the two substrates with micro-cells and micro-clamps together. Even if there are defects in the frame adhesive and air leakage occurs, the air will be blocked by the micro-clamps and micro-cells, which will not affect the bonding force of the substrates. The reduced thickness of optical adhesive can reduce the distance between charged color particles and control electrodes, increase the image refresh rate, and reduce the driving voltage. All these benefits are built upon the ingenious design of the micro-clamps.

[0228] See Figure 14FThe micro-clamp 60 can be created by using photoresist, which, after exposure and development, leaves the area of ​​the micro-clamp, while the rest is cleaned away. Alternatively, a color filter layer can be used instead. Furthermore, the micro-clamp can be fabricated using a planarization layer (PLN) through a photolithography process to leave the area of ​​the micro-clamp. A certain gap S must be maintained between the micro-clamp 60 and the sidewall of the micro-segment chamber 54 as an alignment allowance. This gap S is, for example, 1–50 μm. According to one embodiment of the present invention, this gap ranges from 1 to 5 μm, depending on the accuracy of the photomask alignment when bonding the substrate, serving as an allowable error range during alignment and bonding to prevent damage caused by collision between the micro-segment and the micro-clamp due to alignment errors. The thickness of the micro-clamp can be 0.5–50 μm. A thicker thickness provides a more secure seal, but it can affect the attraction or repulsion of the control electrodes. Therefore, a reasonable balance needs to be struck between the sealing degree and the electrical effect. According to one embodiment of the present invention, the thickness of the micro-clamp 60 also ranges from 1 to 5 μm.

[0229] See Figure 14D This is a schematic diagram illustrating the fabrication of a microcompartment structure 50 according to another embodiment of the present invention. In this embodiment, the microcompartment structure 50 is fabricated after a conductive layer (e.g., a common electrode layer 14), and the conductive layer includes an insulating layer (not shown) for electrical isolation from charged colored particles. Figure 14D As shown, a common electrode layer 14 and an insulating layer are first formed on the opposing substrate 12. The insulating layer can be formed on the common electrode layer 14 using a deposition method with silicon nitride, silicon oxide, or a composite layer of both. Then, photoresist and exposure / development processes are used to fabricate the partition walls 52 of the micro-segment structure 50 on the common electrode layer 14 and the insulating layer. The fabrication process of the partition walls 52 can be as follows... Figures 17A to 17F The partition wall is manufactured using process 52. For example... Figure 14D As shown, a colloidal solution containing charged particles, such as a colloidal solution containing charged black particles 26B and charged white particles 26W, is filled between the compartment walls 52 of the microcompartment structure 50. See also Figure 14D This embodiment also includes fabricating a control substrate 10 with micro tenons 60, and fixing the control substrate 10 to the opposing substrate 12 by aligning the micro tenons 60 with the slots 54 defined by the partition wall 52, thereby achieving a bonding between the two substrates. More specifically, a drive circuit layer 30, such as the high aperture ratio drive circuit layer 30 of the present invention, is first grown on the control substrate 10; then a control electrode layer PEL is formed, and a color filter layer CF is formed on the control electrode layer PEL. The micro tenons 60 are formed on the color filter layer CF. If the thickness of the color filter layer meets the requirements, the color filter layer can also be used as the micro tenon 60.

[0230] See Figure 14F Micro-clamps can be created by using transparent photoresist through exposure and development, leaving the area with the micro-clamp intact while the rest is cleaned away; micro-clamps can also be used as a reference. Figure 14D In the embodiments, the color filter layer is used as a micro-clamp; alternatively, the micro-clamp can be fabricated using a planarization layer (PLN) through photolithography to leave the micro-clamp area. A certain gap S must be maintained between the micro-clamp 60 and the sidewall of the micro-segment 54 to serve as an alignment allowance. This gap S is, for example, 1–50 μm. According to one embodiment of the present invention, this gap ranges from 1 to 5 μm, depending on the accuracy of the photomask alignment, serving as an allowable error range during alignment and bonding to prevent damage caused by collision between the micro-segment and the micro-clamp due to alignment errors. The thickness of the micro-clamp can be 0.5–50 μm. A thicker thickness provides a more secure seal, but it can affect the attraction or repulsion of the control electrodes. Therefore, a reasonable balance needs to be struck between the sealing degree and the electrical effect. According to one embodiment of the present invention, the thickness of the micro-clamp 60 also ranges from 1 to 5 μm.

[0231] See Figure 14E This is a schematic diagram illustrating the fabrication of a microcompartment structure 50 according to another embodiment of the present invention. In this embodiment, the microcompartment structure 50 is fabricated on a conductive layer (e.g., a common electrode layer 14). Figure 14E As shown, a common electrode layer 14 is first formed on the opposing substrate 12. Then, a color filter layer CF is fabricated on the common electrode layer 14, and then the partition walls 52 of the micro-segment structure 50 are fabricated using a transparent photoresist and an exposure and development process.

[0232] In this embodiment, the process can be performed directly on the color filter layer CF. Figures 17A to 17F The partition wall 52 process can also be performed after fabricating a planarization layer PLN on the color filter layer CF. Figures 17A to 17F The partition wall 52 process. The material of the aforementioned planarization layer PLN can be an organic insulating material, an inorganic insulating material, or a combination thereof.

[0233] like Figure 14E As shown, a colloidal solution containing charged colored particles, such as a colloidal solution containing charged black particles 26B and charged white particles 26W, is filled between the compartment walls 52 of the microcompartment structure 50. See also Figure 14EThis embodiment also includes fabricating a control substrate 10 with microtenons 60, and fixing the control substrate 10 to the opposing substrate 12 by aligning the microtenons 60 with the slots 54 defined by the partition wall 52, thereby achieving a bonding of the two substrates. More specifically, a drive circuit layer 30, such as the high aperture ratio drive circuit layer 30 of the present invention, is first grown on the control substrate 10; then a control electrode layer PEL is formed, and the microtenons 60 are formed on the control electrode layer PEL.

[0234] See Figure 14F The micro-clamp can be fabricated using transparent photoresist, where the area of ​​the micro-clamp is left after exposure and development, and the rest is cleaned away. Alternatively, the micro-clamp can be fabricated using a planarization layer (PLN) through a photolithography process to leave the area of ​​the micro-clamp. A certain gap S must be maintained between the micro-clamp 60 and the sidewall of the micro-segment 54 to serve as an alignment allowance. This gap S is, for example, 1 to 50 μm. According to one embodiment of the present invention, this gap ranges from 1 to 5 μm, depending on the accuracy of the photomask alignment, and serves as an allowable error range during alignment and bonding to prevent damage caused by collision between the micro-segment and the micro-clamp due to alignment errors. The thickness of the micro-clamp can be 0.5 to 50 μm. A thicker thickness provides a more secure seal, but it may affect the attraction or repulsion of the control electrodes. Therefore, a reasonable balance needs to be struck between the degree of sealing and the electrical effect. According to one embodiment of the present invention, the thickness of the micro-clamp 60 also ranges from 1 to 5 μm.

[0235] In the above embodiments, the compartment walls 52 of the microcompartment structure 50 can be made of a high-hardness polymer material, such as a polymer material with a hardness greater than 3H. This allows the average wall thickness of the compartment walls 52 to be no greater than 5 μm while still maintaining sufficient support. Furthermore, although not clearly shown in... Figure 11A-11C , Figures 12A-12C , Figures 13A-13C , Figures 14A-14E However, those skilled in the art will know that in these illustrations, the color filter layer CF can have the characteristics of the present invention. Figure 18A The structure shown, namely the color filter layer CF, contains multiple filter color blocks (CFR, CFG, CFB) of different colors, each filter color block contains multiple holes H, and at least one of the holes H has an area of ​​no more than 100 square micrometers.

[0236] In addition, Figure 11A-11C , Figures 12A-12C , Figures 13A-13C , Figures 14A-14E The electrophoretic display 100 of the illustrated embodiment may have, as shown in the example Figures 3A-3C , Figures 4A-4C and Figure 5A and5C The control electrode layer PEL and drive circuit layer 30 architecture shown are used to increase the aperture ratio of the electrophoretic display 100; in addition, the width / length design of its thin-film transistors 32 and gate channel can also adopt, as shown in the figure. Figure 6C Thin-film transistor 32 architecture partially built on gate line GL and gate channel width / length design.

[0237] More specifically, in Figure 11A-11C , Figures 12A-12C , Figures 13A-13C , Figures 14A-14E In the electrophoretic display 100 of the illustrated embodiment, its control electrode layer PEL and driving circuit layer 30 can be adopted as follows: Figure 3B-3C , Figures 4A-4C , Figures 5A-5C The architecture shown includes a driving circuit layer 30 that further comprises multiple storage capacitors Cs and multiple common voltage lines Ve. These common voltage lines Ve are respectively positioned corresponding to the storage capacitors Cs and are generally parallel to the gate lines GL or the data lines DL. According to one embodiment of the present invention, in... Figure 11A-11C , Figures 12A-12C , Figures 13A-13C , Figures 14A-14E In the electrophoretic display 100 of the illustrated embodiment, it is also possible to use the following: Figure 19 The architecture shown connects its common voltage line Ve to a display driver 200 or a display touch integrated driver 200. During touch operation of the electrophoretic display 100, the display touch integrated driver 200 connects multiple data lines DL together as a single touch emitting electrode. The display touch integrated driver 200 connects multiple common voltage lines Ve together as a single touch receiving electrode, or the touch emitting electrode and the touch receiving electrode can be interchanged.

[0238] 6. Semi-transparent electrophoretic display

[0239] Known technologies for electronic paper displays (such as electrophoretic displays) cannot utilize translucent display methods. Translucent displays are suitable for use on car windows for information display, on display case glass for product explanations, on exterior wall advertisements, and in interior stained glass. Currently, only Organic Light Emitting Diodes (OLEDs) and Micro LEDs can achieve translucent displays, while traditional LCDs suffer from poor performance due to backlighting issues. Known electrophoretic displays are opaque and therefore unsuitable for these applications; both OLED and micro LED technologies consume significant amounts of energy. More specifically, the majority of the area in known electrophoretic displays is used for electronic ink display, and electronic ink contains various charged color particles, resulting in the opacity of these displays.

[0240] The advantages of using electrophoretic displays for semi-transparent displays are that they can be used in outdoor shop windows, car windows that display messages to the outside (such as rear windshields, which can display messages to remind following vehicles, advertisements), windows on exterior walls that allow the outside to be seen from inside, and indoor stained glass that allows light to pass through. The fact that electrophoretic displays do not consume electricity makes them the best choice in today's energy-scarce world.

[0241] See Figure 15AThis is a top view of a semi-transparent, semi-dual-color electrophoretic display fabricated according to the present invention. According to the present invention, in fabricating a transparent dual-color electrophoretic display, a micro-segment structure 50 having multiple partition walls 52 is fabricated on the control substrate 10, or the micro-segment structure 50 is fabricated after the color filter layer is completed, or the micro-segment structure 50 is fabricated after the conductive substrate is completed. The partition walls 52 of the micro-segment structure 50 can be fabricated into a rectangular structure similar to a color pixel or a square structure similar to a black and white pixel, and can also conform to the pixel boundaries without affecting the display. According to the present invention, for example, a photomask can be used to develop a pattern of transparent photoresist to fabricate transparent micro-segment walls. The material of the transparent photoresist can be a material with high hardness (e.g., a photoresist made of acrylic material). The partition walls 52 of the micro-cell structure 50 are made of transparent photoresist. Since there are no charged color particles on the walls of the micro-cells, the light can penetrate to the scene behind the display. By increasing the thickness of the partition walls 52, the transparent area can be increased, thus increasing the transparent portion of the transparent dual-color electrophoretic display (viewed from the operating surface). The light transmittance of the transparent photoresist is very high, greater than 90%. This micro-cell structure 50 with high light transmittance, combined with the control substrate 10 of the present invention, which is configured with a drive circuit layer 30 with a high aperture ratio, and with the opposing substrate 12 having a transparent conductive layer, can produce a semi-transparent electrophoretic display 100. The transparency of this semi-transparent electrophoretic display 100 depends on the ratio of the area of ​​the micro-cell inner container (the opaque area containing electronic ink) to the entire display surface. The area of ​​the micro-cell inner container containing electronic ink (a colloidal solution containing charged color particles) is the opaque area, and the remaining area is the transparent area. In other words, Figure 15A The inner gray area consists of the partition walls 52 of the micro-compartments, which are transparent, while the remaining areas are opaque areas containing electronic ink.

[0242] refer to Figure 15B This is a cross-sectional view of a semi-transparent dual-color electrophoretic display 100 manufactured according to an embodiment of the present invention. To achieve transparency on both sides of the electrophoretic display, a control substrate 10 with a high aperture ratio drive circuit layer 30, as described in the present invention, is used, along with a transparent opposing substrate 12 having a transparent conductive layer. Furthermore, this transparent dual-color electrophoretic display 100 undergoes... Figures 17A to 17F The partition wall 52 is manufactured using a process that increases its thickness to enhance transparency. According to one embodiment of the invention, the total area of ​​the partition wall 52's thickness is not less than 10% of the total display area of ​​the electrophoretic display 100. According to another embodiment of the invention, the total area of ​​the partition wall 52's thickness is not less than 35% of the total display area of ​​the electrophoretic display 100. Figure 15BAs shown, this translucent dual-color electrophoretic display 100 includes, from top to bottom, a opposing substrate 12 (i.e., a second substrate, such as a transparent plastic substrate or a glass substrate), a common electrode layer 14 (such as a transparent conductive electrode layer), an electrophoretic layer 20a, a control electrode layer PEL, a high aperture ratio driving circuit layer 30 (hereinafter referred to as the driving circuit layer 30), and a control substrate 10 (such as a glass substrate). Furthermore, as... Figure 15B As shown, the electrophoretic layer 20a includes a micro-compartment structure 50 formed by multiple partition walls 52, and these partition walls 52 define multiple cells 54 (two cells 54 are shown in the figure), and a colloidal solution 24 containing multiple charged color particles (e.g., charged black particles 26B and charged white particles 26W) is filled in each cell 54. According to one embodiment of the present invention, the material of the first electrode CE1 / second electrode CE2 of the storage capacitor Cs in the high aperture ratio drive circuit layer 30 is a transparent conductive material to improve the aperture ratio of this electrophoretic display 100. In addition, it is more helpful for users to view this electrophoretic display 100 from the control substrate 10 side, so that the control electrode layer PEL close to the viewing side can attract the required charged black particles 26B and charged white particles 26W, achieving a faster screen refresh rate. Figure 15B The driving circuit layer 30 shown can, for example, be made of Figure 3B-3C , Figures 4A-4C , Figures 5A-5C The driving circuit layer 30 shown is implemented.

[0243] refer to Figure 15C This is a cross-sectional view of a semi-transparent color electrophoretic display 100 according to another embodiment of the present invention. In this embodiment, one side displays a color image, while the opposite side displays a black and white image. First, a color filter layer CF is fabricated on a control substrate 10 having a transparent control electrode layer PEL and a high aperture ratio drive circuit layer 30. Then... Figures 17A to 17F The partition wall 52 is fabricated by filling a colloidal solution containing two-color charged particles 26 (e.g., charged black particles 26B and charged white particles 26W). Then, a transparent opposing substrate 12 (second substrate) is bonded to the transparent common electrode layer 14. Similarly, Figure 15C In the electrophoretic display 100 shown, the partition walls 52 of the micro-cells are made of transparent photoresist, and the wall thickness is increased to enhance transparency. According to one embodiment of the invention, the total area of ​​the partition walls 52 of the micro-cells is not less than 10% of the total display area of ​​the electrophoretic display 100. According to another embodiment of the invention, the total area of ​​the partition walls 52 of the micro-cells is not less than 35% of the total display area of ​​the electrophoretic display 100. Figure 15CAs shown, this translucent color electrophoretic display 100 includes, from top to bottom, a substrate 12 (e.g., a transparent plastic substrate or a glass substrate), a common electrode layer 14 (e.g., a transparent conductive electrode layer), an electrophoretic layer 20a, a color filter layer CF, a control electrode layer PEL, a high aperture ratio driving circuit layer 30 (hereinafter referred to as the driving circuit layer 30), and a control substrate 10 (e.g., a glass substrate). Furthermore, as... Figure 15C As shown, the electrophoretic layer 20a includes a micro-compartment structure 50 formed by multiple partition walls 52, and these partition walls 52 define multiple cells 54 (two cells 54 are shown in the figure), and a colloidal solution 24 containing multiple charged color particles (e.g., charged black particles 26B and charged white particles 26W) is filled in each cell 54. According to one embodiment of the present invention, the material of the first electrode CE1 / second electrode CE2 of the storage capacitor Cs in the high aperture ratio drive circuit layer 30 is a transparent conductive material, so as to improve the aperture ratio of this electrophoretic display 100. In addition, it is more helpful for users to view this electrophoretic display 100 from the control substrate 10 side, so as to facilitate the attraction of the required charged black particles 26B and charged white particles 26W by the control electrode layer PEL which is close to the viewing side, thereby achieving a faster screen refresh rate and other ingenious features. Figure 15C The driving circuit layer 30 shown can, for example, be made of Figure 3B-3C , Figures 4A-4C , Figures 5A-5C The driving circuit layer 30 shown is implemented.

[0244] refer to Figure 15D This is a cross-sectional view of a translucent color electrophoretic display 100 fabricated according to another embodiment of the present invention. This electrophoretic display 100 is first fabricated using a control substrate 10 having a transparent control electrode layer PEL and a high aperture ratio drive circuit layer 30, and then using a polymer material (e.g., a transparent photoresist material) for... Figures 17A to 17F The partition wall 52 is fabricated, and then a colloidal solution containing two-color charged particles 26 (e.g., charged black particles 26B and charged white particles 26W) is filled in. It is then bonded to a transparent opposing substrate 12 of the transparent common electrode layer 14. This transparent opposing substrate 12 further contains a color filter layer CF and micro tenons 60 located on the common electrode layer 14. See also [link to details]. Figure 14FThe micro-clamp 60 can be fabricated using transparent photoresist, where the area of ​​the micro-clamp is left after exposure and development, and the rest is cleaned away. Alternatively, the micro-clamp can be fabricated using a planarization layer (PLN) through a photolithography process to leave the area of ​​the micro-clamp. A certain gap S must be maintained between the micro-clamp 60 and the sidewall of the slot 54 of the micro-segment structure 50 as an alignment allowance. This gap S is, for example, 1 to 50 μm. According to one embodiment of the present invention, this gap ranges from 1 to 5 μm, depending on the accuracy of the photomask alignment when bonding the substrate, serving as an allowable error range during alignment and bonding to prevent damage to the micro-segment and micro-clamp due to collision caused by alignment errors. The thickness of the micro-clamp can be 0.5 to 50 μm. A thicker thickness provides a more secure seal, but it may affect the attraction or repulsion of the control electrodes. Therefore, a reasonable balance needs to be struck between the degree of sealing and the electrical effect. According to one embodiment of the present invention, the thickness of the micro-clamp 60 also ranges from 1 to 5 μm.

[0245] Similarly, Figure 15D In the electrophoretic display 100 shown, the partition walls 52 of the micro-cells are made of transparent photoresist, and the wall thickness is increased to enhance transparency. According to one embodiment of the invention, the total area of ​​the partition walls 52 of the micro-cells is not less than 10% of the total display area of ​​the electrophoretic display 100. According to another embodiment of the invention, the total area of ​​the partition walls 52 of the micro-cells is not less than 35% of the total display area of ​​the electrophoretic display 100. Figure 15D As shown, this transparent dual-color electrophoretic display 100 includes, from top to bottom, a substrate 12 (e.g., a transparent plastic substrate or a glass substrate), a common electrode layer 14 (e.g., a transparent conductive electrode layer), a color filter layer CF, a micro-clamp 60, an electrophoretic layer 20a, a control electrode layer PEL, a high aperture ratio driving circuit layer 30 (hereinafter referred to as the driving circuit layer 30), and a control substrate 10 (e.g., a glass substrate). Furthermore, as... Figure 15DAs shown, the electrophoretic layer 20a includes a micro-cell structure 50 formed by a plurality of partition walls 52, and these partition walls 52 define a plurality of cells 54 (two cells 54 are shown in the figure), and a colloidal solution 24 containing a plurality of charged color particles (e.g., charged black particles 26B and charged white particles 26W) is filled in each cell 54. Furthermore, the substrate 12 also includes a color filter layer CF located on the common electrode layer 14 and facing the electrophoretic layer 20a, and micro tenons 60. The micro tenons 60 are adapted to be embedded in the corresponding cells 54 of the micro-cell structure 50. According to one embodiment of the present invention, the first electrode CE1 / second electrode CE2 of the storage capacitor Cs in the high aperture ratio drive circuit layer 30 is made of a transparent conductive material to improve the aperture ratio of this electrophoretic display 100. Furthermore, it helps users view the electrophoretic display 100 from the control substrate 10 side, so that the control electrode layer PEL, which is close to the viewing side, can attract the required charged black particles 26B and charged white particles 26W, achieving a faster screen refresh rate. Figure 15D The driving circuit layer 30 shown can, for example, be made of Figure 3B-3C , Figures 4A-4C , Figures 5A-5C The driving circuit layer 30 shown is implemented.

[0246] refer to Figure 16A The image shown is a cross-sectional view of a semi-transparent, dual-color, double-sided electrophoretic display 100 manufactured according to another embodiment of the present invention. This electrophoretic display 100 can display different images on both sides. The architecture of this embodiment is similar. Figure 15B The architecture shown is different from the first control substrate 10D, except that the first control substrate 10D is replaced by a second control substrate 10U, which is also a transparent substrate and is coupled to the first control substrate 10D by being inserted into the corresponding slots 54 of the micro-slot structure 50 via micro-clamps 60. Furthermore, the second control substrate 10U also has an upper high aperture ratio drive circuit layer (second drive circuit layer) 30U and an upper control electrode layer (second control electrode layer) PELU, which has multiple second control electrodes PEU. Similarly, the first control substrate 10D has a lower high aperture ratio drive circuit layer (first control electrode layer) 30D and a lower control electrode layer (first control electrode layer) PELD, which has multiple first control electrodes PED.

[0247] Similarly, the micro-clamp 60 can be fabricated using transparent photoresist, where the area of ​​the micro-clamp is left after exposure and development, and the rest is cleaned away. Alternatively, the micro-clamp can be fabricated using a planarization layer (PLN) through a photolithography process to leave the area of ​​the micro-clamp. A certain gap S must be maintained between the micro-clamp 60 and the sidewall of the slot 54 of the micro-segment structure 50 as an alignment allowance. This gap S is, for example, 1 to 50 μm. According to one embodiment of the present invention, this gap ranges from 1 to 5 μm, depending on the accuracy of the photomask alignment when bonding the substrate, serving as an allowable error range during alignment and bonding to prevent damage caused by collision between the micro-segment and the micro-clamp due to alignment errors. The thickness of the micro-clamp can be 0.5 to 50 μm. A thicker thickness provides a more secure seal, but it can affect the attraction or repulsion of the control electrodes. Therefore, a reasonable balance needs to be struck between the sealing degree and the electrical effect. According to one embodiment of the present invention, the thickness of the micro-clamp 60 also ranges from 1 to 5 μm.

[0248] exist Figure 16A In the electrophoretic display 100 shown, transparent photoresist is used for... Figures 17A to 17F The partition wall 52 is manufactured using a process that increases its thickness to enhance transparency. According to one embodiment of the invention, the total area of ​​the partition wall 52 thickness of the micro-partitions is not less than 10% of the total display area of ​​the electrophoretic display 100. According to another embodiment of the invention, the total area of ​​the partition wall 52 thickness of the micro-partitions is not less than 35% of the total display area of ​​the electrophoretic display 100. According to one embodiment of the invention, the first electrode CE1 / second electrode CE2 of the storage capacitor Cs in the high aperture ratio drive circuit layers 30U and 30D are made of transparent conductive material to improve the aperture ratio of the electrophoretic display 100. Furthermore, this facilitates viewing the electrophoretic display 100 from the first control substrate 10D and the second control substrate 10U side, allowing the control electrode layers PELU and PELD, which are close to the viewing side, to attract the required charged black particles 26B and charged white particles 26W, achieving a faster screen refresh rate. Figure 16A The driving circuit layers 30U and 30D shown can, for example, be derived from... Figure 3B-3C , Figures 4A-4C , Figures 5A-5C The driving circuit layer 30 shown is implemented. Furthermore, the control electrode layer PELU and control electrode layer PELD can also be implemented accordingly. Figure 3B-3C , Figures 4A-4C , Figures 5A-5C The control electrode layer PEL shown is implemented.

[0249] Compound combination reference Figure 16AWhen the upper high-aperture second driving circuit layer 30U controls the electrode (second control electrode PEU) at the second control substrate 10U to be negatively charged, and the lower high-aperture first driving circuit layer 30D controls the corresponding electrode (first control electrode PED) at the first control substrate 10D to be positively charged, the positively charged black particles 26B will move to the upper second control electrode PEU, making the upper electrode position display a black pixel; the negatively charged white particles 26W will move to the lower first control electrode PED, making the lower first control electrode PED position display a white pixel. When the polarities of the upper and lower electrodes are reversed, the colors of the displayed pixels will also be reversed.

[0250] refer to Figure 16B ,correspond Figure 16A In this structure, when the upper and lower electrodes (the upper second control electrode PEU and the corresponding lower first control electrode PED) have the same polarity, for example, both are positively charged, the negatively charged white particles 26W will move towards the upper and lower electrodes, causing them to display white pixels. The positively charged black particles 26B will move towards the center and be obscured by the white particles 26W. Conversely, when both the upper and lower electrodes are negatively charged, the positively charged black particles 26B will move towards the upper and lower electrodes, and the white particles 26W will move towards the center and be obscured by the black particles 26B, resulting in black pixels on both electrodes.

[0251] refer to Figure 16C This is a cross-sectional view of a semi-transparent color double-sided electrophoretic display 100 fabricated according to another embodiment of the present invention. This electrophoretic display 100 can display different color images on both sides. The electrophoretic display 100 first fabricates a first color filter layer CF-1 on a first control substrate 10D having a transparent first control electrode layer PELD (with the first control electrode PED) and a high aperture ratio first driving circuit layer 30D, and then uses transparent photoresist... Figures 17A to 17F The partition wall 52 is fabricated by filling it with a colloidal solution containing two-color charged particles 26 (e.g., charged black particles 26B and charged white particles 26W). It is then pressed together with a transparent second control substrate 10U having micro-clamps 60. Furthermore, as... Figure 16C The transparent second control substrate 10U also has a high aperture ratio second driving circuit layer 30U on top, a transparent second control electrode layer PELU (with a second control electrode PEU) and a second color filter layer CF-2 formed on the transparent second control electrode layer PELU.

[0252] See compound combination Figure 14FThe micro-clamp 60 can be fabricated using transparent photoresist, where the area of ​​the micro-clamp is left after exposure and development, and the rest is cleaned away. Alternatively, the micro-clamp can be fabricated using a planarization layer (PLN) through a photolithography process to leave the area of ​​the micro-clamp. A certain gap S must be maintained between the micro-clamp 60 and the sidewall of the slot 54 of the micro-segment structure 50 as an alignment allowance. This gap S is, for example, 1 to 50 μm. According to one embodiment of the present invention, this gap ranges from 1 to 5 μm, depending on the accuracy of the photomask alignment, and serves as an allowable error range during alignment and bonding to prevent damage caused by collision between the micro-segment and the micro-clamp due to alignment errors. The thickness of the micro-clamp can be 0.5 to 50 μm. A thicker thickness provides a more secure seal, but it may affect the attraction or repulsion of the control electrodes. Therefore, a reasonable balance needs to be struck between the degree of sealing and the electrical effect. According to one embodiment of the present invention, the thickness of the micro-clamp 60 also ranges from 1 to 5 μm.

[0253] exist Figure 16C In the electrophoretic display 100 shown, the partition walls 52 of the micro-cells are made of transparent photoresist, and the wall thickness of the partition walls is increased to enhance transparency. According to one embodiment of the invention, the total area of ​​the partition walls 52 of the micro-cells is not less than 10% of the total display area of ​​the electrophoretic display 100. According to another embodiment of the invention, the total area of ​​the partition walls 52 of the micro-cells is not less than 35% of the total display area of ​​the electrophoretic display 100. According to one embodiment of the invention, the materials of the first electrode CE1 / second electrode CE2 of the storage capacitor Cs in the high aperture ratio drive circuit layers 30U and 30D are made of transparent conductive materials to improve the aperture ratio of the electrophoretic display 100. Furthermore, it facilitates viewing the electrophoretic display 100 from the first control substrate 10D and the second control substrate 10U side, allowing the control electrode layers PELU and PELD, which are close to the viewing side, to attract the required charged black particles 26B and charged white particles 26W, achieving faster screen refresh rates and other innovative features. Figure 16C The driving circuit layers 30U and 30D shown can, for example, be derived from... Figure 3B-3C , Figures 4A-4C , Figures 5A-5C The driving circuit layer 30 shown is implemented. Furthermore, the control electrode layer PELU and control electrode layer PELD can also be implemented accordingly. Figure 3B-3C , Figures 4A-4C , Figures 5A-5C The control electrode layer PEL shown is implemented.

[0254] refer to Figure 16D The image shows a cross-sectional view of a semi-transparent double-sided electrophoretic display 100 according to another embodiment of the present invention. This electrophoretic display 100 can display a color image on one side and a black-and-white image on the other side. The electrophoretic display 100 in this embodiment is similar to... Figure 16CThe electrophoretic display shown does not have a color filter layer on the second control substrate 10U side, thus it can display a black and white image on the second control substrate 10U side and a color image on the first control substrate 10D side. Similarly, the second control substrate 10U has micro-clamps 60 formed thereon, and the first control substrate 10D has micro-cell structures 50 (with slots 54) formed thereon. Similarly, the micro-cell structures 50 are formed on the second control substrate 10U, and the micro-clamps 60 are formed on the first control substrate 10D; the second control substrate 10U is coupled to the first control substrate 10D by the micro-clamps 60 being inserted into the corresponding slots 54 of the micro-cell structures 50. Alternatively, the first control substrate 10D is coupled to the second control substrate 10U by the micro-clamps 60 being inserted into the corresponding slots 54 of the micro-cell structures 50. The micro-clamp 60 can be fabricated using transparent photoresist through exposure and development; alternatively, the micro-clamp can be fabricated by leaving the micro-clamp area through a planarization layer (PLN) photolithography process. A certain gap S must be maintained between the micro-clamp 60 and the sidewall of the slot 54 of the micro-segment structure 50 as an alignment allowance. This gap S is, for example, 1 to 50 μm. According to one embodiment of the present invention, this gap ranges from 1 to 5 μm, depending on the alignment accuracy, and serves as the allowable error range during photomask alignment and bonding to prevent damage caused by collision between the micro-segment and the micro-clamp due to alignment errors. The thickness of the micro-clamp can be 0.5 to 50 μm. A thicker thickness provides a more secure seal, but it can affect the attraction or repulsion of the control electrodes. Therefore, a reasonable balance needs to be struck between the sealing degree and the electrical effect. According to one embodiment of the present invention, the thickness of the micro-clamp 60 also ranges from 1 to 5 μm.

[0255] exist Figure 16D In the electrophoretic display 100 shown, the partition walls 52 of the micro-cells are made of transparent photoresist, and the wall thickness of the partition walls is increased to enhance transparency. According to one embodiment of the invention, the total area of ​​the partition walls 52 of the micro-cells is not less than 10% of the total display area of ​​the electrophoretic display 100. According to another embodiment of the invention, the total area of ​​the partition walls 52 of the micro-cells is not less than 35% of the total display area of ​​the electrophoretic display 100. According to one embodiment of the invention, the materials of the first electrode CE1 / second electrode CE2 of the storage capacitor Cs in the high aperture ratio drive circuit layers 30U and 30D are made of transparent conductive materials to improve the aperture ratio of the electrophoretic display 100. Furthermore, it helps users view the electrophoretic display 100 from the first control substrate 10D and the second control substrate 10U side, as the control electrode layers PELU and PELD, which are close to the viewing side, attract the required charged black particles 26B and charged white particles 26W, achieving a faster screen refresh rate. Figure 16D The driving circuit layers 30U and 30D shown can, for example, be derived from... Figure 3B-3C , Figures 4A-4C , Figures 5A-5C The driving circuit layer 30 shown is implemented. Furthermore, the control electrode layer PELU and control electrode layer PELD can also be implemented accordingly. Figure 3B-3C , Figures 4A-4C , Figures 5A-5C The control electrode layer PEL shown is implemented.

[0256] 7. A color filter layer with perforations

[0257] like Figure 7A As shown, when using a color filter layer to display color images in an electronic paper display, light suffers two light losses: one upon entering the color filter layer and another upon reflection. These two light losses reduce the visible brightness. Furthermore, due to the distance between the color filter layer and the reflecting particles, when the color area of ​​the incident light differs from the color area of ​​the reflected light, almost no light penetrates after passing through the different color filters and is almost entirely absorbed, further reducing the visible brightness.

[0258] See Figure 18A According to one embodiment of the present invention, multiple holes H can be formed on the color filter blocks of the color filter layer CF, such as the red color filter block CFR, the green color filter block CFG, and the blue color filter block CFB. According to one embodiment, the area of ​​at least one hole H is no greater than 100 square micrometers, or the area of ​​most of the holes H is no greater than 100 square micrometers. Furthermore, according to another embodiment, the total area of ​​holes H within the same color is no less than 10% of the total area of ​​that color. For example, for the red color filter block CFR, the total area of ​​holes H within its range is no less than 10% of the total area of ​​the red color filter block CFR. By setting the holes H and planning their individual and total areas, the light loss of the color filter layer CF can be reduced.

[0259] See compound combination Figure 18BWhen incident light L2 enters a colored region (e.g., the red filter color block CFR) and the reflected light is also in a colored region (e.g., the red filter color block CFR), the light undergoes two filters, resulting in high attenuation. When incident light L1 enters a colored region (e.g., the red filter color block CFR) and the reflected light is in a colorless region (e.g., the corresponding aperture H), the light undergoes only one filter, resulting in low attenuation. If incident light enters a colorless region (e.g., the corresponding aperture H) and the reflected light is in a colored region (e.g., the red filter color block CFR), the light undergoes only one filter, resulting in low attenuation. If both incident and reflected light are in colorless regions (e.g., the corresponding aperture H), there is no filter attenuation, but the emitted color is the color of the charged color particle 26. However, the probability of the above situation is the lowest. It will only occur when light is incident at a vertical angle or at a special angle. Using the color filter layer CF with holes H of the present invention can improve the saturation and brightness of colors, which is of great help to the color display of electronic paper.

[0260] The aforementioned color filter layer CF with holes H can be used in known electrophoretic displays 100, for example... Figure 2A The electrophoretic display 100 shown can also be used in applications with the present invention. Figure 3B-3C , Figures 4A-4C , Figures 5A-5C The color electrophoretic display 100 shown has a high aperture ratio drive circuit layer 30; it can also be applied to displays with the present invention. Figure 6C The color electrophoretic display 100 with thin-film transistors that can improve aperture ratio shown can also be applied to the present invention. Figures 7B-7C , Figures 8A-8B The color filter layer CF shown is in the color electrophoretic display 100 near the control substrate side; it can also be applied to the present invention. Figures 12A-12C , Figures 13A-13C , Figure 14D and Figure 14E The color electrophoretic display 100 with micro-septum structure 50 shown can also be used in this invention. Figure 15C-15D , Figure 16C-16D The color translucent electrophoretic display 100 shown is an example of this. Therefore, the color filter layer CF used in the various embodiments and combinations described above is within the scope of protection of this invention.

[0261] 8. Electrophoretic display with embedded touch screen

[0262] See Figure 19 This is a schematic diagram of an embedded touch screen in an electrophoretic display 100 according to the present invention. See the present invention for further details. Figure 4A and Figure 4B Examples, such as... Figure 4BAs shown, the common voltage line Ve of the transparent conductive electrode ITO1 (CE2) used to provide the second electrode of the storage capacitor Cs extends in a direction substantially parallel to the gate line GL. Furthermore, the data line DL, made of the second metal layer M2, is substantially perpendicular to the common voltage line Ve. An insulating layer is sandwiched between the first and second electrodes providing the storage capacitor Cs. This insulating layer between the data lines and the common voltage line is on the same layer as an insulating layer of the storage capacitors (e.g., the insulating layer CI of the storage capacitor Cs, or the insulating layer of the thin-film transistor 32 or an extension thereof). Therefore, a mutual capacitance touch sensing structure can be provided by the data line DL and the common voltage line Ve made of transparent conductive material, enabling the electrophoretic display 100 to have in-cell touch functionality. See also... Figure 19 Multiple common voltage lines Ve along the gate line GL are connected in groups of more than one after extending to the periphery of the display surface of the electrophoretic display 100, either inside or outside a display touch integrated driver 200 (TDDI). The following example illustrates that four common voltage lines Ve can be electrically connected as a group. However, according to other feasible embodiments of the present invention, other numbers of common voltage lines Ve can also be electrically connected as a group. Therefore, the following examples are merely illustrative and not intended to limit the scope of the present invention. For example, assuming there are 4M common voltage lines Ve, and every four common voltage lines Ve are electrically connected to each other as a group, there are M groups of touch receiving electrodes (Rx), each electrically connected to the display touch integrated driver 200 (TDDI). In other words, according to one embodiment of the present invention, a total of 4M common voltage lines Ve are electrically connected to the Display Touch Integrated Driver 200 (TDDI), and within the Display Touch Integrated Driver 200 (TDDI), every four common voltage lines Ve are electrically connected together as a group by multiple switches to form M groups of touch receiving electrodes (Rx). Furthermore, according to another embodiment of the present invention, there are a total of 4M common voltage lines Ve, and every four common voltage lines Ve are electrically connected together to form M groups of touch receiving electrodes (Rx). The M groups of touch receiving electrodes (Rx) are then electrically connected to the Display Touch Integrated Driver 200 (TDDI).

[0263] Furthermore, after the data lines DL enter the display touch integrated driver 200 (TDDI) from the electrophoretic display 100, they are connected together in groups of more than one using a switching switch. The following example illustrates that four data lines DL can be electrically connected as a group. However, according to other feasible embodiments of the present invention, other numbers of data lines DL can also be electrically connected as a group. Therefore, the following examples are merely illustrative and not intended to limit the scope of the present invention. For example, assuming there are 4N data lines DL, and after the 4N data lines DL are electrically connected to the display touch integrated driver 200 (TDDI), every four data lines DL can be selectively electrically connected as a group within the display touch integrated driver 200 (TDDI) to form N groups of touch emission electrodes (Tx). Furthermore, the aforementioned selective electrical connection specifically means that the display touch integrated driver 200 (TDDI) can selectively connect every four data lines DL as a group or selectively disconnect the electrical connection of these four data lines DL according to the required operation. With the above architecture, an embedded touch structure with a resolution of MxN can be provided in an electrophoretic display.

[0264] During the screen display phase of the electrophoretic display 100, the M groups of touch receiving electrodes (Rx) are electrically connected together inside the display touch integrated driver 200 (TDDI) to serve as a common voltage line Ve (i.e., providing Vcom). The display touch integrated driver 200 (TDDI) controls all 4N data lines DL to be separated as control signals for outputting the screen. During the touch phase, the M groups of touch receiving electrodes (Rx) serve as touch input signal terminals. That is, the display touch integrated driver 200 (TDDI) connects and receives these common voltage lines Ve in groups, and then sends them to a touch sensing circuit for further processing. Furthermore, the display touch integrated driver 200 (TDDI) controls the 4N data lines DL so that every four data lines DL are electrically connected as a group to provide N groups of touch transmitting electrodes (Tx), and a touch driving circuit provides the transmitting signal, thereby forming an MxN embedded touch structure. Furthermore, integrating the touch driver integrated circuit and the display driver integrated circuit into a single Touch with Display Driver 200 (TDDI) simplifies the architecture of the electrophoretic display 100 when providing touch and screen display.

[0265] According to another embodiment of the present invention, the 4M common voltage lines Ve can also constitute M sets of touch transmitting electrodes (Tx). Conversely, the 4N data lines DL can also constitute N sets of touch receiving electrodes (Rx). For example, after the 4N data lines DL are electrically connected to the display touch integrated driver 200 (TDDI), each group of four data lines DL can be selectively electrically connected within the display touch integrated driver 200 (TDDI) to constitute N sets of touch receiving electrodes (Rx). During the screen display phase of the electrophoretic display 100, the M sets of touch transmitting electrodes (Tx) are electrically connected together within the display touch integrated driver 200 (TDDI) to serve as the common voltage line Ve (i.e., providing Vcom), and the display touch integrated driver 200 (TDDI) controls all 4N data lines DL to be separated as control signals for outputting the screen. During the touch phase, a touch driving circuit provides transmission signals to the M sets of touch transmitting electrodes (Tx). Furthermore, the Touch with Display Driver 200 (TDDI) controls 4N data lines DL such that every four data lines DL are electrically connected as a group to provide N sets of touch receiving electrodes (Rx). That is, after the Touch with Display Driver 200 (TDDI) groups and connects these data lines and receives them, it sends them to a touch sensing circuit for further processing, thereby providing an MxN embedded touch structure. In addition, integrating the touch driver integrated circuit and the display driver integrated circuit into a Touch with Display Driver 200 (TDDI) simplifies the architecture of the electrophoretic display 100 when providing touch and screen display. Furthermore, the Touch with Display Driver 200 can also integrate the touch sensing circuit and driving circuit on other chips, which is also within the scope of this invention.

[0266] Based on the above description, during touch operation, the integrated display touch driver electrically connects multiple data lines together as a single touch transmitting electrode; the integrated display touch driver also electrically connects multiple common voltage lines together as a single touch receiving electrode. Alternatively, during touch operation, the integrated display touch driver electrically connects multiple data lines together as a single touch receiving electrode; the integrated display touch driver also electrically connects multiple common voltage lines together as a single touch transmitting electrode. Both of these methods are within the scope of this invention.

[0267] In the above description, although 4M common voltage lines Ve are used as an example, and every four common voltage lines Ve are electrically connected to each other to form M sets of touch receiving electrodes (Rx) or M sets of touch transmitting electrodes (Tx), this example should not be considered a limitation of the invention. Those skilled in the art can design different numbers (at least more than one) of common voltage lines Ve to be electrically connected to each other. Furthermore, in the above description, although 4N data lines DL are used as an example, and every four data lines DL are electrically connected to each other to form N sets of touch transmitting electrodes (Tx) or N sets of touch receiving electrodes (Rx), this example should not be considered a limitation of the invention. Those skilled in the art can design different numbers (at least more than one) of data lines DL to be electrically connected to each other during touch operation.

[0268] have Figure 19 The electrophoretic display with embedded touch shown can have the features of the present invention. Figure 3B-3C , Figures 4A-4C , Figures 5A-5C The diagram shows a drive circuit layer 30 with a high aperture ratio and a control electrode layer PEL architecture. Furthermore, it has... Figure 19 The electrophoretic display with embedded touch shown can have, for example, the following features Figure 11A-11C , Figures 12A-12C , Figures 13A-13C , Figures 14A-14E The micro-compartment structure 50 and the corresponding micro-clamp structure 60 are shown.

[0269] 9. Electrophoretic display with double-sided control substrate

[0270] like Figure 20AThe diagram illustrates an electrophoretic display 100 with a double-sided control substrate according to an embodiment of the present invention. This electrophoretic display 100 with a double-sided control substrate has, from top to bottom, a second control substrate 10U, a micro-segment structure 50, and a first control substrate 10D. Furthermore, the first control substrate 10D has a first surface and a second surface adjacent to the micro-segment structure 50. A first high aperture ratio driving circuit layer 30D and a first control electrode layer PELD (having multiple first control electrodes PED) are provided on the second surface of the first control substrate 10D. The second control substrate 10U has a fourth surface and a third surface adjacent to the micro-segment structure 50. A second high aperture ratio driving circuit layer 30U and a second control electrode layer PELU (having multiple second control electrodes PEU) are provided on the third surface of the second control substrate 10U. According to an embodiment of the present invention, when fabricating the electrophoretic display 100 with a double-sided control substrate, a micro-segment structure 50 having multiple partition walls 52 is fabricated on the first control substrate 10D side. More specifically, firstly, a first driving circuit layer 30D, a first transparent control electrode layer PELD, and an insulating protective layer (not shown) are fabricated on the first control substrate 10D, and then a color filter layer CF is fabricated. In this embodiment, the color filter layer CF can be fabricated after its completion. Figures 17A to 17F The partition wall 52 process can also be performed after fabricating a planarization layer PLN on the color filter layer CF. Figures 17A to 17F The partition wall 52 is fabricated. The material of the planarization layer PLN can be an organic insulating material, an inorganic insulating material, or a combination thereof. After the partition wall 52 is fabricated, a colloidal solution containing charged black particles 26B and charged white particles 26W is filled into the chamber 54 defined by the partition wall 52 under vacuum conditions. Subsequently, a process is performed to attach the second control substrate 10U, that is, to provide a second control substrate 10U with a second high aperture ratio drive circuit layer 30U and a second control electrode layer PELU. Furthermore, as... Figure 20A As shown. The second control electrode layer PELU has micro-clamps 60 corresponding to the shape of the slot 54.

[0271] See compound combination Figure 14FThe micro-clamp 60 can be fabricated using transparent photoresist, where the area of ​​the micro-clamp is left after exposure and development, and the rest is cleaned away. Alternatively, the micro-clamp can be fabricated using a planarization layer (PLN) through a photolithography process to leave the area of ​​the micro-clamp. A certain gap S must be maintained between the micro-clamp 60 and the sidewall of the slot 54 of the micro-segment structure 50 as an alignment allowance. This gap S is, for example, 1 to 50 μm. According to one embodiment of the present invention, this gap ranges from 1 to 5 μm, depending on the accuracy of the photomask alignment, and serves as an allowable error range during alignment and bonding to prevent damage caused by collision between the micro-segment and the micro-clamp due to alignment errors. The thickness of the micro-clamp can be 0.5 to 50 μm. A thicker thickness provides a more secure seal, but it may affect the attraction or repulsion of the control electrodes. Therefore, a reasonable balance needs to be struck between the degree of sealing and the electrical effect. According to one embodiment of the present invention, the thickness of the micro-clamp 60 also ranges from 1 to 5 μm.

[0272] like Figure 20AAs shown, by applying voltages of opposite polarities to the first control electrode PED and the second control electrode PEU during driving, the movement of charged particles can be accelerated, and the clustering phenomenon caused by the aggregation of positive and negative charged particles can be dissociated, thereby speeding up the image update speed and improving reflectivity. When the upper second driving circuit layer 30U controls the electrode (second control electrode PEU) at the second control substrate 10U to be negatively charged, and the lower first driving circuit layer 30D controls the corresponding electrode (first control electrode PED) of the first control substrate 10D to be positively charged, the positively charged black particles 26B will move to the upper second control electrode PEU; the negatively charged white particles 26W will move to the lower first control electrode PED, so that the position of the lower first control electrode PED matches the corresponding filter color block of the color filter layer CF to display color pixels. More specifically, the lower first driving circuit layer 30D controls the first control electrode PED to attract the negatively charged white particles 26W, allowing the white particles to adhere to the surface of the PED. The color of the color filter block reflected by the white particles is visible from the first surface of the first control substrate 10D. Meanwhile, the upper second driving circuit layer 30U controls the second control electrode PEU to repel the negatively charged white particles 26W, accelerating the movement of the white particles towards the first control electrode PED. This achieves a faster image update speed in the electrophoretic display with a double-sided control substrate. The above operation is based on the viewing surface being the first surface, allowing for a higher update rate of color images on the first surface. Similarly, if the viewing surface is on the fourth surface of the second control substrate 10U (the side furthest from the first surface), a black and white image with a better refresh rate can be presented on the fourth surface. In addition, the attraction and repulsion forces generated by the two substrates are much greater than those of known technologies, which can effectively dissociate the clustering phenomenon caused by the aggregation of positive and negative charged particles. Therefore, a higher density of charged particles can be used to increase the number of stacked layers of particles on the control electrodes PEU and PED, thereby improving the reflectivity of light.

[0273] like Figure 20BThe diagram illustrates an electrophoretic display 100 with a double-sided control substrate according to another embodiment of the present invention. This electrophoretic display 100 with a double-sided control substrate has, from top to bottom, a second control substrate 10U, a micro-segment structure 50, and a first control substrate 10D. Furthermore, the first control substrate 10D has a first surface and a second surface adjacent to the micro-segment structure 50. A first high aperture ratio driving circuit layer 30D and a first control electrode layer PELD (having multiple first control electrodes PED) are provided on the second surface of the first control substrate 10D. The second control substrate 10U has a fourth surface and a third surface adjacent to the micro-segment structure 50. A second high aperture ratio driving circuit layer 30U and a second control electrode layer PELU (having multiple second control electrodes PEU) are provided on the third surface of the second control substrate 10U. According to one embodiment of the present invention, when fabricating the electrophoretic display 100 with a double-sided control substrate, a micro-segment structure 50 having multiple partition walls 52 is fabricated on the first control substrate 10D side. More specifically, firstly, a first driving circuit layer 30D, a first transparent control electrode layer PELD, and an insulating protective layer (not shown) are fabricated on the first control substrate 10D. Then, on the first transparent control electrode layer PELD, a... Figures 17A to 17F The partition wall 52 process can also be performed after fabricating a planarization layer PLN on the first transparent control electrode layer PELD. Figures 17A to 17F The partition wall 52 is fabricated. The material of the planarization layer PLN can be an organic insulating material, an inorganic insulating material, or a combination thereof. After the partition wall 52 is fabricated, a colloidal solution containing charged colored particles, such as charged cyan particles 26C, charged magenta particles 26M, charged yellow particles 26Y, and charged white particles 26W, is filled into the chamber 54 defined by the partition wall 52 under vacuum conditions. Subsequently, a process of attaching the second control substrate 10U is performed, that is, providing a second control substrate 10U with a second high aperture ratio drive circuit layer 30U and a second control electrode layer PELU. In addition, such as Figure 20B As shown. The second control electrode layer PELU has micro-clamps 60 corresponding to the shape of the slot 54.

[0274] See compound combination Figure 14FThe micro-clamp 60 can be fabricated using transparent photoresist, where the area of ​​the micro-clamp is left after exposure and development, and the rest is cleaned away. Alternatively, the micro-clamp can be fabricated using a planarization layer (PLN) through a photolithography process to leave the area of ​​the micro-clamp. A certain gap S must be maintained between the micro-clamp 60 and the sidewall of the slot 54 of the micro-segment structure 50 as an alignment allowance. This gap S is, for example, 1 to 50 μm. According to one embodiment of the present invention, this gap ranges from 1 to 5 μm, depending on the accuracy of the photomask alignment, and serves as an allowable error range during alignment and bonding to prevent damage caused by collision between the micro-segment and the micro-clamp due to alignment errors. The thickness of the micro-clamp can be 0.5 to 50 μm. A thicker thickness provides a more secure seal, but it may affect the attraction or repulsion of the control electrodes. Therefore, a reasonable balance needs to be struck between the degree of sealing and the electrical effect. According to one embodiment of the present invention, the thickness of the micro-clamp 60 also ranges from 1 to 5 μm.

[0275] like Figure 20B As shown, when the upper second driving circuit layer 30U controls the electrode (second control electrode PEU) at the second control substrate 10U to be negatively charged, and the lower first driving circuit layer 30D controls the corresponding electrode (first control electrode PED) of the first control substrate 10D to be positively charged, the charged cyan particles 26C (positive charge), charged magenta particles 26M (positive charge), charged yellow particles 26Y (negative charge), and charged white particles 26W (negative charge) can be controlled to move in the corresponding directions. For example, the lower first driving circuit layer 30D controls the first control electrode PED to attract negatively charged white particles 26W and yellow particles 26Y, and to repel positively charged magenta particles 26M and cyan particles 26C. The upper second driving circuit layer 30U controls the second control electrode PEU to attract positively charged magenta particles 26M and cyan particles 26C, and to repel negatively charged white particles 26W and yellow particles 26Y. The attraction varies depending on the charge number of the particles, and this attraction can be achieved through voltage changes and polarity adjustments. The changes in the charge control electrode PED and PEU control the movement of four types of charged particles. Because the charge polarities of the two-sided control electrodes PED and PEU are different, the movement speed of the charge can be several times faster than known technologies, thus speeding up the screen refresh rate. It can also solve the clustering phenomenon that occurs when the density of charged particles is high. A colloidal solution with a higher density of charged particles can be used to increase the number of particle stacking layers on the surface of the control electrodes PED and PEU, thereby increasing the light reflectivity and improving the shortcomings of insufficient reflectivity in known technologies. This innovation achieves better screen refresh rate and reflectivity for the electrophoretic display 100 with a double-sided control substrate.

[0276] like Figure 20CThe diagram illustrates an electrophoretic display 100 with a double-sided control substrate according to another embodiment of the present invention. This electrophoretic display 100 with a double-sided control substrate has, from top to bottom, a second control substrate 10U, a micro-segment structure 50, and a first control substrate 10D. Furthermore, the first control substrate 10D has a first surface and a second surface adjacent to the micro-segment structure 50. A first high aperture ratio driving circuit layer 30D and a first control electrode layer PELD (having multiple first control electrodes PED) are provided on the second surface of the first control substrate 10D. The second control substrate 10U has a fourth surface and a third surface adjacent to the micro-segment structure 50. A second high aperture ratio driving circuit layer 30U and a second control electrode layer PELU (having multiple second control electrodes PEU) are provided on the third surface of the second control substrate 10U. According to one embodiment of the present invention, when fabricating the electrophoretic display 100 with a double-sided control substrate, a micro-segment structure 50 having multiple partition walls 52 is fabricated on the first control substrate 10D side. More specifically, firstly, a first driving circuit layer 30D, a first transparent control electrode layer PELD, and an insulating protective layer (not shown) are fabricated on the first control substrate 10D, and then a first color filter layer CF-1 is fabricated. In this embodiment, the first color filter layer CF-1 can be fabricated after its completion. Figures 17A to 17F The partition wall 52 process can also be performed after fabricating a planarization layer PLN on the first color filter layer CF-1. Figures 17A to 17F The partition wall 52 is fabricated. The material of the planarization layer PLN can be an organic insulating material, an inorganic insulating material, or a combination thereof. After the partition wall 52 is fabricated, a colloidal solution containing charged black particles 26B and charged white particles 26W is filled into the chamber 54 defined by the partition wall 52 under vacuum conditions. Subsequently, a process is performed to attach the second control substrate 10U, that is, to provide a second control substrate 10U with a second high aperture ratio drive circuit layer 30U and a second control electrode layer PELU. Furthermore, as... Figure 20C As shown, a second color filter layer CF-2 is provided on the second control electrode layer PELU. Optical adhesive is used between the second control substrate 10U and the partition wall 52, or frame adhesive is applied to the four edges of the display area before bonding. After completion, the two substrates are placed in a gas pressurization chamber for heating and pressurization, thereby extruding the adhesive solution into and filling the gaps within the micro-segment structure 50. Finally, the optical adhesive or frame adhesive is cured to complete the fabrication of the electrophoretic display 100.

[0277] like Figure 20CAs shown, when the upper second driving circuit layer 30U controls the electrode (second control electrode PEU) at the second control substrate 10U to be negatively charged, and the lower first driving circuit layer 30D controls the corresponding electrode (first control electrode PED) of the first control substrate 10D to be positively charged, the positively charged black particles 26B will move to the upper second control electrode PEU; the negatively charged white particles 26W will move to the lower first control electrode PED, so that the position of the lower first control electrode PED matches the corresponding filter color block of the color filter layer CF to display color pixels. More specifically, since the lower first driving circuit layer 30D controls the first control electrode PED to attract the negatively charged white particles 26W, and the upper second driving circuit layer 30U controls the second control electrode PEU to repel the negatively charged white particles 26W, the movement speed of the white particles 26W can be accelerated, achieving a better screen refresh rate for the electrophoretic display 100 with double-sided control substrates. In addition, the attraction and repulsion forces generated by the two substrates are much greater than those of known technologies, which can effectively dissociate the clustering phenomenon caused by the aggregation of positive and negative charged particles. Therefore, a higher density of charged particles can be used to increase the number of stacked layers of particles on the control electrodes PEU and PED, thereby improving the light reflectivity.

[0278] like Figure 20C As shown, when the upper second driving circuit layer 30U controls the electrode (second control electrode PEU) at the second control substrate 10U, and the lower first driving circuit layer 30D controls the corresponding electrode (first control electrode PED) of the first control substrate 10D, and the charges of PEU and PED present the voltage required for their respective display images, this embodiment of the invention can be used as an electrophoretic display that displays different color images on both sides. When the upper and lower electrodes (the upper second control electrode PEU and the corresponding lower first control electrode PED) have the same polarity, for example, when they are both positively charged, the negatively charged white particles 26W will move to the upper and lower electrodes, so that the upper and lower electrodes display the color of the color filter block reflected by the white pixel. The positively charged black particles 26B will move to the middle and be blocked by the white particles 26W and cannot be seen. Conversely, when both the upper and lower electrodes are negatively charged, the positively charged black particles 26B will move towards the upper and lower electrodes, while the white particles 26W will move towards the middle and be obscured by the black particles 26B. In this case, the upper and lower electrodes display black pixels. For example, when the charge polarities of the upper and lower electrodes are reversed, the positively charged black particles 26B will move towards the negatively charged control electrode and appear black on the viewing surface of the control electrode. The negatively charged white particles 26W will move towards the positively charged control electrode and appear the color of the color filter block reflected by the white pixels on the viewing surface of the control electrode. In this way, the image seen on the first surface of 10D can be different from the image seen on the fourth surface of 10U, presenting a double-sided color image display 100.

[0279] However, the above description is merely a preferred embodiment of the present invention and should not be construed as limiting the scope of the invention. All equivalent changes and modifications made within the scope of the claims of this invention should still fall within the intended protection scope of this invention. The present invention may also have other embodiments. Without departing from the spirit and essence of the invention, those skilled in the art can make various corresponding changes and modifications based on the present invention, but these corresponding changes and modifications should all fall within the protection scope of the appended claims.

Claims

1. An electrophoretic display with micro-cantilever gap, the electrophoretic display comprising: a control substrate having a first surface and a second surface; a drive circuit layer on the second surface of the control substrate, comprising a plurality of thin film transistors, a plurality of gate lines and a plurality of data lines, at least one of the gate lines electrically connected to the gate of the plurality of thin film transistors, at least one of the data lines electrically connected to the source or drain of the plurality of thin film transistors; a control electrode layer on a surface of the drive circuit layer distal to the control substrate, comprising a plurality of control electrodes, at least one of the control electrodes electrically connected to the source or drain of one of the thin film transistors; an opposing substrate having a third surface and a fourth surface, the third surface opposing the second surface; a microcell structure disposed between the opposing substrate and the control substrate, the microcell structure made of a polymer material and comprising a plurality of cell walls to define a plurality of chambers filled with electrophoretic material, the chambers having a chamber bottom end and a chamber top end at opposite ends of the chambers; a plurality of micro-cantilevers, wherein one of the micro-cantilevers is embedded in one of the chamber top ends, and there is a gap between the micro-cantilever and the cell walls of the chamber no more than 50 microns; wherein the thickness of the micro-cantilever is between 0.5 and 50 microns; and the electrophoretic material comprises a plurality of charged color particles disposed in a colloidal solution and capable of moving through the colloidal solution under the influence of an electric field, the plurality of charged color particles comprising positively charged color particles or / and negatively charged color particles.

2. The electrophoretic display with micro-cantilever gap of claim 1, wherein the polymer material is a photoresist material, a planarization layer material, or a resin.

3. The electrophoretic display with micro-cantilever gap of claim 1, wherein the thickness of the micro-cantilever is between 1 and 5 microns.

4. The electrophoretic display with micro-cantilever gap of claim 1, wherein the gap between the micro-cantilever and the cell walls of the chamber is between 1 and 5 microns.

5. The electrophoretic display with micro-cantilever gap of claim 1, wherein there is a color filter layer between the second surface and the third surface.

6. The electrophoretic display with micro-cantilever gap of claim 1, wherein the control substrate aperture ratio of the electrophoretic display is no less than 70% as viewed from the first surface of the control substrate into the display area of the electrophoretic display.

7. The electrophoretic display with micro-cantilever gap of claim 1, wherein the chamber bottom end is disposed on the control substrate side, and the micro-cantilever is formed on the opposing substrate side with the polymer material.

8. The electrophoretic display with micro-cantilever gap of claim 1, wherein the chamber bottom end is disposed on the opposing substrate side, and the micro-cantilever is formed on the control substrate side with the polymer material.

9. The electrophoretic display with micro-cantilever gap of claim 7 or claim 8, wherein the polymer material is a photoresist material, a planarization layer material, or a resin. ​ ​ ​ ​ ​ ​ ​

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