Electrophoretic display with microcard joints

Abstract

An electrophoretic display with micro-cams includes a control substrate having a first surface and a second surface; a drive circuit layer and a control electrode layer disposed sequentially on the second surface; an opposing substrate having a third surface and a fourth surface, the third surface opposing the second surface; a microcell structure formed between the second surface and the third surface, the microcell structure including a plurality of cell walls to define a plurality of chambers filled with a colloidal solution; wherein the electrophoretic display with micro-cams includes a plurality of micro-cams, each of the micro-cams being positioned relative to a surface of the microcell structure and embedded in one of the chambers.

Description

Technical Field

[0001] This invention relates to a display, and more particularly to an electrophoretic display with micro-clamps. Background Technology

[0002] Electronic paper displays, such as electrophoretic displays (EPDs), are characterized by their thinness, portability, and low power consumption, and they also retain images even when the power is off. Besides applications in e-readers, mobile phones, and wearable devices, electronic paper displays can also be used in supermarket shelf labels and bus stop instant messaging billboards, achieving both energy conservation and sustainability goals.

[0003] Figure 1A A cross-sectional view of a known electrophoretic display 100 is shown. This electrophoretic display 100 is a monochrome electrophoretic display 100. The electrophoretic display 100, for example, includes, from top to bottom, a substrate 12 (e.g., a transparent plastic substrate), a common electrode layer 14 (e.g., a transparent conductive electrode layer), an electrophoretic layer 20, a control electrode layer PEL, a driving circuit layer 30a, and a control substrate 10 (e.g., a glass substrate). Figure 1A In the architecture shown, the viewing plane is approximately in the direction relative to the substrate 12. Furthermore, as... Figure 1A As shown, the electrophoretic layer 20 comprises multiple hollow cavities 22 (only one is shown in the illustration), and each hollow cavity 22 contains a colloidal solution 24 containing multiple suspended charged color particles 26 (e.g., charged black particles 26B and charged white particles 26W). The hollow cavity 22 serves as a container for electronic ink (or electrophoretic material). The hollow cavity 22 is, for example, made of an organic polymer material and used to fill the charged color particles 26. Furthermore, the charged color particles 26 can be combinations of two colors (black / white), three colors (black / red / white, black / yellow / white), four colors (black / red / yellow / white, cyan / yellow / magenta / white), etc. Figure 1A In the structure shown, the charged color particles 26 are, for example, a combination of two colors and include charged black particles 26B and charged white particles 26W.

[0004] The common electrode layer 14 is generally connected to ground potential (0V) to provide a common voltage Vcom, while the underlying control substrate 10 typically uses a TFT array process to fabricate the driving circuit layer 30a. The driving switches of the driving circuit layer 30a mostly contain thin-film transistors fabricated using amorphous silicon (a-Si) processes (detailed below). Amorphous silicon is an abundant and low-cost material; however, its electron mobility is very low (approximately 1 cm⁻¹). 2amorphous silicon has the necessary properties for electronic paper control, namely high voltage tolerance and ultra-low leakage current. The charged color particles 26 carry a predetermined polarity of charge, for example the charged black particles 26B are positively charged and the charged white particles 26W are negatively charged. By controlling the electrical properties and voltage magnitude of each control electrode PE via the drive circuit layer 30a, each pixel can be caused to attract the charged black particles 26B and repel the charged white particles 26W (causing the pixel to appear white on the viewing side opposite the control electrode PE) or to attract the charged white particles 26W and repel the charged black particles 26B (causing the pixel to appear black on the viewing side opposite the control electrode PE).

[0005] Figure 1B A cross-sectional view of another known electrophoretic display 100 is shown, this time for a color electrophoretic display 100. The structure of the color electrophoretic display 100 is generally similar to that of the black and white electrophoretic display 100 shown in Figure 1A but with a color filter layer CF adhered to the opposing substrate 12 with optical adhesive 13, and the color filter layer CF is disposed on the upper glass substrate 16.

[0006] Electrophoretic displays with arrays of color filter layers rely on area sharing and color mixing to produce visual colors. The available display area is shared among three or four primary colors, such as red / green / blue (RGB) or red / green / blue / white (RGBW), and the filter layers can be arranged in one-dimensional (stripe) or two-dimensional (2x2) repeating patterns. The three sub-pixels (in the case of an RGB display) or four sub-pixels (in the case of an RGBW display) need only be small enough to be interpreted as a higher resolution, and to visually mix together as a single pixel with a uniform color. The inherent drawback of area sharing is that the colorant is always present, and the color can only be modulated by switching the corresponding pixel of the underlying monochrome display to white or black (turning on or off the corresponding primary color). For example, in an ideal RGBW display, each of the red, green, blue, and white primary colors occupies one quarter of the display area (one of the four sub-pixels), and the white sub-pixel is as bright as the underlying monochrome display white, so the combined contribution of the three color sub-pixels is no more than one white sub-pixel.

[0007] Multicolor displays utilize charged particles of various colors. By employing different physical and electrical conditions—such as the polarity (positive or negative), quantity, density, and volume of these particles—their movement within the colloidal solution varies. This difference in movement controls the distance these particles travel to the viewing surface, thus producing different colors. Examples include three-color displays (black, white, and red; black, white, and yellow) and four-color displays (black, white, red, and yellow). Similar to monochrome electrophoretic displays, electrophoretic displays with three or four reflective colors operate like simple monochrome displays. However, because the required color particles are driven to the viewing surface, the driving scheme is far more complex than that for displays with only black and white.

[0008] See Figure 2A and 2B To explain separately Figure 1A A schematic diagram of the operation of a known monochrome electrophoretic display 100 and an equivalent circuit diagram of the control electrode layer PEL / driving circuit layer 30a. (See diagram below.) Figure 2A As shown, by controlling the electrical properties and voltage of each control electrode PE in the control electrode layer PEL through the driving circuit layer 30a, black and white pixels can be formed on the viewing surface (near the opposite substrate 12). If the driving circuit layer 30a controls... Figure 2A The control electrodes PE1 and PE3 shown are at a positive voltage, which attracts negatively charged white particles 26W and pushes positively charged black particles away from the electrode contact surface and towards the viewing surface. This results in a relatively large number of positively charged black particles 26B on the viewing surface, providing black pixels. Conversely, if the driving circuit layer 30a controls... Figure 2A The control electrode PE2 shown is at a negative voltage, which will attract positively charged black particles 26B and push negatively charged white particles away from the electrode contact surface and move them to the viewing surface, resulting in a relatively large number of negatively charged white particles 26W on the viewing surface, so as to provide white pixels on the viewing surface.

[0009] like Figure 2A As shown, and in conjunction with [see also] Figure 2B The common electrode layer 14 is typically electrically connected to ground potential (0V, i.e., Vcom potential) and sandwiched between it and the control electrode layer PEL, with an electrophoretic layer 20 between them. The control electrode PE of the control electrode layer PEL and the Vcom potential form a capacitor (electrophoretic capacitor Cp). Due to the relatively thick electrophoretic layer, this capacitor is very small, and the charge on the control electrode quickly interacts with the charged particles to reach equilibrium. The distance the charged particles travel is very small. To increase the energy of each drive, a storage capacitor must be added in the drive circuit layer 30a. One end of the storage capacitor is connected to the control electrode, and the other end forms a parallel-plane capacitor Cs on the conductor opposite the control electrode to the electrophoretic layer. Figure 2BThe equivalent circuit of the electrophoretic layer 20 is represented as an electrophoretic capacitance Cp in parallel with a resistance R (equivalent to the energy consumed by the movement of the charged color particles), and also includes the storage capacitance Cs described above. As shown in Figure 2B The drive circuit layer 30a includes a plurality of thin film transistors 32, and the gate metal Mg of each thin film transistor 32 is electrically connected to a gate line GL, the source metal Ms is electrically connected to a data line DL, and the drain metal Md is electrically connected to a corresponding control electrode (also referred to as a pixel electrode) PE. Depending on the potential applied to the gate metal Mg by the gate line GL, the thin film transistor 32 can be determined to be in an on state or an off state; thereby determining whether the voltage on the data line DL will be transmitted to the drain metal Md via the source metal Ms, and further transmitted to the corresponding control electrode PE and charge the storage capacitance Cs to the same voltage as on the data line. The control electrode PE also applies the voltage on the corresponding data line to the electrophoretic layer 20. In principle, the drive circuit layer includes a plurality of thin film transistors, a plurality of gate lines, and a plurality of data lines, each of the gate lines is electrically connected to the gate of each of the plurality of thin film transistors, each of the data lines is electrically connected to the drain or source of each of the plurality of thin film transistors, a plurality of control electrodes, each of the control electrodes is connected to the source or drain of each of the thin film transistors.

[0010] The electrophoretic layer includes an electrophoretic material including a plurality of charged color particles disposed in a colloidal solution and capable of moving through the colloidal solution under the influence of an electric field, the plurality of charged color particles including positively charged color particles and / or negatively charged color particles. The charged color particles 26 move between the colloidal solution 24 of the electrophoretic layer 20 having appropriate viscosity under the force of the electric field, and the movement speed is very slow. The drive circuit layer 30a first stores energy quickly in the storage capacitance Cs, and then slowly releases the energy from the storage capacitance Cs to the electrophoretic layer 20 through the control electrode PE as the source of energy for the movement of the charged color particles 26. The greater the capacitance value of the storage capacitance Cs, the more energy can be stored, the fewer the number of energy storage repetitions required, and the faster the picture update speed of the electrophoretic display 100. Therefore, in the circuit layout design of the electrophoretic display 100, the area of the storage capacitance Cs is increased as much as possible to increase the capacitance value. However, in a system with multiple colors of charged color particles, in order to accurately control the distance and direction of movement of the charged color particles, the capacitance value of the storage capacitance Cs is moderately reduced to reduce the supply of energy and increase the accuracy of controlling the movement distance of the charged color particles, but the number of energy storage repetitions is increased, which reduces the update speed of the electrophoretic display 100 as a trade-off.

[0011] Referring to Figure 2CThis is a cross-sectional view illustrating the formation method of the storage capacitor Cs in the prior art. As shown in the figure, the gate metal Mg of the thin-film transistor 32 and the first electrode CE1 of the storage capacitor Cs are typically fabricated together with the gate line GL during the fabrication of the first metal layer M1. Furthermore, the source metal Ms / drain metal Md of the thin-film transistor 32 and the second electrode CE2 of the storage capacitor Cs are fabricated together with the data line DL during the fabrication of the second metal layer M2. In the prior art, the first electrode CE1 for the storage capacitor Cs can be fabricated simultaneously during the fabrication of the first metal layer M1, the insulating layer CI for the storage capacitor Cs can be fabricated simultaneously during the fabrication of the gate insulating layer, and the second electrode CE2 for the storage capacitor Cs can be fabricated simultaneously during the fabrication of the second metal layer M2. Therefore, a structure like... Figure 2C The capacitor structure shown is a metal (first electrode CE1) - insulating layer (insulating layer CI) - metal (second electrode CE2). However, the gate metal Mg and source metal Ms / d drain metal Md must be made of metal to reduce impedance, which in turn requires the first metal layer M1 and the second metal layer M2 to also be made of metal. This imposes a limitation on the material selection of the first electrode CE1 / second electrode CE2 of the storage capacitor Cs in the known electrophoretic display 100, which in turn causes the storage capacitor Cs to block light, reducing the aperture ratio of the control substrate of the known electrophoretic display, that is, the overall aperture ratio of the control substrate end components (including the control substrate 10, the drive circuit layer 30a and the control electrode layer PEL).

[0012] Furthermore, known technologies suffer from drawbacks. They involve moving charged particles towards the viewing surface by pushing them away. The farther the particles are pushed, the weaker the driving force of the charge on the control electrode. Conversely, as more particles with opposite polarities to the control electrode are attracted to its surface, the electric field of the electrophoretic layer decreases, further weakening the driving force on the moving particles. Under these dual influences, the speed of charged particles moving towards the viewing surface decreases, requiring higher energy and more time to move them to the desired viewing position. This is the primary reason for the slow refresh rate of displays using known technologies.

[0013] Furthermore, the charged particles moving toward the viewing surface will be subjected to different voltages and polarities between different control electrodes, and will move laterally, which we can call the diffusion phenomenon of the particles. This will cause the contrast of the boundary area to decrease, the image to blur, and the edge ghosting problem. This problem is particularly serious in color display, and will cause serious image ghosting, color saturation reduction, and color distortion. This is the problem of the electrophoretic display using the known technology, which cannot display real colors as the LCD does, and has image ghosting (different from the edge ghosting of black and white) when the page is turned. The distance of the lateral movement of the charged particles caused by the uneven diffusion is getting farther and farther, which will cause the density of the originally evenly distributed charged particles of different colors to be uneven, resulting in the deterioration of the picture display. When the picture display deteriorates to a certain extent, the display life ends.

[0014] When the charged particles move toward the viewing surface, they will be attracted to the common electrode and move toward each other, causing the movement of the charges on the common electrode. The movement of the charges on the entire common electrode will interfere with each other, and these interfering charge movements will push the originally same charged particles on the viewing surface away, causing false display. The constant change of the charge density on the common electrode corresponding to each control electrode will also cause the problem of the lateral movement of the charged particles that should not have (particle diffusion problem), making the color display ghosting problem more serious and affecting the service life. In addition, the driving circuit changes the voltage of the gate line with the most extreme voltage difference, and the resulting pulse surge will also cause the common electrode layer connected to the ground GND to move suddenly and affect the display.

[0015] The common electrode layer is the largest conductor on the display, and is easily affected by other static electricity, causing the picture to change state. All these shortcomings have slowed down the progress of color electrophoretic displays, so it is necessary to make a thorough change from the viewing surface, the source of the error. SUMMARY

[0016] According to an embodiment of the present application, the present application provides an electrophoretic display with micro-joints, which comprises:

[0017] A control substrate having a first surface and a second surface;

[0018] A driving circuit layer on the second surface of the control substrate, comprising a plurality of thin film transistors, a plurality of gate lines, and a plurality of data lines, at least one of the gate lines being electrically connected to the gates of the plurality of thin film transistors, and at least one of the data lines being electrically connected to the drains or sources of the plurality of thin film transistors;

[0019] a control electrode layer located on a side of the drive circuit layer distal to the control substrate, the control electrode layer comprising a plurality of control electrodes, at least one of the control electrodes electrically connected to the source or the drain of one of the thin film transistors;

[0020] a counter substrate having a third surface and a fourth surface, the third surface opposite to the second surface;

[0021] a micro-compartment structure formed on the third surface side of the counter substrate, the micro-compartment structure made of a polymer material and comprising a plurality of compartment walls to define a plurality of chambers filled with electrophoretic material;

[0022] the electrophoretic material comprising a plurality of charged color particles disposed in a colloidal solution and capable of moving through the colloidal solution under the influence of an electric field, the plurality of charged color particles comprising positively charged color particles or / and negatively charged color particles;

[0023] wherein the electrophoretic display comprises a plurality of micro-clamps, a micro-clamp located on the third surface side of the counter substrate and embedded in one of the chambers.

[0024] According to another embodiment of the present disclosure, an electrophoretic display with micro-clamps is provided, the electrophoretic display comprising:

[0025] a control substrate having a first surface and a second surface;

[0026] a drive circuit layer located on the second surface of the control substrate, the drive circuit layer comprising a plurality of thin film transistors, a plurality of gate lines and a plurality of data lines, at least one of the gate lines electrically connected to the gate of one of the thin film transistors, at least one of the data lines electrically connected to the drain or the source of one of the thin film transistors;

[0027] a control electrode layer located on a side of the drive circuit layer distal to the control substrate, the control electrode layer comprising a plurality of control electrodes, at least one of the control electrodes electrically connected to the source or the drain of one of the thin film transistors;

[0028] a counter substrate having a third surface and a fourth surface, the third surface opposite to the second surface;

[0029] a micro-compartment structure formed on the second surface side of the control substrate, the micro-compartment structure made of a polymer material and comprising a plurality of compartment walls to define a plurality of chambers filled with a colloidal solution;

[0030] wherein the electrophoretic display comprises a plurality of micro-clamps, a micro-clamp located on the third surface side of the counter substrate and embedded in one of the chambers.

[0031] In the production process of electrophoretic displays, the process of filling microcups or encapsulating electronic ink within microcapsules is the part that has the greatest impact on yield. Since electronic ink is made by mixing a colloidal solution with charged color particles, the density and viscosity of the colloidal solution must be increased to achieve particle suspension. This results in gaps at the bottom because the colloidal solution, due to its high surface tension, does not completely fill the microcups or microcells during filling, leaving voids. These voids are inaccessible to the color particles, causing image errors and degrading display quality. This is a key factor contributing to the poor yield of electrophoretic displays. The micro-clamps of this invention completely solve this problem. By using the volume of colloidal solution embedded in the microcells, the micro-clamps compress the volume of colloidal solution into the microcells, filling the internal voids. The void problem can be solved by adjusting the thickness of the micro-clamps to determine the compressed volume, greatly contributing to improved production yield. Furthermore, the micro-clamps embedded in the micro-cells also prevent airflow. After the colloidal solution is filled in a vacuum, the perimeter of the panel can be bonded with frame adhesive instead of optical adhesive. Atmospheric pressure is used to uniformly and tightly press the two substrates with micro-cells and micro-clamps together. Even if there are defects in the frame adhesive and air leakage occurs, the air will be blocked by the micro-clamps and micro-cells, which will not affect the bonding force of the substrates. The reduced thickness of optical adhesive can reduce the distance between charged color particles and control electrodes, increase the image refresh rate, and reduce the driving voltage. All these benefits are built upon the ingenious design of these micro-clamps. Attached Figure Description

[0032] Figure 1A Show a cross-sectional view of a known black-and-white electrophoretic display.

[0033] Figure 1B Show a cross-sectional view of a known color electrophoretic display.

[0034] Figure 2A illustrate Figure 1A A schematic diagram of the operation of a known black and white electrophoretic display.

[0035] Figure 2B Illustrate the equivalent circuit diagram of the control electrode layer / drive circuit layer.

[0036] Figure 2C Explain the design method of the storage capacitor.

[0037] Figure 3A A cross-sectional view illustrating an embodiment of the electrophoretic display of the present invention.

[0038] Figure 3B This is a cross-sectional view of some components of an electrophoretic display according to an embodiment of the present invention.

[0039] Figure 3C is a top view of Figure 3B

[0040] Figure 4A is a cross-sectional view of a partial assembly of an electrophoretic display according to another embodiment of the present application.

[0041] Figure 4B is a top view of Figure 4A

[0042] Figure 4C is a top view of a partial assembly of an electrophoretic display according to another embodiment of the present application.

[0043] Figure 5A is a cross-sectional view of a partial assembly of an electrophoretic display according to another embodiment of the present application.

[0044] Figure 5B is a top view of Figure 5A

[0045] Figure 5C is a cross-sectional view of a partial assembly of an electrophoretic display according to another embodiment of the present application.

[0046] Figure 6A is a cross-sectional view of a known thin film transistor.

[0047] Figure 6B is a top view of a known thin film transistor and other related components.

[0048] Figure 6C is a thin film transistor according to an embodiment of the present application.

[0049] Figure 6D is an example of an aperture ratio designed for different resolutions according to the present application.

[0050] Figure 7A is a cross-sectional view of a known color electrophoretic display.

[0051] Figure 7B is a cross-sectional view of a color electrophoretic display according to an embodiment of the present application.

[0052] Figure 7C is a partial cross-sectional view of Figure 7B

[0053] is a cross-sectional view of a color electrophoretic display according to an embodiment of the present application. Figure 8A

[0054] is a partial cross-sectional view of Figure 8B Figure 8A

[0055] Figure 9A ​​​​​A schematic view of a color filter layer is shown.

[0056] Figure 9B A schematic view of another color filter layer is shown.

[0057] Figure 10A An upper view of a microcup compartment and associated color filter layer for a known electrophoretic display.

[0058] Figure 10B An upper view of a microcompartment according to an embodiment of the present application.

[0059] Figure 10C Another upper view of a microcompartment according to an embodiment of the present application.

[0060] Figure 10D An upper view of a microcompartment according to another embodiment of the present application.

[0061] Figures 11A to 11C A flowchart of a process for fabricating a microcompartment structure according to an embodiment of the present application.

[0062] Figures 12A to 12C A flowchart of a process for fabricating a microcompartment structure according to another embodiment of the present application.

[0063] Figures 13A to 13C A flowchart of a process for fabricating a microcompartment structure according to another embodiment of the present application.

[0064] Figures 14A to 14C A flowchart of a process for fabricating a microcompartment structure according to another embodiment of the present application.

[0065] Figure 14D A cross-sectional view of a microcompartment structure according to another embodiment of the present application.

[0066] Figure 14E A cross-sectional view of a microcompartment structure according to another embodiment of the present application.

[0067] Figure 14F An upper view of a microcard according to an embodiment of the present application.

[0068] Figure 15A A partial upper view of a transparent dual-color electrophoretic display according to the present application.

[0069] Figures 15B to 15D A cross-sectional view of a transparent dual-color / electrophoretic display according to the present application.

[0070] Figures 16A-16D A cross-sectional view of a transparent dual-color / electrophoretic display according to another embodiment of the present application.

[0071] Figure 17A-17F A flowchart of a process for fabricating a microcompartment compartment wall.

[0072] Figure 18A A schematic diagram of a color filter layer according to an embodiment of the present application.

[0073] Figure 18B To illustrate Figure 18A Operation.

[0074] Figure 19 A schematic diagram of an in-cell touch according to an electrophoretic display of the present application.

[0075] Figures 20A-20C A schematic diagram of an embodiment of an electrophoretic display having a double-sided control substrate according to the present application.

[0076] Explanation of symbols in the drawings:

[0077] 100: electrophoretic display;

[0078] 10: control substrate;

[0079] 10U: second control substrate (upper control substrate);

[0080] 10D: first control substrate (lower control substrate);

[0081] 12: counter substrate;

[0082] 13: optical glue;

[0083] 14: common electrode layer;

[0084] 15: transparent protective layer;

[0085] 16: upper glass substrate;

[0086] 20, 20a: electrophoretic layer;

[0087] 22: hollow cavity / micro-cup;

[0088] 24: colloidal solution;

[0089] 26: charged color particles;

[0090] 26B: charged black particles;

[0091] 26W: charged white particles;

[0092] 26C: charged cyan particles;

[0093] 26M: charged magenta particles;

[0094] 26Y: charged yellow particles;

[0095] 30, 30a: drive circuit layer;

[0096] 30U: second drive circuit layer (upper drive circuit layer);

[0097] 30D: first drive circuit layer (lower drive circuit layer);

[0098] PEL: control electrode layer;

[0099] PE: control electrode;

[0100] PELU: second control electrode layer (upper control electrode layer); PELD: first control electrode layer (lower control electrode layer);

[0101] PEU: second control electrode;

[0102] PED: first control electrode;

[0103] PE1, PE2, PE3: control electrode;

[0104] CF: color filter layer;

[0105] CF1, CF2, CF3, CFR, CFG, CFB, CFW: filter color block;

[0106] CF-1: first color filter layer;

[0107] CF-2: second color filter layer;

[0108] Vcom: common voltage;

[0109] Cp: electrophoretic capacitance;

[0110] Cs: storage capacitance;

[0111] R: resistance;

[0112] 32: thin film transistor;

[0113] 320: insulating layer;

[0114] 322: doped layer;

[0115] 324: insulating protective layer;

[0116] Mg: gate metal;

[0117] Ms: source metal;

[0118] Md: drain metal;

[0119] M1: first metal layer;

[0120] M2: second metal layer;

[0121] CE1: first electrode;

[0122] CE2: second electrode;

[0123] CI: insulating layer;

[0124] V1, V2: via;

[0125] ITO1: first transparent conductive layer;

[0126] ITO2: second transparent conductive layer;

[0127] ITO3: third transparent conductive layer;

[0128] PLN: planar layer;

[0129] AS: semiconductor portion;

[0130] GL: gate line;

[0131] DL: data line;

[0132] GLITO: transparent conductive gate line;

[0133] DLITO: transparent conductive data line;

[0134] BM: black matrix;

[0135] L1, L2: incident light;

[0136] Ve: common voltage line;

[0137] 50: micro-compartment structure;

[0138] 52: compartment wall;

[0139] 54: slot chamber;

[0140] 56: slit;

[0141] D: length;

[0142] 60: micro-dovetail;

[0143] VCL: common voltage layer;

[0144] L: gate channel length;

[0145] W: gate channel width;

[0146] W1, W2: width;

[0147] PRA: first residual photoresist (first high molecular material stack);

[0148] PRB: second residual photoresist (second high molecular material stack);

[0149] PR1: First layer of photoresist;

[0150] PR2: Second layer of photoresist;

[0151] PM: Light mask;

[0152] H: Hole;

[0153] Tx1, Tx2, TxN: Touch emission electrodes;

[0154] Rx1, Rxn, RxM: Touch receiving electrodes;

[0155] 200: Display Touch Integrated Driver (Display Driver);

[0156] S: gap;

[0157] T: Partition wall thickness;

[0158] H1: Compartment wall height (micro-compartment structure thickness). Detailed Implementation

[0159] For a detailed description and technical content of the present invention, please refer to the following detailed description and accompanying drawings. However, it should be understood that the following figures are merely illustrative of various embodiments of the invention, and some components are shown in a manner easily understood, not to represent actual component dimensions.

[0160] As used herein, the terms "above" and "on" can refer to the relative position of a component with respect to other components or the sequence of manufacturing processes. For example, "component A is on top of component B" or "component A is above component B" does not mean that component A and component B are in direct contact; there may be other components between component A and component B. Furthermore, "component A is on top of component B" or "component A is above component B" indicates the order of manufacturing processes; the manufacturing process of component B precedes that of component A, and there may be other components between component A and component B. Moreover, the terms "above" and "below" are used merely for ease of illustration and do not represent the specific location of the invention during use.

[0161] As used herein, the term "between" can refer to a relative position of a component with respect to other components or a sequence in a process. For example, component A is between component B and component C does not mean that component A is in direct contact with component B and component C, and there can be other components between component A and component B and component C. For another example, component A is between component B and component C means that the manufacturing sequence of component B is prior to that of component A, or the manufacturing sequence of component C is prior to that of component A, and there can be other components between component A and component B and component C. Furthermore, the term "between" is used for convenience of description only, and does not mean the specific position of the present application in use.

[0162] 1. High aperture ratio electrophoretic display

[0163] To achieve the viewing surface on the surface of the control substrate, the key is to improve the aperture ratio of the control substrate, which refers to the ratio between the area of the light passing portion and the overall display area after removing all non-transparent areas (such as the metal electrodes of the thin film transistor) in the display area. Since the display area is usually composed of display pixels, it is also equivalent to the ratio of the area of the single display pixel that can pass light to the area of the pixel. The known technology uses a metal layer in its driving circuit layer 30a to store the capacitor, so the aperture ratio in the pixel is less than 20%, and thus the viewing surface cannot be moved to the side of the control substrate. The present application improves the aperture ratio to not less than 70%, preferably improves the aperture ratio to not less than 80%, and most preferably improves the aperture ratio to not less than 90%. The key to improving the aperture ratio is to replace the non-transparent storage capacitor electrode with a transparent conductive material, secondly to reduce the area of the thin film transistor TFT, and finally to limit the line width of the gate line and the data line to meet the requirement of high aperture ratio.

[0164] Referring to Figure 3A To illustrate the cross-sectional view of the electrophoretic display 100 of an embodiment of the present application, the electrophoretic display 100 is, for example, a black and white electrophoretic display 100, and includes, from top to bottom, a counter substrate 12 (which can be a plastic substrate or a glass substrate or a metal substrate), a common electrode layer 14 (which can be a transparent conductive electrode layer or a non-transparent conductive metal layer or other conductive material), an electrophoretic layer 20, a control electrode layer PEL including a plurality of transparent control electrodes PE, a high aperture ratio driving circuit layer 30 (hereinafter referred to as driving circuit layer 30), and a control substrate 10 (which can be a glass substrate or a transparent PI substrate, or other substrate material with a light transmittance of greater than 90%). The common electrode layer can not be used under special matching measures. For example, Figure 3AAs shown, the electrophoretic layer 20 includes a plurality of cavities 22 (only one of which is shown), each of which is filled with a colloidal solution 24 containing a plurality of charged color particles (e.g., charged black particles 26B and charged white particles 26W). The cavities 22 serve as reservoirs for the electronic ink. According to one embodiment of the present application, the first / second electrodes CE1 / CE2 of the storage capacitor Cs in the high aperture ratio driving circuit layer 30 are made of transparent conductive material or partially made of transparent material to increase the aperture ratio of the electrophoretic display 100. In addition, it is more helpful for a user to view the electrophoretic display 100 from the side of the control substrate 10, so that the charged black particles 26B or the charged white particles 26W are attracted by the control electrodes PEL on the side of the viewing surface to achieve the purpose of solving the above-mentioned problems of the prior art. According to other embodiments of the present application (not shown), the cavities 22 can also be filled with a colloidal solution 24 containing a fluid of a color (e.g., black) and a plurality of charged particles of a single color (e.g., white particles). When the control electrode layer PEL attracts the charged color particles, the color of the particles (e.g., white) is displayed on the viewing surface, and when the control electrode layer PEL repels the charged color particles, the color of the fluid (e.g., black) is displayed on the viewing surface. It can be defined that the electrophoretic layer includes an electrophoretic material, the electrophoretic material includes a plurality of charged color particles, the plurality of charged color particles are arranged in a colloidal solution and can move through the colloidal solution under the influence of an electric field, and the plurality of charged color particles include positively charged color particles and / or negatively charged color particles.

[0165] Referring to Figure 3B , a partial cross-sectional view of the electrophoretic display 100 according to one embodiment of the present application, mainly showing the control electrode layer PEL, the driving circuit layer 30 and the control substrate 10 according to the present application. Referring to Figure 3C , a top view corresponding to Figure 3B . According to the embodiments of the present application, the viewing surface is viewed from the direction of the control substrate 10 close to the control electrode layer PEL, so the color displayed is the color of the charged color particles in the colloidal solution 24 attracted by the potential of each control electrode PE of the control electrode layer PEL. For a better understanding, refer to Figure 1A and Figure 3A , in Figure 1AIn the known electrophoretic display 100, the electrical properties and voltage levels of each control electrode PE are controlled by the drive circuit layer 30a to attract charged black particles 26B and repel charged white particles 26W for each pixel (to make the pixel appear white on the viewing side opposite the control electrode layer PEL) or to attract charged white particles 26W and repel charged black particles 26B for each pixel (to make the pixel appear black on the viewing side opposite the control electrode layer PEL). Since the viewing side is on the opposite substrate 12, further away from the control electrode layer PEL, the electric field is weaker and the force to repel the charged color particles 26 is weaker, resulting in the screen defects of the known electrophoretic display 100. In contrast, in the electrophoretic display 100 of the present application, the drive circuit layer 30 is closer to the viewing side (on the control substrate 10 side). The electrical properties and voltage levels of each control electrode PE are controlled by the drive circuit layer 30 to attract charged black particles 26B and repel charged white particles 26W for each pixel (to make the pixel appear black on the viewing side closer to the control electrode layer PEL) or to attract charged white particles 26W and repel charged black particles 26B for each pixel (to make the pixel appear white on the viewing side closer to the control electrode layer PEL). In other words, the control electrodes PEs on the control electrode layer PEL attract charged color particles (e.g., charged black particles 26B or charged white particles 26W) of opposite polarity to the control electrodes PEs to accumulate on the side of the electrophoretic layer 20 closer to the control electrode layer PEL (including the control electrodes PEs).Since the viewing side is the control substrate 10 side closer to the control electrode layer PEL, and the closer to the control electrode layer PEL, the stronger the electric field, and the stronger the force to attract the charged color particles 26, the charged particles 26 close to the electrode layer can be firmly locked, so that the electrophoretic display 100 of the present application can achieve excellent screen update rate, brightness, contrast, saturation and other advantages. Since the charge on the control electrode does not move in the off state of the thin film transistor 32, it presents a locked state, so that the charged color particles 26 can be stably attracted and will not move with the movement of the charge on the common electrode (voltage kick problem, the charge flowing to the common electrode layer after the discharge of the storage capacitor, for example, when the common electrode presents a white background with mostly negatively charged white particles, it means that a large proportion of positive charge is condensed on the surface of the common electrode, which is not conducive to the approach of positively charged black particles, and the black particles will be forced back to the control electrode side, commonly known as voltage kick, which makes the original black font become thin or disappear, when the difference between black and white on the screen is larger, the problem is more serious, or when color display causes color distortion), and the moved particles will not return to the original position, causing image distortion on the viewing side. The use of the solution of the present application will not have the phenomenon of transverse movement and diffusion of charged color particles 26 (color mixing problem, saturation reduction problem) or the inability to move to the new correct position when the screen is updated (image sticking problem).

[0166] In addition, the present application further provides an improved design for the driving circuit layer 30 to improve the aperture ratio when viewed from the control substrate 10. As shown in Figure 3B The first electrode CE1 of the storage capacitor Cs is made of transparent conductive material, for example, can be made of indium tin oxide (ITO) or similar transparent conductive material. In addition, the second electrode CE2 of the storage capacitor Cs is also made of transparent conductive material, for example, can be made of indium tin oxide (ITO) or similar transparent conductive material. The insulating layer CI of the storage capacitor Cs can be made at the same time as the step of making the gate insulating layer (see later).

[0167] For further details, please refer to Figure 3CIn the uppermost control electrode (also referred to as pixel electrode) PE is also made of transparent conductive material, for example, can be made of indium tin oxide (ITO) or similar transparent conductive material and by means of via V1 electrically connected to the first transparent conductive layer ITO1 (the first electrode CE1) of the storage capacitor Cs; moreover, the control electrode PE is also electrically connected to the drain metal Md by means of via V2. In the manufacture of the storage capacitor Cs according to the present application, the corresponding metal layer portion (corresponding to the electrode portion of the storage capacitor Cs) of the original first metal layer M1 in the known art is replaced by the first transparent conductive layer ITO1 made of transparent conductive material (for example, ITO). According to an embodiment of the present application, the first metal layer M1 is made first and then the first transparent conductive layer ITO1 is made or the first transparent conductive layer ITO1 is made first and then the first metal layer M1 is made. Basically, there can be no insulating layer between the first metal layer M1 and the first transparent conductive layer ITO1, of course, the addition of an insulating layer between the first metal layer M1 and the first transparent conductive layer ITO1 is also the same in function.

[0168] In addition, the corresponding metal portion of the original second metal layer M2 in the known art is replaced by the second transparent conductive layer ITO2 made of transparent conductive material (for example, ITO). The second transparent conductive layer ITO2 is between the control electrode PE and the first transparent conductive layer ITO1 from the projection direction and is electrically connected to the common voltage Vcom or a direct current voltage source such as 0V voltage. Moreover, according to an embodiment of the present application, the second metal layer M2 is made first and then the second transparent conductive layer ITO2 is made or the second transparent conductive layer ITO2 is made first and then the second metal layer M2 is made. Basically, there can be no insulating layer between the second metal layer M2 and the second transparent conductive layer ITO2, of course, the addition of an insulating layer between the second metal layer M2 and the second transparent conductive layer ITO2 is also the same in function.

[0169] As disclosed above, the electrophoretic display 100 disclosed by Figures 3A to 3C Because the two electrodes of the storage capacitor Cs are made of the first transparent conductive layer ITO1 and the second transparent conductive layer ITO2 respectively, and the distance between the first transparent conductive layer ITO1 and the second transparent conductive layer ITO2 is very small (the thickness of the insulating layer CI is between about 0.1 microns and 0.5 microns), the capacitance value of the storage capacitor Cs can be increased. Moreover, because the first transparent conductive layer ITO1 and the second transparent conductive layer ITO2 and the control electrode do not block light, it helps to improve the aperture ratio of the control substrate when the electrophoretic display 100 is viewed from the control substrate 10.

[0170] For further details, please refer to Figures 3A to 3CAccording to the present application, when manufacturing the electrophoretic display 100, for the portion of the control substrate 10, first, a metal film is deposited on the upper surface of the control substrate 10 by a deposition process or a sputter deposition process, and a first metal layer Ml is formed by a photolithography process, the first metal layer Ml is used to form the gate metal Mg and the gate line GL, and then a transparent conductive material film is deposited by a sputter deposition process, and a first transparent conductive layer ITOl is formed by a photolithography process. The above two steps can also be adjusted to each other, that is, the first transparent conductive layer ITOl is formed first, and then the first metal layer Ml is formed. Then, a capacitor insulating layer CI (for example, SiNx, SiO2) and an a-Si layer AS of a storage capacitor Cs are deposited, and the semiconductor part of the thin film transistor is defined by a photolithography process. Then, a metal film is deposited on the obtained structure by a deposition process or a sputter deposition process, and a second metal layer M2 is formed by a photolithography process, the second metal layer M2 is used to form the source metal Ms, the drain metal Md and the data line DL, and then a transparent conductive material film is deposited by a sputter deposition process, and a second transparent conductive layer ITO2 is formed by a photolithography process. The above two steps can also be adjusted to each other, that is, the second transparent conductive layer ITO2 is formed first, and then the second metal layer M2 is formed. Then, a planarization layer PLN is formed on the obtained structure by a coating process and a photolithography process, and then a transparent conductive material film is deposited by a sputter deposition process, and a control electrode PEL of a control electrode PE (that is, a third transparent conductive layer ITO3) is formed by a photolithography process. Then, the electrophoretic layer 20 can be attached to or made on the control electrode PEL (including forming a resin film on a multi-molecular substrate, using a roller to press a notch on the resin film to form a hollow cavity 22 structure, and then hardening treatment, the hollow cavity 22 structure is used as a container for electronic ink, and then a colloidal solution 24 containing charged color particles 26 is injected into the hollow cavity 22 structure to harden into a sealed cavity to form the electrophoretic layer 20, the detailed manufacturing process can refer to Taiwan Patent Application No. 93100767, or use the micro-compartment structure in the present application, which will be described in detail later). Then, the portion of the opposite substrate 12 is manufactured, the common electrode layer 14 can be formed on the opposite substrate 12, or the common electrode layer 14 can not be provided on the opposite substrate 12. Finally, the side of the control substrate 10 with the electrophoretic layer 20 is adhered to the opposite substrate 12 by optical adhesive or is attached by the micro-clamping structure of the present application (which will be described in detail later). The above deposition process (CVD, PECVD), sputter deposition process, coating process, and insulating layer manufacturing are all mature processes commonly used in display panels, and the electrophoretic display 100 with high aperture ratio and high frame update rate and other advantages of the present application can be manufactured.

[0171] In practice, the manufacturer of the electronic paper first forms the common electrode layer 14 on the relative substrate 12, and then attaches the micro-cup film with the electronic ink to form the electronic paper. The module manufacturer then attaches the control substrate 10 to the electronic paper to complete the electrophoretic display 100. However, the micro-cup is formed by pressing a concave on a resin, and thus the structure is very weak and the yield is very low during production, which increases the cost. The micro-compartment structure of the present application can greatly improve this problem.

[0172] Referring to Figure 4A , a cross-sectional view of a part of the electrophoretic display 100 according to another embodiment of the present application is shown, mainly showing the control electrode layer PEL, the driving circuit layer 30 and the control substrate 10 according to the present application. Referring to Figure 4B , a top view of the electrophoretic display 100 according to another embodiment of the present application is shown. In addition, Figure 4A , a top view of the electrophoretic display 100 according to another embodiment of the present application is shown. In addition, Figure 4A , a top view of the electrophoretic display 100 according to another embodiment of the present application is shown. In addition, 4B , a top view of the electrophoretic display 100 according to another embodiment of the present application is shown. In addition, Figure 3A , a top view of the electrophoretic display 100 according to another embodiment of the present application is shown. In addition, Figure 4A , a top view of the electrophoretic display 100 according to another embodiment of the present application is shown. In addition, Figure 3A , a top view of the electrophoretic display 100 according to another embodiment of the present application is shown. In addition, Figure 4A , a top view of the electrophoretic display 100 according to another embodiment of the present application is shown. In addition, Figure 3B , a top view of the electrophoretic display 100 according to another embodiment of the present application is shown. In addition, Figure 4A , a top view of the electrophoretic display 100 according to another embodiment of the present application is shown. In addition, Figure 3B , a top view of the electrophoretic display 100 according to another embodiment of the present application is shown. In addition, Figure 4A , a top view of the electrophoretic display 100 according to another embodiment of the present application is shown. In addition, 4BIn the embodiment shown, the first electrode CE1 (control electrode PE) and the second electrode CE2 (electrically connected to the common voltage Vcom or a constant voltage such as 0V) of the storage capacitor Cs are respectively provided by the control electrode PE and the first transparent conductive layer ITO1 formed of a transparent conductive material, and the insulating layer of the storage capacitor Cs can be simultaneously manufactured by the step of manufacturing the gate insulating layer. The control electrode PE is above the first transparent conductive layer ITO1 as viewed in the projection direction. In addition, the common voltage line Ve for the first transparent conductive layer ITO1 (the second electrode CE2 of the storage capacitor Cs) also extends in the same direction as the gate line GL of the first metal layer M1 (i.e. the common voltage line Ve is electrically connected to the first transparent conductive layer ITO1 and substantially parallel to a gate line GL of the driving circuit layer 30).

[0173] Similarly, in the embodiments shown in Figure 4A and 4B , because the first electrode CE1 and the second electrode CE2 of the storage capacitor Cs are respectively formed of a transparent conductive material, the aperture ratio of the electrophoretic display 100 can be increased. Furthermore, in the embodiments, the control electrode PE formed directly of a transparent conductive material also serves as the first electrode CE1 of the storage capacitor Cs. In this way, the structure can be simplified and the manufacturing process can be reduced. In addition, Figure 4A and 4B , the embodiments shown can also be applied to the architecture in which the viewing side is on the control substrate 10 side. Figure 3A In the embodiments shown in Figure 4A and 4B , the control electrode layer PEL, the driving circuit layer 30 and the control substrate 10 disclosed can be applied to the architecture in which the viewing side is on the control substrate 10 side. Figure 3A In the embodiments shown in Figure 4A and Figure 3B , the driving circuit layer 30 is closer to the viewing side (on the control substrate 10 side), so that the electrophoretic display 100 of the present application has excellent display effects and a higher screen update rate and other aspects of creativity. In addition, because the stack of

[0174] For a better understanding of the present application, reference should be made to the following detailed description of the embodiments in conjunction with the accompanying drawings in which: Figure 4A and 4BIn fabricating the electrophoretic display 100, for the control substrate 10 side, a metal thin film can first be fabricated on the upper surface of the control substrate 10 using a deposition or sputtering process, followed by a photolithography process to fabricate a first metal layer M1. This first metal layer M1 is used to form the gate metal Mg and the gate line GL. Subsequently, a transparent conductive material thin film is fabricated using a sputtering process, followed by a photolithography process to fabricate a first transparent conductive layer ITO1 and a common voltage line Ve. The two steps described above can also be interchanged, i.e., the first transparent conductive layer ITO1 is formed first, followed by the first metal layer M1. Subsequently, a capacitor insulating layer CI (e.g., SiNx, SiO2) and an a-Si layer AS are deposited, and the semiconductor portion of the thin-film transistor is defined using a photolithography process. Subsequently, a metal thin film is fabricated on the obtained structure using a deposition or sputtering process, followed by a lithography process to create a second metal layer M2. This second metal layer M2 forms the source metal Ms, drain metal Md, and data line DL. A transparent conductive material thin film is then fabricated using a sputtering process, followed by a lithography process to create the control electrode layer PEL (ITO2). Alternatively, the two steps can be interchanged, i.e., the control electrode layer PEL (ITO2) can be formed first, followed by the second metal layer M2, as long as there is partial overlap between the control electrode layer PEL (ITO2) and the drain metal Md in the second metal layer M2 to achieve electrical connection. Finally, a planarization layer PLN is fabricated on the obtained structure using a coating and lithography process. Subsequently, an electrophoretic layer 20 can be laminated or fabricated on the planarization layer PLN (containing a hollow cavity 22, which is formed by forming a resin film on a plastic substrate and using a roller to press indentations into the resin film to create the hollow cavity 22 structure, which serves as a container for electronic ink; then, a colloidal solution 24 containing charged color particles 26 is injected into the hollow cavity 22 structure, and then sealed with adhesive to form a sealed cavity, thus forming the electrophoretic layer 20. For detailed fabrication process, please refer to Taiwan Patent Application No. 93100767, or use the micro-segment structure of this invention, which will be detailed later). Then, the portion opposite the substrate 12 is fabricated. A common electrode layer 14 can be formed on the opposite substrate 12, or the common electrode layer 14 can be omitted from the opposite substrate 12. Finally, the control substrate 10 with the electrophoretic layer 20 on one side is bonded to the opposite side of the substrate 12 with optical adhesive or with frame adhesive using the micro-clamp structure of the present invention (detailed below). The above-mentioned deposition process (CVD, PECVD), sputter deposition process, and coating process are all mature processes commonly used in display panels, which can be used to manufacture the electrophoretic display 100 of the present invention with a high aperture ratio and high screen refresh rate and other innovative features.

[0175] See Figure 4CThis is a top view of some components of an electrophoretic display 100 according to another embodiment of the present invention, mainly showing the control electrode layer PEL and the drive circuit layer 30 according to the present invention. This embodiment is similar. Figure 4A and 4B In the illustrated embodiment, the gate line GL portion, originally fabricated by the first metal layer M1, is replaced with a first transparent conductive layer ITO1 to form a transparent conductive gate line GLITO, while the data line DL portion of the second metal layer M2 is replaced with a second transparent conductive layer, namely the control electrode layer PEL (ITO2), to form a transparent conductive data line DLITO. In other words, the fabrication process of the first metal layer M1 mainly forms the gate metal Mg of the thin-film transistor, while the fabrication process of the second metal layer M2 mainly forms the source metal Ms / dulge metal Md of the thin-film transistor. The first electrode CE1 of the storage capacitor Cs is provided by the control electrode PE, while the second electrode CE2 of the storage capacitor Cs is provided by the first transparent conductive layer ITO1. Similarly, since the gate line portion of the first metal layer M1 is replaced with the first transparent conductive layer ITO1, the common voltage line Ve, which is used by the first transparent conductive layer ITO1 to apply the common voltage Vcom, also extends in the same direction as the transparent conductive gate line GLITO (that is, the common voltage line Ve and the transparent conductive gate line GLITO are approximately parallel). Therefore, replacing the metal gate line GL with the transparent conductive material GLITO and replacing the metal data line DL with the transparent conductive material DLITO, either simultaneously or only one of these replacements, falls within the scope of this invention. Furthermore, the gate line GL can also be partially replaced with the first transparent conductive layer ITO1, while the remaining portion is still made with the first metal layer M1; and the data line DL can also be partially replaced with the second transparent conductive layer ITO2, while the remaining portion is still made with the second metal layer M2, all of which are within the scope of this invention.

[0176] Similarly, in Figure 4C In the illustrated embodiment, since the first electrode CE1 and the second electrode CE2 of the storage capacitor Cs are both formed of transparent conductive material, and the transparent conductive gate line GLITO and the transparent conductive data line DLITO are both formed of transparent conductive material, or at least partially of either, are formed of transparent conductive material, this is within the scope of the present invention, increasing the aperture ratio of the electrophoretic display 100. Furthermore, the first electrode CE1 of the storage capacitor Cs must be electrically connected to the control electrode PE in operation; however, in this embodiment, the control electrode PE, formed of transparent conductive material, is directly used as the first electrode CE1 of the storage capacitor Cs. This simplifies the structure and further reduces the manufacturing process. In addition, Figure 4C The illustrated embodiments can also be applied to Figure 3A The architecture, that is, the viewing surface is on the control substrate 10 side, therefore, in the... Figure 4C The disclosed control electrode layer PEL, drive circuit layer 30, and control substrate 10 are applied to Figure 3A In addition, the driving circuit layer 30 is also made close to the viewing surface (on the side of the control substrate 10) in the architecture shown in FIG. 6, so that the electrophoretic display 100 of the present application has excellent display effect, higher screen update rate, and higher reflectivity, and other advantages. Figure 4C The manufacturing process of the structure shown in FIG. 6 is similar to that shown in FIG. 5. Figure 4A The manufacturing process of the structure shown in FIG. 7 is similar to that shown in FIG. 6. 4B However, in the manufacturing process of the first metal layer Ml in FIG. 7, the gate lines are not made, and in the manufacturing process of the first transparent conductive layer ITOl, the transparent conductive gate lines GLITO and the common voltage lines Ve are made at the same time. In addition, in the manufacturing process of the second metal layer M2 in FIG. 7, the data lines are not made, and in the manufacturing process of the second transparent conductive layer ITO2, the transparent conductive data lines DLITO are made at the same time. Figure 4A 4B The manufacturing process of the structure shown in FIG. 7 is similar to that shown in FIG. 6. Figure 4A 4B The manufacturing process of the structure shown in FIG. 7 is similar to that shown in FIG. 6.

[0177] FIG. 8 is a partial cross-sectional view of an electrophoretic display 100 according to another embodiment of the present application, mainly showing another implementation of the control electrode layer PEL, the driving circuit layer 30, and the control substrate 10 according to the present application. Figure 5A FIG. 9 is a top view of the structure shown in FIG. 8. In addition, the control electrode layer PEL, the driving circuit layer 30, and the control substrate 10 shown in FIG. 8 can also be used in the architecture shown in FIG. 10, whose viewing surface is viewed from the direction of the control substrate 10 close to the control electrode layer PEL, so that the image display principle is to use the potential of the control electrode layer PEL to attract, rather than repel, the charged color particles in the colloidal solution 24, to achieve better display effect, higher screen update rate, and other advantages. In addition, the present application also provides improved design of the driving circuit layer 30 to improve the aperture ratio when viewed from the control substrate 10. Figure 5B Figure 5A The manufacturing process of the structure shown in FIG. 10 is similar to that shown in FIG. 8. Figure 5A 5B The manufacturing process of the structure shown in FIG. 10 is similar to that shown in FIG. 8. Figure 3A The manufacturing process of the structure shown in FIG. 10 is similar to that shown in FIG. 8.

[0178] The manufacturing process of the structure shown in FIG. 11 is similar to that shown in FIG. 10. Figure 5A The manufacturing process of the structure shown in FIG. 11 is similar to that shown in FIG. 10. Figure 4A The manufacturing process of the structure shown in FIG. 11 is similar to that shown in FIG. 10. Figure 4A ​​​​In the embodiments, the process flexibility is increased, and the planarization layer PLN can be omitted. The first transparent conductive layer ITO1 is formed on the second metal layer M2, or the second metal layer M2 is formed on the first transparent conductive layer ITO1 (which will be described in detail in the description below). In addition, as shown in the embodiments, a portion of the first transparent conductive layer ITO1 extends in the same direction as the data lines DL to form a common voltage line Ve receiving a common voltage Vcom (i.e., the common voltage line Ve is substantially parallel to the data lines DL). Figure 5C In addition, as shown in the embodiments, a portion of the first transparent conductive layer ITO1 extends in the same direction as the data lines DL to form a common voltage line Ve receiving a common voltage Vcom (i.e., the common voltage line Ve is substantially parallel to the data lines DL). Figure 5B

[0179] Similarly, in the embodiments shown in Figs. 1A and 1B, the first electrode CE1 and the second electrode CE2 of the storage capacitor Cs are formed of transparent conductive materials, respectively, so that the aperture ratio of the control substrate 10 of the electrophoretic display 100 is increased. In addition, the first electrode CE1 of the storage capacitor Cs is electrically connected to the control electrode PE in operation, and in the embodiments, the control electrode PE formed of the transparent conductive material is directly used as the first electrode CE1 of the storage capacitor Cs. Thus, the structure is simplified, and the process is further reduced. In addition, the embodiments shown in Figs. 1A and 1B can also be applied to the architecture shown in Figs. 2A and 2B, i.e., the viewing side is on the control substrate 10 side. Thus, when the disclosed control electrode layer PEL, the driving circuit layer 30, and the control substrate 10 shown in Figs. 1A and 1B are applied to the architecture shown in Figs. 2A and 2B, the driving circuit layer 30 is close to the viewing side (on the control substrate 10 side), and the electrophoretic display 100 of the present application has excellent display effect and higher screen update rate, etc. Figure 5A 5B Figure 5A 5B Figure 3A Figure 5A 5B Figure 3A

[0180] Figure 5A 5B ​​​​​​​​​​​The manufacturing method of the embodiment is described as follows. For the side of the control substrate 10, a metal film is first deposited on the upper surface of the control substrate 10 by a deposition process or a sputter deposition process, and a first metal layer Ml is then formed by a photolithography process. The first metal layer Ml is used to form the gate metal Mg and the gate line GL. Then, an insulating layer (e.g., SiNx) and an a-Si layer AS are deposited, and the semiconductor layer of the thin film transistor is defined by a photolithography process. Then, a metal film is deposited on the resultant structure by a deposition process or a sputter deposition process, and a second metal layer M2 is formed by a photolithography process. The second metal layer M2 is used to form the source metal Ms, the drain metal Md, and the data line DL. Then, a planarization layer PLN and a via VIA are formed on the resultant structure by a coating and a photolithography process. Then, a transparent conductive material film is deposited on the resultant structure by a sputter deposition process, and a first transparent conductive layer ITOl is formed by a photolithography process. The first transparent conductive layer ITOl serves as the second electrode CE2 of the storage capacitor Cs. An insulating material is then deposited, and a capacitor insulating layer CI is formed by a photolithography process. A transparent conductive material film (a second transparent conductive layer ITO2) is then deposited on the resultant structure by a sputter deposition process, and a control electrode PE of the control electrode layer PEL is formed by a photolithography process. The control electrode PE serves as the first electrode CE1 of the storage capacitor Cs. Then, an insulating protective layer is formed. Then, the electrophoretic layer 20 can be attached or manufactured (e.g., a resin film is formed on a plastic substrate, and a roller is used to press a concave indentation on the resin film to form the hollow cavity 22 structure. The hollow cavity 22 structure serves as a container for the electronic ink. Then, the colloid solution 24 containing the charged color particles 26 is injected into the hollow cavity 22 structure, and a sealant is used to seal the cavity to form the electrophoretic layer 20. For details, please refer to Taiwan Patent Application No. 93100767). For the side of the opposite substrate 12, the common electrode layer 14 and the insulating layer are formed on the opposite substrate 12. Finally, the side of the control substrate 10 with the electrophoretic layer 20 and the side of the opposite substrate 12 with the common electrode and the insulating layer are adhered by an optical adhesive. The deposition process (CVD, PECVD), the sputter deposition process, and the coating process are mature processes commonly used in display panels. Thus, the electrophoretic display 100 with high aperture ratio and high picture update rate and other advantages can be manufactured.

[0181] Reference is made to Figure 5C Figure 6 is a cross-sectional view of some components of the electrophoretic display 100 according to another embodiment of the present application. The control electrode layer PEL, the driving circuit layer 30, and the control substrate 10 according to the present embodiment are mainly described. Figure 5C The control electrode layer PEL, the driving circuit layer 30, and the control substrate 10 according to the present embodiment can also be used in Figure 3AIn the architecture shown, the viewing side is toward the control substrate 10 side of the proximity control electrode layer PEL, so the image display principle is to use the potential of the control electrode layer PEL to attract, rather than repel, the charged color particles in the colloidal solution 24, to achieve better display effect and higher screen update rate and other advantages. In addition, the present application also provides an improved design for the driving circuit layer 30 to improve the aperture ratio when viewed from the control substrate 10.

[0182] As shown in Figure 5C the present embodiment is similar to the embodiment shown in Figure 5A , the first electrode CE1 of the storage capacitor Cs is provided by the control electrode PE, and the second electrode CE2 of the storage capacitor Cs is provided by the first transparent conductive layer ITO1, but the control electrode PE and the first transparent conductive layer ITO1 are not made on the planar layer PLN. Because the first electrode CE1 and the second electrode CE2 of the storage capacitor Cs are respectively formed by transparent conductive material, the aperture ratio of the control substrate 10 in the electrophoretic display 100 can be increased. Furthermore, the first electrode CE1 of the storage capacitor Cs must be electrically connected to the control electrode PE in operation, and in the present embodiment, the control electrode PE formed by transparent conductive material is directly used as the first electrode CE1 of the storage capacitor Cs. In this way, the structure can be simplified, and the process can be further reduced. In addition, Figure 5C the embodiment shown in Figure 3A can also be applied to the architecture shown in Figure 5C , that is, the viewing side is on the control substrate 10 side, so the disclosed control electrode layer PEL, driving circuit layer 30 and control substrate 10 shown in Figure 3A can also be applied to the architecture shown in , that is, the viewing side is on the control substrate 10 side, so the disclosed control electrode layer PEL, driving circuit layer 30 and control substrate 10 shown in

[0183] can also be applied to the architecture shown in Figure 5CThe manufacturing method of the embodiment is described as follows. For the side of the control substrate 10, a metal film is first deposited on the upper surface of the control substrate 10 by a deposition process or a sputter deposition process, and a first metal layer Ml is then formed by a photolithography process. The first metal layer Ml is used to form the gate metal Mg and the gate line GL. Then, an insulating layer (e.g. SiNx) and an a-Si layer AS are deposited, and the semiconductor layer of the thin film transistor is defined by a photolithography process. Then, a metal film is deposited on the resultant structure by a deposition process or a sputter deposition process, and a second metal layer M2 is formed by a photolithography process. The second metal layer M2 is used to form the source metal Ms, the drain metal Md and the data line DL. Then, a transparent conductive material film is deposited by a sputter deposition process, and a first transparent conductive layer ITOl and the common voltage line Ve are formed by a photolithography process. Alternatively, the first transparent conductive layer ITOl can be formed first, and then the second metal layer M2 is formed. Basically, the first transparent conductive layer ITOl and the second metal layer M2 are formed on the same layer or in a position close in height. Then, an insulating layer CI for storing the capacitor Cs is defined by a photolithography process after an insulating layer is deposited. Then, a transparent conductive material film is deposited by a sputter deposition process, and a control electrode layer PEL(ITO2) is formed by a photolithography process. Then, a planarization layer PLN or an insulating layer can be formed on the resultant structure by a coating process and a photolithography process. Then, the electrophoretic layer 20 is attached or manufactured. The electrophoretic layer 20 is manufactured by forming a resin film on the plastic substrate, and then a roller is used to press a concave structure on the resin film to form the hollow cavity 22 structure. The hollow cavity 22 structure is used as a container for the electronic ink. Then, the colloid solution 24 containing the charged color particles 26 is injected into the hollow cavity 22 structure, and then a sealant is used to seal the cavity to form the electrophoretic layer 20. The detailed manufacturing process can be referred to the Taiwan Patent Application No. 93100767, or the micro-compartment structure of the present application is used, which will be described later. Then, the side of the opposite substrate 12 is manufactured. The common electrode layer 14 can be formed on the opposite substrate 12, or the common electrode layer 14 can not be formed on the opposite substrate 12. Finally, the side of the control substrate 10 with the electrophoretic layer 20 and the side of the opposite substrate 12 are adhered by an optical adhesive or the micro-joint structure of the present application (which will be described later). The deposition process (CVD, PECVD), the sputter deposition process and the coating process are mature processes commonly used in the display panel industry. Thus, the electrophoretic display 100 with high aperture ratio and high picture update rate and other various creative features can be manufactured. Figure 3B-3CIn the examples 4A-4C and 5A-5C, according to one feasible method, at least one storage capacitor Cs includes a transparent first electrode CE1, a transparent second electrode CE2, and an insulating layer CI between the first electrode CE1 and the second electrode CE2; according to another feasible method, all storage capacitors Cs respectively include a transparent first electrode CE1, a transparent second electrode CE2, and an insulating layer CI between the first electrode CE1 and the second electrode CE2; according to yet another feasible method, at least the storage capacitors Cs in the viewing area of ​​the electrophoretic display each include a transparent first electrode CE1, a transparent second electrode CE2, and an insulating layer CI between the first electrode CE1 and the second electrode CE2.

[0184] exist Figures 3A-3C , Figures 4A-4C and Figures 5A-5C In the illustrated embodiment, because the common electrode layer 14 is located away from the viewing surface, it does not need to be made of a conductive transparent material. For example, the common electrode layer 14 can be made of an opaque conductive material, such as an aluminum thin film. Since the viewing surface is not on the opposite substrate side, not providing the common electrode layer 14 on the opposite substrate is also an embodiment of the present invention. Furthermore, according to... Figures 3A-3C , Figures 4A-4C and Figures 5A-5C In the illustrated embodiment, the aperture ratio is increased to at least 70%, preferably to at least 80%, and most preferably to at least 90%. According to one embodiment of the present invention, the aperture ratio can be further improved by designing the sum of the linewidths of the gate line and the data line to be no greater than 20 micrometers (for large-size displays or low-resolution displays) or no greater than 10 micrometers (for medium-size, small-size displays or high-resolution displays).

[0185] In addition, Figures 3A-3C , Figures 4A-4C and Figure 5A and 5C In the illustrated embodiment, the area of ​​the semiconductor portion AS of the thin-film transistor 32 may not exceed 1000 square micrometers, the overlap area between the thin-film transistor 32 and the gate line GL may not be less than 20 square micrometers, and the overlap area between the thin-film transistor 32 and the data line DL may not be less than 5 square micrometers. Furthermore, the linewidth of the gate line GL may not exceed 5 micrometers or 10 micrometers, and the linewidth of the data line DL may not exceed 5 micrometers or 10 micrometers; the sum of the linewidths of the gate line GL and the data line DL may not exceed 20 micrometers. Moreover, the first electrode CE1 and the second electrode CE2 of the storage capacitor Cs overlap each other in the projection direction, and their overlap area is not less than 30% of the pixel area. Figures 3A-3C , Figures 4A-4C and Figure 5A and 5CThe electrophoretic display 100 of the embodiments shown can have a microcell structure as shown in the embodiments of the present application Figure 11A-11C , Figures 12A-12C , Figures 13A-13C and Figures 14A-14E or similar, and the electrophoretic display 100 can also have a microcard structure 60 as shown in the embodiments of the present application Figure 14C-14E , Figures 16A-16D or similar. Those skilled in the art can easily modify the microcell and microcard structures of the above embodiments and apply them to the embodiments of the present application Figures 3A-3C , Figures 4A-4C and Figure 5A and 5C . In addition, if the electrophoretic display 100 of the embodiments shown in Figures 3A-3C , Figures 4A-4C and Figure 5A and 5C has a color filter layer, the color filter layer can have a structure as shown in the embodiments of the present application Figure 18A , i.e. the color filter layer CF includes a plurality of filter color blocks (CFR, CFG, CFB) of different colors, and each filter color block includes a plurality of holes H, at least one of which has an area of no more than 100 square microns. In addition, the electrophoretic display 100 of the embodiments shown in Figures 3A-3C , Figures 4A-4C and Figure 5A and 5C can also be configured as shown in the embodiments of the present application Figure 19 , i.e. the common voltage lines Ve are electrically connected to a display driver 200 or a display touch integrated driver 200; during touch operation of the electrophoretic display 100, the display touch integrated driver 200 electrically connects a plurality of data lines DL together as a single touch transmission electrode; the display touch integrated driver 200 electrically connects a plurality of common voltage lines Ve together as a single touch receiving electrode, or the touch transmission electrode and the touch receiving electrode can be adjusted relative to each other.

[0186] 2. Fabricate thin film transistors on gate lines

[0187] Referring to Figure 6AFigure 1 shows a schematic diagram of a conventional thin film transistor. The fabrication of a thin film transistor generally involves five mask steps. In the first mask step, a first metal layer Ml is formed on a glass substrate (e.g. control substrate 10), i.e. a gate metal Mg and a gate line GL are defined by a photolithography process using a first mask. In a conventional electrophoretic display, the first metal layer Ml also serves as a first electrode CE1 of a storage capacitor Cs. Subsequently, an insulating layer 320 (e.g. SiNx, SiO2) and an a-Si layer are deposited, and a semiconductor portion (i.e. a-Si layer AS) is defined by a photolithography process using a second mask. Ion implantation is then performed to form a doped layer 322. A second metal layer M2 is then formed, i.e. a source metal Ms and a drain metal Md, and a data line are defined by a photolithography process using a third mask. In a conventional electrophoretic display, the second metal layer M2 also serves as a second electrode CE2 of the storage capacitor Cs. A sputtering process is then performed to form a transparent conductive layer (ITO), and a contact point between the control electrode PE and the source metal Ms is formed by a photolithography process using a fourth mask. An insulating passivation layer 324 is then deposited, and the remaining metal surfaces that need to be exposed are defined by a photolithography process using a fifth mask.

[0188] Referring to Figure 6B Figure 2 shows a top view of a conventional thin film transistor 32 and other related components. As shown in the figure, the source metal Ms of the thin film transistor is electrically connected to a data line DL, the drain metal Md is connected to a control electrode PE through a via hole VI, and the gate metal Mg is electrically connected to a gate line GL. In addition, the semiconductor layer of the thin film transistor 32, i.e. the semiconductor portion AS, does not overlap with the gate line GL or the data line DL in the projection angle. This is because the amorphous silicon TFT design occupies a large area and affects the aperture ratio of the control substrate.

[0189] Referring to Figure 6C In order to further improve the aperture ratio of the control substrate, according to an embodiment of the thin film transistor of the present application, at least part of the a-Si layer (i.e. the semiconductor portion) AS of the thin film transistor 32 overlaps with one of the gate line GL or the data line DL, or at least part of the a-Si layer AS of the thin film transistor 32 overlaps with both the gate line GL and the data line DL. In addition, the via hole VI of the thin film transistor 32 also overlaps with the gate line GL. In other words, the present application moves the thin film transistor 32 originally placed in the control electrode PE region of the electrophoretic display 100 to the intersection point with respect to the data line and the gate line to increase the aperture ratio of the electrophoretic display 100. Under the best conditions, the electrophoretic display 100 of the present application can have the following aperture ratio:

[0190] Referring to Figure 6DUsing the design paradigm of the present application.

[0191] (a) In black and white resolution of 166 PPI (pixel size of 150umX150um), the aperture ratio of the control substrate can reach 95.5%, (b) In black and white resolution of 250 PPI (pixel size of 100umX100um), the aperture ratio of the control substrate can reach 92.88%, (c) In black and white resolution of 300 PPI (pixel size of 85umX85um), the aperture ratio of the control substrate can reach 91.39%, (d) In color resolution of 200 PPI (pixel size of 120umX120um, RGB sub-pixels are 40umX120um each), the aperture ratio of the control substrate can reach 87.67%. According to the present application, in most of the resolution of the application scene using conservative design, the gate line width is adjusted to 5 microns, the data line width is adjusted to 5 microns (that is, the width of the gate line plus the width of the data line is not more than 10 microns), the aperture ratio under the above resolution conditions can reach more than 80%. In addition, according to an embodiment of the present application, the gate line width is adjusted to 10 microns, the data line width is adjusted to 10 microns (that is, the width of the gate line plus the width of the data line is not more than 20 microns), the aperture ratio under the above resolution conditions can reach more than 70%. According to an embodiment of the present application, the gate line and the data line in the area not overlapping with the AS area (semiconductor area) of the TFT are changed to transparent conductive material, that is, part of the area of the gate line is changed to transparent conductive material or part of the area of the data line is changed to transparent conductive material, the aperture ratio under the above resolution conditions can reach more than 90%.

[0192] The current standard display driver circuit design uses the original LCD circuit design as a template. When using amorphous silicon thin film transistor a-Si design, because the drift speed of a-Si is very slow, causing the on-resistance to be very large, so TFT will be designed with a higher (gate channel width W / gate channel length L). Therefore, the thin film transistor will occupy a high proportion of the area, especially at higher resolutions, the area occupied by the thin film transistor will be higher. Since the thin film transistor is opaque, a higher proportion of the area occupied by the thin film transistor means a lower aperture ratio. Since the switching speed of the liquid crystal of the LCD is much higher than the moving speed of the charged particles in the electrophoretic display, the LCD display can provide a higher frame rate. However, the electrophoretic display uses charged particles in a colloidal solution, which move very slowly, so the frame rate is also very slow. Therefore, the design of the thin film transistor should be different from that of the LCD driver circuit. The thin film transistor design of the LCD should consider using a lower on-resistance, while the electrophoretic display allows a higher on-resistance design. Figure 6CIn the driving circuit layer 30 of the electrophoretic display, the thin-film transistors 32 can have their area reduced to increase the aperture ratio. According to one embodiment of the invention, such as... Figure 6C The diagram illustrates how the gate channel length L and gate channel width W of a thin-film transistor (TFT) are adjusted for an electrophoretic display to increase the aperture ratio. In typical LCD driving circuits, the W / L ratio of TFTs is greater than 10:1, meaning the gate channel length L is much smaller than the gate channel width W. According to one embodiment of the present invention, the ratio of the gate channel width W to the gate channel length L of the TFT is 1:1, meaning the gate channel length L equals the gate channel width W, thereby increasing the aperture ratio of the electrophoretic display 100.

[0193] See also Figure 6C According to one embodiment of the present invention, the a-Si layer (semiconductor portion) AS area of ​​this thin-film transistor 32 is less than 1000 square micrometers (µm). 2 The semiconductor portion AS of this thin-film transistor 32 overlaps with the data line DL in an area greater than 5 square micrometers (µm). 2 The overlap area between the semiconductor portion AS and the gate line GL of this thin-film transistor 32 is greater than 20 square micrometers (µm). 2In other words, according to one embodiment of the present invention, the main part of the semiconductor layer AS is constructed on the gate line GL; since the gate line GL is generally formed of a non-transparent conductive material, by constructing the main part of the semiconductor layer AS of the thin-film transistor 32 on the gate line GL, the aperture ratio of the control substrate of the electrophoretic display 100 can be significantly improved. Furthermore, to further optimize the design parameters of the thin-film transistor 32 for use in the electrophoretic display 100, according to one embodiment of the present invention, the gate channel length L of the thin-film transistor 32 is less than 10 μm, and the gate channel width W is less than 25 μm. According to one embodiment of the present invention, the gate channel length L is 5 μm, and the gate channel width W is 5 μm. The design requires that the width of the gate channel is not greater than 5 times the gate channel length, that is, the W / L ratio is less than 5 times. Different design specifications apply to displays of varying sizes. Larger displays typically have lower resolutions, so to improve production yield, they use wider data and gate lines, such as 10 micrometers for both, meaning the sum of the gate and data line widths is no more than 20 micrometers. Smaller displays require finer line widths, such as 5 micrometers for both, again with the sum of the gate and data line widths not exceeding 10 micrometers. This allows for a substrate aperture ratio greater than 80%. The same principle applies to transistor channel design. For large displays, the gate channel length L is no more than 10 micrometers, and with a W / L ratio of 5, the gate channel width W is no more than 50 micrometers. For smaller displays, the gate channel length L is no more than 5 micrometers, and with a W / L ratio of 5, the gate channel width W is no more than 25 micrometers.

[0194] Figure 6C The thin-film transistor 32 architecture, at least partially constructed on the gate line GL, can be applied to the high aperture ratio drive circuit layer 30 of the present invention to further improve the overall aperture ratio of the electrophoretic display 100. For example, Figure 6C The thin-film transistor 32 architecture can be applied to this invention. Figures 3A-3C , Figures 4A-4C and Figures 5A-5C The high aperture ratio driving circuit layer 30 is shown. This further increases the overall aperture ratio of the electrophoretic display 100, beyond the first electrode CE1 / second electrode CE2 which are constructed from transparent conductive material to store the capacitor Cs. However... Figure 6C The thin-film transistor 32 architecture can also be utilized in known drive circuit layers 30a, for example... Figure 1A-1B In the known electrophoretic display 100 shown, this allows for an increase in the aperture ratio of the control board of the electrophoretic display 100 without changing the design of the storage capacitor Cs.

[0195] Furthermore, in the use of, such as Figure 6C In an electrophoretic display 100 with a thin-film transistor 32 architecture partially built on the gate line GL and a gate channel width / length design, the electrophoretic layer 20 may have the features of the present invention. Figure 11A-11C , Figures 12A-12C , Figures 13A-13C and Figures 14A-14E The microcompartment structure shown is implemented in a similar manner, and the electrophoretic display 100 may also have a corresponding microcompartment structure. Figure 14C-14E , Figures 16A-16D The micro-clamp 60 is implemented in a corresponding or similar manner. Those skilled in the art should be able to appropriately modify the micro-compartments and micro-clamps disclosed in the above embodiments for application in situations such as... Figure 6C In an electrophoretic display 100, a thin-film transistor 32 architecture partially built on the gate line GL and a gate channel width / length design are used. Furthermore, if using, for example... Figure 6C If the electrophoretic display 100, which is partially constructed on the gate line GL and has an electrophoretic interface with gate channel width / length design, has a color filter layer, then the color filter layer can have the characteristics of the present invention. Figure 18A The structure shown, namely the color filter layer CF, comprises multiple color filter blocks of different colors (CFR, CFG, CFB), each color filter block containing multiple holes H, and at least one of these holes H having an area not exceeding 100 square micrometers. Furthermore, using... Figure 6C The electrophoretic display 100, with its thin-film transistor 32 architecture partially built on the gate line GL and its gate channel width / length design, can also be like... Figure 19 The architecture shown connects the common voltage lines Ve to a display driver 200 or a display touch integrated driver 200. During touch operation of the electrophoretic display 100, the display touch integrated driver 200 connects multiple data lines DL together as a single touch emitter electrode. The display touch integrated driver 200 connects multiple common voltage lines Ve together as a single touch receiver electrode, or the touch emitter electrode and touch receiver electrode can be interchanged.

[0196] 3. The color filter layer is moved to the control substrate.

[0197] refer to Figure 7A The image shows a cross-sectional view of a known color electrophoretic display 100. This color electrophoretic display 100, for example, includes, from top to bottom, an upper glass substrate 16, a color filter layer CF, an optical adhesive 13, a counter substrate 12 (e.g., a transparent plastic substrate), a common electrode layer 14 (e.g., a transparent conductive electrode layer), an electrophoretic layer 20, a control electrode layer PEL, a driving circuit layer 30, and a control substrate 10 (e.g., a glass substrate). Furthermore, as... Figure 7AAs shown, the electrophoretic layer 20 comprises a plurality of hollow cavities 22 (only one of which is shown), a colloidal solution 24 comprising a plurality of charged color particles 26 (e.g. charged black particles 26B and charged white particles 26W) filled in each of the hollow cavities 22, which serves as a container for the electronic ink. However, in Figure 7A As shown in the color electrophoretic display 100, the distance between the color filter layer CF and the charged color particles is the thickness of the opposing substrate 12 plus the thickness of the cavity film of the hollow cavities 22 plus the thickness of the optical glue 13, which is about 100-200 um. This thickness causes the incident light to enter, be reflected by the charged color particles (e.g. charged white particles 26W), and then exit the color electrophoretic display 100 through the other color filter. The reflected light is absorbed by the color filter and no light is transmitted to the outside, resulting in a decrease in brightness. For example, Figure 7A As shown, the incident light L1 enters through the second color filter CF2, is reflected by the charged color particles (e.g. charged white particles 26W), and then exits the color electrophoretic display 100 through the second color filter CF2. However, the incident light L1 must pass through the opposing substrate 12 and the second color filter CF2 to reach the charged white particles 26W, which causes a certain degree of attenuation. Furthermore, the incident light L1 can pass through the second color filter CF2 again to exit the color electrophoretic display 100, causing secondary attenuation of the color filter.

[0198] For example, Figure 7A As shown, the incident light L1 enters through the second color filter CF2, is reflected by the charged color particles (e.g. charged white particles 26W), and then exits the color electrophoretic display 100 through the second color filter CF2. However, the incident light L1 must pass through the opposing substrate 12 and the second color filter CF2 to reach the charged white particles 26W, which causes a certain degree of attenuation. Furthermore, the incident light L1 can pass through the second color filter CF2 again to exit the color electrophoretic display 100, causing secondary attenuation of the color filter.

[0199] For example, Figure 7BThe present application makes the color filter layer CF on the control substrate 10, or close to the control substrate 10, so that the distance between the color filter layer CF and the charged color particles 26 can be reduced. When the viewing side is on the control substrate 10 side, the distance between the color filter layer CF and the charged color particles 26 can be reduced to within 30 um (by reducing the thickness of the substrate 12), so that the above problem can be solved. If the hollow cavities 22 of the electrophoretic layer 20 are built using the micro-separating chambers of the present application (to be described later), the distance between the color filter layer CF and the charged color particles 26 can be further reduced to below 3 um or even to zero distance of direct contact, so that the best display quality of the color electrophoretic display 100 can be achieved.

[0200] As shown in Figure 7B for convenience of explanation, i.e. for clearer comparison with known electrophoretic displays, the present application's electrophoretic display 100 is viewed from the control substrate 10 side, however Figure 7B the control substrate 10 is still below the structure. According to this embodiment, the present application's electrophoretic display 100 comprises, from bottom to top, the control substrate 10, the color filter layer CF, the high aperture ratio drive circuit layer 30 (hereinafter referred to as the drive circuit layer 30), the control electrode layer PEL, the electrophoretic layer 20, the common electrode layer 14 (which can be a transparent conductive electrode layer, or an opaque metal conductive layer, etc.), and the opposite substrate 12. Similarly, the electrophoretic layer 20 comprises a plurality of hollow cavities 22 (only one of which is shown in the figure), and a colloidal solution 24 filled in each hollow cavity 22, which comprises a plurality of charged color particles 26 (such as charged black particles 26B and charged white particles 26W). The hollow cavities 22 are, for example, hollow cavities made of organic polymer materials, and are used to fill the colloidal solution 24 comprising the charged color particles 26. According to other embodiments of the present application (not shown in the figure), the hollow cavities 22 can also be filled with a colloidal solution 24, which contains a fluid of a color (such as black) and a plurality of charged particles of a single color (such as white particles), and the hollow cavities 22 are structured as containers for electronic ink.

[0201] The electronic ink in the present application is defined as comprising a plurality of charged color particles arranged in a colloidal solution and capable of moving through the colloidal solution under the influence of an electric field, which comprises positively charged color particles and / or negatively charged color particles.

[0202] As shown in Figure 7C for convenience of explanation, i.e. for clearer comparison with known electrophoretic displays, the present application's electrophoretic display 100 is viewed from the control substrate 10 side, however Figure 7B the control substrate 10 is still below the structure. According to this embodiment, the present application's electrophoretic display 100 comprises, from bottom to top, the control substrate 10, the color filter layer CF, the high aperture ratio drive circuit layer 30 (hereinafter referred to as the drive circuit layer 30), the control electrode layer PEL, the electrophoretic layer 20, the common electrode layer 14 (which can be a transparent conductive electrode layer, or an opaque metal conductive layer, etc.), and the opposite substrate 12. Similarly, the electrophoretic layer 20 comprises a plurality of hollow cavities 22 (only one of which is shown in the figure), and a colloidal solution 24 filled in each hollow cavity 22, which comprises a plurality of charged color particles 26 (such as charged black particles 26B and charged white particles 26W). The hollow cavities 22 are, for example, hollow cavities made of organic polymer materials, and are used to fill the colloidal solution 24 comprising the charged color particles 26. According to other embodiments of the present application (not shown in the figure), the hollow cavities 22 can also be filled with a colloidal solution 24, which contains a fluid of a color (such as black) and a plurality of charged particles of a single color (such as white particles), and the hollow cavities 22 are structured as containers for electronic ink. Figure 7C The high aperture ratio drive circuit layer 30 can adopt a structure similar to Figure 5AThe structure of the drive circuit layer 30 is similar to that of the control substrate 10, i.e. the control electrode PE and the first transparent conductive layer ITOl are both formed on the planarization layer PLN. The two electrode layers (the first electrode CE1 and the second electrode CE2) of the storage capacitor Cs are provided by the control electrode PE and the first transparent conductive layer ITOl, respectively. Furthermore, the source metal Ms / drain metal Md of the thin film transistor 32 is formed by the second metal layer M2, and the drain metal Md is connected to the control electrode PE through the via Vl. As shown in Figure 7C Since the two electrode layers (the first electrode CE1 and the second electrode CE2) of the storage capacitor Cs are both made of transparent conductive material (e.g. ITO), no light is blocked, and the aperture ratio of the electrophoretic display with the high aperture ratio drive circuit layer 30 can be increased. In addition, the insulating layer CI of the storage capacitor Cs can be reduced in thickness according to design, so that the capacitance of the storage capacitor Cs can be maximized without affecting the aperture ratio of the control substrate of the electrophoretic display 100. Furthermore, there can be a transparent protective layer 15 of silicon nitride material, silicon oxide material or a composite stack of both between the drive circuit layer 30 and the color filter layer CF.

[0203] In addition, in the fabrication of the electrophoretic display 100 as shown in Figure 7B and 7C the fabrication process of the drive circuit layer 30 can follow similar steps as Figure 5AThe embodiment steps are shown. However, before forming the thin film transistor on the top surface of the control substrate 10, the color filter layer CF is formed. The color filter layer CF can be formed by different processes according to the colorant material, such as pigment or dye. For the pigment, printing, electrodeposition, or coating and then exposure and development or etching can be used. For the dye, dyeing or coating and then exposure and development or etching can be used. Thus, the color filter layer CF including multiple colors is formed on the top surface of the control substrate 10. Since the thicker the color filter layer, the more light is lost and the less light can pass through, the thickness of the color filter layer is limited to less than 5 microns in practice. That is, the thickness of the color filter layer is not more than 5 microns. After the color filter layer CF is formed, the transparent protective layer 15 of silicon nitride material, silicon oxide material, or a composite layer of both is formed on the surface of the color filter layer CF. Then, the metal thin film is formed by deposition or sputtering process and the first metal layer Ml is formed by photolithography process on the top surface of the control substrate 10. The first metal layer Ml is used to form the gate metal Mg and the gate line GL. Then, the insulating layer (such as SiNx or SiO2) and the a-Si layer are deposited and the semiconductor part AS of the thin film transistor is defined by photolithography process. Then, the metal thin film is formed by deposition or sputtering process and the second metal layer M2 is formed by photolithography process on the obtained structure. The second metal layer M2 is used to form the source metal Ms, the drain metal Md, and the data line DL. Then, the planar layer PLN and the via hole are formed on the obtained structure. Then, the transparent conductive material thin film is formed by sputtering process and the first transparent conductive layer ITOl is formed by photolithography process. The first transparent conductive layer ITOl is used as the second electrode CE2 of the storage capacitor Cs. The insulating material is deposited as the capacitor insulating layer CI of the storage capacitor Cs. The transparent conductive material thin film (ITO2) is formed by sputtering process and the control electrode PEL of the control electrode PE is formed by photolithography process. The control electrode PEL is used as the first electrode CE1 of the storage capacitor Cs. Then, the electrophoretic layer 20 (including the hollow cavity 22) is attached or made. The resin thin film is formed on the plastic substrate and the hollow cavity 22 structure is formed by pressing the resin thin film with a roller. The hollow cavity 22 structure is used as the container of the electronic ink. Then, the colloid solution 24 including the charged color particles 26 is injected into the hollow cavity 22 structure and sealed to form the electrophoretic layer 20. The detailed manufacturing process can be referred to the Taiwan patent application No. 93100767 or the micro-compartment structure of the present application. Then, the relative substrate 12 side part is manufactured. The common electrode layer 14 and the insulating layer can be formed on the relative substrate 12. Finally, the control substrate 10 side with the electrophoretic layer 20 and the relative substrate 12 side with the common electrode and the insulating layer are adhered by optical adhesive or the micro-joint structure (to be described later) of the present application. When the viewing surface is not on the relative substrate 12 side, the common electrode layer 14 on the relative substrate 12 is not necessary.The aforementioned deposition process (CVD, PECVD), sputter deposition process, and coating process are all mature processes commonly used in display panels, which can be used to manufacture the electrophoretic display 100 of the present invention with high aperture ratio and high screen refresh rate.

[0204] However, in the above process, if the material of the color filter layer (CF) is affected by the temperature during the subsequent thin-film transistor (TFT) process, the TFT process method must be selected. For example, the TFT can be a low-temperature process a-Si TFT (temperature below 200°C), or an even lower process temperature organic TFT (temperature below 100°C).

[0205] like Figure 7B and 7C As shown, in the electrophoretic display 100 according to the present invention, the viewing surface is on the control substrate 10 side, and the color filter layer CF is moved onto the control substrate 10. Furthermore, the combined total thickness of the driving circuit layer 30 and the control electrode layer PEL is much smaller than... Figure 7A The thickness of the relative substrate 12 in the control substrate 10 side reduces the distance between the light incident from the control substrate 10 side and the electrophoretic layer 20. Furthermore, as mentioned earlier, the charged color particles 26 (e.g., charged black particles 26B and charged white particles 26W) attracted by the high aperture ratio drive circuit layer 30 can reach the side of the electrophoretic layer 20 near the control electrode layer PEL more quickly, further reducing the distance between the light incident from the control substrate 10 side and the charged color particles 26, thereby increasing the color accuracy, color saturation and contrast, brightness, and other creative features of the electrophoretic display 100.

[0206] Figure 8A This figure shows a cross-sectional view of an electrophoretic display 100 according to another embodiment of the present invention. The structure shown in this figure is similar. Figure 7B The structure shown, namely the color filter layer CF, is also located near the control substrate 10. However, in Figure 8A In the shown structure, the position of the color filter layer CF is moved above the control electrode layer PEL. In practice, it can also be disposed between the driving circuit layer and the control electrode layer. The control electrode can be electrically connected to the source or drain of the transistor through a via on the color filter layer. Therefore, the electrophoretic display 100 of this embodiment includes, from bottom to top, a control substrate 10, a high aperture ratio driving circuit layer 30, a control electrode layer PEL, a color filter layer CF, an electrophoretic layer 20, a common electrode layer 14 (e.g., a transparent conductive electrode layer or an opaque metallic conductive layer), and a counter substrate 12, wherein the control electrode layer PEL and the color filter layer CF can be interchanged.

[0207] like Figure 8B As shown, this is the corresponding Figure 8A Partial sectional view of the embodiment, mainly showing the control substrate 10, the color filter layer CF, the high aperture ratio drive circuit layer 30, and the control electrode layer PEL. Figure 8B The high aperture ratio drive circuit layer 30 can adopt a similar Figure 5A structure as shown in FIG. 2, that is, the control electrode PE and the first transparent conductive layer ITOl are both fabricated on the planar layer PLN. The two electrode layers (the first electrode CE1 and the second electrode CE2) of the storage capacitor Cs are provided by the control electrode PE and the first transparent conductive layer ITOl, respectively. Furthermore, the source metal Ms / drain metal Md of the thin film transistor 32 is formed by the second metal layer M2, and is connected to the control electrode PE (ITO2) through the via Vl. As shown in FIG. 2, since the two electrode layers (the first capacitor conductive layer and the second capacitor conductive layer) of the storage capacitor Cs are both fabricated by transparent conductive material (e.g. ITO), the light is not blocked. In addition, the insulating layer CI of the storage capacitor Cs can be reduced in thickness according to design, so that the capacitance of the storage capacitor Cs can be maximized without affecting the aperture ratio of the electrophoretic display 100. Figure 8B

[0208] In addition, in fabricating the electrophoretic display 100 as shown in FIG. 1 and FIG. 2, the steps similar to those shown in FIG. 3 can be followed. However, after forming the thin film transistor 32 and the control electrode PE on the upper surface of the control substrate 10, the color filter layer CF is formed on the thin film transistor 32 and the control electrode PE. The formation of the color filter layer CF can be performed by different processes according to the colorant material, such as pigment or dye. For the pigment, printing, color photoresist exposure development, or etching can be used; for the dye, etching or color photoresist exposure development can be used, so that the color filter layer CF including multiple colors is formed on the thin film transistor 32 and the control electrode PE. After the color filter layer CF is formed, a transparent protective layer made of Acryl resin or Epoxy resin material, or a protective film made of inorganic material SiNx, SiO2, or the like, can be optionally formed on the surface of the color filter layer CF, or no protective layer or film is formed. Figure 8A 8B Figure 5A

[0209] For further details, please refer to Figure 8A ​​​​Subsequently, an electrophoretic layer 20 is laminated or fabricated on the color filter layer CF (or the transparent protective layer). This layer contains a hollow cavity 22, which is formed by creating a resin film on a plastic substrate and pressing indentations into the resin film using a roller. The hollow cavity 22 serves as a container for electronic ink. A colloidal solution 24 containing charged color particles 26 is then injected into the hollow cavity 22, and the cavity is sealed with adhesive to form a sealed cavity, thus creating the electrophoretic layer 20. For detailed fabrication procedures, please refer to Taiwan Patent Application No. 93100767 or the micro-segment structure of this invention. Next, the portion opposite the substrate 12 is fabricated, and a common electrode layer 14 can be formed on the opposite substrate 12. Finally, the side of the control substrate 10 with the electrophoretic layer 20 and the side of the opposite substrate 12 with the common electrode are bonded together with optical adhesive or bonded together with frame adhesive using the micro-clamp structure of the present invention (detailed below). When the viewing surface is not on the opposite substrate 12 side, the common electrode layer 14 may not be provided on the opposite substrate 12. The above-mentioned deposition process (CVD, PECVD), sputter deposition process, and coating process are all mature processes commonly used in display panels, which can be used to manufacture the electrophoretic display 100 of the present invention with high aperture ratio and high screen refresh rate.

[0210] like Figure 8A and 8B As shown, in the electrophoretic display 100 according to the present invention, the viewing surface is on the control substrate 10 side, and the color filter layer CF is disposed on the control substrate 10. Furthermore, the color filter layer CF is almost in contact with the electrophoretic layer 20, so the distance between the light incident from the control substrate 10 side and the electrophoretic layer 20 after passing through the color filter layer CF can be reduced, thereby increasing the color accuracy, color saturation, contrast, and visible brightness of the electrophoretic display 100.

[0211] Because electronic ink contains black charged particles with sufficient black saturation, a black masking layer (BM) is not needed to increase black saturation. Therefore, the black masking layer (BM) used in thin-film transistors with black borders to shield metal lines can be replaced with white or transparent material. The color filter layer is made by exposing photoresist materials of various colors to a photomask. The development process washes away the unexposed areas, leaving the exposed areas (negative photoresist). For example, to form red, green, and blue photoresist materials, different photomasks can be used to retain photoresist materials in different locations. Furthermore, during the fabrication of the color filter layer, the exposed color photoresist can also be washed away, leaving the unexposed areas (positive photoresist). In other words, through multiple color photoresist exposure processes, the required color photoresist is laid in the designated locations, and the color photoresist can be coated to achieve different required thicknesses.

[0212] like Figure 9AAs shown, the color filter layer is designed to have three regions (red, green, and blue, i.e., red color filter color block CFR, green color filter color block CFG, and blue color filter color block CFB). As shown, Figure 9B As shown, the color filter layer is also designed to have four regions (red, green, blue, and white, i.e., red color filter color block CFR, green color filter color block CFG, blue color filter color block CFB, and white color filter color block CFW), in which the white region is not filled with color resist and remains transparent.

[0213] In the use of electronic paper display devices, the black shading layer (BM) region originally used to increase black saturation can be replaced by black, because the black saturation of electronic paper is already sufficient. Therefore, this region can be replaced by black, white, or transparent without color. The color filter layer is filled with red, blue, and green in three blocks, plus black of the border (BM), for a total of four colors. The color filter layer is filled with red, blue, and green in three blocks, plus white of the border (BM), for a total of four colors. The color filter layer is filled with red, blue, and green in three blocks, plus transparent of the border (BM), for a total of three colors.

[0214] The color filter layer can also be compensated for gray scale to increase the range of gray scale, so the color can be made into four blocks, filled with red, blue, green, and transparent plus the color of the border. The color filter layer is filled with red, blue, and green in four blocks, plus black of the border (BM), for a total of four colors. The color filter layer is filled with red, blue, and green in four blocks, plus white of the border (BM), for a total of four colors. The color filter layer is filled with red, blue, and green in four blocks, plus transparent of the border (BM), for a total of three colors. Transparent is left empty in this region without color resist.

[0215] Furthermore, in the use of electrophoretic displays 100 in which the color filter layer is disposed close to the control substrate 10, as shown in Figures 7B-7C and Figures 8A-8B , the electrophoretic layer 20 can have a micro-compartment structure as shown in Figure 11A-11C , Figures 12A-12C , Figures 13A-13C and Figures 14A-14E or a similar implementation, and the electrophoretic display 100 can also have a micro-dowel 60 as shown in Figure 14C-14E , Figures 16A-16D or a similar implementation. Those skilled in the art should be able to modify the micro-compartment and micro-dowel disclosures of the above embodiments to be applied to electrophoretic displays 100 in which the color filter layer is disposed close to the control substrate 10, as shown in Figures 7B-7C and Figures 8A-8B . In addition, in the use of electrophoretic displays 100 in which the color filter layer is disposed close to the control substrate 10, as shown in Figures 7B-7C and Figures 8A-8BA color filter layer is disposed in an electrophoretic display 100 near the control substrate 10. This color filter layer may have the characteristics of the present invention. Figure 18A The structure shown, namely the color filter layer CF, comprises multiple color filter blocks of different colors (CFR, CFG, CFB), each color filter block containing multiple holes H, and at least one of these holes H having an area not exceeding 100 square micrometers. Furthermore, using... Figures 7B-7C and Figures 8A-8B The color filter layer can also be placed on the electrophoretic display 100 close to the control substrate 10, as shown in the example. Figure 19 The architecture shown connects the common voltage lines Ve to a display driver 200 or a display touch integrated driver 200. During touch operation of the electrophoretic display 100, the display touch integrated driver 200 connects multiple data lines DL together as a single touch emitter electrode. The display touch integrated driver 200 connects multiple common voltage lines Ve together as a single touch receiver electrode, or the touch emitter electrode and touch receiver electrode can be interchanged.

[0216] 4. Micro-compartment design

[0217] The electronic paper used in known technologies for manufacturing electronic paper displays is made using microcapsule and microcup technology. The production cost of electronic paper is high due to yield issues. Furthermore, during the subsequent electrophoretic display manufacturing process, the prepared electronic paper must be peeled off its protective film and laminated onto the control substrate. Foreign matter and air bubbles on the contact surface during lamination can cause significant yield losses. Because the electronic paper structure is very fragile, it is easily broken and damaged during the process of peeling off the protective film, also resulting in significant production losses. The purpose of this invention is to reduce the production cost of electronic paper and eliminate the lamination process, thus avoiding yield losses, by directly integrating the electronic paper into the display. Currently, the most commonly used electronic paper employs a microcup structure, and the production method is mostly roll-to-roll. During manufacturing, convex rollers are used to press indentations into the resin film to create the microcup structure. The microcup structure serves as a container for electronic ink, and the resin film is soft and easily broken under pressure. Therefore, the electronic paper product must be well protected, causing significant difficulties in the manufacturing process. Secondly, the thickness of the microcup (the distance extending perpendicular to the viewing surface) is approximately 25-50 μm, thus requiring extremely high manufacturing precision. In roller molding production, the thinner the microcup, the easier it is for the resin matrix to crack and peel off, adhering to the roller and causing damage, resulting in lower production yield. Thicker microcups consume more electronic ink, and due to the viscosity and surface tension of the resin solution, voids form at the bottom of the microcup during filling, preventing complete filling and causing the resulting display to fail due to poor display quality. All these factors contribute to the high cost of electronic paper. Furthermore, a thicker microcup increases the distance between the control electrode and the common electrode, slowing down the movement of charged color particles. The increased movement distance requires higher driving voltage and longer positioning time, affecting the image refresh rate and display quality. When used in electronic paper readers, this results in a poor user experience. This invention addresses all these drawbacks.

[0218] refer to Figure 10A This is a top view of a known electrophoretic display's microcup compartments and associated color filter layer. The microcup compartment wall thickness (see the present invention). Figure 11A The thickness of the partition wall in this invention is indicated by T. Figure 10A The thickness of the partition wall of the microcup 22 (which extends parallel to the drawing) needs to be greater than 10µm to provide sufficient support. Furthermore, it is known that the microcup 22 of an electrophoretic display, viewed from above at a projection angle, often employs a hexagonal partition structure to increase structural strength. Charged color particles cannot reach the area within the microcup wall, which can be considered a key factor affecting the display aperture ratio. It is known that electrophoretic displays do not have charged color particles 26 at this location. When... Figure 10A The microcup compartments and control substrate shown (e.g.) Figure 1AWhen the control substrate 10 shown is bonded, it will block the electrodes on the control substrate, causing the display color part to be blocked, which will form background textures and affect the imaging quality. It will also cause color distortion due to the unevenness of the microcup wall blocking position on the color filter layer.

[0219] refer to Figure 10B According to one embodiment of the present invention, micro-segments are fabricated on a substrate, allowing for precise alignment of pixel electrodes (control electrodes PE). The partition walls 52 of the micro-segment structure 50 are located in the non-display area between pixels. In the projection direction of the viewing surface, the overlap area between the partition walls and the control electrodes should be as small as possible, ideally less than 50% of the control electrode area. In other words, according to the design of the present invention, the partition walls 52 of the micro-segment structure 50 can be fabricated into a rectangular structure close to the pixel, and can better conform to the pixel boundaries without affecting the display. According to the present invention, for example, a photomask can be used to develop the pattern of a photoresist film to fabricate the micro-segment wall surface, wherein the photoresist film can be made of a material with high hardness (e.g., a transparent photoresist made of acrylic). Furthermore, according to other embodiments of the present invention, the partition walls 52 of the micro-segment structure 50 can also be made of polymer materials (such as planarization materials, resins, or acrylic materials). Furthermore, as... Figure 10B As shown, the partition walls 52 of the micro-cell structure 50 can be aligned with a portion of the gate line GL or the data line DL. More specifically, the plurality of partition walls 52 overlap with a portion of the data line DL and / or a portion of the gate line GL when viewed from a vertical projection direction (e.g., perpendicular to the viewing plane).

[0220] Because this invention uses a rigid polymer material (such as a transparent photoresist material) as the partition wall 52 of the micro-partition structure 50, its hardness can reach a pencil hardness of 3H or higher, far exceeding the resin material used in known microcup containers (hardness less than 1H). Therefore, this invention can support the weight and pressure of the upper and lower substrates with a thinner wall thickness. The wall thickness T of the micro-partition (see [reference needed]) Figure 11A It can be less than 10µm. (Reference) Figure 10C Because the partition walls 52 of the microcell structure 50 of the present invention can be accurately positioned in the non-display area of ​​the pixel (between pixels), it does not affect the display quality. Its high precision leads to a high yield rate and reduces production costs. A greater advantage is the elimination of the costs associated with using microcup-based electronic paper, and the elimination of substrate bonding saves on optical adhesive costs and reduces yield losses during bonding, allowing for the fabrication of thinner electrophoretic displays. Furthermore, the microcell structure 50 can be fabricated using planarization layer (PLN) materials, where the area outside the wall is etched to complete the microcell. The microcell structure 50 of the present invention can be used to fabricate thinner electrophoretic displays, and an electrophoretic layer 20 with a thickness of less than 25 μm (microcell wall height H1 (see attached diagram)) can be easily fabricated. Figure 11A) can be less than 25um). When the electrophoretic display uses the microcell structure 50 of the present application to make the electrophoretic layer thinner, the distance between the control electrode and the common electrode will be closer, the electric field strength will be stronger, the display can work at a lower driving voltage, the charged color particles can move faster, the distance that the charged color particles need to move will be shorter, and the refresh rate of the display will be greatly improved, solving the refresh problem that has plagued electrophoretic displays, which is especially important for color electrophoretic displays.

[0221] Reference is made to Figure 10D , which is a top view of a microcell structure according to another embodiment of the present application. According to this embodiment, the cell walls 52 of the microcell structure 50 (shown in cross-hatched lines to highlight their shape) are discontinuous in shape. This is because if the cell walls 52 of the microcell structure 50 are made of a material with high hardness, and the substrate on which the microcells are made is a flexible substrate, then when the flexible electrophoretic display is bent, the cell walls 52 can easily be crushed and damaged. To solve this problem, the cell walls 52 of the microcell structure 50 can be made discontinuous in shape. For example, the cell walls 52 shown in FIG. 10D have slits 56 that can serve as expansion spaces for the cell walls 52 when the cell walls 52 are crushed by bending of the substrate. According to one embodiment of the present application, the area of the slits 56 is no more than 50% of the area of the cell walls 52, or the length D of the slits 56 is no more than 50% of the length of the cell walls 52. According to one embodiment of the present application, the length D of the slits 56 can be greater than 0.5um, to provide expansion spaces for the cell walls 52 when the cell walls 52 are crushed. According to one embodiment of the present application, the slot formed by the cross-shaped cell walls 52 can accommodate one pixel, such as a pixel formed by color filter blocks (CFR, CFG, CFB) of different colors. In addition, although the cell walls 52 shown in FIG. 10D are cross-shaped when viewed from the top, the cell walls 52 of the present application can also have other shapes when viewed from the top, such as T-shaped or U-shaped, as long as at least some of the adjacent cell walls 52 have slits 56 therebetween. In addition, although the slits 56 in the embodiment shown in FIG. 10D are uniformly distributed, it should be noted that in actual production, the slits 56 can have different lengths due to process errors, and in addition, the slits 56 do not necessarily have to pass through the cell walls 52 in the thickness direction, as long as they can provide expansion spaces for the cell walls 52 when the cell walls 52 are crushed.

[0222] Reference is made to FIGS. 11A-11C , which is a flowchart showing the process of making a microcell structure 50 according to one embodiment of the present application. These flowcharts show cross-sectional views along line A-A of the microcell structure 50 at different stages of the process. In this embodiment, the microcell structure 50 is made on the driving circuit layer 30 (i.e. on the side of the control substrate 10). Reference is made to FIG. 10C , which is a flowchart showing the process of making a microcell structure 50 according to another embodiment of the present application. These flowcharts show cross-sectional views along line A-A of the microcell structure 50 at different stages of the process. In this embodiment, the microcell structure 50 is made on the control substrate 10 (i.e. on the side of the driving circuit layer 30). Reference is made to FIG. 11A, first, the driving circuit layer 30, the transparent control electrode layer PEL and the insulating protective layer are fabricated on the control substrate 10. Subsequently, the cell wall 52 of the microcell structure 50 is fabricated using transparent photoresist and exposure and development processes. Since the developable depth is causally related to the intensity of the light and the number of times of irradiation during development, in practice, the thickness of the developable photoresist is usually less than 5 um. When the thickness of the electrophoretic layer is too thin, the number of color particles that can be accommodated is limited, thereby affecting the number of layers of color particle stacks. When the number of layers of color particle stacks is insufficient, the reflectivity is affected, resulting in insufficient reflected light and a decrease in the brightness of the visual field. Therefore, the thickness of the electrophoretic layer is usually not less than 5 um (the height Hl of the microcell wall surface (see FIG. 11A ) is not less than 5 um). See FIGS. 17A-17F , the steps of fabricating the cell wall 52 on the surface of the substrate (for example, the control substrate side 10 or the opposite substrate side 12) are described according to an embodiment of the present application. According to the present application, the cell wall 52 can be directly fabricated on the surface of the substrate using transparent photoresist and exposure and development processes. In addition, other structures, such as the transparent control electrode layer PEL, the insulating layer, the protective layer, the driving circuit layer 30, the color filter layer CF or the common electrode layer 14, can be present on the surface of the substrate, and the cell wall 52 can be directly fabricated on these structures using transparent photoresist and exposure and development processes. Furthermore, a planarization layer PLN can be added to other structures (for example, the transparent control electrode layer PEL, the driving circuit layer 30 or the color filter layer CF) on the substrate, and then the cell wall 52 can be fabricated using transparent photoresist and exposure and development processes. Therefore, although FIGS. 17A-17F the initial structure is shown as the substrate 10 / 12, it is not limited to whether other structures are present thereon. As shown in FIG. 17A , first, cleaning is performed on a substrate 10 / 12, which can be the control substrate 10 or the opposite substrate 12, and the surface of which can have other structures present thereon. Subsequently, as shown in FIG. 17B , a first layer of photoresist PRl, for example, transparent photoresist material, is applied to the substrate 10 / 12. Subsequently, as shown in FIG. 17C , a photomask PM is used to perform exposure on the positions where the cell wall 52 is to be formed, so as to define the first residual photoresist PRA (i.e., the first polymer material layer). According to an embodiment of the present application, the first layer of photoresist PRl is a negative photoresist material, that is, the exposed portions remain after development; however, according to another possible embodiment of the present application, the first layer of photoresist PRl is a positive photoresist material, and the photomask PM must be designed accordingly. Subsequently, as shown in FIG. 17D , a second layer of photoresist PR2, for example, also transparent photoresist material, is applied to the substrate 10 / 12. Subsequently, as shown in FIG. 17EThe photo mask PM is used again for exposure, i.e. repeated exposure, to expose the position where the partition wall 52 is to be formed, so as to define a second residual photoresist PRB (i.e. a second high polymer material layer), the range of the second residual photoresist PRB can be smaller than that of the previous residual photoresist, forming a shape decreasing upwards. Finally, referring to FIG. 17F , the resulting structure is developed to leave the first residual photoresist PRA and the second residual photoresist PRB, and the resulting structure (the first high polymer material layer stacked on the second high polymer material layer) is the partition wall 52 of the present application. According to the above method, by repeated coating of photoresist and exposure, and finally developing, the developer removes the unnecessary part (hollowed area), leaving a micro partition wall surface high enough, which can be repeated more than 1 times of photoresist coating, exposure and developing, or repeated more than 2 times of photoresist coating, exposure and developing, and the area of each exposure can be decreased to thin the partition wall, and the diameter of the partition wall can be decreased by less than 5 um (W1-W2) for each layer. Referring to FIG. 11B , after the partition wall 52 is made, the colloidal solution is filled in the slot 54 defined by the partition wall 52 in a vacuum environment, which can avoid air remaining in the micro partition structure to cause filling failure, and the filling method can be to first cover the non-display area with a shielding plate (not shown) and then use a spraying device to spray the heated colloidal solution in the display area. In order to improve the yield of filling the colloidal solution, since there is an alignment error for each layer of exposure, according to an embodiment of the present application, the wall thickness is designed to decrease with the growth of the stacked layers, so as to avoid the wall surface being uneven to make the contact area small when filling the colloidal solution, and thus more unfilled gaps are generated when filling the colloidal solution, resulting in a defective product. In practice, the line width of the first coated photoresist (i.e. the first high polymer material layer) is the largest and then decreases for each layer, for example, the width (cross-sectional width) of the high polymer material layer forming the partition wall surface decreases by less than 5 microns for each layer, and the micro partition wall surface shape is a shape decreasing in thickness from bottom to top. As shown in FIG. 17F , the width difference (decrease) between the width W2 of the second high polymer material layer and the width W1 of the first high polymer material layer is less than 5 microns.

[0223] In the present embodiment, the process of the partition wall 52 can be performed after the transparent control electrode layer PEL is made FIGS. 17A-17F , or the process of the partition wall 52 can be performed after a planar layer PLN is made on the transparent control electrode layer PEL FIGS. 17A-17FThe partition wall 52 process. The material of the aforementioned planarization layer PLN can be an organic insulating material, an inorganic insulating material, or a combination thereof. According to one embodiment, the organic insulating material can be polyimide (PI), polyamic acid (PAA), polyamide (PA), polyvinyl alcohol (PVA), polyvinylcinnamate (PVCi), poly(methyl methacrylate) or other suitable photoresist materials or combinations thereof. Furthermore, the inorganic insulating material can be silicon oxide, silicon nitride, silicon oxynitride, siloxane, or a combination thereof.

[0224] See compound combination FIG. 11A In this invention, for ease of explanation, the thickness of the microcompartment structure 50 is defined as the height H of the compartment wall 52, and the thickness of the compartment wall 52 is T. According to this invention, the thickness of the microcompartment structure 50 (i.e., the height H1 of the compartment wall) is greater than 5 micrometers and less than 25 micrometers, and the thickness T of the compartment wall is less than or equal to 10 micrometers. Furthermore, see also... FIG. 11A and FIG. 17F The average width of the cross-sectional area of ​​the compartment wall 52 of the microcompartment structure 50 is no greater than 10 micrometers. See also FIG. 11B After the partition wall 52 is fabricated, a colloidal solution is filled into the tank 54 defined by the partition wall 52. This colloidal solution contains charged black particles and / or charged white particles; or the colloidal solution contains charged colored particles, such as… FIG. 11B The charged cyan particle 26C, charged magenta particle 26M, charged yellow particle 26Y, and charged white particle 26W are shown. See also... FIG. 11C The process involves attaching a substrate to the substrate, either by providing a substrate 12 with a conductive thin film (e.g., a common electrode layer 14) or a substrate 12 without a common electrode layer 14 (when the viewing surface is not on the side of the substrate 12). Optical adhesive 13 is applied between the substrate 12 and the partition wall 52, or frame adhesive is applied to the four edges of the display area before bonding. After bonding, the substrates are placed in a gas-pressurized chamber for heating and pressurization, thus extruding the adhesive solution and filling the gaps within the micro-partition structure 50. Finally, the optical adhesive or frame adhesive is cured to complete the production of the electrophoretic display 100. FIG. 11C As shown, the overlap area between the partition wall 52 and any control electrode PE is less than 50% of the area of ​​the control electrode (the electrode in the control electrode layer PEL).

[0225] See FIGS. 12A-12CThis is a schematic flowchart illustrating the fabrication of a microcompartment structure 50 according to another embodiment of the present invention. In this embodiment, the microcompartment structure 50 is fabricated after the driving circuit layer 30, and the electrophoretic display 100 is a color electrophoretic display 100. FIG. 12A As shown, firstly, a driving circuit layer 30, a transparent control electrode layer PEL, and an insulating protective layer (not shown) are fabricated on the control substrate 10, and then a color filter layer CF is fabricated. In this embodiment, the process can be performed after the color filter layer CF is completed. FIGS. 17A-17F The partition wall 52 process can also be performed after fabricating a planarization layer PLN on the color filter layer CF. FIGS. 17A-17F The process for fabricating partition wall 52. The material of the aforementioned planarization layer PLN can be an organic insulating material, an inorganic insulating material, or a combination thereof. See [link / details] after the partition wall 52 is fabricated. FIG. 12B Under vacuum operating conditions, a colloidal solution containing charged black particles 26B and charged white particles 26W is filled into the tank 54 defined by the partition wall 52. See then. FIG. 12C The process of attaching a relative substrate is performed, that is, providing a relative substrate 12 with a conductive thin film (e.g., common electrode layer 14) or a relative substrate 12 without a common electrode layer 14 (when the viewing surface is not on the side of the relative substrate 12). Optical adhesive 13 is used between the relative substrate 12 and the partition wall 52, or frame adhesive is applied to the four edges of the display area and then the substrates are attached. After completion, the substrates are sent into a gas pressurization chamber for heating and pressurization to complete the extrusion of the adhesive solution into and fill the gaps in the micro-partition structure. Finally, the optical adhesive or frame adhesive is cured to produce the electrophoretic display 100 finished product.

[0226] See FIGS. 13A-13C This is a schematic diagram illustrating the process of fabricating a microcompartment structure 50 according to another embodiment of the present invention. In this embodiment, the microcompartment structure 50 is fabricated on a color filter layer CF. FIG. 13A As shown, a color filter layer CF is first fabricated on the substrate 12, and then a common electrode layer 14 is fabricated on the color filter layer CF. The fabrication processes of these two layers can be reversed, with the common electrode layer 14 fabricated first and the color filter layer fabricated later. Then, a transparent photoresist and an exposure and development process are used on the common electrode layer 14 or the color filter layer to fabricate the partition walls 52 of the micro-segment structure 50.

[0227] In this embodiment, the process can be performed directly on the color filter layer CF or the common electrode layer 14. FIGS. 17A-17F The partition wall 52 process can also be performed after fabricating a planarization layer PLN on the color filter layer CF or the common electrode layer 14. FIGS. 17A-17F The partition wall 52 process. The material of the aforementioned planarization layer PLN can be an organic insulating material, an inorganic insulating material, or a combination thereof.

[0228] See FIG. 13BAfter the partition wall 52 is fabricated, a colloidal solution containing charged black particles 26B and charged white particles 26W is filled into the chamber 54 defined by the partition wall 52 under vacuum conditions. (See following...) FIG. 13C The process involves attaching a control substrate, specifically a control substrate 10 having a control electrode layer (PEL) and a drive circuit layer 30. The control substrate 10 is then bonded to the opposing substrate 12 with pre-fabricated micro-segments using optical adhesive 13 or by applying frame adhesive to the four edges of the display area. After bonding, the two substrates are heated and pressurized in a gas-pressurized chamber to extrude a gel solution and fill the gaps within the micro-segment structure. Finally, the optical adhesive or frame adhesive is cured to produce the electrophoretic display 100. In this embodiment, since the drive circuit layer 30 is not located near the viewing surface, a wider design range is possible, eliminating the need for the high aperture ratio drive circuit layer 30 of this invention. Furthermore, because this embodiment uses transparent photoresist (e.g., photoresist made of acrylic) to create the partition walls 52 of the micro-segment structure 50, the height H1 of the partition walls 52 can be less than 25 μm. In other words, the distance between the drive circuit layer 30 and the common electrode layer 14 can be less than 25 μm, which significantly increases the electric field applied to the electronic ink, increasing the screen refresh rate and other innovative features. Furthermore, since the colloidal solution is filled into the tank 54 defined by the partition wall 52 under vacuum working conditions, the filling rate of the colloidal solution in the tank 54 can reach more than 70%. With the help of the micro-clamp of the present invention, the colloidal solution of the same volume as the micro-clamp can be further squeezed into the tank, and the filling rate of the colloidal solution in the tank 54 can reach more than 90%.

[0229] See FIGS. 14A-14C This is a schematic flowchart illustrating the fabrication of a microcompartment structure 50 according to another embodiment of the present invention. In this embodiment, the microcompartment structure 50 is fabricated on a conductive layer (e.g., common electrode layer 14). FIG. 14A As shown, a common electrode layer 14 and a selective insulating layer are first formed on the opposing substrate 12, and then an insulating layer is formed on the common electrode layer 14. FIGS. 17A-17F The partition wall 52 is fabricated using a process. The insulating layer can be made of silicon nitride, silicon oxide, or a composite layer of both using a deposition method on the common electrode layer 14.

[0230] In this embodiment, the process can be performed directly on the common electrode layer 14. FIGS. 17A-17F The partition wall 52 process can also be performed after a planarization layer PLN is fabricated on the common electrode layer 14. FIGS. 17A-17F The partition wall 52 process. The material of the aforementioned planarization layer PLN can be an organic insulating material, an inorganic insulating material, or a combination thereof.

[0231] like FIG. 14BAs shown, the cell wall 52 of the microcell structure 50 is filled with a colloid solution containing charged cyan particles 26C, charged magenta particles 26M, charged yellow particles 26Y, and charged white particles 26W in the slot 54 defined by the cell wall 52 under vacuum working conditions. Referring to FIG. 14C A control substrate 10 with micro tenons 60 is prepared and fixed on the opposite substrate 12 by registration of the micro tenons 60 with the slot 54 defined by the cell wall 52, achieving close bonding of the two substrates and further filling the entire slot 54 with the colloid solution. More specifically, the control substrate 10 is first grown with a drive circuit layer 30, such as the high aperture drive circuit layer 30 of the present application; then a control electrode layer PEL is formed, and the micro tenons 60 are formed on the control electrode layer PEL. Further details of the micro tenons 60 are described below.

[0232] 5. Micro tenon

[0233] In the production of electronic paper, filling electronic ink into microcups or microcapsules is the most important part of the production process that affects the yield and requires the highest investment in production equipment. Since electronic ink is made by mixing a colloid solution with charged color particles, the density and viscosity of the colloid solution must be increased to achieve the ability of particle suspension. This causes the colloid solution to be difficult to fill into the entire microcup or microcell due to the high surface tension and viscosity of the colloid solution, resulting in voids at the bottom. These voids cause image quality degradation, which is a key factor affecting the yield of electronic paper production. The micro tenon of the present application can solve this problem. When the micro tenon is inserted into the microcell, the colloid solution is further squeezed into the microcell and fills the internal space of the microcell. The thickness of the micro tenon can be adjusted to determine the volume of the squeezed space to solve the void problem, greatly contributing to improving the production yield. In addition, the micro tenon inserted into the microcell can block air from entering, so after filling the colloid solution in a vacuum, the process of using optical glue to adhere the panel around the perimeter can be replaced by using frame glue to adhere the panel around the perimeter. Atmospheric pressure is used to uniformly and tightly press the two substrates with microcells and micro tenons together. Even if the frame glue has a leakage phenomenon, air will be blocked by the micro tenon and the microcell, and will not affect the pressing force of the substrate. The thickness of the optical glue can be reduced, the distance between the charged color particles and the control electrode can be reduced, the picture update speed can be increased, and the driving voltage can be reduced. All these benefits are built on the clever design of the micro tenon.

[0234] Referring to FIG. 14FThe micro tenon 60 can be formed by using photoresist, after exposure and development, the area of the micro tenon is left, and the rest is washed away. The micro tenon can also be formed by using a color filter layer. In addition, the micro tenon can also be formed by using a planarization layer (PLN) to leave the area of the micro tenon after a photolithography process. The micro tenon 60 and the side wall of the slot chamber 54 of the micro compartment should have a certain gap S as an alignment allowance. The gap S is, for example, a gap of 1-50 um. According to an embodiment of the present application, the gap is in the range of 1-5 um, which is determined by the accuracy of the mask alignment when the substrate is attached. The gap is the error tolerance range when the alignment is attached, which avoids the damage caused by the error of the micro compartment and the micro tenon when the alignment is attached. The thickness of the micro tenon can be 0.5-50 um. The thicker the thickness, the more secure the sealing, but it will affect the attraction or repulsion of the control electrode. Therefore, the sealing degree and the electrical effect need to be reasonably distributed. According to an embodiment of the present application, the thickness of the micro tenon 60 is in the range of 1-5 um.

[0235] Referring to FIG. 14D , a schematic diagram of manufacturing the micro compartment structure 50 according to another embodiment of the present application is shown. In this embodiment, the micro compartment structure 50 is manufactured after a conductive layer (for example, the common electrode layer 14) is manufactured. The conductive layer includes an insulating layer (not shown) for electrical isolation with the charged color particles. As shown in FIG. 14D , first, the common electrode layer 14 and the insulating layer are formed on the opposite substrate 12. The insulating layer can be made of silicon nitride material, silicon oxide material, or a composite layer of the two materials. The insulating layer is deposited on the common electrode layer 14 by a deposition method. Then, the compartment wall 52 of the micro compartment structure 50 is manufactured on the common electrode layer 14 and the insulating layer by using photoresist and an exposure and development process. The process of the compartment wall 52 can be as shown in FIGS. 17A-17F . As shown in FIG. 14D , a colloidal solution containing charged particles is filled between the compartment wall 52 of the micro compartment structure 50, for example, a colloidal solution containing charged black particles 26B and charged white particles 26W. Referring to FIG. 14D , this embodiment also includes manufacturing a control substrate 10 with a micro tenon 60, and fixing the control substrate 10 on the opposite substrate 12 by aligning the micro tenon 60 with the slot chamber 54 defined by the compartment wall 52, to achieve the combination of the two substrates. More specifically, the control substrate 10 is first grown with a drive circuit layer 30, for example, the high aperture ratio drive circuit layer 30 of the present application; then the control electrode layer PEL is formed, and the color filter layer CF is formed on the control electrode layer PEL. The micro tenon 60 is formed on the color filter layer CF. If the thickness of the color filter layer meets the requirements, the color filter layer can also be used as the micro tenon 60.

[0236] Referring toFIG. 14F The micro spacers can be formed by using a transparent photoresist. After exposure and development, the areas of the micro spacers are left, and the rest is cleaned away. The micro spacers can also be formed by using the color filter layer in the embodiment of the reference FIG. 14D . In addition, the micro spacers can also be formed by using a planarization layer (PLN) through photolithography to leave the areas of the micro spacers. The micro spacers 60 and the side walls of the groove chambers 54 of the micro compartment structure 50 are kept apart by a certain gap S, which is used as an alignment allowance. The gap S is, for example, a gap of 1-50 um. According to an embodiment of the present application, the gap is in the range of 1-5 um, which is determined according to the accuracy of the mask alignment. The gap is used as an error allowance range when the micro compartment structure 50 is aligned and attached to the micro spacers 60, so as to avoid damage to the micro compartment structure 50 and the micro spacers 60 due to errors when the micro compartment structure 50 is aligned and attached to the micro spacers 60. The thickness of the micro spacers 60 can be in the range of 0.5-50 um. The thicker the micro spacers 60, the more secure the sealing will be. However, the thickness of the micro spacers 60 will affect the attractive force or the repulsive force of the control electrode. Therefore, the sealing degree and the electrical effect need to be properly distributed. According to an embodiment of the present application, the thickness of the micro spacers 60 is in the range of 1-5 um.

[0237] Referring to FIG. 14E , a schematic diagram of the micro compartment structure 50 according to another embodiment of the present application is shown. In this embodiment, the micro compartment structure 50 is formed on a conductive layer (for example, the common electrode layer 14). As shown in FIG. 14E , first, the common electrode layer 14 is formed on the substrate 12. Then, the color filter layer CF is formed on the common electrode layer 14. The compartment walls 52 of the micro compartment structure 50 are formed by using a transparent photoresist and an exposure and development process.

[0238] In this embodiment, the compartment walls 52 can be formed directly on the color filter layer CF, or a planarization layer PLN can be formed on the color filter layer CF, and then the compartment walls 52 are formed. FIGS. 17A-17F FIGS. 17A-17F The materials of the planarization layer PLN can be organic insulating materials, inorganic insulating materials, or a combination thereof.

[0239] As shown in FIG. 14E , a colloidal solution containing charged color particles is filled between the compartment walls 52 of the micro compartment structure 50, for example, a colloidal solution containing the charged black particles 26B and the charged white particles 26W. Referring to FIG. 14E ​The embodiment also includes forming a control substrate 10 with a micro-tenon 60, and fixing the control substrate 10 on the opposite substrate 12 by registration of the micro-tenon 60 with the groove 54 defined by the partition wall 52, to achieve the bonding of the two substrates. More specifically, the control substrate 10 is first grown with a drive circuit layer 30, such as the high aperture ratio drive circuit layer 30 of the present application; then the control electrode layer PEL is formed, and the micro-tenon 60 is formed on the control electrode layer PEL.

[0240] Referring to FIG. 14F , the micro-tenon can be formed by using a transparent photoresist, after exposure and development, leaving the area of the micro-tenon, and the rest is washed away; in addition, the micro-tenon can also be formed by using a planarization layer (PLN) through a photolithography process to leave the area of the micro-tenon. The micro-tenon 60 and the edge wall of the groove 54 of the micro-partition need to maintain a certain gap S as an alignment allowance. This gap S is, for example, a gap of 1-50 um. According to an embodiment of the present application, the gap range is between 1-5 um, which is determined by the accuracy of mask alignment, as the error tolerance range when aligning and fitting, to avoid damage due to collision between the micro-partition and the micro-tenon caused by errors when aligning and fitting. The thickness of the micro-tenon can be 0.5-50 um, the thicker the better the sealing, but it will affect the attraction or repulsion of the control electrode, so the sealing degree and the electrical effect need to be reasonably distributed. According to an embodiment of the present application, the thickness of the micro-tenon 60 is also in the range of 1-5 um.

[0241] In the above embodiment, the partition wall 52 of the micro-partition structure 50 can be made of a high-hardness polymer material, for example, a hardness greater than 3H. In this way, the average wall thickness of the partition wall 52 can be made not greater than 5 um while still having sufficient support capability. Furthermore, although not clearly shown in FIGS. 11A-11C , FIGS. 12A-12C , FIGS. 13A-13C , FIGS. 14A-14E , those skilled in the art can know that in these drawings, the color filter layer CF can have a structure as shown in the present application FIG. 18A , that is, the color filter layer CF includes a plurality of different color filter blocks (CFR, CFG, CFB) including a plurality of holes H, and at least one of the holes H has an area not greater than 100 square microns.

[0242] In addition, in the electrophoretic display 100 of the embodiment shown in FIGS. 11A-11C , FIGS. 12A-12C , FIGS. 13A-13C , FIGS. 14A-14E , the color filter layer CF can have a structure as shown in the present application FIGS. 3A-3C , FIGS. 4A-4C and FIG. 5A and5C The control electrode layer PEL and the drive circuit layer 30 are configured to increase the aperture ratio of the electrophoretic display 100. In addition, the thin film transistors 32 and the gate channel width / length design can also be configured as shown in FIG. 6C The thin film transistors 32 and the gate channel width / length design are configured as shown in

[0243] More specifically, in the electrophoretic display 100 of the embodiment shown in FIGS. 11A-11C , FIGS. 12A-12C , FIGS. 13A-13C , FIGS. 14A-14E The control electrode layer PEL and the drive circuit layer 30 of the electrophoretic display 100 of the embodiment shown in FIGS. 3B-3C , FIGS. 4A-4C , FIGS. 5A-5C The drive circuit layer 30 also includes a plurality of storage capacitors Cs, and the drive circuit layer 30 also includes a plurality of common voltage lines Ve, which are respectively arranged corresponding to the storage capacitors Cs and are substantially parallel to the gate lines GL or parallel to the data lines DL. According to an embodiment of the present application, in the electrophoretic display 100 of the embodiment shown in FIGS. 11A-11C , FIGS. 12A-12C , FIGS. 13A-13C , FIGS. 14A-14E The common voltage lines Ve of the electrophoretic display 100 of the embodiment shown in FIG. 19 The common voltage lines Ve are electrically connected to a display driver 200 or a display touch integrated driver 200 as shown in the configuration. In the touch operation of the electrophoretic display 100, the display touch integrated driver 200 electrically connects a plurality of data lines DL together as a single touch transmitting electrode. The display touch integrated driver 200 electrically connects a plurality of common voltage lines Ve together as a single touch receiving electrode, or the touch transmitting electrode and the touch receiving electrode can be adjusted to each other.

[0244] 6. A semi-transparent electrophoretic display

[0245] Electronic paper displays such as electrophoretic displays of the known art cannot be used in a semi-transparent display mode which can be used for example for information display on a car window, product description on a display cabinet glass, a window advertisement, an indoor painted glass, etc. The only technologies that can be used in a semi-transparent display mode are organic light emitting diodes (OLED) and micro light emitting diodes (micro LED), while conventional LCDs cannot be used due to the need for backlighting. Electrophoretic displays of the known art cannot be used in the above-mentioned scenarios due to their non-transparent state, while the use of OLED or micro LED technologies consumes a lot of energy. More specifically, electrophoretic displays of the known art are non-transparent due to the fact that most of their area is used for the display of electronic ink which contains a plurality of charged color particles.

[0246] The advantage of using electrophoretic displays in a semi-transparent display mode is that they can be used for example for outdoor display cabinets, for external display windows (for example rear windshields which can display information to warn the car behind, advertisements), for indoor windows which can see the window advertisements outside, for transparent indoor painted glass, etc. The non-consumption of energy advantage of using electrophoretic displays is the best choice in the present energy shortage.

[0247] Reference is made to FIG. 15AThis is a top view of a semi-transparent, semi-dual-color electrophoretic display fabricated according to the present invention. According to the present invention, in fabricating a transparent dual-color electrophoretic display, a micro-segment structure 50 having multiple partition walls 52 is fabricated on the control substrate 10, or the micro-segment structure 50 is fabricated after the color filter layer is completed, or the micro-segment structure 50 is fabricated after the conductive substrate is completed. The partition walls 52 of the micro-segment structure 50 can be fabricated into a rectangular structure similar to a color pixel or a square structure similar to a black and white pixel, and can also conform to the pixel boundaries without affecting the display. According to the present invention, for example, a photomask can be used to develop a pattern of transparent photoresist to fabricate transparent micro-segment walls. The material of the transparent photoresist can be a material with high hardness (e.g., a photoresist made of acrylic material). The partition walls 52 of the micro-cell structure 50 are made of transparent photoresist. Since there are no charged color particles on the walls of the micro-cells, the light can penetrate to the scene behind the display. By increasing the thickness of the partition walls 52, the transparent area can be increased, thus increasing the transparent portion of the transparent dual-color electrophoretic display (viewed from the operating surface). The light transmittance of the transparent photoresist is very high, greater than 90%. This micro-cell structure 50 with high light transmittance, combined with the control substrate 10 of the present invention, which is configured with a drive circuit layer 30 with a high aperture ratio, and with the opposing substrate 12 having a transparent conductive layer, can produce a semi-transparent electrophoretic display 100. The transparency of this semi-transparent electrophoretic display 100 depends on the ratio of the area of ​​the micro-cell inner container (the opaque area containing electronic ink) to the entire display surface. The area of ​​the micro-cell inner container containing electronic ink (a colloidal solution containing charged color particles) is the opaque area, and the remaining area is the transparent area. In other words, FIG. 15A The inner gray area consists of the partition walls 52 of the micro-compartments, which are transparent, while the remaining areas are opaque areas containing electronic ink.

[0248] refer to FIG. 15B This is a cross-sectional view of a semi-transparent dual-color electrophoretic display 100 manufactured according to an embodiment of the present invention. To achieve transparency on both sides of the electrophoretic display, a control substrate 10 with a high aperture ratio drive circuit layer 30, as described in the present invention, is used, along with a transparent opposing substrate 12 having a transparent conductive layer. Furthermore, this transparent dual-color electrophoretic display 100 undergoes... FIGS. 17A-17F The partition wall 52 is manufactured using a process that increases its thickness to enhance transparency. According to one embodiment of the invention, the total area of ​​the partition wall 52's thickness is not less than 10% of the total display area of ​​the electrophoretic display 100. According to another embodiment of the invention, the total area of ​​the partition wall 52's thickness is not less than 35% of the total display area of ​​the electrophoretic display 100. FIG. 15BAs shown, this translucent dual-color electrophoretic display 100 includes, from top to bottom, a opposing substrate 12 (i.e., a second substrate, such as a transparent plastic substrate or a glass substrate), a common electrode layer 14 (such as a transparent conductive electrode layer), an electrophoretic layer 20a, a control electrode layer PEL, a high aperture ratio driving circuit layer 30 (hereinafter referred to as the driving circuit layer 30), and a control substrate 10 (such as a glass substrate). Furthermore, as... FIG. 15B As shown, the electrophoretic layer 20a includes a micro-compartment structure 50 formed by multiple partition walls 52, and these partition walls 52 define multiple cells 54 (two cells 54 are shown in the figure), and a colloidal solution 24 containing multiple charged color particles (e.g., charged black particles 26B and charged white particles 26W) is filled in each cell 54. According to one embodiment of the present invention, the material of the first electrode CE1 / second electrode CE2 of the storage capacitor Cs in the high aperture ratio drive circuit layer 30 is a transparent conductive material to improve the aperture ratio of this electrophoretic display 100. In addition, it is more helpful for users to view this electrophoretic display 100 from the control substrate 10 side, so that the control electrode layer PEL close to the viewing side can attract the required charged black particles 26B and charged white particles 26W, achieving a faster screen refresh rate. FIG. 15B The driving circuit layer 30 shown can, for example, be made of FIGS. 3B-3C , FIGS. 4A-4C , FIGS. 5A-5C The driving circuit layer 30 shown is implemented.

[0249] refer to FIG. 15C This is a cross-sectional view of a semi-transparent color electrophoretic display 100 according to another embodiment of the present invention. In this embodiment, one side displays a color image, while the opposite side displays a black and white image. First, a color filter layer CF is fabricated on a control substrate 10 having a transparent control electrode layer PEL and a high aperture ratio drive circuit layer 30. Then... FIGS. 17A-17F The partition wall 52 is fabricated by filling a colloidal solution containing two-color charged particles 26 (e.g., charged black particles 26B and charged white particles 26W). Then, a transparent opposing substrate 12 (second substrate) is bonded to the transparent common electrode layer 14. Similarly, FIG. 15C In the electrophoretic display 100 shown, the partition walls 52 of the micro-cells are made of transparent photoresist, and the wall thickness is increased to enhance transparency. According to one embodiment of the invention, the total area of ​​the partition walls 52 of the micro-cells is not less than 10% of the total display area of ​​the electrophoretic display 100. According to another embodiment of the invention, the total area of ​​the partition walls 52 of the micro-cells is not less than 35% of the total display area of ​​the electrophoretic display 100. FIG. 15CAs shown, this translucent color electrophoretic display 100 includes, from top to bottom, a substrate 12 (e.g., a transparent plastic substrate or a glass substrate), a common electrode layer 14 (e.g., a transparent conductive electrode layer), an electrophoretic layer 20a, a color filter layer CF, a control electrode layer PEL, a high aperture ratio driving circuit layer 30 (hereinafter referred to as the driving circuit layer 30), and a control substrate 10 (e.g., a glass substrate). Furthermore, as... FIG. 15C As shown, the electrophoretic layer 20a includes a micro-compartment structure 50 formed by multiple partition walls 52, and these partition walls 52 define multiple cells 54 (two cells 54 are shown in the figure), and a colloidal solution 24 containing multiple charged color particles (e.g., charged black particles 26B and charged white particles 26W) is filled in each cell 54. According to one embodiment of the present invention, the material of the first electrode CE1 / second electrode CE2 of the storage capacitor Cs in the high aperture ratio drive circuit layer 30 is a transparent conductive material, so as to improve the aperture ratio of this electrophoretic display 100. In addition, it is more helpful for users to view this electrophoretic display 100 from the control substrate 10 side, so as to facilitate the attraction of the required charged black particles 26B and charged white particles 26W by the control electrode layer PEL which is close to the viewing side, thereby achieving a faster screen refresh rate and other ingenious features. FIG. 15C The driving circuit layer 30 shown can, for example, be made of FIGS. 3B-3C , FIGS. 4A-4C , FIGS. 5A-5C The driving circuit layer 30 shown is implemented.

[0250] refer to FIG. 15D This is a cross-sectional view of a translucent color electrophoretic display 100 fabricated according to another embodiment of the present invention. This electrophoretic display 100 is first fabricated using a control substrate 10 having a transparent control electrode layer PEL and a high aperture ratio drive circuit layer 30, and then using a polymer material (e.g., a transparent photoresist material) for... FIGS. 17A-17F The partition wall 52 is fabricated, and then a colloidal solution containing two-color charged particles 26 (e.g., charged black particles 26B and charged white particles 26W) is filled in. It is then bonded to a transparent opposing substrate 12 of the transparent common electrode layer 14. This transparent opposing substrate 12 further contains a color filter layer CF and micro tenons 60 located on the common electrode layer 14. See also [link to details]. FIG. 14FThe micro-cantilever 60 can be formed by exposing and developing a transparent photoresist to leave the area of the micro-cantilever, and the rest is washed away. Alternatively, the micro-cantilever can be formed by using a planarization layer (PLN) to leave the area of the micro-cantilever after a photolithography process. The micro-cantilever 60 is kept a certain gap S from the sidewall of the slot 54 of the micro-compartment structure 50 as an alignment margin. The gap S is, for example, 1-50 um. According to an embodiment of the present application, the gap S is in the range of 1-5 um, which is determined by the accuracy of the alignment of the mask when the substrate is attached. The gap S is the margin of error when the substrate is attached, and prevents the micro-compartment and the micro-cantilever from colliding and being damaged due to the error. The thickness of the micro-cantilever can be 0.5-50 um. The thicker the micro-cantilever, the more secure the sealing. However, the thickness of the micro-cantilever affects the attractive or repulsive force of the control electrode. Therefore, the sealing and the electrical effect need to be properly distributed. According to an embodiment of the present application, the thickness of the micro-cantilever 60 is in the range of 1-5 um.

[0251] Similarly, FIG. 15D As shown in the electrophoretic display 100, the compartment wall 52 of the micro-compartment is formed by a transparent photoresist, and the thickness of the compartment wall is increased to increase the transparency. According to an embodiment of the present application, the total area of the thickness of the compartment wall 52 of the micro-compartment is not less than 10% of the total area of the display range of the electrophoretic display 100. According to another embodiment of the present application, the total area of the thickness of the compartment wall 52 of the micro-compartment is not less than 35% of the total area of the display range of the electrophoretic display 100. As shown in the figure, FIG. 15D The transparent dual-color electrophoretic display 100 includes, from top to bottom, a substrate 12 (which can be a transparent plastic substrate or a glass substrate), a common electrode layer 14 (which can be a transparent conductive electrode layer), a color filter layer CF, a micro-cantilever 60, an electrophoretic layer 20a, a control electrode layer PEL, a high aperture ratio drive circuit layer 30 (hereinafter referred to as the drive circuit layer 30), and a control substrate 10 (which can be a glass substrate). In addition, as shown in the figure, FIG. 15DAs shown, the electrophoretic layer 20a comprises a microcell structure 50 of a plurality of cell walls 52 defining a plurality of chambers 54 (two chambers 54 are shown) and a colloidal solution 24 of a plurality of charged color particles (e.g., charged black particles 26B and charged white particles 26W) disposed in each chamber 54. In addition, the opposing substrate 12 comprises a color filter layer CF and micro tenons 60 disposed on the common electrode layer 14 and facing the electrophoretic layer 20a. The micro tenons 60 are adapted to be embedded in the corresponding chambers 54 of the microcell structure 50. According to an embodiment of the present application, the material of the first / second electrodes CE1 / CE2 of the storage capacitor Cs in the high aperture ratio drive circuit layer 30 is selected to be a transparent conductive material so as to improve the aperture ratio of the electrophoretic display 100. In addition, it is more helpful for a user to view the electrophoretic display 100 from the control substrate 10 side so as to facilitate the required charged black particles 26B and charged white particles 26W to be attracted by the control electrode layer PEL close to the viewing side, achieving a faster screen update rate. FIG. 15D The drive circuit layer 30 shown can be implemented, for example, by FIGS. 3B-3C , FIGS. 4A-4C , FIGS. 5A-5C The drive circuit layer 30 shown can be implemented, for example, by

[0252] Referring to FIG. 16A , a cross-sectional view of a semi-transparent dual-color dual-sided electrophoretic display 100 according to yet another embodiment of the present application is shown, which can display different images on the two sides. The architecture of this embodiment is similar to the architecture shown in FIG. 15B , but the opposing substrate 12 is replaced by a second control substrate 10U, which is also a transparent substrate and is combined with the first control substrate 10D by embedding the micro tenons 60 in the corresponding chambers 54 of the microcell structure 50. In addition, the second control substrate 10U also has a high aperture ratio drive circuit layer (second drive circuit layer) 30U and a control electrode layer (second control electrode layer) PELU above it, the second control electrode layer PELU having a plurality of second control electrodes PEU. In addition, the first control substrate 10D has a high aperture ratio drive circuit layer (first control electrode layer) 30D and a control electrode layer (first control electrode layer) PELD below it, the first control electrode layer PELD having a plurality of first control electrodes PED.

[0253] Similarly, the micro-clamp 60 can be fabricated using transparent photoresist, where the area of ​​the micro-clamp is left after exposure and development, and the rest is cleaned away. Alternatively, the micro-clamp can be fabricated using a planarization layer (PLN) through a photolithography process to leave the area of ​​the micro-clamp. A certain gap S must be maintained between the micro-clamp 60 and the sidewall of the slot 54 of the micro-segment structure 50 as an alignment allowance. This gap S is, for example, 1 to 50 μm. According to one embodiment of the present invention, this gap ranges from 1 to 5 μm, depending on the accuracy of the photomask alignment when bonding the substrate, serving as an allowable error range during alignment and bonding to prevent damage caused by collision between the micro-segment and the micro-clamp due to alignment errors. The thickness of the micro-clamp can be 0.5 to 50 μm. A thicker thickness provides a more secure seal, but it can affect the attraction or repulsion of the control electrodes. Therefore, a reasonable balance needs to be struck between the sealing degree and the electrical effect. According to one embodiment of the present invention, the thickness of the micro-clamp 60 also ranges from 1 to 5 μm.

[0254] exist FIG. 16A In the electrophoretic display 100 shown, transparent photoresist is used for... FIGS. 17A-17F The partition wall 52 is manufactured using a process that increases its thickness to enhance transparency. According to one embodiment of the invention, the total area of ​​the partition wall 52 thickness of the micro-partitions is not less than 10% of the total display area of ​​the electrophoretic display 100. According to another embodiment of the invention, the total area of ​​the partition wall 52 thickness of the micro-partitions is not less than 35% of the total display area of ​​the electrophoretic display 100. According to one embodiment of the invention, the first electrode CE1 / second electrode CE2 of the storage capacitor Cs in the high aperture ratio drive circuit layers 30U and 30D are made of transparent conductive material to improve the aperture ratio of the electrophoretic display 100. Furthermore, this facilitates viewing the electrophoretic display 100 from the first control substrate 10D and the second control substrate 10U side, allowing the control electrode layers PELU and PELD, which are close to the viewing side, to attract the required charged black particles 26B and charged white particles 26W, achieving a faster screen refresh rate. FIG. 16A The driving circuit layers 30U and 30D shown can, for example, be derived from... FIGS. 3B-3C , FIGS. 4A-4C , FIGS. 5A-5C The driving circuit layer 30 shown is implemented. Furthermore, the control electrode layer PELU and control electrode layer PELD can also be implemented accordingly. FIGS. 3B-3C , FIGS. 4A-4C , FIGS. 5A-5C The control electrode layer PEL shown is implemented.

[0255] Compound combination reference FIG. 16AWhen the upper high-aperture second driving circuit layer 30U controls the electrode (second control electrode PEU) at the second control substrate 10U to be negatively charged, and the lower high-aperture first driving circuit layer 30D controls the corresponding electrode (first control electrode PED) at the first control substrate 10D to be positively charged, the positively charged black particles 26B will move to the upper second control electrode PEU, making the upper electrode position display a black pixel; the negatively charged white particles 26W will move to the lower first control electrode PED, making the lower first control electrode PED position display a white pixel. When the polarities of the upper and lower electrodes are reversed, the colors of the displayed pixels will also be reversed.

[0256] refer to FIG. 16B ,correspond FIG. 16A In this structure, when the upper and lower electrodes (the upper second control electrode PEU and the corresponding lower first control electrode PED) have the same polarity, for example, both are positively charged, the negatively charged white particles 26W will move towards the upper and lower electrodes, causing them to display white pixels. The positively charged black particles 26B will move towards the center and be obscured by the white particles 26W. Conversely, when both the upper and lower electrodes are negatively charged, the positively charged black particles 26B will move towards the upper and lower electrodes, and the white particles 26W will move towards the center and be obscured by the black particles 26B, resulting in black pixels on both electrodes.

[0257] refer to FIG. 16C This is a cross-sectional view of a semi-transparent color double-sided electrophoretic display 100 fabricated according to another embodiment of the present invention. This electrophoretic display 100 can display different color images on both sides. The electrophoretic display 100 first fabricates a first color filter layer CF-1 on a first control substrate 10D having a transparent first control electrode layer PELD (with the first control electrode PED) and a high aperture ratio first driving circuit layer 30D, and then uses transparent photoresist... FIGS. 17A-17F The partition wall 52 is fabricated by filling it with a colloidal solution containing two-color charged particles 26 (e.g., charged black particles 26B and charged white particles 26W). It is then pressed together with a transparent second control substrate 10U having micro-clamps 60. Furthermore, as... FIG. 16C The transparent second control substrate 10U also has a high aperture ratio second driving circuit layer 30U on top, a transparent second control electrode layer PELU (with a second control electrode PEU) and a second color filter layer CF-2 formed on the transparent second control electrode layer PELU.

[0258] See compound combination FIG. 14FThe micro-clamp 60 can be fabricated using transparent photoresist, where the area of ​​the micro-clamp is left after exposure and development, and the rest is cleaned away. Alternatively, the micro-clamp can be fabricated using a planarization layer (PLN) through a photolithography process to leave the area of ​​the micro-clamp. A certain gap S must be maintained between the micro-clamp 60 and the sidewall of the slot 54 of the micro-segment structure 50 as an alignment allowance. This gap S is, for example, 1 to 50 μm. According to one embodiment of the present invention, this gap ranges from 1 to 5 μm, depending on the accuracy of the photomask alignment, and serves as an allowable error range during alignment and bonding to prevent damage caused by collision between the micro-segment and the micro-clamp due to alignment errors. The thickness of the micro-clamp can be 0.5 to 50 μm. A thicker thickness provides a more secure seal, but it may affect the attraction or repulsion of the control electrodes. Therefore, a reasonable balance needs to be struck between the degree of sealing and the electrical effect. According to one embodiment of the present invention, the thickness of the micro-clamp 60 also ranges from 1 to 5 μm.

[0259] exist FIG. 16C In the electrophoretic display 100 shown, the partition walls 52 of the micro-cells are made of transparent photoresist, and the wall thickness of the partition walls is increased to enhance transparency. According to one embodiment of the invention, the total area of ​​the partition walls 52 of the micro-cells is not less than 10% of the total display area of ​​the electrophoretic display 100. According to another embodiment of the invention, the total area of ​​the partition walls 52 of the micro-cells is not less than 35% of the total display area of ​​the electrophoretic display 100. According to one embodiment of the invention, the materials of the first electrode CE1 / second electrode CE2 of the storage capacitor Cs in the high aperture ratio drive circuit layers 30U and 30D are made of transparent conductive materials to improve the aperture ratio of the electrophoretic display 100. Furthermore, it facilitates viewing the electrophoretic display 100 from the first control substrate 10D and the second control substrate 10U side, allowing the control electrode layers PELU and PELD, which are close to the viewing side, to attract the required charged black particles 26B and charged white particles 26W, achieving faster screen refresh rates and other innovative features. FIG. 16C The driving circuit layers 30U and 30D shown can, for example, be derived from... FIGS. 3B-3C , FIGS. 4A-4C , FIGS. 5A-5C The driving circuit layer 30 shown is implemented. Furthermore, the control electrode layer PELU and control electrode layer PELD can also be implemented accordingly. FIGS. 3B-3C , FIGS. 4A-4C , FIGS. 5A-5C The control electrode layer PEL shown is implemented.

[0260] refer to FIG. 16D The image shows a cross-sectional view of a semi-transparent double-sided electrophoretic display 100 according to another embodiment of the present invention. This electrophoretic display 100 can display a color image on one side and a black-and-white image on the other side. The electrophoretic display 100 in this embodiment is similar to... FIG. 16CThe electrophoretic display shown in FIG. 1 has a color filter layer 20 formed on the second control substrate 10U side, and thus can display a color image on the second control substrate 10U side and a black-and-white image on the first control substrate 10D side. Similarly, the second control substrate 10U has the micro-joint 60 formed thereon, and the first control substrate 10D has the micro-compartment structure 50 (with the slot chambers 54) formed thereon. Similarly, the micro-compartment structure 50 is formed on the second control substrate 10U, and the micro-joint 60 is formed on the first control substrate 10D, which are within the scope of the present application. The second control substrate 10U is combined with the first control substrate 10D by embedding the micro-joint 60 into the corresponding slot chamber 54 of the micro-compartment structure 50. Alternatively, the first control substrate 10D is combined with the second control substrate 10U by embedding the micro-joint 60 into the corresponding slot chamber 54 of the micro-compartment structure 50. The micro-joint 60 can be formed by exposing and developing a transparent photoresist. Alternatively, the micro-joint 60 can be formed by using a planarization layer (PLN) to leave the area of the micro-joint. A gap S is maintained between the micro-joint 60 and the sidewall of the slot chamber 54 of the micro-compartment structure 50 as an alignment allowance. The gap S is, for example, 1-50 um. According to an embodiment of the present application, the gap S is in the range of 1-5 um, which is the error allowance range for aligning the mask, to prevent the micro-compartment and the micro-joint from colliding and being damaged due to errors in alignment. The thickness of the micro-joint can be 0.5-50 um. The thicker the micro-joint, the more secure the sealing. However, the thickness of the micro-joint affects the attraction or repulsion of the control electrode, and thus the sealing degree and the electrical effect need to be properly distributed. According to an embodiment of the present application, the thickness of the micro-joint 60 is in the range of 1-5 um.

[0261] In FIG. 16D In the electrophoretic display 100 shown in FIG. 1, the compartment wall 52 of the micro-compartment is formed by using a transparent photoresist, and the thickness of the compartment wall is increased to increase the transparency. According to an embodiment of the present application, the total area of the thickness of the compartment wall 52 of the micro-compartment is not less than 10% of the total area of the display range of the electrophoretic display 100. According to another embodiment of the present application, the total area of the thickness of the compartment wall 52 of the micro-compartment is not less than 35% of the total area of the display range of the electrophoretic display 100. According to an embodiment of the present application, the material of the first electrode CE1 / second electrode CE2 of the storage capacitor Cs in the high-aperture driving circuit layer 30U and 30D is selected to be a transparent conductive material, to improve the aperture ratio of the electrophoretic display 100. In addition, this is more helpful for a user to view the electrophoretic display 100 from the first control substrate 10D and the second control substrate 10U sides, to facilitate the charged black particles 26B and the charged white particles 26W attracted by the control electrode layers PELU and PELD close to the viewing side, to achieve a faster screen update rate. FIG. 16D The driving circuit layers 30U and 30D shown in FIG. 1 can be formed, for example,FIGS. 3B-3C , FIGS. 4A-4C , FIGS. 5A-5C The driving circuit layer 30 shown is implemented. Furthermore, the control electrode layer PELU and control electrode layer PELD can also be implemented accordingly. FIGS. 3B-3C , FIGS. 4A-4C , FIGS. 5A-5C The control electrode layer PEL shown is implemented.

[0262] 7. A color filter layer with perforations

[0263] like FIG. 7A As shown, when using a color filter layer to display color images in an electronic paper display, light suffers two light losses: one upon entering the color filter layer and another upon reflection. These two light losses reduce the visible brightness. Furthermore, due to the distance between the color filter layer and the reflecting particles, when the color area of ​​the incident light differs from the color area of ​​the reflected light, almost no light penetrates after passing through the different color filters and is almost entirely absorbed, further reducing the visible brightness.

[0264] See FIG. 18A According to one embodiment of the present invention, multiple holes H can be formed on the color filter blocks of the color filter layer CF, such as the red color filter block CFR, the green color filter block CFG, and the blue color filter block CFB. According to one embodiment, the area of ​​at least one hole H is no greater than 100 square micrometers, or the area of ​​most of the holes H is no greater than 100 square micrometers. Furthermore, according to another embodiment, the total area of ​​holes H within the same color is no less than 10% of the total area of ​​that color. For example, for the red color filter block CFR, the total area of ​​holes H within its range is no less than 10% of the total area of ​​the red color filter block CFR. By setting the holes H and planning their individual and total areas, the light loss of the color filter layer CF can be reduced.

[0265] See compound combination FIG. 18BWhen the incident light L2 enters the colored area (e.g. red filter color block CFR) and the reflected light also enters the colored area (e.g. red filter color block CFR), the light passes through the filter twice, thus the attenuation is high. When the incident light L1 enters the colored area (e.g. red filter color block CFR) and the reflected light enters the non-colored area (e.g. corresponding hole H), the light passes through the filter only once, thus the attenuation is low. When the incident light enters the non-colored area (e.g. corresponding hole H) and the reflected light enters the colored area (e.g. red filter color block CFR), the light passes through the filter only once, thus the attenuation is low. When the incident light and the reflected light both enter the non-colored area (e.g. corresponding hole H), there is no filter attenuation, but the color of the outgoing charged color particles 26. However, the above-mentioned conditions have the lowest probability and only occur in the light incident at a normal incidence angle or at a special angle. The color filter layer CF with holes H according to the present application can improve the color saturation and brightness, and greatly helps the color display of the electronic paper.

[0266] The color filter layer CF with holes H according to the present application can be applied to the known electrophoretic display 100, such as the electrophoretic display 100 shown in FIG. 2A . The color filter layer CF with holes H according to the present application can also be applied to the color electrophoretic display 100 with the driving circuit layer 30 with high aperture ratio shown in FIGS. 3B-3C , FIGS. 4A-4C , FIGS. 5A-5C . The color filter layer CF with holes H according to the present application can also be applied to the color electrophoretic display 100 with the thin film transistor with improved aperture ratio shown in FIG. 6C . The color filter layer CF with holes H according to the present application can also be applied to the color electrophoretic display 100 with the color filter layer CF close to the control substrate side shown in FIGS. 7B-7C , FIGS. 8A-8B . The color filter layer CF with holes H according to the present application can also be applied to the color electrophoretic display 100 with the micro-compartment structure 50 shown in FIGS. 12A-12C , FIGS. 13A-13C , FIG. 14D and FIG. 14E . The color filter layer CF with holes H according to the present application can also be applied to the color semi-transparent electrophoretic display 100 shown in FIGS. 15C-15D , FIGS. 16C-16D . Therefore, the color filter layer CF used in the above-mentioned various embodiments and combinations thereof is within the protection scope of the present application.

[0267] 8. Electrophoretic display with embedded touch control

[0268] Referring to FIG. 19 , it is a schematic diagram of the embedded touch control of the electrophoretic display 100 according to the present application. For a better understanding, please refer to the embodiments of the present application in FIG. 4A and FIG. 4B . As shown in FIG. 4BAs shown, the common voltage lines Ve of the transparent conductive electrodes ITO1 (CE2) for providing the second electrodes of the storage capacitors Cs are extended in a direction substantially parallel to the gate lines GL. Further, the data lines DL made of the second metal layer M2 are substantially perpendicular to the common voltage lines Ve, and provide the first electrodes of the storage capacitors Cs with the second electrodes sandwiched by the insulating layers, wherein the insulating layers between the data lines and the common voltage lines are in the same layer as the insulating layers of the storage capacitors (e.g. the insulating layers CI of the storage capacitors Cs, or the insulating layers of the thin film transistors 32 or their extensions), thus the data lines DL and the common voltage lines Ve made of transparent conductive material can provide a mutual-capacitive touch sensing structure to the electrophoretic display 100 to have an in-cell touch function. For further reference FIG. 19 The plurality of common voltage lines Ve along the gate lines GL are grouped together in a manner of more than one at the periphery of the display face of the electrophoretic display 100, and are connected together inside or outside the display touch integration driver 200 (TDDI). The following is an example of four common voltage lines Ve connected together in a group. However, according to other possible embodiments of the present application, a group of common voltage lines Ve can be connected together in other numbers, and thus the following examples of the present application are only for illustration, and are not intended to limit the scope of the present application. For example, assuming there are 4M common voltage lines Ve, and every four common voltage lines Ve are connected together in a group, there are M groups of touch receiving electrodes (Rx) connected to the display touch integration driver 200 (TDDI). In other words, according to one embodiment of the present application, there are 4M common voltage lines Ve connected to the display touch integration driver 200 (TDDI), and inside the display touch integration driver 200 (TDDI), a plurality of switches are used to connect every four common voltage lines Ve together in a group to form M groups of touch receiving electrodes (Rx). Further, according to another embodiment of the present application, there are 4M common voltage lines Ve connected together in a group to form M groups of touch receiving electrodes (Rx). The M groups of touch receiving electrodes (Rx) are further connected to the display touch integration driver 200 (TDDI).

[0269] Furthermore, the data lines DL are grouped together in a manner greater than one after entering the display touch integration driver 200 (TDDI) from the electrophoretic display 100 using a switching manner. The following is an example of four data lines DL being electrically connected together as a group. However, other numbers of data lines DL can be electrically connected together as a group according to other possible embodiments of the present application, and thus the following examples of the present application are merely for illustration and are not intended to limit the scope of the present application. For example, assuming there are 4N data lines DL, and after the 4N data lines DL are electrically connected to the display touch integration driver 200 (TDDI), each four data lines DL can be selectively electrically connected together as a group in the display touch integration driver 200 (TDDI) to form N groups of touch transmission electrodes (Tx). In addition, the above-mentioned selective electrical connection is that the display touch integration driver 200 (TDDI) can selectively electrically connect each four data lines DL together as a group or selectively disconnect the electrical connection of the four data lines DL according to the required operation. By the above-mentioned architecture, an embedded touch structure with a resolution of MxN can be provided in the electrophoretic display.

[0270] In the picture display stage of the electrophoretic display 100, the M groups of touch reception electrodes (Rx) are electrically connected together in the display touch integration driver 200 (TDDI) to be used as common voltage lines Ve (i.e., providing Vcom), and the display touch integration driver 200 (TDDI) controls the 4N data lines DL to be all separated as control signals for outputting pictures. In the touch stage, the M groups of touch reception electrodes (Rx) are respectively used as input signal terminals for touch, i.e., after being grouped and received by the display touch integration driver 200 (TDDI), the common voltage lines Ve are sent to a touch sensing circuit for subsequent processing. Furthermore, the display touch integration driver 200 (TDDI) controls the 4N data lines DL to electrically connect each four data lines DL as a group to provide N groups of touch transmission electrodes (Tx) and provide transmission signals from a touch driving circuit, thereby becoming an embedded touch structure with a resolution of MxN. In addition, integrating the touch driving integrated circuit and the display driving integrated circuit into a display touch integration driver 200 (TDDI) (Touch with Display Driver) can simplify the architecture of the electrophoretic display 100 when providing touch and picture display.

[0271] According to another embodiment of the present application, the 4M common voltage lines Ve can also form M groups of touch transmission electrodes (Tx). Correspondingly, the 4N data lines DL can also form N groups of touch reception electrodes (Rx). For example, after the 4N data lines DL are electrically connected to a touch with display driver (TDDI), each four data lines DL can be selectively electrically connected to form N groups of touch reception electrodes (Rx) in the touch with display driver (TDDI). During the picture display stage of the electrophoretic display 100, the M groups of touch transmission electrodes (Tx) are electrically connected together inside the touch with display driver (TDDI) to serve as common voltage lines Ve (i.e. to provide Vcom), and the touch with display driver 200 (TDDI) controls the 4N data lines DL to be all separated to serve as control signals for outputting pictures. During the touch stage, a touch driving circuit provides transmission signals to the M groups of touch transmission electrodes (Tx). Furthermore, the touch with display driver 200 (TDDI) controls the 4N data lines DL to be electrically connected as a group of four data lines DL to provide N groups of touch reception electrodes (Rx), i.e. the data lines are grouped and received by the touch with display driver 200 (TDDI) and then sent to a touch sensing circuit for subsequent processing, thereby providing an MxN embedded touch structure. In addition, the integration of the touch driving integrated circuit and the display driving integrated circuit into a touch with display driver 200 (TDDI) can simplify the architecture of the electrophoretic display 100 when providing touch and picture display, and the touch with display driver 200 can also have the touch sensing circuit and the touch driving circuit on other chips, which is also within the scope of the present application.

[0272] In summary, when performing touch operation, the touch with display driver electrically connects a plurality of the data lines together as a single touch transmission electrode; and the touch with display driver electrically connects a plurality of the common voltage lines together as a single touch reception electrode. Alternatively, when performing touch operation, the touch with display driver electrically connects a plurality of the data lines together as a single touch reception electrode; and the touch with display driver electrically connects a plurality of the common voltage lines together as a single touch transmission electrode. Both of the above two methods are within the scope of the present application.

[0273] In the above description, although 4M common voltage lines Ve are taken as an example, and every four common voltage lines Ve are electrically connected to each other to form M groups of touch receiving electrodes (Rx) or M groups of touch transmitting electrodes (Tx), the above example should not be regarded as a limitation of the scope of the present application, and persons skilled in the art can design different numbers (at least more than one) of common voltage lines Ve to be electrically connected to each other in a group. Furthermore, in the above description, although 4N data lines DL are taken as an example, and every four data lines DL are electrically connected to each other to form N groups of touch transmitting electrodes (Tx) or N groups of touch receiving electrodes (Rx), the above example should not be regarded as a limitation of the scope of the present application, and persons skilled in the art can design different numbers (at least more than one) of data lines DL to be electrically connected to each other in a group during touch operation.

[0274] having FIG. 19 The electrophoretic display with in-cell touch as shown in FIGS. 3B-3C , FIGS. 4A-4C , FIGS. 5A-5C may have a driving circuit layer 30 and a control electrode layer PEL architecture with high aperture ratio as shown in FIG. 19 . Furthermore, the electrophoretic display with in-cell touch as shown in FIGS. 11A-11C , FIGS. 12A-12C , FIGS. 13A-13C , FIGS. 14A-14E may have a micro-compartment structure 50 and a corresponding micro-dowel 60 architecture.

[0275] 9. Electrophoretic display with double-sided control substrate

[0276] As shown in FIG. 20AAn electrophoretic display with dual control substrates 100 according to an embodiment of the present application is shown. The electrophoretic display with dual control substrates 100 has a second control substrate 10U, a microcell structure 50, and a first control substrate 10D from top to bottom. The first control substrate 10D has a first surface and a second surface close to the microcell structure 50, and has a first high aperture ratio drive circuit layer 30D and a first control electrode layer PELD (with a plurality of first control electrodes PED) on the second surface of the first control substrate 10D. The second control substrate 10U has a fourth surface and a third surface close to the microcell structure 50, and has a second high aperture ratio drive circuit layer 30U and a second control electrode layer PELU (with a plurality of second control electrodes PEU) on the third surface of the second control substrate 10U. According to an embodiment of the present application, the microcell structure 50 with a plurality of cell walls 52 is fabricated on the side of the first control substrate 10D when fabricating the electrophoretic display with dual control substrates 100. In more detail, first, the first drive circuit layer 30D, the first transparent control electrode layer PELD, and an insulating protective layer (not shown) are fabricated on the first control substrate 10D, and then the color filter layer CF is fabricated. In this embodiment, the process of fabricating the cell walls 52 can be performed after the color filter layer CF is completed, or the process of fabricating the cell walls 52 can be performed after a planarization layer PLN is fabricated on the color filter layer CF. The material of the planarization layer PLN can be an organic insulating material, an inorganic insulating material, or a combination thereof. After the cell walls 52 are fabricated, a colloidal solution containing charged black particles 26B and charged white particles 26W is filled into the slot chambers 54 defined by the cell walls 52 under vacuum working conditions. Then, the process of attaching the second control substrate 10U is performed, i.e., a second control substrate 10U with a second high aperture ratio drive circuit layer 30U and a second control electrode layer PELU is provided, as shown in FIGS. 17A-17F . The microjoggles 60 corresponding to the shape of the slot chambers 54 are formed on the second control electrode layer PELU. FIGS. 17A-17F FIG. 20A

[0277] For further details, please refer to FIG. 14F ​​The micro-cantilever 60 can be left by exposing and developing a transparent photoresist, and the rest can be washed away. In addition, the micro-cantilever can also be made by using a planarization layer (PLN) to leave the area of the micro-cantilever. The micro-cantilever 60 and the edge wall of the groove chamber 54 of the micro-compartment structure 50 are kept a certain gap S as an alignment margin. The gap S is, for example, a gap of 1-50 um. According to an embodiment of the present application, the gap is in the range of 1-5 um, and the accuracy of the mask alignment is determined as the error tolerance range when the alignment is fitted, so as to avoid the damage of the micro-compartment and the micro-cantilever due to the error when the alignment is fitted. The thickness of the micro-cantilever can be 0.5-50 um, and the thicker the thickness, the more secure the sealing, but it will affect the attraction or repulsion of the control electrode, so the sealing degree and the electrical effect need to be reasonably distributed. According to an embodiment of the present application, the thickness of the micro-cantilever 60 is in the range of 1-5 um.

[0278] As FIG. 20AAs shown, by applying different polarity voltages to the first control electrodes PED and the second control electrodes PEU during driving, the movement of the charged particles can be accelerated, and the clustering phenomenon caused by the aggregation of positive and negative charged particles can be resolved, thus increasing the update rate of the display and improving the reflectivity. When the upper second driving circuit layer 30U controls the electrodes (second control electrodes PEU) on the second control substrate 10U to be negatively charged, and the lower first driving circuit layer 30D controls the corresponding electrodes (first control electrodes PED) on the first control substrate 10D to be positively charged, the positively charged black particles 26B will move to the upper second control electrodes PEU, and the negatively charged white particles 26W will move to the lower first control electrodes PED, so that the position of the lower first control electrodes PED matches the corresponding color filter block of the color filter layer CF to display a color pixel. More specifically, because the lower first driving circuit layer 30D controls the first control electrodes PED to have an attractive force for the negatively charged white particles 26W, the white particles can be attached to the surface of PED, and the color of the color filter block reflected by the white particles can be seen from the first surface of the first control substrate 10D. The upper second driving circuit layer 30U controls the second control electrodes PEU to have a repulsive force for the negatively charged white particles 26W, so as to accelerate the movement of the white particles to the first control electrodes PED, thereby achieving the display effect of accelerating the update rate of the electrophoretic display with double-sided control substrates. The above operation is an example of the viewing surface being on the first surface, and a color image with a better update rate can be displayed on the first surface. Similarly, if the viewing surface is on the fourth surface (the side farthest from the first surface) of the second control substrate 10U, a black-and-white image with a better update rate can be displayed on the fourth surface. In addition, the attractive force and the repulsive force generated by the two substrates are much greater than the attractive force and the repulsive force of the known technology, which can effectively resolve the clustering phenomenon caused by the aggregation of positively and negatively charged particles, so that a higher density of charged particles can be used to increase the number of layers of particles stacked on the control electrodes PEU and PED, thereby improving the reflectivity of light.

[0279] As FIG. 20BFig. 1 shows an electrophoretic display with double control substrates according to another embodiment of the present application. The electrophoretic display with double control substrates 100 has a second control substrate 10U, a microcell structure 50, and a first control substrate 10D from top to bottom. The first control substrate 10D has a first surface and a second surface close to the microcell structure 50, and has a first high aperture ratio drive circuit layer 30D and a first control electrode layer PELD (with a plurality of first control electrodes PED) on the second surface of the first control substrate 10D. The second control substrate 10U has a fourth surface and a third surface close to the microcell structure 50, and has a second high aperture ratio drive circuit layer 30U and a second control electrode layer PELU (with a plurality of second control electrodes PEU) on the third surface of the second control substrate 10U. According to an embodiment of the present application, the microcell structure 50 with a plurality of cell walls 52 is fabricated on the side of the first control substrate 10D when fabricating the electrophoretic display with double control substrates 100. In more detail, first, the first drive circuit layer 30D, the first transparent control electrode layer PELD, and the insulating protective layer (not shown) are fabricated on the first control substrate 10D, and then the process of fabricating the cell walls 52 is performed on the first transparent control electrode layer PELD. Alternatively, a planar layer PLN can be fabricated on the first transparent control electrode layer PELD before the process of fabricating the cell walls 52 is performed. The material of the planar layer PLN can be an organic insulating material, an inorganic insulating material, or a combination thereof. After the fabrication of the cell walls 52 is completed, a colloidal solution containing charged color particles, such as charged cyan particles 26C, charged magenta particles 26M, charged yellow particles 26Y, and charged white particles 26W, is filled into the slots 54 defined by the cell walls 52 under vacuum working conditions. Then, the process of attaching the second control substrate 10U is performed, i.e., a second control substrate 10U with a second high aperture ratio drive circuit layer 30U and a second control electrode layer PELU is provided, as shown in Fig. 1. The second control electrode layer PELU has micro-joggles 60 corresponding to the shape of the slots 54. FIGS. 17A-17F FIGS. 17A-17F FIG. 20B

[0280] FIG. 14F ​​​​The micro-clamp 60 can be fabricated using transparent photoresist, where the area of ​​the micro-clamp is left after exposure and development, and the rest is cleaned away. Alternatively, the micro-clamp can be fabricated using a planarization layer (PLN) through a photolithography process to leave the area of ​​the micro-clamp. A certain gap S must be maintained between the micro-clamp 60 and the sidewall of the slot 54 of the micro-segment structure 50 as an alignment allowance. This gap S is, for example, 1 to 50 μm. According to one embodiment of the present invention, this gap ranges from 1 to 5 μm, depending on the accuracy of the photomask alignment, and serves as an allowable error range during alignment and bonding to prevent damage caused by collision between the micro-segment and the micro-clamp due to alignment errors. The thickness of the micro-clamp can be 0.5 to 50 μm. A thicker thickness provides a more secure seal, but it may affect the attraction or repulsion of the control electrodes. Therefore, a reasonable balance needs to be struck between the degree of sealing and the electrical effect. According to one embodiment of the present invention, the thickness of the micro-clamp 60 also ranges from 1 to 5 μm.

[0281] like FIG. 20B As shown, when the upper second driving circuit layer 30U controls the electrode (second control electrode PEU) at the second control substrate 10U to be negatively charged, and the lower first driving circuit layer 30D controls the corresponding electrode (first control electrode PED) of the first control substrate 10D to be positively charged, the charged cyan particles 26C (positive charge), charged magenta particles 26M (positive charge), charged yellow particles 26Y (negative charge), and charged white particles 26W (negative charge) can be controlled to move in the corresponding directions. For example, the lower first driving circuit layer 30D controls the first control electrode PED to attract negatively charged white particles 26W and yellow particles 26Y, and to repel positively charged magenta particles 26M and cyan particles 26C. The upper second driving circuit layer 30U controls the second control electrode PEU to attract positively charged magenta particles 26M and cyan particles 26C, and to repel negatively charged white particles 26W and yellow particles 26Y. The attraction varies depending on the charge number of the particles, and this attraction can be achieved through voltage changes and polarity adjustments. The changes in the charge control electrode PED and PEU control the movement of four types of charged particles. Because the charge polarities of the two-sided control electrodes PED and PEU are different, the movement speed of the charge can be several times faster than known technologies, thus speeding up the screen refresh rate. It can also solve the clustering phenomenon that occurs when the density of charged particles is high. A colloidal solution with a higher density of charged particles can be used to increase the number of particle stacking layers on the surface of the control electrodes PED and PEU, thereby increasing the light reflectivity and improving the shortcomings of insufficient reflectivity in known technologies. This innovation achieves better screen refresh rate and reflectivity for the electrophoretic display 100 with a double-sided control substrate.

[0282] like FIG. 20CFigure 1 shows an electrophoretic display with double control substrates according to another embodiment of the present application. The electrophoretic display with double control substrates 100 has a second control substrate 10U, a microcell structure 50, and a first control substrate 10D from top to bottom. The first control substrate 10D has a first surface and a second surface close to the microcell structure 50, and has a first high aperture ratio drive circuit layer 30D and a first control electrode layer PELD (with a plurality of first control electrodes PED) on the second surface of the first control substrate 10D. The second control substrate 10U has a fourth surface and a third surface close to the microcell structure 50, and has a second high aperture ratio drive circuit layer 30U and a second control electrode layer PELU (with a plurality of second control electrodes PEU) on the third surface of the second control substrate 10U. According to an embodiment of the present application, the microcell structure 50 with a plurality of cell walls 52 is fabricated on the side of the first control substrate 10D when fabricating the electrophoretic display with double control substrates 100. In more detail, first, the first drive circuit layer 30D, the first transparent control electrode layer PELD, and the insulating protective layer (not shown) are fabricated on the first control substrate 10D, and then the first color filter layer CF-1 is fabricated. In this embodiment, the process of fabricating the cell walls 52 can be performed after the first color filter layer CF-1 is completed, or the process of fabricating the cell walls 52 can be performed after a planarization layer PLN is fabricated on the first color filter layer CF-1. The material of the planarization layer PLN can be an organic insulating material, an inorganic insulating material, or a combination thereof. After the cell walls 52 are fabricated, a colloidal solution containing the charged black particles 26B and the charged white particles 26W is filled into the cavities 54 defined by the cell walls 52 under vacuum. Then, the process of attaching the second control substrate 10U is performed, i.e., a second control substrate 10U with a second high aperture ratio drive circuit layer 30U and a second control electrode layer PELU is provided, as shown in Figure 1. The second control electrode layer PELU has a second color filter layer CF-2. The second control substrate 10U is attached to the microcell structure 50 using optical glue or by applying frame glue to the four edges of the display area, and then the two substrates are heated and pressurized in a gas pressurized chamber to squeeze the colloidal solution into the cavities of the microcell structure 50, and finally the optical glue or the frame glue is cured to complete the fabrication of the electrophoretic display 100. FIGS. 17A-17F FIGS. 17A-17F FIG. 20C

[0283] FIG. 20C ​​​​As shown, when the upper second driving circuit layer 30U controls the electrodes (second control electrodes PEU) at the second control substrate 10U to be negatively charged, and the lower first driving circuit layer 30D controls the corresponding electrodes (first control electrodes PED) at the first control substrate 10D to be positively charged, the positively charged black particles 26B will move to the upper second control electrodes PEU, and the negatively charged white particles 26W will move to the lower first control electrodes PED, so that the position of the lower first control electrodes PED matches the corresponding color filter block of the color filter layer CF to display a color pixel. More specifically, since the lower first driving circuit layer 30D controls the first control electrodes PED to have an attractive force to the negatively charged white particles 26W, and the upper second driving circuit layer 30U controls the second control electrodes PEU to have a repulsive force to the negatively charged white particles 26W, the moving speed of the white particles 26W can be accelerated, so that the electrophoretic display 100 with double-sided control substrates has a better frame update rate. In addition, the attractive force and the repulsive force generated by the two substrates are much greater than the attractive force and the repulsive force in the known technology, which can effectively solve the clustering phenomenon caused by the aggregation of positively and negatively charged particles, so that a higher density of charged particles can be used to increase the number of layers of particles stacked on the control electrodes PEU and PED, thereby improving the light reflectivity.

[0284] As shown, when the upper second driving circuit layer 30U controls the electrodes (second control electrodes PEU) at the second control substrate 10U to be negatively charged, and the lower first driving circuit layer 30D controls the corresponding electrodes (first control electrodes PED) at the first control substrate 10D to be positively charged, the positively charged black particles 26B will move to the upper second control electrodes PEU, and the negatively charged white particles 26W will move to the lower first control electrodes PED, so that the position of the lower first control electrodes PED matches the corresponding color filter block of the color filter layer CF to display a color pixel. More specifically, since the lower first driving circuit layer 30D controls the first control electrodes PED to have an attractive force to the negatively charged white particles 26W, and the upper second driving circuit layer 30U controls the second control electrodes PEU to have a repulsive force to the negatively charged white particles 26W, the moving speed of the white particles 26W can be accelerated, so that the electrophoretic display 100 with double-sided control substrates has a better frame update rate. In addition, the attractive force and the repulsive force generated by the two substrates are much greater than the attractive force and the repulsive force in the known technology, which can effectively solve the clustering phenomenon caused by the aggregation of positively and negatively charged particles, so that a higher density of charged particles can be used to increase the number of layers of particles stacked on the control electrodes PEU and PED, thereby improving the light reflectivity. FIG. 20C As shown, when the upper second driving circuit layer 30U controls the electrodes (second control electrodes PEU) at the second control substrate 10U to be negatively charged, and the lower first driving circuit layer 30D controls the corresponding electrodes (first control electrodes PED) at the first control substrate 10D to be positively charged, the positively charged black particles 26B will move to the upper second control electrodes PEU, and the negatively charged white particles 26W will move to the lower first control electrodes PED, so that the position of the lower first control electrodes PED matches the corresponding color filter block of the color filter layer CF to display a color pixel. More specifically, since the lower first driving circuit layer 30D controls the first control electrodes PED to have an attractive force to the negatively charged white particles 26W, and the upper second driving circuit layer 30U controls the second control electrodes PEU to have a repulsive force to the negatively charged white particles 26W, the moving speed of the white particles 26W can be accelerated, so that the electrophoretic display 100 with double-sided control substrates has a better frame update rate. In addition, the attractive force and the repulsive force generated by the two substrates are much greater than the attractive force and the repulsive force in the known technology, which can effectively solve the clustering phenomenon caused by the aggregation of positively and negatively charged particles, so that a higher density of charged particles can be used to increase the number of layers of particles stacked on the control electrodes PEU and PED, thereby improving the light reflectivity.

[0285] The above descriptions are only the preferred embodiments of the present application, and cannot limit the scope of the present application. Any equivalent changes and modifications made according to the scope of the present application are intended to be included in the scope of the present application. The present application can have other various embodiments, and those skilled in the art can make various corresponding changes and modifications according to the present application without departing from the spirit and essence of the present application. However, these corresponding changes and modifications should be included in the protection scope of the claims of the present application.

Claims

1. An electrophoretic display with micro-clamps, the electrophoretic display comprising: A control substrate having a first surface and a second surface; A driving circuit layer is located on the second surface of the control substrate, and includes a plurality of thin film transistors, a plurality of gate lines and a plurality of data lines, wherein at least one of the gate lines is electrically connected to the gate of the plurality of thin film transistors, and at least one of the data lines is electrically connected to the drain or source of the plurality of thin film transistors. A control electrode layer is located on the side of the drive circuit layer away from the control substrate, and includes a plurality of control electrodes, at least one of the control electrodes being electrically connected to the source or drain of a thin-film transistor; A substrate has a third surface and a fourth surface, wherein the third surface is opposite to the second surface; A microcompartment structure is formed on the third surface side of the opposing substrate. The microcompartment structure is made of a polymer material and includes multiple compartment walls to define multiple cells for filling electrophoretic materials. The electrophoretic material includes a plurality of charged color particles, which are disposed in a colloidal solution and can move through the colloidal solution under the influence of an electric field. The plurality of charged color particles include positively charged color particles and / or negatively charged color particles. The electrophoretic display includes multiple micro-clamps, one of which is located on the control substrate side and embedded in one of the slots. The thickness of the micro-clamp is 0.5~50 micrometers. The micro-clamp has a gap of 1 to 50 micrometers between it and the side wall of the slot.

2. An electrophoretic display with micro-clamps, the electrophoretic display comprising: A control substrate having a first surface and a second surface; A driving circuit layer is located on the second surface of the control substrate, and includes a plurality of thin film transistors, a plurality of gate lines and a plurality of data lines, wherein at least one of the gate lines is electrically connected to the gate of the plurality of thin film transistors, and at least one of the data lines is electrically connected to the drain or source of the plurality of thin film transistors. A control electrode layer is located on the side of the drive circuit layer away from the control substrate, and includes a plurality of control electrodes, at least one of the control electrodes being electrically connected to the source or drain of a thin-film transistor; A substrate has a third surface and a fourth surface, wherein the third surface is opposite to the second surface; A microcompartment structure is formed on the second surface side of the control substrate. The microcompartment structure is made of a polymer material and includes multiple compartment walls to define multiple chambers for filling colloidal solutions. The electrophoretic display includes multiple micro-clamps located on the third surface side of the opposing substrate and embedded in one of the slots. The thickness of the micro-clamp is 0.5~50 micrometers. The micro-clamp has a gap of 1 to 50 micrometers between it and the side wall of the slot.

3. The electrophoretic display with micro-clamps according to claim 1 or claim 2, wherein the polymer material is a photoresist material, a planarization layer material, or a resin.

4. The electrophoretic display with micro-clamps according to claim 1 or claim 2, wherein the micro-clamps are made of photoresist material or planarization material.

5. The electrophoretic display with micro-clamps according to claim 1 or claim 2, wherein the thickness of the micro-clamps is 1 to 5 micrometers.

6. The electrophoretic display with micro-clamps according to claim 1 or claim 2, wherein there is a gap of 1 to 5 micrometers between the micro-clamps and the sidewall of the tank.

7. The electrophoretic display with micro-clamps according to claim 1 or claim 2, wherein a color filter layer is provided between the second surface and the third surface.

8. The electrophoretic display with micro-clamps according to claim 1 or claim 2, wherein the viewing surface of the electrophoretic display is on the first surface.

9. The electrophoretic display with micro-clamps according to claim 1 or claim 2, wherein when viewed from the first surface of the control substrate into the display area of ​​the electrophoretic display, the aperture ratio of the control substrate of the electrophoretic display is not less than 70%.

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