Electronic device, circuit board, and connector connection detection method

Abstract

The application discloses an electronic device, which comprises a first circuit board and a plurality of second connectors, the first circuit board comprises a detection device and a plurality of first connectors, the plurality of second connectors are distributed on one or more second circuit boards, and at least two second connectors are configured with the same identity information. The detection device stores expected identity information corresponding to each first connector, and the expected identity information is the identity information of the second connector that should be received in the case that the first connector is correctly connected with the second connector. The detection device confirms whether the first connector is incorrectly connected with the second connector by comparing the actual received identity information of the first connector with the corresponding expected identity information. The identity information of the at least two second connectors is the same, so that the identity information is saved, the waste of the identity information is avoided, and the increase of the connector connection detection cost is avoided. The application also discloses a circuit board and a connector connection detection method.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to a method for detecting the connection of electronic devices, circuit boards, and connectors. Background Technology

[0002] With the development of science and technology, electronic devices such as servers contain more and more circuit boards, and the number of connectors integrated on these circuit boards is also increasing. Connectors provide connection ports for connecting circuit boards to other circuit boards. For example, connectors on a circuit board can be connected to connectors on other circuit boards via cables (such as communication cables), thereby enabling the circuit board to connect to other circuit boards.

[0003] To ensure proper communication between circuit boards, it is necessary to detect misconnections between connectors to ensure correct connection. Currently, detecting misconnections requires a significant number of pins on the detection chip, thus increasing the cost of connector misconnection detection. Summary of the Invention

[0004] This application provides a circuit board, an electronic device including the circuit board, and a connector connection detection method for circuit board connector connection detection. It can identify more connectors based on limited identity information, avoids the waste of identity information resources, and saves the pin resources of the detection chip used for identifying identity information, thereby avoiding the waste of the pin resources of the detection chip used for identifying identity information, and thus avoiding the increase in connector connection detection costs.

[0005] In a first aspect, embodiments of this application provide an electronic device comprising: a first circuit board and a plurality of second connectors; the first circuit board including a detection device and the plurality of first connectors, the detection device being connected to each first connector respectively; one second connector corresponding to one first connector; the plurality of second connectors distributed on one or more second circuit boards, at least two second connectors being configured with the same identity information. The detection device stores expected identity information corresponding to each first connector, the expected identity information being the identity information of the second connector that should be received when the first connector and the second connector are correctly connected; at least two first connectors have the same expected identity information, and when correctly connected, the at least two first connectors are connected to the at least two second connectors respectively; the detection device confirms whether there is a connection error between the first connector and the second connector by comparing the identity information actually received by the first connector with the corresponding expected identity information.

[0006] Electronic devices can be, for example, servers comprising multiple circuit boards. The first circuit board can be, for example, a high-speed serial computer expansion bus standard (Peripheral Component Interconnect Express, PCI-Express) adapter board (referred to as a PCIe adapter board) used to connect different circuit boards within the server. Of course, the first circuit board can also be any other circuit board that can be used for connector connection detection. The second circuit board containing the second connector can be, for example, the circuit board containing the Central Processing Unit (CPU) (referred to as the CPU main circuit board), the circuit board containing other processing units besides the CPU such as Neural Processing Units (NPUs), Graphics Processing Units (GPUs) that implement specific functions, the circuit board containing input / output devices used to connect external input / output devices (referred to as I / O frame circuit boards), graphics card circuit boards, network card circuit boards, and other riser card circuit boards. Of course, the second circuit board containing the second connector can also be other circuit boards. The detection device is, for example, a Complex Programmable Logic Device (CPLD). Of course, the detection device can also be other types of logic devices or processing devices.

[0007] In this implementation, since at least two second connectors are configured with the same identity information, the expected identity information of at least two first connectors connected to the corresponding second connectors is also the same. This allows for the identification of more connectors based on limited identity information, improving the utilization rate of identity information and avoiding waste of identity information resources. On the other hand, since identity information recognition relies on the pins of detection devices (i.e., detection chips) such as CPLDs, fewer pins can be used when the number of identity information items is small. This saves pin resources used for identifying connector identity information in the detection device, avoiding waste of pin resources and thus preventing an increase in connector connection detection costs. Furthermore, detection devices with fewer pins, such as CPLDs, occupy less space, better meeting the development needs of device miniaturization.

[0008] In one possible implementation of the first aspect above, among the at least two second connectors with the same identity information, any two second connectors have different physical forms, or different locations relative to the first circuit board, or the path values ​​connected to the corresponding first connectors are in different length ranges.

[0009] For example, in the process of connecting a second connector to a corresponding first connector via a cable, physical factors such as the connector's physical shape, orientation, and connection path length range can achieve a certain degree of physical error prevention. Therefore, second connectors with different physical shapes, different orientations relative to the first circuit board, and different path length ranges to the corresponding first connector are less likely to be misconnected. Thus, these second connectors can be assigned the same identification information. This saves identification information resources, allowing more connectors to be identified with limited information, improving the utilization rate of identification information and avoiding waste. Furthermore, since identification information relies on the pins of detection devices such as CPLDs, fewer pins can be used when the number of identification information items is small. This saves pin resources used for identifying connector identification information, avoiding waste and thus preventing increased connector connection detection costs. Additionally, detection devices with fewer pins, such as CPLDs, occupy less space, better meeting the miniaturization needs of devices.

[0010] In one possible implementation of the first aspect described above, the identity information of the second connector is represented by a combination of voltage levels on the target pin of the second connector; when the first connector and the second connector are in a connected state, the detection device obtains the combination of voltage levels on the target pin of the second connector through the first connector to identify the identity information of the second connector.

[0011] In one possible implementation of the first aspect described above, the identification information may be, for example, a UID, which is represented by one or more voltage levels. For instance, if it is represented by a combination of three voltage levels, the identification information may be binary voltage level combinations such as 000, 001, etc., where 0 represents a low voltage level and 1 represents a high voltage level. Of course, the identification information may also be other information used to identify the connector besides the UID.

[0012] In one possible implementation of the first aspect mentioned above, the identity information can also be in other forms, such as decimal data 0 to 7, which can be set as needed.

[0013] In one possible implementation of the first aspect described above, the first connector includes a detection pin corresponding to a detection device, which obtains the level combination on the target pin of the second connector through the detection pin of the first connector.

[0014] In this way, the level information transmitted based on the level pins can be used to conveniently and accurately obtain the identity information of the second connector.

[0015] Based on the above technical solution, physical factors such as physical shape, location, and connection path length range can achieve a certain degree of physical error prevention. Different second connectors can have identical identity information, effectively reducing the number and number of bits in the identity information. This avoids wasting identity information resources and improves the recognition rate. Furthermore, since the identity information is a combination of voltage levels, its recognition relies on the voltage pins of detection devices such as CPLDs. Reducing the number of bits eliminates the need for detection devices with more pins, such as CPLDs, saving pin resources and avoiding increased costs for detection devices. This prevents increased connector connection detection costs and avoids CPLDs occupying too much space, meeting the miniaturization needs of devices.

[0016] In one possible implementation of the first aspect described above, if the actual received identity information matches the expected identity information, the corresponding first connector and second connector are considered to be correctly connected; if the actual received identity information does not match the expected identity information, the corresponding first connector and second connector are considered to be incorrectly connected. Thus, based on whether the actual received identity information matches the expected identity information, the result of whether the connector connection is correct or incorrect can be obtained conveniently and accurately.

[0017] Furthermore, in the event of a connector connection error, the electronic device can also generate a connector connection error message for the incorrectly connected connector, so that the user can re-check and reconnect the connector to ensure that the connector connection is correct.

[0018] In one possible implementation of the first aspect described above, the electronic device further includes a substrate management controller connected to a detection device for writing the desired identity information corresponding to the first connector into a register included in the detection device.

[0019] In one possible implementation of the first aspect described above, the electronic device further includes a memory for storing cable topology configuration information of the electronic device, the cable topology configuration information including expected identity information corresponding to the first connector, and a baseboard management controller connected to the memory for obtaining the expected identity information corresponding to the first connector based on the cable topology configuration information stored in the memory.

[0020] In one possible implementation of the first aspect described above, the memory is, for example, an electrically erasable programmable read-only memory (EEPROM). Of course, the memory can also be other types of memory.

[0021] In one possible implementation of the first aspect described above, the number of second connectors is greater than 2. N At least two second connectors are configured with the same identity information, such that each second connector has N bits of identity information; each first connector transmits the N bits of identity information of the connected second connector to the detection device, and the detection device obtains the identity information of a second connector every N pins.

[0022] In one possible implementation of the first aspect described above, the identity information is represented by a combination of N bit levels. For example, N is a positive integer greater than or equal to 1 and less than or equal to 3. Of course, N can also be a positive integer greater than 3.

[0023] N can be determined based on the number of connectors included in the electronic device or circuit board, or it can be set specifically as needed, such as 2, 3, etc. Of course, N can also be a positive integer greater than 3.

[0024] Secondly, embodiments of this application provide a circuit board including a plurality of connectors, each connector being configured with its own identity information, and at least two connectors being configured with the same identity information, the identity information being used for connector identification.

[0025] In this implementation, since at least two connectors are configured with the same identity information, more connectors can be identified based on limited identity information, improving the utilization rate of identity information and avoiding waste of identity information resources. On the other hand, since connector identity information identification relies on the pins of detection devices such as CPLDs, fewer pins can be used when the number of identity information items is small. This saves pin resources used for identifying connector identity information in detection devices, avoiding waste of pin resources and thus preventing an increase in connector connection detection costs. Furthermore, detection devices with fewer pins, such as CPLDs, occupy less space, better meeting the development needs of device miniaturization.

[0026] Furthermore, among the at least two connectors with the same identity information, any two connectors have different physical forms, or different locations relative to a certain circuit board, or the path values ​​connected to the corresponding connectors are in different length ranges.

[0027] For example, in the process of connecting a connector on one circuit board to a corresponding connector on another circuit board via a cable, physical factors such as the connector's physical shape, location, and connection path length range can achieve a certain degree of physical error prevention. Therefore, connectors with different physical shapes, different locations relative to a circuit board, and different path length ranges are less likely to be misconnected, and thus these connectors can be assigned the same identification information. This saves identification information resources, allowing more connectors to be identified with limited information, improving the utilization rate of identification information and avoiding waste. Furthermore, since identification information relies on the pins of detection devices such as CPLDs, fewer pins can be used when the number of identification information items is small, thus saving pin resources used for connector identification and avoiding increased connector connection detection costs. Additionally, detection devices with fewer pins, such as CPLDs, occupy less space, better meeting the miniaturization needs of devices.

[0028] In one possible implementation of the second aspect described above, the connector's identity information is represented based on a combination of voltage levels on the connector's target pins.

[0029] In one possible implementation of the second aspect described above, the circuit board can be the aforementioned CPU main circuit board, the circuit board containing processing units such as NPU and GPU that perform specific functions, the I / O frame circuit board, the graphics card circuit board, the network card circuit board, or other riser card circuit board. Of course, the circuit board can also be other circuit boards in electronic devices.

[0030] Thirdly, embodiments of this application provide a connector connection detection method applied to the aforementioned electronic device. The method includes: a detection device acquiring the identity information of the second connector actually received by the first connector, and comparing the identity information of the second connector actually received by the first connector with the corresponding expected identity information to confirm whether there is a connection error between the first connector and the second connector.

[0031] In this way, based on the actual detected or received identity information and the expected identity information, the result of whether the connector is connected correctly or incorrectly can be obtained conveniently and accurately.

[0032] In one possible implementation of the third aspect above, comparing the identity information of the second connector actually received by the first connector with the corresponding expected identity information to confirm whether there is a connection error between the first connector and the second connector includes: if the identity information of the second connector actually received by the first connector is consistent with the corresponding expected identity information, then the connection between the first connector and the second connector is considered correct; if the identity information of the second connector actually received by the first connector is inconsistent with the corresponding expected identity information, then the connection between the first connector and the second connector is considered incorrect.

[0033] In this way, by comparing whether the identity information corresponding to the two connectors in the connected state is consistent, it is easy and accurate to determine whether the connector connection is correct.

[0034] In one possible implementation of the third aspect above, the connector connection error is either a loose cable connection or an incorrect connection of the corresponding connectors.

[0035] In one possible implementation of the third aspect above, if a connection error is determined between the first connector and the second connector, the method further includes: generating a connector connection error message to be presented to the user.

[0036] This allows users to easily remind themselves to adjust the connector connection status in a timely manner.

[0037] In one possible implementation of the third aspect above, when the identity information of the second connector is obtained, the method further includes: checking the format of the identity information of the second connector; if the format of the identity information of the second connector does not meet the preset format requirements, generating an identity information error message to be presented to the user; if the format of the identity information of the second connector meets the preset format requirements, comparing the identity information of the second connector actually received by the first connector with the corresponding expected identity information.

[0038] In this way, identity information comparison can be performed in the event of incorrect identity information from the second connector, and users can be easily reminded to correct any incorrect identity information in a timely manner. Attached Figure Description

[0039] To more clearly illustrate the technical solution of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below.

[0040] Figure 1 A schematic diagram of a server provided as an example of an electronic device according to an embodiment of this application is shown;

[0041] Figure 2 This paper shows a schematic diagram of a circuit board structure provided in an embodiment of the present application;

[0042] Figure 3 This illustration shows a schematic diagram of a structure in which circuit boards are connected by cables according to an embodiment of this application;

[0043] Figure 4 This illustration shows another structural diagram of the server provided in an embodiment of this application;

[0044] Figure 5 This paper illustrates a flowchart of a connector connection detection method provided in an embodiment of this application.

[0045] Figure 6 This illustration shows another structural diagram of the server provided in an embodiment of this application;

[0046] Figure 7 This illustration shows another structural diagram of the server provided in an embodiment of this application;

[0047] Figure 8 This paper illustrates another flowchart of the connector connection detection method provided in an embodiment of this application. Detailed Implementation

[0048] The technical solution of this application will be described in further detail below with reference to the accompanying drawings.

[0049] Taking a server as an example of the electronic device provided in this application, as the number of circuit boards and connectors on the circuit boards increases, there are scenarios where cables converge, since the connectors are usually connected by cables. Because each cable has its own specific connector, incorrect connections are not allowed. For example, a PCIe adapter board in a server may have 64 PCIe x8 connectors, which are high-speed connectors. The PCIe adapter board may interface with the CPU main circuit board or a PCI card riser circuit board, etc. These circuit boards have corresponding connectors for connecting to the connectors on the PCIe adapter board via corresponding cables.

[0050] The server provided in this application includes connectors in which some connectors share the same UID, for example, at least two connectors have the same UID. The UID is the connector's identification information, and can be, for example, a three-bit voltage level combination such as 000, 001, etc. This effectively reduces the number of voltage level bits and the number of connectors in the UID. On the one hand, it saves UID resources, allowing more connectors to be identified based on a limited number of UIDs, improving the utilization rate of UID resources and avoiding waste. On the other hand, it increases the UID recognition speed. Furthermore, since the UID is a voltage level combination, UID recognition relies on the pins of detection devices such as CPLDs. Therefore, reducing the number of voltage level bits in the UID allows for the use of fewer pins, eliminating the need for detection devices with more pins, such as CPLDs, to identify the UID, saving pin resources, avoiding waste, and preventing increased costs for detection devices. This also avoids increased connector connection detection costs and prevents CPLDs and other detection devices from occupying too much space, meeting the development needs of device miniaturization.

[0051] For example, such as Figure 1 As shown, the server includes a first circuit board 100 and one or more second circuit boards 200 other than the first circuit board 100.

[0052] The first circuit board 100 includes a detection device 110 and a plurality of first connectors 120, wherein the detection device 110 is connected to each of the first connectors 120. For example, as shown... Figure 1 As shown, the first circuit board 100 may be, for example, a PCIe adapter board, and the detection device 110 may be, for example, a CPLD. The first circuit board 100 includes a plurality of first connectors 120 distributed on its left, right, and bottom sides. Of course, the first circuit board 100 may also include first connectors 120 located in other positions.

[0053] Each second circuit board 200 includes a plurality of second connectors 210. For example, such as... Figure 1 As shown, the second circuit board 200 can be, for example, a CPU main circuit board, a Riser card circuit board, or other circuit boards. The CPU main circuit board includes multiple second connectors 210 distributed on its upper and left sides, while the Riser card circuit board includes multiple second connectors 210 distributed on its left side. Of course, the CPU main circuit board and the Riser card circuit board may also include second connectors 210 located in other positions.

[0054] Furthermore, such as Figure 1 As shown, the first circuit board 100 can be connected to each of the other second circuit boards 200 via corresponding connectors.

[0055] In this implementation, at least two of the plurality of second connectors 210 have the same UID. Furthermore, the detection device 110 on the first circuit board 100 stores the expected UID corresponding to each first connector 120. The expected UID is the UID of the second connector 210 that should be received when the first connector 120 and the second connector 210 are correctly connected. Since at least two second connectors 210 have the same UID, the expected UIDs of the at least two first connectors 120 used for connection to these at least two second connectors 210 are also the same. And when the first connector 120 and its corresponding second connector 210 are correctly connected, the at least two first connectors 120 with the same UID are connected to the at least two second connectors 210 with the same UID. The detection device 110 determines whether there is a connection error between the first connector 110 and the second connector 210 by comparing the actual UID of the second connector 210 received by the first connector 120 with the corresponding expected UID.

[0056] In the server provided in this embodiment, at least two of the second connectors 210 are configured with the same UID. For example, among the at least two second connectors 210 with the same UID, any two second connectors 210 may have different physical forms, different orientations relative to the first circuit board 100, or different path values ​​connecting to the corresponding first connector 110 within different length ranges. That is, at least two second connectors 210 with different physical forms may have the same UID, at least two second connectors 210 with different orientations relative to the first circuit board 100 may have the same UID, and at least two second connectors 210 with path values ​​connecting to the corresponding first connector 110 within different length ranges may have the same UID. Of course, at least two second connectors 210 that meet other conditions may also have the same UID.

[0057] Thus, since at least two second connectors 210 are configured with the same UID, the expected UIDs of at least two first connectors 120 connected to the corresponding second connectors 210 are also the same. Therefore, more connectors can be identified based on a limited number of UIDs, improving UID utilization and avoiding waste of UID resources. On the other hand, since UID identification relies on the pins of detection devices such as CPLDs, fewer pins can be used when the number of UIDs is small. This saves pin resources used by detection devices to identify connector UIDs, avoiding waste of pin resources and thus preventing an increase in connector connection detection costs. Furthermore, detection devices with fewer pins, such as CPLDs, occupy less space, better meeting the development needs of device miniaturization.

[0058] Furthermore, in one implementation of this application, the second connector 210 can be divided into multiple groups. For example, the second connector 210 can be divided into multiple groups based on physical factors such as physical shape, location relative to a certain circuit board, and connection path length range. It can also be divided into multiple groups based on information such as the circuit board it is on, the number of connectors included in the circuit board, the number of connectors included in the server, the number of bits of the UID level combination, and the number of UIDs.

[0059] For example, second connectors 210 with the same physical form can be grouped together based on their physical shape. Second connectors 210 with the same location relative to a certain circuit board can be grouped together based on their position relative to that circuit board. Second connectors 210 with the same connection path value length range can be grouped together based on the connection path value length range. Second connectors 210 located on the same circuit board can be grouped together based on the number of bits in the UID level combination; for example, if a three-bit UID level combination can only correspond to eight different UIDs, then eight second connectors 210 can be grouped together. Of course, other grouping methods are also possible.

[0060] In different groups of second connectors 210, at least some of the second connectors 210 have the same UID. For example, the UID of a second connector 210 in the first group is the same as the UID of a second connector 210 in the second group. These two second connectors 210 with the same UID can be second connectors 210 that meet physical foolproofing conditions, such as having different physical shapes, different orientations relative to a circuit board, or different connection path length ranges. In this way, second connectors 210 in different groups can reuse UIDs. Furthermore, in the same group, the UIDs of each second connector 210 can be different. Of course, in the same group, some second connectors 210 that meet certain physical foolproofing conditions, such as second connectors 210 that are far apart, can also have the same UID. In this way, second connectors 210 in the same group can also reuse UIDs.

[0061] In summary, since at least some of the second connectors 210 share the same UID, UID resources can be saved. Identifying different second connectors 210 based on a limited number of UIDs improves the utilization rate of UID resources and avoids waste. Furthermore, without affecting the determination of whether there is a connection error between the first connector 110 and the second connector 210 based on UID, it is not necessary to use detection devices such as CPLDs with more pins to identify UIDs, which saves pin resources, avoids waste of pin resources, and avoids increased costs of detection devices. This avoids increased costs for connector connection detection and prevents detection devices such as CPLDs from occupying too much space, which meets the development needs of device miniaturization.

[0062] Specifically, connectors in servers have different physical forms. Because the physical form of the connectors is foolproof, connectors with different physical forms are not easily connected incorrectly. Therefore, in one implementation of this application, connectors with different physical forms that are not easily connected incorrectly can have the same UID. In this way, based on identifying whether a connector is misconnected based on its UID, more connectors can be identified based on a limited number of UIDs, avoiding the waste of UID resources and pin resources.

[0063] For example, such as Figure 1 As shown, the CPU main circuit board includes multiple second connectors 210, which may include, for example, 16 Universal Box Connectors (UBC) and 8 Mini Cool Edge 0 (MCIO) connectors. Among them, as... Figure 1 As shown, eight UBC connectors are located on the upper side of the CPU main circuit board, forming group Z11; eight UBC connectors are located on the left side of the CPU main circuit board, forming group Z12; and eight MCIO connectors are located on the upper side of the CPU main circuit board, forming group Z13. Since the physical forms of the UBC and MCIO connectors are different, they are less prone to misconnection. Therefore, for the connectors in groups Z11 and Z13, only a 3-bit UID needs to be set, ensuring that the UIDs of the eight UBC connectors in group Z11 correspond one-to-one with the UIDs of the eight MCIO connectors in group Z13. This allows for the identification of these eight UBC and eight MCIO connectors. A 3-bit UID can be, for example, a combination of 8 levels: 000, 001, 010, 011, 100, 101, 110, and 111. Therefore, the UIDs of the 8 UBC connectors in group Z11 can be 000, 001, 010, 011, 100, 101, 110, and 111, respectively. Similarly, the UIDs of the 8 MCIO connectors in group Z13 can also be 000, 001, 010, 011, 100, 101, 110, and 111, respectively. Correspondingly, the expected UIDs of the eight first connectors 120 on the PCIe adapter board connected to the eight UBC connectors in group Z11 are 000, 001, 010, 011, 100, 101, 110, and 111, respectively. The expected UIDs of the eight first connectors 120 on the PCIe adapter board connected to the eight MCIO connectors in group Z13 are 000, 001, 010, 011, 100, 101, 110, and 111, respectively.

[0064] In this way, some second connectors 210 with different physical forms on the same circuit board can be used as different connector groups. Each second connector 210 in the same connector group can have a different UID, and some second connectors 210 in different connector groups can have the same UID to reuse the UID. Based on the identification of whether the connector is misconnected based on the UID, more connectors can be identified based on a limited number of UIDs, which can effectively reduce the number of UIDs required and avoid the waste of UID resources and pin resources.

[0065] Furthermore, connectors with different physical forms on different circuit boards can also be used as different connector groups to reuse UIDs. For example, such as... Figure 1 As shown, the Riser card circuit board includes multiple second connectors 210, such as eight UBC connectors. These eight UBC connectors form group Z21. The UIDs of the eight UBC connectors in group Z21 can correspond one-to-one with the UIDs of the eight MCIO connectors in group Z13 on the CPU main circuit board, and can be 000, 001, 010, 011, 100, 101, 110, and 111 respectively. Correspondingly, the expected UIDs of the eight first connectors 120 on the PCIe adapter board connected to the eight UBC connectors in group Z21 are 000, 001, 010, 011, 100, 101, 110, and 111 respectively.

[0066] In this way, connectors with different physical forms on different circuit boards can be used as different connector groups. Each second connector 210 in the same connector group can have a different UID, and some second connectors 210 in different connector groups can have the same UID to reuse the UID. Based on the identification of whether the connector is misconnected based on the UID, more connectors can be identified based on a limited number of UIDs, which can effectively reduce the number of UIDs required and avoid the waste of UID resources and pin resources.

[0067] Furthermore, in this implementation, the connector group and the number of connectors included in the connector group can be determined based on the position of the second connectors 210 with different physical forms on the corresponding circuit board, the number of second connectors 210 with different physical forms included in the circuit board, and the number of bits of the UID level combination. For example, each connector group can also include 1, 2, 4, or 10 other numbers of second connectors 210. Moreover, without affecting the accuracy of connection detection, the connector group and the number of connectors included in the connector group can be set based on the principle of minimizing the number of UIDs.

[0068] Furthermore, in some other implementations of this application, the second connector 210 with the same UID can also be any number of second connectors 210 with different physical forms.

[0069] Furthermore, the orientations of the circuit boards in the server relative to a particular circuit board may differ. For example, some circuit boards may be above a particular circuit board, while others may be below it; some may be to its east, while others may be to its north; or the angles between the center points of different circuit boards and the center point of the particular circuit board may differ, such as 45° for some and 110° for others. Additionally, the orientations of different connectors on a particular circuit board may differ relative to another circuit board. For example, some connectors on one circuit board may be located to the left of the center line of another circuit board, while others may be located to the right. Since connectors used for connecting circuit boards are typically positioned close together based on their orientations, connectors located at different orientations relative to a particular circuit board are less likely to be connected incorrectly. The particular circuit board can be the circuit board to which the connector is connected. Therefore, in one implementation of this application, the UIDs of second connectors 210 located at different orientations of the first circuit board 100 can be the same, reducing the number of required UIDs and avoiding waste of UID and pin resources.

[0070] For example, such as Figure 1 As shown, the CPU main circuit board is located on the lower side of the PCIe adapter board, and the Riser card circuit board is located on the right side of the PCIe adapter board. The second connector 210 of the CPU main circuit board and the second connector 210 of the Riser card circuit board are located in different positions relative to the PCIe adapter board. Due to differences in cable length and the need to avoid cable crossing as much as possible, the CPU main circuit board is usually connected to the first connector 120 on the lower side of the PCIe adapter board through the second connector 210 on the upper side of the CPU main circuit board. The Riser card circuit board is usually connected to the first connector 120 on the right side of the PCIe adapter board through the second connector 210 on the left side of the Riser card circuit board. It is generally not advisable to mistakenly connect the second connector 210 on the upper side of the CPU main circuit board to the first connector 110 on the right side of the PCIe adapter board, nor is it advisable to mistakenly connect the second connector 210 on the Riser card circuit board to the first connector 120 on the lower side of the PCIe adapter board. Therefore, relative to the PCIe adapter board, the UIDs of some second connectors 210 located on different positions of the CPU main circuit board and Riser card circuit board on the PCIe adapter board can be the same, and the expected UIDs of the first connector 120 to which these second connectors 210 are connected are also the same.

[0071] Thus, some second connectors 210 located on the second circuit board 200 at different positions on the first circuit board 100 can be used as different connector groups. Some second connectors 210 within different connector groups can have the same UID to reuse the UID. Based on identifying whether the connector is misconnected based on the UID, more connectors can be identified based on a limited number of UIDs, which can effectively reduce the number of UIDs required and avoid wasting UID resources and pin resources.

[0072] Furthermore, such as Figure 1 As shown, the second connector 210 in group Z11 and the second connector 210 in group Z12 on the CPU main circuit board are positioned differently relative to the PCIe adapter board. Due to differences in cable length and the need to avoid cable crossing as much as possible, the second connector 210 in group Z11 on the CPU main circuit board is usually connected to the bottom of the PCIe adapter board, while the second connector 210 in group Z12 on the CPU main circuit board is usually connected to the left side of the PCIe adapter board. It is generally not advisable to mistakenly connect the second connector 210 in group Z11 to the left side of the PCIe adapter board, nor to mistakenly connect the second connector 210 in group Z12 to the bottom side of the PCIe adapter board. Therefore, the UID of some second connectors 210 in group Z12 can be the same as the UID of some second connectors 210 in group Z11. For example, the UIDs of the eight second connectors 210 in group Z12 correspond one-to-one with the UIDs of the eight second connectors 210 in group Z11, and can be 000, 001, 010, 011, 100, 101, 110, and 111 respectively. Correspondingly, the expected UID of the first connector 120 to which the second connector 210 in group Z12 is connected is also one-to-one with the expected UID of the first connector 120 to which the second connector 210 in group Z11 is connected, and can be 000, 001, 010, 011, 100, 101, 110, and 111 respectively.

[0073] Thus, some second connectors 210 located on the same second circuit board 200 at different positions relative to the first circuit board 100 can be used as different connector groups. Each second connector 210 in the same connector group can have a different UID, and some second connectors 210 in different connector groups can have the same UID to reuse the UID. Based on identifying whether the connector is misconnected based on the UID, more connectors can be identified based on a limited number of UIDs, which can effectively reduce the number of UIDs required and avoid wasting UID resources and pin resources.

[0074] Furthermore, in this implementation, the connector group and the number of connectors included in the connector group can be determined based on the orientation of the second connector 210 relative to the first circuit board 100, the number of second connectors 210, the second circuit board 200 where the second connector 210 is located, and the number of bits in the UID. For example, each connector group can also include 1, 2, 4, or 10 connectors, or other numbers. Moreover, without affecting the accuracy of connection detection, the connector group and the number of connectors included in the connector group can be determined based on the principle of minimizing the number of UIDs.

[0075] Furthermore, in some other implementations of this application, the second connector 210 with the same UID can also be any number of second connectors 210 located in different positions on the first circuit board 100.

[0076] Furthermore, the physical locations of the circuit boards and connectors within the circuit boards vary. Since the length of the cables used to connect connectors between different circuit boards is typically set based on the physical distance between the two connectors to be connected, connectors corresponding to different cable length ranges are less likely to be connected incorrectly. In other words, connectors whose path values ​​for the connection path fall within different length ranges are less likely to be connected incorrectly. Therefore, in one implementation of this application, the path value or cable length corresponds to the same UID for connectors in different length ranges, reducing the number of required UIDs and avoiding waste of UID and pin resources.

[0077] For example, such as Figure 1As shown, the CPU main circuit board is located on the lower side of the PCIe adapter board, and the Riser card circuit board is located on the right side of the PCIe adapter board. Typically, the second connector 210 on the upper side of the CPU main circuit board is connected to the first connector 120 on the lower side of the PCIe adapter board, and the second connector 210 on the left side of the Riser card circuit board is connected to the first connector 120 on the right side of the PCIe adapter board. Therefore, the lengths of the cables used to connect the second connector 210 on the upper side of the CPU main circuit board and the second connector 210 on the left side of the Riser card circuit board to their corresponding first connectors 120 on the PCIe adapter board are different, and there is usually a certain range of length difference (i.e., a significant difference), meaning the corresponding cable lengths fall within different length ranges. For example, the length of the cable used to connect the second connector 210 on the upper side of the CPU main circuit board to the corresponding first connector 120 on the PCIe adapter board is in the range of 7cm-10cm, while the length of the cable used to connect the second connector 210 on the left side of the Riser card circuit board to the corresponding first connector 120 on the PCIe adapter board is in the range of 5cm-8cm. Therefore, due to the length of the cable corresponding to the second connector 210 on the CPU main circuit board, the second connector 210 on the upper side of the CPU main circuit board is usually not connected to the first connector 120 on the right side of the PCIe adapter board. Similarly, due to the length of the cable corresponding to the second connector 210 on the Riser card circuit board, the second connector 210 on the left side of the Riser card circuit board is usually not connected to the first connector 120 on the lower side of the PCIe adapter board. Therefore, the UIDs of some second connectors 210 on the CPU main circuit board and the Riser card circuit board corresponding to different length ranges of path values ​​or cable lengths can be the same, and the expected UIDs of the first connector 120 to which these second connectors 210 are connected also correspond to the same.

[0078] Thus, some second connectors 210 located on different second circuit boards 200 with path values ​​or cable lengths corresponding to different length ranges can be used as different connector groups. Some second connectors 210 within different connector groups can have the same UID to reuse the UID. Based on identifying whether the connector is misconnected based on the UID, more connectors can be identified based on a limited number of UIDs, which can effectively reduce the number of UIDs required and avoid wasting UID resources and pin resources.

[0079] Furthermore, such as Figure 1As shown, the second connector 210 in group Z11 on the CPU main circuit board needs to be connected to the lower side of the PCIe adapter board, and the second connector 210 in group Z12 on the CPU main circuit board needs to be connected to the left side of the PCIe adapter board. Due to the limitations of the cable length corresponding to the connectors at different locations, the second connector 210 in group Z11 is usually not connected to the left side of the PCIe adapter board, nor is the second connector 210 in group Z12 connected to the lower side of the PCIe adapter board. Therefore, the UID of some second connectors 210 in group Z11 can be the same as the UID of some second connectors 210 in group Z13, and the expected UID of the first connector 120 to which these second connectors 210 are connected is also the same.

[0080] Thus, some second connectors 210 located on the same second circuit board 200 with path values ​​or cable lengths corresponding to different length ranges can be used as different connector groups. Some second connectors 210 within different connector groups can have the same UID to reuse the UID. Based on identifying whether the connector is misconnected based on the UID, more connectors can be identified based on a limited number of UIDs, which can effectively reduce the number of UIDs required and avoid wasting UID resources and pin resources.

[0081] Furthermore, in this implementation, the connector group and the number of connectors included in the connector group can be determined based on the length range of the cable corresponding to the second connector 210, the number of bits in the UID, etc. For example, each connector group can also include 1, 2, 4, or 10 connectors, or other numbers. Moreover, without affecting the accuracy of connection detection, the connector group and the number of connectors included in the connector group can be determined based on the principle of minimizing the number of UIDs.

[0082] Furthermore, in some other implementations of this application, the second connector 210 with the same UID can also be any number of second connectors 210 whose path values ​​or cable lengths connected to the first connector 120 correspond to different length ranges.

[0083] In summary, in the server provided by this application, on the same second circuit board 200, connectors with different physical forms can have the same UID; connectors located in different positions relative to the first circuit board 100 can have the same UID; and connectors with path values ​​or cable lengths corresponding to different length ranges can have the same UID. On different second circuit boards 200, connectors with different physical forms can have the same UID; connectors located in different positions relative to the first circuit board 100 can have the same UID; and connectors with path values ​​or cable lengths corresponding to different length ranges can have the same UID. This effectively reduces the number of UIDs and avoids wasting UID and pin resources.

[0084] Based on the server provided in the embodiments of this application, the embodiments of this application also provide a circuit board, which includes a substrate and a plurality of connectors disposed on the substrate. The circuit board may be a second circuit board 200 such as the aforementioned CPU main circuit board or Riser card circuit board. Each connector is configured with its own UID, and at least two connectors are configured with the same UID. The UID is used for connector identification.

[0085] Furthermore, in one implementation of this application, any two of the at least two connectors with the same UID may have different physical forms, different orientations relative to a circuit board, or different path values ​​connecting to the corresponding connectors within different length ranges. That is, among the connectors, at least two connectors with different physical forms may have the same UID, at least two connectors with different orientations relative to a circuit board may have the same UID, and at least two connectors with path values ​​connecting to the corresponding connectors within different length ranges may have the same UID. Of course, at least two connectors satisfying other conditions may also have the same UID.

[0086] The circuit board provided in this embodiment has physical foolproof protection because connectors with different physical forms, connectors whose path values ​​to the corresponding connectors are in different length ranges, and connectors with different orientations relative to a certain circuit board. Therefore, the corresponding connectors are not easy to connect incorrectly. Thus, the UIDs of these connectors can be the same, effectively reducing the number of bits and the number of UID numbers. On the one hand, it saves UIDs and avoids the waste of UID numbering resources. On the other hand, it improves the UID number recognition rate. Furthermore, it does not require the use of CPLDs with more pins to identify UID numbers, saving pin resources and avoiding the increase in CPLD costs. This avoids the increase in connector connection detection costs and avoids CPLDs occupying too much space, which meets the development needs of device miniaturization.

[0087] For example, because the physical form of the connector is foolproof, connectors with different physical forms are not easily connected incorrectly. In one implementation of this application, connectors with the same physical form that are prone to misconnection can have different UIDs to identify misconnections of connectors with the same physical form. Connectors with different physical forms can have the same UID to avoid wasting UIDs. For example, if there are 8 UBC and 8 MCIO connectors on a circuit board, since the physical forms of UBC and MCIO connectors are different and not easily connected incorrectly, only a 3-bit UID is needed to identify the 8 UBC connectors and 8 MCIO connectors. That is, the UIDs of the 8 UBC connectors can be 000, 001, 010, 011, 100, 101, 110, 111 in sequence, and the UIDs of the 8 MCIO connectors can be 000, 001, 010, 011, 100, 101, 110, 111 in sequence. In this way, 16 connectors can be identified using 8 different UIDs, which can effectively reduce the number of UIDs required.

[0088] For example, in one implementation of this application, such as Figure 2 As shown, the circuit board includes a substrate G and multiple connectors L. The substrate G includes multiple regions A, B, C, D, and E, and multiple connectors are provided in each of the regions A, B, C, D, and E.

[0089] For example, multiple such settings are configured in region A. Figure 2 The physical form shown has 8 connectors L1 to L8, and region B is provided with... Figure 2 The physical form shown has 8 connectors L1 to L8, and region C is provided with... Figure 2 The physical form shown has 8 connectors L1 to L8, and region D is provided with the following... Figure 2 The physical form shown includes 12 connectors L1 to L12, and region E is provided with... Figure 2 The physical form of the 16 connectors L1 to L16 is shown.

[0090] Each connector has its own UID. Some connectors in the first area have the same UID as some connectors in the second area. The UID can be, for example, 3 bits of binary data, which is a combination of three levels. The UIDs of the eight connectors L1 to L8 in the first area A are shown in Table 1, which are 000, 001, 010, 011, 100, 101, 110, and 111 respectively (corresponding to decimal data 0, 1, 2, 3, 4, 5, 6, and 7 respectively). The UIDs of the eight connectors L1 to L8 in the second area A are also 000, 001, 010, 011, 100, 101, 110, and 111 respectively.

[0091] Table 1

[0092] L1 L2 L3 L4 L5 L6 L7 L8 Area A 000 001 010 011 100 101 110 111 Area B 000 001 010 011 100 101 110 111

[0093] Thus, in the circuit board provided by this application, some connectors located in different areas have the same UID, which effectively reduces the number of digits and the number of UID numbers. On the one hand, it avoids the waste of UID number resources, on the other hand, it improves the UID number recognition rate. Furthermore, it eliminates the need to use detection devices with more pins to identify the numbers, thereby avoiding the increase in detection device costs, which in turn avoids the increase in cable connection detection costs and avoids the cable connection detection devices occupying too much space, meeting the development needs of device miniaturization.

[0094] Furthermore, in one implementation of this application, since a 3-bit UID is used to identify the connector, the connector can be identified by the aforementioned 8 data: 000, 001, 010, 011, 100, 101, 110, and 111. Therefore, when the number of connectors with the same physical form set in a certain region (such as the aforementioned region A and region B) is less than or equal to 8, the UIDs of each connector in that region are different.

[0095] Furthermore, when the number of connectors with the same physical form in a certain area is greater than 8, adjacent connectors have different UIDs, while some non-adjacent connectors have the same UID. For example, the area can be divided into sub-areas, where connectors in the sub-areas have different UIDs, and connectors in adjacent sub-areas have different UIDs. The aforementioned eight numbers 000, 001, 010, 011, 100, 101, 110, and 111 are used cyclically to identify different connectors based on the sub-area, resulting in a cyclical and consecutive numbering of connector UIDs across multiple sub-areas. In this way, with a limited number of UID numbers, more connectors can be identified for cable connection detection.

[0096] For example, different connectors can be identified by using 000, 001, 010, 011, 100, 101, 110, 111 as a whole cycle. Figure 2 As shown, there are 12 connectors L1 to L12 in region D. If L1 to L8 are considered as one sub-region and L9 to L12 as another sub-region, then the UIDs of connectors L1 to L12 are as shown in Table 2, which can be 000, 001, 010, 011, 100, 101, 110, 111, 000, 001, 010, and 011 respectively.

[0097] Table 2

[0098]

[0099] Alternatively, four adjacent connectors can be grouped into a sub-region, numbered 000, 001, 010, 011 as one group (or 0-3 as one group), and 100, 101, 110, 111 as another group (or 4-7 as one group). These two groups of numbers can be used cyclically to identify different connectors. For example... Figure 2 As shown, there are 16 connectors L1 to L16 in region E. If L1 to L4 are considered as one sub-region, L5 to L8 as another sub-region, L9 to L12 as another sub-region, and L13 to L16 as another sub-region, then the UIDs of connectors L1 to L16 can be 000, 001, 010, 011, 100, 101, 110, 111, 000, 001, 010, 011, 100, 101, 110, 111, respectively.

[0100] Of course, you can also divide the sub-regions in other ways, or define a UID numbering cycle, which can be set as needed.

[0101] Furthermore, in another implementation of this application, there may be connectors with different physical forms in a certain area. Since a 3-bit UID is used to identify the connector, the connector can be identified by the aforementioned 8 data: 000, 001, 010, 011, 100, 101, 110, and 111. Therefore, when the number of connectors set in a certain area (such as the aforementioned area A and area B) is less than or equal to 8, the UID of each connector in that area is different regardless of whether the physical forms of the connectors in that area are the same.

[0102] Because the physical form of connectors effectively prevents misconnection, when UID resources are limited, connectors with the same physical form that are prone to misconnection will have different UIDs, while connectors with different physical forms can have the same UID. Therefore, when an area contains connectors with different physical forms and the number of connectors is greater than 8, adjacent connectors with the same physical form in that area will have different UIDs, while non-adjacent connectors in that area will have the same UID. Furthermore, when the number of connectors with different physical forms in an area is greater than 8, adjacent connectors with the same physical form will have different UIDs, and at least some connectors with different physical forms will have the same UID. In this way, with a limited number of UIDs, more connectors can be identified for cable connection detection.

[0103] Furthermore, in some other implementations of this application, the connector with the same UID can also be any number of connectors with different physical forms, or any number of connectors located in different positions relative to a certain circuit board, or any number of connectors whose path values ​​or cable lengths connected to the corresponding connectors correspond to different length ranges, etc.

[0104] Furthermore, in some other implementations of this application, since the cable lengths corresponding to connectors in different areas of the circuit board are different, during the connection process, the connectors are usually not connected incorrectly due to the limitation of cable length. Therefore, the UIDs of connectors in different areas, that is, connectors whose path values ​​to their corresponding connectors are in different length ranges, and some connectors whose locations relative to a certain circuit board are different, can be the same.

[0105] In this way, at least some connectors on the circuit board share the same UID. With a limited number of UIDs, more connectors can be identified for cable connection detection. This effectively reduces the number of bits and the number of UIDs, saving UID resources and avoiding waste. It also improves the UID recognition rate. Furthermore, it eliminates the need for CPLDs with more pins for identification, saving pin resources and avoiding increased CPLD costs. This, in turn, prevents increased connector connection detection costs and avoids connector connection detection devices occupying too much space, meeting the miniaturization requirements of device development.

[0106] Furthermore, the circuit board provided in this embodiment can be the aforementioned CPU main circuit board, I / O frame circuit board, NPU circuit board, or other second circuit board 200. For example... Figure 3 As shown, in another implementation of this application, the server includes a first circuit board 100 which is a PCIe adapter board, and a second circuit board 200 which is a CPU main circuit board, an I / O frame circuit board, and an NPU circuit board. The PCIe adapter board is connected to the CPU main circuit board, the I / O frame circuit board, and the NPU circuit board respectively via connectors connected by cables.

[0107] Furthermore, as mentioned above, for checking whether the connectors are correctly connected, the detection device 110, while the first connector 120 and the second connector 210 are in a connected state, confirms whether there is a connection error between the first connector 120 and the second connector 210 by comparing the actual UID received by the first connector 120 with the corresponding expected UID. Therefore, for the second connector 210 with the same aforementioned UID, the corresponding first connector 120 connected to the second connector 210 has the same expected UID for connector connection detection. Thus, as... Figure 3As shown, on the PCIe adapter board exemplified by the first circuit board 100, the desired UID settings of the plurality of first connectors 120 correspond to the UIDs of the second connectors 210 in each of the second circuit boards 200 to which they are to be correctly connected, and are also in accordance with... Figure 2 The circuit boards shown are arranged in a similar manner, wherein at least two first connectors 120 have the same expected UID, so as to reuse the UID.

[0108] The following describes the process for detecting whether a connector in the server is connected incorrectly, as provided in the embodiments of this application.

[0109] In one implementation of this application, such as Figure 4 As shown, the server includes a first circuit board 100 and a second circuit board 200, wherein:

[0110] The first circuit board 100 serves as the master board in the UID detection scenario. The CPLD in the first circuit board 100 includes multiple sets of pins, each set of pins corresponding to a first connector 120. Each first connector 120 includes a set of detection pins corresponding to the CPLD. The CPLD is connected to the first connector 120 through the detection pins of the first connector 120 to realize UID detection.

[0111] The second circuit board 200 serves as a slave board in the UID detection scenario. The voltage level on the target pin of the second connector 210 in the second circuit board 200 can be forcibly pulled low or high, or set to configurable (i.e., set to 0 or 1) using a dial switch. For example, as mentioned earlier, a low-level configuration can be achieved by grounding the corresponding pin through a grounding resistor, and a high-level configuration can be achieved by connecting the corresponding pin to the target power supply, thereby obtaining a combination of 0 and 1 voltage levels as the UID.

[0112] When the first connector 120 and the second connector 210 are connected, the CPLD uses the detection pins of the first connector 120 to obtain the voltage level combination on the target pins of the second connector 210, thereby identifying the UID of the second connector 210. Furthermore, the CPLD can determine whether the connector connection is correct using the UID.

[0113] The number of second connectors 210 is greater than 2 N When the UID consists of N bits, each group of pins in the CPLD includes N pins, the detection pins corresponding to the first connector 120 also include N pins, and the target pins corresponding to the second connector 210 also include N pins. Each first connector 120 transmits the N-bit UID of the connected second connector 210 to the CPLD, and the CPLD obtains the UID of one second connector 210 every N pins. For example, N can be 3.

[0114] Furthermore, such as Figure 4 As shown, the server also includes a memory 140 and a Baseboard Management Controller (BMC) 130. The memory 140 may be, for example, the aforementioned EEPROM. The memory 140 and BMC 130 may be disposed on the first circuit board 100 or on a circuit board other than the first circuit board 100. The BMC 130 is connected to the memory 140 and the CPLD, respectively. The CPLD is connected to each of the first connectors 120 in the first circuit board 100.

[0115] The memory 140 is used to store the cable topology configuration information corresponding to the first circuit board 100, or to store the cable topology configuration information of the storage server. The cable topology configuration information is the configuration file related to the UID of the connector, including the expected UID corresponding to the first connector 120. The cable topology configuration information can be written according to the order during the whole machine customization process.

[0116] BMC130 is used to obtain the expected UID of the first connector based on the cable topology configuration information stored in memory 140, and write the expected UID corresponding to each first connector 120 into the registers included in the CPLD, so that the expected UID corresponding to the first connector 120 is stored in the CPLD.

[0117] When the first connector 120 and the second connector 210 are connected, the CPLD compares the UID of the second connector 210 actually obtained by the first connector 120 with the expected UID corresponding to the first connector 120, and determines whether there is a connection error between the first connector 120 and the second connector 210 based on the comparison result.

[0118] Based on this, this application provides a connector connection detection method, which can be applied to the aforementioned server. For example... Figure 5 As shown, the method includes the following steps.

[0119] S100, the CPLD obtains the UID of the second connector 210 actually received by the first connector 120.

[0120] S200, the CPLD compares the UID of the second connector 210 actually received by the first connector 120 with the expected UID corresponding to the first connector 120, and determines whether there is a connection error between the first connector 120 and the second connector 210 based on the comparison result.

[0121] For example, if the UID of the second connector 210 actually received by the first connector 120 is consistent with the corresponding expected UID, then the connection between the first connector 120 and the second connector 210 is considered to be correct; if the UID of the second connector 210 actually received by the first connector 120 is inconsistent with the corresponding expected UID, then the connection between the first connector 120 and the second connector 210 is considered to be incorrect.

[0122] Furthermore, regarding the UID setting method, for example, when the number of second connectors 210 in the second circuit board 200 is less than or equal to 2, if the UID is a three-bit level combination, the highest bit of the UID can be set to a 0, 1 dial switch, supporting four configurations: 00, 01, 10, and 11. The lowest bit can be 0 or 1. As shown in Table 5 below, if the second circuit board 200 is, for example, Riser0, Riser1, Riser2, and Riser3, and the number of connectors included on Riser0, Riser1, Riser2, and Riser3 is less than or equal to 2, then the corresponding UID configuration method (A:B:C) is x00, x01, x10, x11, where x is 0 or 1.

[0123] Table 5

[0124] A B C Riser0 x 0 0 Riser1 x 0 1 Riser2 x 1 0 Riser3 x 1 1

[0125] Furthermore, such as Figure 6 As shown, the first circuit board 100 can be, for example, the aforementioned PCIe adapter board. The PCIe adapter board includes four connectors: UBC1, UBC2, UBC3, and UBC4. The expected UIDs (i.e., expected values) corresponding to UBC1, UBC2, UBC3, and UBC4 are 000, 100, 001, and 101, respectively, as shown in Table 6. The second circuit board 200 can be, for example, Riser0 and Riser1. Riser0 includes two connectors, UBC1 and UBC2, with corresponding UIDs of 000 and 100, respectively. Riser1 includes two connectors, UBC1 and UBC2, with corresponding UIDs of 001 and 101, respectively.

[0126] BMC compares the detection value corresponding to each UBC with its corresponding expected value to determine whether the two are consistent, thus determining whether the corresponding cable connection is accurate. As shown in Table 6, UBC1 and UBC3 are connected correctly, while UBC3 and UBC4 are connected incorrectly, such as due to incorrect cable connection or looseness.

[0127] Table 6

[0128]

[0129] Furthermore, when the number of second connectors 210 in the second circuit board 200 is greater than 2 and less than or equal to 4, the highest 2 bits of the UID can be set to a 0 or 1 dial switch. As shown in Table 7 below, if the number of connectors included on Riser0 is less than or equal to 2, then its corresponding UID configuration method (A:B:C) is x00; if the number of connectors included on Riser1 is equal to 4, then its corresponding UID configuration method (A:B:C) is xx1, where x is 0 or 1.

[0130] Table 7

[0131] A B C Riser0 x x 0 Riser1 x x 1

[0132] like Figure 7 As shown, the first circuit board 100 can be, for example, the aforementioned PCIe adapter board. The PCIe adapter board includes six connectors: UBC1, UBC2, UBC3, UBC4, UBC5, and UBC6. The expected UIDs (i.e., expected values) corresponding to UBC1, UBC2, UBC3, UBC4, UBC5, and UBC6 are 000, 100, 001, and 101, respectively, as shown in Table 8. The second circuit board 200 can be, for example, Riser0 and Riser1. Riser0 includes two connectors, UBC1 and UBC2, with corresponding UIDs of 000 and 100, respectively. Riser1 includes two connectors, UBC1 and UBC2, with corresponding UIDs of 001 and 101, respectively.

[0133] BMC compares the detection value corresponding to each UBC with its corresponding expected value to determine whether the two are consistent, thus determining whether the corresponding connector is connected correctly. As shown in Table 8, all UBCs are connected correctly.

[0134] Table 8

[0135]

[0136] In addition, as mentioned above Figure 2 As shown, for a single board with more than 4 connectors of the same type, since the high-speed cables corresponding to the high-speed connectors are sensitive to distance, misconnection usually occurs in adjacent areas. Therefore, the UIDs can be arranged in 4-partitions, such as the aforementioned 000, 001, 010, 011 (i.e., 0 to 3), 100, 101, 110, 111 (i.e., 4 to 7), 000, 001, 010, 011 (i.e., 0 to 3), 100, 101, 110, 111 (i.e., 4 to 7) arranged in a cycle.

[0137] In another implementation of this application, if a connection error is determined between the first connector 120 and the second connector 210, the method further includes: generating a connector connection error message to be presented to the user, so as to notify the user of the error and remind them to check the connector connection. This enables connector connection detection during circuit board manufacturing and live network testing.

[0138] In another implementation of this application, such as Figure 8 As shown, when the CPLD executes step S100 and obtains the UID of the second connector 210, it further includes executing the following step S110:

[0139] Step S110: Check the format of the UID of the second connector 210, such as checking the number of bits in the UID and whether the highest bit of the UID is the corresponding value.

[0140] If the format of the UID of the second connector 210 does not meet the preset format requirements, proceed to step S120. If the format of the UID of the second connector 210 meets the preset format requirements, proceed to step S200.

[0141] S120, Generate an error message about the identity information to be presented to the user.

[0142] In this way, it is possible to detect in a timely manner whether the UID format of the connector is accurate, and if it is incorrect, to remind the relevant users to make adjustments.

[0143] In summary, the technical solution provided by the embodiments of this application takes into account the setting method of connector UID on multi-connector circuit boards as a whole. Based on the flexibility of multiple single-board connections, it configures corresponding UIDs. Some connectors have the same UID, which can effectively reduce the number of level bits and the number of UIDs. Furthermore, the connector connection detection method provided by this application, based on the aforementioned circuit board, can support connector anti-misconnection detection in scenarios where cables are flexibly configurable.

[0144] Furthermore, since high-speed connectors are very sensitive to cable length, incorrect connections typically do not extend beyond the eight connectors. Therefore, as mentioned earlier, the UID, when only including the connector's UID, can be a 3-bit combination of voltage levels. Of course, depending on the information included in the UID, the number of connectors, etc., the number of bits, size, and format of the UID can be set to other methods as needed; that is, the number of voltage levels in the UID can be set according to actual requirements.

[0145] Furthermore, the electronic devices provided in the embodiments of this application may also be other electronic devices besides servers, such as mobile phones, tablets, laptops, handheld computers, mobile internet devices (MIDs), wearable devices (including smartwatches, smart bracelets, pedometers, etc.), personal digital assistants, portable media players, navigation devices, video game devices, set-top boxes, virtual reality and / or augmented reality devices, Internet of Things devices, industrial control devices, streaming media client devices, e-books, reading devices, POS machines, in-vehicle devices, and other computing devices.

[0146] This application also provides a chip for executing instructions, which is used to execute the connector connection detection method described in the above embodiments.

[0147] This application also provides a computer-readable storage medium storing computer instructions / programs. When the computer instructions / programs are run on the processor of an electronic device, the processor of the electronic device executes the technical solution of the connector connection detection method described in the above embodiments.

[0148] In some possible implementations, various aspects of the methods provided in this application can also be implemented as a program product, which includes program code. When the program product is run on the processor of an electronic device, the program code is used to cause the processor of the electronic device to perform the steps of the methods in the various exemplary implementations of this application described above. For example, the electronic device can perform the connector connection detection method in the embodiments of this application.

[0149] The program product may take the form of any combination of one or more readable media. A readable medium may be a readable data medium or a readable storage medium. A readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of readable storage media (a non-exhaustive list) include: an electrical connection having one or more wires, a portable disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0150] This application is described with reference to flowchart illustrations and / or block diagrams of the methods, apparatus, and computer program products according to this application. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable information processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable information processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0151] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable information processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0152] These computer program instructions may also be loaded onto a computer or other programmable information processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0153] Other embodiments of this application will readily occur to those skilled in the art upon consideration of the specification and practice of the application disclosed herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein.

[0154] It should be noted that, in addition to the specific embodiments described above, those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification. Although the description of this application is presented in conjunction with preferred embodiments, this does not mean that the features of this application are limited to this implementation. On the contrary, the purpose of describing the application in conjunction with the implementation is to cover other options or modifications that may be derived based on the claims of this application. To provide a thorough understanding of this application, many specific details are included in the above description, and this application may also be implemented without using these details. Furthermore, to avoid confusion or obscuring the focus of this application, some specific details will be omitted in the description. It should be noted that, unless otherwise specified, the embodiments and features in the embodiments of this application can be combined with each other.

[0155] It should be noted that in this specification, similar reference numerals and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0156] Although this application has been illustrated and described with reference to certain preferred embodiments, those skilled in the art should understand that the above description is a further detailed explanation of the application in conjunction with specific implementations, and should not be construed as limiting the specific implementation of the application to these descriptions. Those skilled in the art can make various changes in form and detail, including some simple deductions or substitutions, without departing from the spirit and scope of this application.

Claims

1. An electronic device, characterized in that, include: A first circuit board, the first circuit board including a detection device and a plurality of first connectors, the detection device being connected to each of the first connectors respectively; Multiple second connectors, one of which is connected to one of the first connectors; The plurality of second connectors are distributed on one or more second circuit boards, and at least two of the second connectors are configured with the same identity information; Any two of the at least two second connectors have different physical forms, or different orientations relative to the first circuit board, or the path values ​​connected to the corresponding first connectors are in different length ranges. The detection device stores expected identity information for each of the first connectors. The expected identity information is the identity information of the second connector that should be received when the first connector and the second connector are correctly connected. At least two of the first connectors have the same expected identity information, and when correctly connected, the at least two first connectors are connected to the at least two second connectors. The detection device confirms whether there is a connection error between the first connector and the second connector by comparing the actual identity information received by the first connector with the corresponding expected identity information.

2. The electronic device according to claim 1, characterized in that, The identity information of the second connector is represented by the combination of voltage levels on the target pins of the second connector; When the first connector and the second connector are connected, the detection device obtains the voltage level combination on the target pin of the second connector through the first connector to identify the identity information of the second connector.

3. The electronic device according to claim 2, characterized in that, The first connector includes a detection pin corresponding to the detection device, which obtains the level combination on the target pin of the second connector through the detection pin of the first connector.

4. The electronic device according to any one of claims 1-3, characterized in that, The electronic device further includes a baseboard management controller, which is connected to the detection device and is used to write the expected identity information corresponding to the first connector into a register included in the detection device.

5. The electronic device according to claim 4, characterized in that, The electronic device further includes a memory for storing cable topology configuration information of the electronic device, the cable topology configuration information including the expected identity information corresponding to the first connector, and the baseboard management controller is connected to the memory for obtaining the expected identity information corresponding to the first connector based on the cable topology configuration information stored in the memory.

6. The electronic device according to claim 5, characterized in that, The baseboard management controller and the memory are disposed on the first circuit board. The electronic device is a server. The first circuit board is an adapter board for connecting different circuit boards in the electronic device. The second circuit board where the second connector is located is at least one of the following: the circuit board where the central processing unit is located, the circuit board where the processing unit other than the central processing unit is located, the circuit board for connecting input / output devices, the graphics card circuit board, and the network card circuit board. The detection device is a complex programmable logic device, and the memory is an electrically erasable programmable read-only memory.

7. The electronic device according to any one of claims 1-3, characterized in that, The number of the second connector is greater than 2 N And at least two of the second connectors are configured with the same identity information, such that the identity information of each second connector has N bits; Each of the first connectors transmits N bits of identification information of the connected second connector to the detection device, and the detection device obtains the identification information of the second connector for each N pins.

8. A circuit board, characterized in that, Applied to an electronic device as described in any one of claims 1-7, the circuit board includes a plurality of connectors, each of the connectors being configured with its own identity information, and at least two of the connectors being configured with the same identity information, the identity information being used for identification of the connectors.

9. A connector connection detection method, characterized in that, Applied to the electronic device as described in any one of claims 1-7, the method comprises: The detection device acquires the identity information of the second connector actually received by the first connector, and compares the identity information of the second connector actually received by the first connector with the corresponding expected identity information to confirm whether there is a connection error between the first connector and the second connector.

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