Display panel and display device

Abstract

The invention discloses a display panel and a display device, and belongs to the technical field of display. The display panel includes: a plurality of display pixel circuits; a plurality of fingerprint pixel circuits; a gate driving circuit; the selection circuit is respectively connected with the gate drive circuit, at least part of the display pixel circuits and each fingerprint pixel circuit; and the selection circuit is used for controlling the gate driving circuit to be communicated with each display pixel circuit in a progressive scanning period of each display frame, and controlling the gate driving circuit to be communicated with each fingerprint pixel circuit in a full-screen light emitting period of at least part of the display frames. According to the embodiment of the invention, the frame size of the display panel with the fingerprint identification function can be reduced.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] At present, with the increase in display pixel circuit types and functions and the improvement of panel PPI (Pixels Per Inch, resolution), the screen transmittance is getting lower and lower, and it is gradually unable to meet the needs of under-screen optical fingerprints. Optical fingerprints can avoid the interference of ambient light to the greatest extent during the recognition process, have better stability in extreme environments, and can break through the limitations of screen transmittance. Therefore, the technology of integrated optical fingerprints in the screen has gradually attracted attention.

[0003] However, if an in-screen fingerprint integration design is adopted, an additional gate driving circuit will be added to drive the fingerprint pixel circuit on the basis of the original gate circuit that drives the display pixel circuit for display. This will increase the border size of the display panel and make it difficult to meet the design requirements of ultra-narrow borders and full screens for display devices. Summary of the invention

[0004] The present invention provides a display panel and a display device to reduce the frame size of a display panel with a fingerprint recognition function.

[0005] In a first aspect, an embodiment of the present invention provides a display panel, including:

[0006] a plurality of display pixel circuits;

[0007] A plurality of fingerprint pixel circuits;

[0008] Gate drive circuit;

[0009] A selection circuit, wherein the selection circuit is respectively connected to the gate drive circuit, at least part of the display pixel circuit and each of the fingerprint pixel circuits; the selection circuit is used to control the gate drive circuit to be connected to each of the display pixel circuits during the line-by-line scanning period of each display frame, and to control the gate drive circuit to be connected to each of the fingerprint pixel circuits during the full-screen light-emitting period of at least part of the display frame.

[0010] Optionally, the gate driving circuit comprises: a multi-stage shift register arranged in cascade; the selection circuit comprises: a plurality of selection modules, arranged corresponding to at least part of the shift register;

[0011] Wherein, each of the selection modules comprises: a first selection unit, a first input end of the first selection unit is connected to the shift register corresponding to the selection module, and an output end of the first selection unit is connected to at least one row of display pixel circuits;

[0012] At least part of the selection modules include: a second selection unit, a first input end of the second selection unit is connected to the shift register corresponding to the selection module, and an output end of each second selection unit is respectively connected to each row of the fingerprint pixel circuits.

[0013] Optionally, the number of the selection modules in the selection circuit is the same as the number of the shift registers in the gate driving circuit, and each of the selection modules connected to each row of the fingerprint pixel circuits is provided with the second selection unit;

[0014] Wherein, the number of rows of the fingerprint pixel circuit is equal to or less than the number of stages of the shift register in the gate driving circuit.

[0015] Optionally, the number of rows of the fingerprint pixel circuit is less than the number of stages of the shift register in the gate driving circuit, the number of the selection modules in the selection circuit is the same as the number of rows of the fingerprint pixel circuit, and each of the selection modules is provided with the second selection unit;

[0016] The display panel includes at least one fingerprint recognition area, and the gate drive circuit includes at least one shift register group; each shift register group is respectively arranged corresponding to each fingerprint recognition area; the shift register group includes a plurality of continuous shift registers corresponding to a plurality of rows of fingerprint pixel circuits in the corresponding fingerprint recognition area;

[0017] When the shift register group is connected to a previous stage shift register, a first switch unit is provided between an input end of a first stage shift register in the shift register group and an output end of the previous stage shift register, and an input end of the first stage shift register in the shift register group is connected to a start signal line through a second switch unit; wherein, during a full-screen light-emitting period of at least part of the display frame, the first switch unit is turned off, and the second switch unit is turned on;

[0018] When the shift register group is connected to a subsequent shift register, a third switch unit is arranged between the output end of the last shift register in the shift register group and the input end of the subsequent shift register; wherein, during the line-by-line scanning period of each display frame, the third switch unit is turned on; during the full-screen light-emitting period of at least part of the display frames, the third switch unit is turned off.

[0019] Optionally, the display panel further includes: a first switch signal line and a second switch signal line;

[0020] The first selection unit comprises: a first transistor connected between a first input terminal and an output terminal of the first selection unit, wherein a gate of the first transistor is connected to the first switch signal line;

[0021] The second selection unit comprises: a second transistor connected between the first input terminal and the output terminal of the second selection unit, the gate of the second transistor being connected to the second switch signal line;

[0022] Preferably, the gates of all the first transistors are connected to the same first switch signal line;

[0023] Preferably, the gates of all the second transistors are connected to the same second switch signal line;

[0024] Preferably, the display panel further comprises: a third switch signal line; the first selection unit further comprises: a third transistor connected between the first input terminal and the output terminal of the first selection unit, the gate of the third transistor being connected to the third switch signal line; the third transistor and the first transistor have different channel types;

[0025] Preferably, the gates of all the third transistors are connected to the same third switch signal line;

[0026] Preferably, the display panel further comprises: a fourth switch signal line; the second selection unit further comprises: a fourth transistor connected between the first input terminal and the output terminal of the second selection unit, the gate of the fourth transistor being connected to the fourth switch signal line; the fourth transistor and the second transistor have different channel types;

[0027] Preferably, the gates of all the fourth transistors are connected to the same fourth switch signal line;

[0028] Preferably, the channel type of the first transistor is different from that of the second transistor, and the first switch signal line is multiplexed as the second switch signal line, and / or the third switch signal line is multiplexed as the fourth switch signal line; or, the channel type of the first transistor is the same as that of the second transistor, and the first switch signal line is multiplexed as the fourth switch signal line, and / or the third switch signal line is multiplexed as the second switch signal line.

[0029] Optionally, the display panel further includes: a fifth switch signal line and a first auxiliary signal line, the second input end of the first selection unit is connected to the first auxiliary signal line; the first selection unit further includes: a fifth transistor, connected between the second input end and the output end of the first selection unit, the gate of the fifth transistor is connected to the fifth switch signal line; wherein the signal transmitted by the fifth switch signal line controls the fifth transistor to be turned on when the first transistor is turned off, and transmits the first fixed potential provided by the first auxiliary signal line to the display pixel circuit connected to the first selection unit, so that the display pixel circuit maintains the working state before the fifth transistor is turned on;

[0030] Preferably, the gates of all the fifth transistors are connected to the same fifth switch signal line;

[0031] Preferably, the display panel further includes: a sixth switch signal line; the first selection unit further includes: a sixth transistor connected between the second input terminal and the output terminal of the first selection unit, and the gate of the sixth transistor is connected to the sixth switch signal line; the channel types of the fifth transistor and the sixth transistor are different;

[0032] Preferably, the gates of all the sixth transistors are connected to the same sixth switch signal line;

[0033] Preferably, the fifth transistor has the same channel type as that of the first transistor, and the third switch signal line is multiplexed as the fifth switch signal line, and / or the first switch signal line is multiplexed as the sixth switch signal line; or, the fifth transistor has a different channel type from that of the first transistor, and the first switch signal line is multiplexed as the fifth switch signal line, and / or the third switch signal line is multiplexed as the sixth switch signal line.

[0034] Optionally, the display panel further includes: a seventh switch signal line and a second auxiliary signal line, the second input end of the second selection unit is connected to the second auxiliary signal line; the second selection unit further includes: a seventh transistor connected between the second input end and the output end of the second selection unit, the gate of the seventh transistor is connected to the seventh switch signal line; wherein the signal transmitted by the seventh switch signal line controls the seventh transistor to be turned on when the second transistor is turned off, and transmits the second fixed potential provided by the second auxiliary signal line to the fingerprint pixel circuit connected to the second selection unit, so as to control the fingerprint pixel circuit to stop reading the electrical signal related to fingerprint recognition;

[0035] Preferably, the gates of all the seventh transistors are connected to the same seventh switch signal line;

[0036] Preferably, the display panel further comprises: an eighth switch signal line; the second selection unit further comprises: an eighth transistor connected between the second input terminal and the output terminal of the second selection unit, the gate of the eighth transistor being connected to the eighth switch signal line; the seventh transistor and the eighth transistor have different channel types;

[0037] Preferably, the gates of all the eighth transistors are connected to the same eighth switch signal line;

[0038] Preferably, the channel type of the seventh transistor is the same as that of the second transistor, the fourth switch signal line is multiplexed as the seventh switch signal line, and / or the second switch signal line is multiplexed as the eighth switch signal line; or, the channel type of the seventh transistor is different from that of the second transistor, the second switch signal line is multiplexed as the seventh switch signal line, and / or the fourth switch signal line is multiplexed as the eighth switch signal line;

[0039] Preferably, the first auxiliary signal line is multiplexed as the second auxiliary signal line;

[0040] Preferably, the selection module further comprises: an inverter connected between the output end of the second selection unit and the fingerprint pixel circuit.

[0041] Optionally, the display pixel circuit comprises: a first driving transistor, a light emitting device, at least one light emitting control transistor and at least one switch transistor, wherein the first driving transistor, the light emitting control transistor and the light emitting device are connected in series, and the switch transistor is connected to the first driving transistor or the light emitting device;

[0042] The fingerprint pixel circuit comprises: a reset transistor, a second driving transistor, a reading transistor and a photosensitive device, wherein the reset transistor is respectively connected to the photosensitive device and the second driving transistor, and the second driving transistor is also connected to the reading transistor;

[0043] The selection circuit is connected to the switch transistor or the light emission control transistor, and is connected to the read transistor or the reset transistor.

[0044] Optionally, the number of the gate driving circuits is two, and the number of the selection circuits is two; the two selection circuits are respectively arranged corresponding to the two gate driving circuits;

[0045] One of the selection circuits connects the switch transistor and one of the light emission control transistors, and connects the reset transistor and one of the read transistors; the other selection circuit connects the switch transistor and the other of the light emission control transistors, and connects the reset transistor and the other of the read transistors.

[0046] In a second aspect, an embodiment of the present invention further provides a display device, comprising: a display panel as required by any embodiment of the present invention.

[0047] The display panel provided by the embodiment of the present invention can realize time-division multiplexing of the gate drive circuit by setting a selection circuit, and scan the display pixel circuit and the fingerprint pixel circuit in different time periods. The display pixel circuit and the fingerprint pixel circuit share the gate drive circuit, which can reduce the number of gate drive circuits required to drive various types of pixel circuits, which is beneficial to reduce the size of the display panel frame on the basis of ensuring the realization of the fingerprint recognition function. At the same time, by setting the scanning phase of the fingerprint pixel circuit to the full-screen light-emitting period of the display frame, the data writing phase of the display pixel circuit and the data reading phase of the fingerprint pixel circuit can be completely staggered, avoiding the mutual coupling interference between the two types of circuits caused by voltage jumps due to the simultaneous data transmission of the two types of pixel circuits, thereby ensuring the reliability of the operation of various types of pixel circuits.

[0048] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0050] Figure 1 It is a structural schematic diagram of a display pixel circuit in the related art;

[0051] Figure 2 It is a structural schematic diagram of a fingerprint pixel circuit in the related art;

[0052] Figure 3 It is a driving timing diagram of a display panel in the related art;

[0053] Figure 4 is a schematic structural diagram of a display panel provided by an embodiment of the present invention;

[0054] Figure 5 is a schematic structural diagram of another display panel provided by an embodiment of the present invention;

[0055] Figure 6 is a structural schematic diagram of another display panel provided by an embodiment of the present invention;

[0056] Figure 7 is a structural diagram of a selection module provided by an embodiment of the present invention;

[0057] Figure 8is a schematic diagram of the structure of another selection module provided by an embodiment of the present invention;

[0058] Fig. 9 is a structural diagram of another selection module provided by an embodiment of the present invention;

[0059] Fig.10 is a structural schematic diagram of another display panel provided by an embodiment of the present invention;

[0060] Fig.11 is a driving timing diagram of a display panel provided by an embodiment of the present invention;

[0061] Fig.12 is a structural schematic diagram of another display panel provided by an embodiment of the present invention;

[0062] Fig.13 is a structural schematic diagram of another display panel provided by an embodiment of the present invention;

[0063] Fig.14 This is a driving timing diagram of another display panel provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0064] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0065] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions.

[0066] For ease of explanation, let's first combine Figure 1-3 , briefly describes the display pixel circuit and its driving process, as well as the fingerprint pixel circuit and its driving process in the related art. Figure 1Taking the 7T1C architecture as an example, the components in the display pixel circuit may include: a first driving transistor M11, a data writing transistor M12, a threshold compensation transistor M13, a first initialization transistor M14, a first light emission control transistor M15, a second light emission control transistor M16, a second initialization transistor M17, a storage capacitor Cst and a light emitting device OLED. The signals required to drive the display pixel circuit include: a first scanning signal S1, a second scanning signal S2, a third scanning signal S3, a light emission control signal EM, a first initialization signal Vref1, a second initialization signal Vref2, a first power signal VDD and a second power signal VSS.

[0067] Combination Figure 1 and Figure 3 , taking the transistors in the display pixel circuit as P-type transistors as an example, the driving process of the display pixel circuit includes: the first reset stage T1, the first scan signal S1 is low potential, the first initialization transistor M14 is turned on, and the first initialization signal Vref1 resets the gate of the first drive transistor M11 through the first initialization transistor M14. In the data writing stage T2, the second scan signal S2 is low potential, and the data writing transistor M12 and the threshold compensation transistor M13 are both turned on. The data signal Vdata is transmitted to the gate of the first drive transistor M11 through the data writing transistor M12, the first and second electrodes of the first drive transistor M11, and the threshold compensation transistor M13. In the second reset stage T3, the third scan signal S3 is low potential, the second initialization transistor M17 is turned on, and the second initialization signal Vref2 resets the anode of the light-emitting device OLED through the second initialization transistor M17. Exemplarily, the second reset stage T13 can overlap with the data writing stage T2 or the first reset stage T1, and the first scan signal S1 or the second scan signal S2 can be multiplexed into the third scan signal S3. In the light emitting stage T4, the light emitting control signal EM is at a low potential, the first light emitting control transistor M15 and the second light emitting control transistor M16 are both turned on, and the first driving transistor M11 generates a driving current to drive the light emitting device OLED to emit light.

[0068] See also Figure 2 Taking the 3T APS (active pixel sensor) architecture as an example, the components in the fingerprint pixel circuit may include: reset transistor M23, second drive transistor M22, read transistor M21 and photosensitive device D. The signals required to drive the fingerprint pixel circuit include: reset control signal Treset, read control signal Tread, reset signal Vreset, first power signal VDD and second power signal VSS. Among them, the second drive transistor M22 constitutes a source follower, which converts the cathode voltage of the photosensitive device D into a read voltage Vread output.

[0069] Combination Figure 2 and Figure 3 , taking the transistors in the fingerprint pixel circuit as N-type transistors as an example, the driving process of the fingerprint pixel circuit includes: reset stage T5, the reset control signal Treset is high, the reset transistor M23 is turned on, and the reset signal Vreset resets the cathode of the photosensitive device D (for example, a photodiode) through the reset transistor M23, so that the photosensitive device D is reverse biased. The first reading stage T6, the reset control signal Treset is low, the reset transistor M23 is turned off to make the cathode of the photosensitive device D float; the reading control signal Tread is high, the reading transistor M21 is turned on to output the reading voltage Vread, and the reading voltage Vread at this time can be used as an initial reference value. Exposure stage T7, the reset control signal Treset and the reading control signal Tread are both low, the cathode of the photosensitive device D remains in a floating state, when the photosensitive device D is illuminated, the charge on the PN junction capacitor of the photosensitive device D changes, so that the cathode potential of the photosensitive device D changes; the voltage output by the second driving transistor M22 follows the cathode voltage change of the photosensitive device D. In the second reading stage T8, the reading control signal Tread is at a high potential, and the reading transistor M21 is turned on to output the reading voltage Vread. The reading voltage Vread at this time is the voltage after exposure. Under the same exposure time, the charge amount in the photosensitive device D changes to different degrees under different light intensities, resulting in different reading voltages Vread after exposure. The difference in reading voltages Vread before and after exposure in each fingerprint pixel circuit can be used to determine the light intensity at different locations, thereby distinguishing the ridges and valleys of the fingerprint and realizing fingerprint recognition.

[0070] See also Figure 3 Taking 60Hz display as an example, the duration TF1 of a display frame of the display pixel circuit needs to be 16.7ms. For fingerprint recognition, in order to provide sufficient exposure time, the duration TF2 of a fingerprint recognition frame of the fingerprint pixel circuit needs to reach 40-50ms, or even 90-120ms. In the related technology, an additional gate drive circuit is added to scan each row of fingerprint pixel circuits, so that the fingerprint row scan and the display row scan are driven independently, which increases the size of the display panel frame. For the convenience of comparison, Figure 3 The driving timing of the display pixel circuits in the nth row and the n+1th row, and the driving timing of the fingerprint pixel circuits in the mth row and the m+1th row are provided in FIG. Figure 3 It can be seen from the shaded part in the figure that in the related art, there is a time overlap between the data writing phase T2 of some rows of display pixel circuits and a certain reading phase of some rows of fingerprint pixel circuits. The data line (used to transmit the data signal Vdata) and the read line (used to transmit the read voltage Vread) transmit voltage at the same time, which can easily cause the fingerprint and display pixel circuits to couple and interfere with each other.

[0071] In order to solve the above technical problem, an embodiment of the present invention provides a display panel. Figure 4 is a schematic diagram of the structure of a display panel provided by an embodiment of the present invention. Figure 4 The display panel includes: a plurality of display pixel circuits 30, a plurality of fingerprint pixel circuits 40, a gate driving circuit 100 and a selection circuit 200. The display pixel circuit 30 and the fingerprint pixel circuit 40 can adopt any existing architecture. For the convenience of explanation, the following is Figure 1 and Figure 2 The display pixel circuit 30 and the fingerprint pixel circuit 40 can be arranged in the display area AA of the display panel, and the gate driving circuit 100 and the selection circuit 200 can be arranged in the non-display area NAA of the display panel.

[0072] The selection circuit 200 is respectively connected to the gate drive circuit 100, at least part of the display pixel circuits 30 and each fingerprint pixel circuit 40. The selection circuit 200 is used to control the gate drive circuit 100 to communicate with each display pixel circuit 30 during the row-by-row scanning period of each display frame, so as to drive each display pixel circuit 30 to perform display row scanning; and the selection circuit 200 is used to control the gate drive circuit 100 to communicate with each fingerprint pixel circuit 40 during the full-screen light-emitting period of at least part of the display frame, so as to drive each fingerprint pixel circuit 40 to perform fingerprint row scanning. It can be understood that when the selection circuit 200 is connected to part of the display pixel circuits 30, other display pixel circuits 30 can be directly connected to the gate drive circuit 100. During the row-by-row scanning period of each display frame, the selection circuit 200 controls each display pixel circuit 30 connected thereto to be connected to the gate drive circuit 100.

[0073] Among them, for any display pixel circuit 30, the stage except the light-emitting stage T4 in a display frame can be called the scanning stage of the display pixel circuit 30; the scanning stage of the display pixel circuit 30 includes the first reset stage T1, the data writing stage T2 and the second reset stage T3. A plurality of display drive gate lines LDP can also be arranged in the display panel, respectively connected to each row of display pixel circuits 30, and connected to the selection circuit 100. The display pixel circuits 30 in the same row are connected to the same drive signal through the display drive gate line LDP, and the scanning stage of the display pixel circuits 30 in the same row is carried out simultaneously, and the scanning stage of each row of display pixel circuits 30 is carried out row by row. In a display frame, the period from the start of the scanning stage of the display pixel circuit 30 in the first row to the end of the scanning stage of the display pixel circuit 30 in the last row can be called the row-by-row scanning period of the display frame; in a display frame, the period when all rows of display pixel circuits 30 are in the light-emitting stage is called the full-screen light-emitting period of the display frame; a display frame can be composed of a row-by-row scanning period and a full-screen light-emitting period. It can be understood that after the scanning phase of any row of display pixel circuits 30 is completed, the light-emitting phase T4 of the display pixel circuits 30 of the row can be entered, and the start time of the light-emitting phase T4 of the display pixel circuits 30 of the current row can be earlier than the end time of the scanning phase of the display pixel circuits 30 of the next row; in other words, the light-emitting phase T4 of each row of display pixel circuits 30 also starts row by row. In any display frame, when the light-emitting phase T4 of the last row of display pixel circuits 30 starts, the full-screen light-emitting period begins; the full-screen light-emitting period may include the period between the start time of the light-emitting phase T4 of the last row of display pixel circuits 30 and the end time of the light-emitting phase T4 of the first row of display pixel circuits 30. Exemplarily, the display drive gate line LDP can be used to transmit any one of the first scanning signal S1, the second scanning signal S2, the third scanning signal S3 and the light-emitting control signal EM.

[0074] For any fingerprint pixel circuit 40, the stage other than the exposure stage T7 in a fingerprint recognition frame can be called the scanning stage of the fingerprint pixel circuit 40; for the convenience of explanation, the second reading stage T8 of the fingerprint pixel circuit 40 in the previous fingerprint recognition frame and the reset stage T5 and the first reading stage T6 in the current fingerprint recognition frame are regarded as the scanning stage of the fingerprint pixel circuit 40. A plurality of fingerprint recognition drive gate lines LFP can also be arranged in the display panel, which are respectively connected to each row of fingerprint pixel circuits 40 and connected to the selection circuit 100. The fingerprint pixel circuits 40 in the same row are connected to the same drive signal through the fingerprint recognition drive gate line LFP, and the scanning stage of the fingerprint pixel circuits 40 in the same row is carried out simultaneously, and the scanning stage of the fingerprint pixel circuits 40 in each row is carried out row by row. Exemplarily, the fingerprint recognition drive gate line LFP can be used to transmit any one of the reset control signal Treset and the read control signal Tread.

[0075] By selecting the circuit 200 to control the gate drive circuit 100 to be connected to each display drive gate line LDP and each fingerprint recognition drive gate line LFP in time-sharing mode, the gate drive circuit 100 can be multiplexed in time-sharing mode to meet the scanning drive requirements of the display pixel circuit 30 and the fingerprint pixel circuit 40. By performing the scanning of each fingerprint pixel circuit 40 during the full-screen light-emitting period of at least part of the display frame, it is not necessary to provide additional time for scanning each fingerprint pixel circuit 40 line by line, so that the introduction of the fingerprint recognition function does not affect the original display function of the display panel. It can be understood that Figure 3 For clear marking, the timing of each stage is scaled and adjusted, which does not represent the actual time period length and duration ratio. In actual applications, the light-emitting stage T4 occupies most of the time period in the display frame, the exposure stage T7 occupies most of the time period in the fingerprint recognition frame, and the scanning stage of the display pixel circuit 30 and the fingerprint pixel circuit 40 is not long. Therefore, the scanning stage of each row of fingerprint pixel circuits 40 can be completed in the full-screen light-emitting period of a display frame; the first reading stage T6 and the second reading stage T8 of the fingerprint pixel circuit 40 in the same fingerprint recognition frame can be located in the full-screen scanning period of different display frames.

[0076] The display panel provided by the embodiment of the present invention can realize time-division multiplexing of the gate drive circuit 100 by setting the selection circuit 200, and scan the display pixel circuit 30 and the fingerprint pixel circuit 40 in different time periods. The display pixel circuit 30 and the fingerprint pixel circuit 40 share the gate drive circuit 100, which can reduce the number of gate drive circuits required to drive various types of pixel circuits, which is conducive to reducing the size of the display panel frame on the basis of ensuring the realization of the fingerprint recognition function. At the same time, by setting the scanning phase of the fingerprint pixel circuit 40 in the full-screen light-emitting period of the display frame, the data writing phase of the display pixel circuit 30 and the data reading phase of the fingerprint pixel circuit 40 can be completely staggered, avoiding the voltage jump caused by the simultaneous data transmission of the two types of pixel circuits, resulting in mutual coupling interference between the two types of circuits, and ensuring the reliability of the operation of various types of pixel circuits.

[0077] Continue to see Figure 4On the basis of the above embodiments, optionally, the gate drive circuit 100 includes: a multi-stage shift register 10 arranged in cascade. Among them, the input end of the first-stage shift register 10 can be connected to a start signal line, and the input ends of the remaining stages of the shift register 10 are connected to the output end of the previous stage of the shift register 10; the shift registers 10 at each stage are used to shift and output the signal transmitted by the above-mentioned start signal line step by step. The selection circuit 200 includes: a plurality of selection modules 20, which are arranged corresponding to at least part of the shift registers 10. Among them, each selection module 20 includes: a first selection unit 21, the first input end of the first selection unit 21 is connected to the output end of the shift register 10 corresponding to the selection module 20, and the output end of a first selection unit 21 is connected to at least one row of display pixel circuits 30, for example, the display pixel circuits 30 are connected through the display drive gate line LDP. At least part of the selection module 20 includes: a second selection unit 22, the first input end of the second selection unit 22 is connected to the shift register 10 corresponding to the selection module 20, the output end of one second selection unit 22 is correspondingly connected to a row of fingerprint pixel circuits 40, and the second selection unit 22 is at least set in a one-to-one correspondence with each row of fingerprint pixel circuits 40. When it is necessary to scan the display pixel circuit 30, the first input end and the output end of each first selection unit 21 can be controlled to be connected at the same time, and the first input end and the output end of each second selection unit 22 can be controlled to be disconnected at the same time. When it is necessary to scan the fingerprint pixel circuit 40, the first input end and the output end of each first selection unit 21 can be controlled to be disconnected at the same time, and the first input end and the output end of each second selection unit 22 can be controlled to be connected at the same time; wherein, the time period when the first input end and the output end of each second selection unit 22 are connected are all in the full-screen light-emitting period.

[0078] Based on the above embodiments, there are optionally multiple specific configurations of the selection circuit 100 , several of which are exemplarily described below, but are not intended to limit the present invention.

[0079] See also Figure 4 In one embodiment, optionally, the number of selection modules 20 in the selection circuit 200 is the same as the number of shift registers 10 in the gate driving circuit 100, and a second selection unit 22 is provided in each selection module 20 connected to each row of fingerprint pixel circuits 40.

[0080] The number of rows of the fingerprint pixel circuit 40 may be equal to the number of stages of the shift register 10 in the gate drive circuit 100. The fingerprint pixel circuit 40 may be arranged in the entire display area AA, for example, arranged in an array in the entire display area AA, so that the fingerprint recognition function may be configured at any position in the display area AA as required. In this case, each selection module 20 includes a first selection unit 21 and a second selection unit 22.

[0081] Alternatively, see Figure 5 , the number of rows of the fingerprint pixel circuit 40 may be less than the number of stages of the shift register 10 in the gate drive circuit 100. The display panel may include at least one fingerprint identification area AFI arranged in the display area AA, and only the fingerprint identification area AFI is provided with the fingerprint pixel circuit 40, and other areas in the display area AA are not provided with the fingerprint pixel circuit 40. In this case, all the selection modules 20 include the first selection unit 21, and some of the selection modules 20 include the second selection unit 22. Specifically, each selection module 20 that needs to be connected to the fingerprint pixel circuit 40 may include the second selection unit 22.

[0082] Figure 6 FIG. 1 is a schematic diagram of the structure of another display panel provided by an embodiment of the present invention. Figure 6 In another embodiment, optionally, the number of rows of fingerprint pixel circuits 40 is less than the number of stages of shift registers 10 in the gate drive circuit 100; the number of selection modules 20 in the selection circuit 200 is the same as the number of rows of fingerprint pixel circuits 40, and is also less than the number of stages of shift registers 10 in the gate drive circuit 100, and each selection module 20 is provided with a second selection unit 22. That is, the selection module 20 is arranged in a one-to-one correspondence with each row of fingerprint pixel circuits 40. In this case, the display panel includes at least one fingerprint identification area AFI, and a fingerprint identification area AFI includes multiple rows of fingerprint pixel circuits 40. The multiple rows of fingerprint pixel circuits 40 in the same fingerprint identification area AFI correspond to continuous multi-stage shift registers 10, and the above-mentioned continuous multi-stage shift registers 10 constitute a shift register group 101. That is, the gate drive circuit 100 includes the same number of shift register groups 101 as the number of fingerprint identification areas AFI; one shift register group 101 corresponds to one fingerprint identification area AFI. This arrangement can reduce the number of selection modules 20, simplify the structure of the display panel, and further reduce the frame size of the display panel.

[0083] Among them, when the shift register group 101 is connected to the previous stage shift register 10, that is, the first stage shift register 10 in the shift register group 101 is not the first stage shift register 10 in the gate drive circuit 100: a first switch unit 51 is provided between the input end of the first stage shift register 10 in the shift register group 101 and the output end of the previous stage shift register 10, so as to control whether the signal level transmission is performed between the two stages of shift registers 10 by turning on and off the first switch unit 51. In addition, the input end of the first stage shift register 10 in the shift register group 101 is also connected to a start signal line LSTV through the second switch unit 52, so as to control whether the first stage shift register 10 in the shift register group 101 is connected to a separate start signal by turning on and off the second switch unit 52. It can be understood that the first stage shift register 10 in the gate drive circuit 100 needs to be connected to a corresponding start signal line LSTV, and the first stage shift register 10 in each shift register group 101 also needs to be connected to a corresponding start signal line LSTV.

[0084] Among them, during the line-by-line scanning period of each display frame, the first switch unit 51 can be controlled to be turned on and the second switch unit 52 can be turned off to realize the cascade connection of the shift registers 10 at each level, so as to realize the line-by-line scanning of each row of display pixel circuits 30. Alternatively, during the line-by-line scanning period of each display frame, the first switch unit 51 can be controlled to be turned off and the second switch unit 52 can be turned on, and the first-stage shift register 10 in the gate drive circuit 100 and the first-stage shift register 10 in each shift register group 101 can obtain the corresponding start signal through the correspondingly connected start signal line LSTV. As long as the transmission timing of each start signal is controlled well, the same output effect as when all the shift registers 10 in the gate drive circuit 100 are cascaded can be achieved.

[0085] During the full-screen light-emitting period of at least part of the display frame, that is, during the full-screen light-emitting period of the display frame that requires scanning of each fingerprint pixel circuit 40 in any fingerprint identification area AFI, the first switch unit 51 connected to the shift register group 101 corresponding to the fingerprint identification area AFI can be controlled to be turned off, and the second switch unit 52 can be turned on, so that the shift register group 101 is connected to the corresponding start signal line LSTV to receive the start signal related to fingerprint identification. It can be understood that at least part of the display frame includes: all display frames involved when each fingerprint pixel circuit 40 in all fingerprint identification areas AFI needs to be scanned, which can occupy part or all of the display frames when the display pixel circuit 30 is displaying. During the full-screen light-emitting period of the above-mentioned display frame, other shift registers 10 in the gate drive circuit 100 continue to output a potential that can control the display pixel circuit 30 to maintain a light-emitting state. For example, the light-emitting control signal EM can maintain a conduction potential (such as Figure 3 is a low potential), each scanning signal can maintain a cut-off potential (such as Figure 3 (middle is high potential).

[0086] Further, when the shift register group 101 is connected to the subsequent shift register 10, that is, the last shift register 10 in the shift register group 101 is not the last shift register 10 in the gate drive circuit 100: a third switch unit 53 is provided between the output end of the last shift register 10 in the shift register group 101 and the input end of the subsequent shift register 10. Whether the signal level transmission is performed between the two shift registers 10 can be controlled by turning on and off the third switch unit 53. Exemplarily, each switch unit can be composed of a switch device with controllable switching state, such as a transistor.

[0087] In the row-by-row scanning period of each display frame, the third switch unit 53 can be controlled to be turned on to realize the cascade of the shift registers 10 at each level. In the full-screen luminous period of at least part of the display frame, that is, in the full-screen luminous period of the display frame that requires the scanning of each fingerprint pixel circuit 40 in any fingerprint identification area AFI, the third switch unit connected to the shift register group 101 corresponding to the fingerprint identification area AFI can be controlled to be turned off, so as to prevent the subsequent shift registers 10 from shifting and outputting the gate drive signal required by the fingerprint pixel circuit 40, thereby affecting the normal display of the connected display pixel circuit 30.

[0088] On the basis of the above embodiments, optionally, for the two types of pixel circuits, the display pixel circuit 30 and the fingerprint pixel circuit 40, in order to prevent the gate line potential of one type of pixel circuit from floating when the gate driving circuit 100 is connected to the gate line of the other type of pixel circuit, an auxiliary signal line may be further provided in the display panel to provide a fixed potential to the gate line of the pixel circuit not connected to the gate driving circuit 100. This is described in detail below.

[0089] Figure 7 is a schematic diagram of the structure of a selection module provided by an embodiment of the present invention. Figure 7 On the basis of the above embodiments, optionally, the first selection unit 21 includes a second input terminal N12 connected to the first auxiliary signal line LZ1. When the first input terminal N11 of the first selection unit 21 is disconnected from the output terminal NO1, the second input terminal N12 of the first selection unit 21 can be controlled to be connected to the output terminal NO1, so that the first selection unit 21 provides the first fixed potential transmitted by the first auxiliary signal line LZ1 to the connected display pixel circuit 30, so that the display pixel circuit 30 maintains the light-emitting state. When the gate drive circuit 100 is used to provide the light-emitting control signal EM, the first fixed potential can be the on-state potential of the light-emitting control signal EM; when the gate drive circuit 100 is used to provide any scanning signal, the first fixed potential can be the off-state potential of the scanning signal.

[0090] And / or, the second selection unit 22 includes a second input terminal N22 connected to the second auxiliary signal line LZ2. When the first input terminal N21 of the second selection unit 22 is disconnected from the output terminal NO2, the second input terminal N22 of the second selection unit 22 can be controlled to be connected to the output terminal NO2, so that the second selection unit 22 provides the second fixed potential transmitted by the second auxiliary signal line LZ2 to the connected fingerprint pixel circuit 40, so that the fingerprint pixel circuit 40 stops reading the electrical signal (reading voltage Vread) related to fingerprint identification, and maintains a state of not reading the reading voltage Vread, such as being in the exposure stage. Wherein, when the gate drive circuit 100 is used to provide the reset control signal Treset, the second fixed potential can be the cut-off potential of the reset control signal Treset; when the gate drive circuit 100 is used to provide the read control signal Tread, the second fixed potential can be the cut-off potential of the read control signal Tread.

[0091] Continue to see Figure 7 On the basis of the above embodiments, optionally, the selection module 20 further includes: an inverter 23, connected between the output terminal NO2 of the second selection unit 22 and the fingerprint pixel circuit 40. Considering that the gate drive circuit 100 is originally a drive circuit for providing a gate drive signal to the display pixel circuit 30, the corresponding relationship between the gate drive signals required by the display pixel circuit 30 and the fingerprint pixel circuit 40 is different, the flexibility of the selection circuit application can be effectively improved by adding the inverter 23. In practical applications, whether the inverter 23 is included in the selection module 20 can be set as needed. When the inverter 23 is included in the selection module 20, the second fixed potential can be adjusted to the on-state potential of the reset control signal Treset or the read control signal Tread accordingly.

[0092] On the basis of the above embodiments, optionally, when the first fixed potential and the second fixed potential have the same value, the first auxiliary signal line LZ1 can be multiplexed as the second auxiliary signal line LZ2 to simplify the display panel wiring and facilitate the realization of a narrow frame.

[0093] The working principle of the selection module 20 is exemplarily given in the above-mentioned embodiments. The specific structure that the selection module 20 may have is exemplarily described below.

[0094] Figure 8 FIG. 1 is a schematic diagram of another structure of a selection module provided by an embodiment of the present invention. Figure 8In one embodiment, optionally, the display panel includes: a first switch signal line L1 and a second switch signal line L2. The first selection unit 21 includes: a first transistor M1; the second selection unit 22 includes: a second transistor M2. The first transistor M1 is connected between the first input terminal and the output terminal of the first selection unit 21, and the gate of the first transistor M1 is connected to the first switch signal line L1. The second transistor M2 is connected between the first input terminal and the output terminal of the second selection unit 22, and the gate of the second transistor M2 is connected to the second switch signal line L2.

[0095] The conduction states of the first transistor M1 and the second transistor M2 are opposite, and at the same time, only one of the first transistor M1 and the second transistor M2 is turned on. When the channel types of the first transistor M1 and the second transistor M2 are the same, the signals transmitted by the first switch signal line L1 and the second switch signal line L2 can be controlled to be inverted signals. When the channel types of the first transistor M1 and the second transistor M2 are different, the first switch signal line L1 can be reused as the second switch signal line L2 to simplify the panel wiring, which is conducive to the realization of a narrow frame.

[0096] Furthermore, the display panel may further include: a third switch signal line L3; the first selection unit 21 may further include: a third transistor M3. The third transistor M3 is connected between the first input terminal and the output terminal of the first selection unit 21, which is equivalent to being connected in parallel with the first transistor M1, and the gate of the third transistor M3 is connected to the third switch signal line L2. Among them, the channel type of the third transistor M3 is different from that of the first transistor M1, and the signals transmitted by the first switch signal line L1 and the third switch signal line L3 are mutually inverted signals. In this way, the third transistor M3 and the first transistor M1 form a transmission gate, which can effectively improve the signal transmission capability between the first input terminal and the output terminal of the first selection unit 21, so that signals of various voltage values ​​can be transmitted losslessly.

[0097] And / or, the display panel further includes: a fourth switch signal line L4; the second selection unit 22 further includes: a fourth transistor M4. The fourth transistor M4 is connected between the first input terminal and the output terminal of the second selection unit 22, which is equivalent to being connected in parallel with the second transistor M2, and the gate of the fourth transistor M4 is connected to the fourth switch signal line L4. The channel type of the fourth transistor M4 is different from that of the second transistor M2; the signals transmitted by the second switch signal line L2 and the fourth switch signal line L4 are mutually inverted signals. The fourth transistor M4 and the second transistor M2 constitute a transmission gate, which can effectively improve the signal transmission capability between the first input terminal and the output terminal of the second selection unit 22.

[0098] On the basis of the above embodiments, optionally, when the channel types of the first transistor M1 and the second transistor M2 are different, the first switch signal line L1 can be multiplexed as the second switch signal line L2, and / or the third switch signal line L3 can be multiplexed as the fourth switch signal line L4. When the channel types of the first transistor M1 and the second transistor M2 are the same, the first switch signal line L1 can be multiplexed as the fourth switch signal line L4, and / or the third switch signal line L3 can be multiplexed as the second switch signal line L2.

[0099] On the basis of the above embodiments, optionally, the display panel may further include: a fifth switch signal line L5; the first selection unit 21 further includes: a fifth transistor M5. The fifth transistor M5 is connected between the second input terminal and the output terminal of the first selection unit 21, and the gate of the fifth transistor M5 is connected to the fifth switch signal line L5. The conduction state of the fifth transistor M5 is opposite to that of the first transistor M1. For example, the signal transmitted by the fifth switch signal line L5 controls the fifth transistor M5 to be turned on when the first transistor M1 is turned off, and transmits the first fixed potential provided by the first auxiliary signal line LZ1 to the display pixel circuit 30 connected to the first selection unit 21, so that the display pixel circuit 30 maintains the working state before the fifth transistor M5 is turned on.

[0100] Furthermore, the display panel further includes: a sixth switch signal line L6; the first selection unit 21 further includes: a sixth transistor M6. The sixth transistor M6 is connected between the second input terminal and the output terminal of the first selection unit 21, which is equivalent to being connected in parallel with the fifth transistor M5, and the gate of the sixth transistor M6 is connected to the sixth switch signal line L6. Among them, the channel types of the fifth transistor M5 and the sixth transistor M6 are different; the signals transmitted by the fifth switch signal line L5 and the sixth switch signal line L6 are mutually inverted signals. In this way, the fifth transistor M5 and the sixth transistor M6 constitute a transmission gate, which can effectively improve the signal transmission capability between the second input terminal and the output terminal of the first selection unit 21.

[0101] When the fifth transistor M5 has the same channel type as the first transistor M1, the third switch signal line L3 may be multiplexed as the fifth switch signal line L5, and / or the first switch signal line L1 may be multiplexed as the sixth switch signal line L6. When the fifth transistor M5 has a different channel type from the first transistor M1, the first switch signal line L1 may be multiplexed as the fifth switch signal line L5, and / or the third switch signal line L3 may be multiplexed as the sixth switch signal line L6.

[0102] On the basis of the above embodiments, optionally, the display panel further includes: a seventh switch signal line L7, and the second selection unit 22 further includes: a seventh transistor M7. The seventh transistor M7 is connected between the second input terminal and the output terminal of the second selection unit 22, and the gate of the seventh transistor M7 is connected to the seventh switch signal line L7. Among them, the conduction state of the seventh transistor M7 is opposite to that of the second transistor M2. For example, the signal transmitted by the seventh switch signal line L7 controls the seventh transistor M7 to turn on when the second transistor M2 is turned off, and transmits the second fixed potential provided by the second auxiliary signal line LZ2 to the fingerprint pixel circuit 40 connected to the second selection unit 22, and controls the fingerprint pixel circuit 40 to stop reading the electrical signal related to fingerprint recognition.

[0103] Furthermore, the display panel further includes: an eighth switch signal line L8; the second selection unit 22 further includes: an eighth transistor M8. The eighth transistor M8 is connected between the second input terminal and the output terminal of the second selection unit 22, which is equivalent to being connected in parallel with the seventh transistor M7, and the gate of the eighth transistor M8 is connected to the eighth switch signal line L8. Among them, the channel types of the seventh transistor M7 and the eighth transistor M8 are different, and the signals transmitted by the seventh switch signal line L7 and the eighth switch signal line L8 are mutually inverted signals. In this way, the seventh transistor M7 and the eighth transistor M8 constitute a transmission gate, which can effectively improve the signal transmission capability between the second input terminal and the output terminal of the second selection unit 22.

[0104] When the channel type of the seventh transistor M7 is the same as that of the second transistor M2, the fourth switch signal line L4 may be multiplexed as the seventh switch signal line L7, and / or the second switch signal line L2 may be multiplexed as the eighth switch signal line L8. When the channel type of the seventh transistor M7 is different from that of the second transistor M2, the second switch signal line L2 may be multiplexed as the seventh switch signal line L7, and / or the fourth switch signal line L4 may be multiplexed as the eighth switch signal line L8.

[0105] On the basis of the above embodiments, the channel type of each transistor in the selection module 20 can be configured reasonably, and the multiplexing between each signal line can be set reasonably, so as to realize the selection function of the selection circuit 200 with the least number of signal lines, which can simplify the display panel wiring and control logic, and reduce the adjustment of the transmission speed and synchronization of different signal lines. Fig. 9, the first transistor M1, the fifth transistor M5, the fourth transistor M4 and the eighth transistor M8 can be set to the same channel type, for example, a P-type transistor; and the third transistor M3, the sixth transistor M6, the second transistor M2 and the seventh transistor M7 can be set to another channel type, for example, an N-type transistor. Accordingly, the first switch signal line L1 can be multiplexed into the sixth switch signal line, the second switch signal line and the eighth switch signal line, and the third switch signal line L3 can be multiplexed into the fifth switch signal line, the fourth switch signal line and the seventh switch signal line. And, the first auxiliary signal line LZ1 can be multiplexed into the second auxiliary signal line.

[0106] On the basis of the above embodiments, optionally, the gates of transistors used to realize the same function in all selection modules 20 are connected to the same switch signal line, and the signals transmitted by each switch signal line are global signals, which can simplify the panel wiring. Specifically, the gates of all first transistors M1 are connected to the same first switch signal line L1, the gates of all second transistors M2 are connected to the same second switch signal line L2, the gates of all third transistors M3 are connected to the same third switch signal line L3, the gates of all fourth transistors M4 are connected to the same fourth switch signal line L4, the gates of all fifth transistors M5 are connected to the same fifth switch signal line L5, the gates of all sixth transistors M6 are connected to the same sixth switch signal line L6, the gates of all seventh transistors M7 are connected to the same seventh switch signal line L7, and the gates of all eighth transistors M8 are connected to the same eighth switch signal line L8.

[0107] The specific structure and working mode of the selection circuit 200 are exemplarily given in the above-mentioned embodiments. The type of the gate driving circuit 100 and the specific connection relationship with various pixel circuits are exemplarily described below.

[0108] In one embodiment, optionally, the display pixel circuit 30 includes: a first driving transistor, a light emitting device, at least one light emitting control transistor and at least one switch transistor. The first driving transistor, the light emitting control transistor and the light emitting device are connected in series, and the switch transistor is connected to the first driving transistor or the light emitting device. Specifically, there is a series relationship between the first driving transistor and the source and drain, and the source and drain of the light emitting control transistor; the source / drain of the switch transistor can be connected to the source, drain, gate of the first driving transistor or the anode of the light emitting device. Figure 1 As shown, the light emission control transistor can be any one of the first light emission control transistor M15 and the second light emission control transistor M16; the switch transistor can be any one of the data writing transistor M12, the threshold compensation transistor M13, the first initialization transistor M14 and the second initialization transistor M17.

[0109] See also Figure 2 The fingerprint pixel circuit 40 includes: a reset transistor M23, a second driving transistor M22, a read transistor M21 and a photosensitive device D. The reset transistor M23 is connected to the photosensitive device D and the second driving transistor M22 respectively, and the second driving transistor M22 is also connected to the read transistor M21. The selection circuit 200 can be connected to the gate of at least one switching transistor or the gate of at least one light emitting control transistor in the display pixel circuit 30, and connected to the gate of the read transistor M21 or the gate of the reset transistor M23 in the fingerprint pixel circuit 40.

[0110] Fig.10 FIG. 1 is a schematic diagram of the structure of another display panel provided by an embodiment of the present invention. Fig.10 In one embodiment, optionally, the gate driving circuit is a light emitting control driving circuit, the shift register is a light emitting control shift register EM GIP, and the output end of the first selection unit 21 is connected to the gates of the two light emitting control transistors in the display pixel circuit 30. At this time, the output end of the second selection unit 22 can be set to be connected to the gate of the reset transistor M23 of the fingerprint pixel circuit 40. Taking the above-mentioned light emitting control transistors as P-type transistors and the reset transistor M23 as an N-type transistor as an example, the first fixed potential transmitted by the first auxiliary signal line LZ1 can be set to be a low voltage signal VGL.

[0111] Combination Fig.10 and Fig.11 , the signal transmitted by the first switch signal line L1 is recorded as the first switch signal EN, and the signal transmitted by the third switch signal line L3 is recorded as the second switch signal EN'. Since the first switch signal EN and the second switch signal EN' are mutually inverted signals, Fig.11 The waveform of the first switch signal EN is only given as an example, and the second switch signal EN′ is completely opposite to the first switch signal EN, which will not be described in detail.

[0112] Fig.11 The driving timing in a display frame is given as an example, and the gate driving signal EOUT1 output by the first-stage light emitting control shift register EM GIP is given. Fig.10 and Fig.11, by controlling the working state of the switch circuit 200 through the first switch signal EN and the second switch signal EN', and cooperating with the output timing of the light-emitting control driving circuit, the row scanning of the display pixel circuit 30 and the row scanning of the fingerprint pixel circuit can be realized in time division. Specifically, the first switch signal EN can be set as the on-potential of the transistor connected to it in the row-by-row scanning period TS, which is exemplarily a low potential here, so that each light-emitting control shift register EM GIP is connected to the corresponding row display pixel circuit 30, so that each row display pixel circuit 30 receives the high potential pulse of the light-emitting control signal EM row by row; in this period, the reset control signal Treset received by each fingerprint pixel circuit 40 maintains the low potential of the low voltage signal VGL. At any time point in the full-screen light-emitting period TE, the first switch signal EN can be controlled to jump to the cut-off potential of the transistor connected to it, which is exemplarily a high potential here, and preferably, the first switch signal EN is controlled to jump to the potential at a time point close to the start of the full-screen light-emitting period TE, so as to reserve enough time for the row scanning of each fingerprint pixel circuit 40. When the first switch signal EN jumps to the cut-off potential of the transistor connected to it, each light-emitting control shift register EM GIP is connected to the corresponding row fingerprint pixel circuit 40, so that each row fingerprint pixel circuit 40 receives the high potential pulse of the reset control signal Treset row by row; during this period, the light-emitting control signal EM received by each display pixel circuit 30 maintains the low potential of the low voltage signal VGL. Among them, the high potential pulse of the first-level gate drive signal EOUT1 in the row-by-row scanning period TS corresponds to the high potential pulse of the first-level light-emitting control signal EM, and the high potential pulse in the full-screen light-emitting period TE corresponds to the high potential pulse of the first-level reset control signal Treset; the other levels of gate drive signals are similar and will not be repeated. It can be understood that the first-level light-emitting control signal EM can be provided to one or more rows of display pixel circuits 30, which is not specifically limited here.

[0113] Fig.12 is a schematic diagram of the structure of another display panel provided by an embodiment of the present invention, which may correspond to Fig.10 The overall structure of the panel showing the connection relationship. Fig.12, exemplarily, the display panel also includes: a scan drive circuit 500, which is composed of a multi-stage scan shift register 50 connected in cascade, and is used to provide each scan signal required by each display pixel circuit 30. Exemplarily, the output signal of the same level scan shift register 50 is used as the second scan signal S2 and the third scan signal S3 of a row of display pixel circuits 30, and as the first scan signal S1 of the next row of display pixel circuits 30, but this is not a limitation of the present invention, and the specific connection method can be adjusted according to actual needs. And, the display panel also includes: a read control drive circuit 600, which is composed of a multi-stage read shift register 60 connected in cascade, and is used to provide the read control signal Tread required by each fingerprint pixel circuit 40. It can be understood that, Fig.12 It mainly reflects the connection relationship between various driving circuits and various pixel circuits, and omits the cascade relationship between various shift registers.

[0114] Fig.13 FIG. 1 is a schematic diagram of the structure of another display panel provided by an embodiment of the present invention. Fig.13 In another embodiment, optionally, the gate drive circuit is a scan drive circuit, the shift register is a scan shift register SCANGIP, and the output end of the first selection unit 21 is connected to the gate of the first initialization transistor M14 in the display pixel circuit 30, for example. At this time, the output end of the second selection unit 22 can be set to be connected to the gate of the read transistor M21 of the fingerprint pixel circuit 40. Taking the above-mentioned first initialization transistor M14 as a P-type transistor and the read transistor M21 as an N-type transistor as an example, an inverter 23 can be added between the output end of the second selection unit 22 and the gate of the read transistor M21, and the first fixed potential transmitted by the first auxiliary signal line LZ1 can be set to be a high voltage signal VGH. The overall driving process of the display panel can still refer to the description in the above embodiments, and will not be repeated here.

[0115] Fig.14 exemplarily shows a driving timing in a display frame, and also shows a gate driving signal SOUT1 output by the first-stage scanning shift register SCAN GIP. Fig.13 and Fig.14, the working state of the switch circuit 200 is controlled by the first switch signal EN and the second switch signal EN', and the time-sharing of the row scanning of the display pixel circuit 30 and the row scanning of the fingerprint pixel circuit can be realized by coordinating the output timing of the scan driving circuit. Specifically, the first switch signal EN can be set to be the on-potential of the transistor connected to it in the row-by-row scanning period TS, which is exemplarily a low potential here, so that each scan shift register SCAN GIP is connected to the corresponding row display pixel circuit 30, so that each row display pixel circuit 30 receives the low potential pulse of the first scan signal S1 row by row; in this period, the read control signal Tread received by each fingerprint pixel circuit 40 maintains the inverse potential of the high voltage signal VGH. In the full-screen light-emitting period TE, the first switch signal EN can be controlled to jump to the cut-off potential of the transistor connected to it, which is exemplarily a high potential here, so that each scan shift register SCAN GIP is connected to the corresponding row fingerprint pixel circuit 40, so that each row fingerprint pixel circuit 40 receives the high potential pulse of the read control signal Tread row by row; in this period, the first scan signal S1 received by each display pixel circuit 30 maintains the inverse potential of the high voltage signal VGH. Among them, the low-potential pulse of the first-level gate drive signal SOUT1 in the line-by-line scanning period TS corresponds to the low-potential pulse of the first-level first scanning signal S1, and the low-potential pulse in the full-screen light-emitting period TE corresponds to the high-potential pulse of the first-level reading control signal Tread; the same applies to other levels of gate drive signals and will not be repeated.

[0116] In another embodiment, the display panel may optionally include two gate drive circuits 100, and two selection circuits 200 respectively corresponding to the two gate drive circuits 100. One selection circuit 200 is connected to one of the switch transistor and the light-emitting control transistor, and is connected to one of the reset transistor and the read transistor; the other selection circuit 200 is connected to the switch transistor and the other of the light-emitting control transistor, and is connected to the reset transistor and the other of the read transistor. In this way, the two original gate drive circuits in the display panel can be reused as the gate drive circuits required by the fingerprint pixel circuit, and there is no need to add a gate drive circuit for the fingerprint pixel circuit, thereby reducing the border size of the display panel as much as possible.

[0117] In summary, the embodiments of the present invention provide a driving solution for integrating an optical fingerprint in the screen, which can solve the problem of increasing the border of the display panel. In combination with the driving timing, it can also reduce the interference problem between the display and fingerprint recognition, thereby enhancing the competitive advantage of the fingerprint screen integration technology.

[0118] An embodiment of the present invention further provides a display device, including the display panel provided by any embodiment of the present invention, and having corresponding beneficial effects.

[0119] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0120] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A display panel, characterized in that: include: a plurality of display pixel circuits; A plurality of fingerprint pixel circuits; Gate drive circuit; A selection circuit, wherein the selection circuit is respectively connected to the gate driving circuit, at least part of the display pixel circuit and each of the fingerprint pixel circuits; The selection circuit is used to control the gate drive circuit to be connected to each of the display pixel circuits during the row-by-row scanning period of each display frame, and to control the gate drive circuit to be connected to each of the fingerprint pixel circuits during the full-screen light-emitting period of at least part of the display frame.

2. The display panel according to claim 1, characterized in that: The gate driving circuit comprises: a multi-stage shift register arranged in cascade connection; the selection circuit comprises: a plurality of selection modules arranged corresponding to at least part of the shift register; Wherein, each of the selection modules comprises: a first selection unit, a first input end of the first selection unit is connected to the shift register corresponding to the selection module, and an output end of the first selection unit is connected to at least one row of display pixel circuits; At least part of the selection modules include: a second selection unit, a first input end of the second selection unit is connected to the shift register corresponding to the selection module, and an output end of each second selection unit is respectively connected to each row of the fingerprint pixel circuits.

3. The display panel according to claim 2, characterized in that: The number of the selection modules in the selection circuit is the same as the number of the shift registers in the gate driving circuit, and each of the selection modules connected to each row of the fingerprint pixel circuits is provided with the second selection unit; Wherein, the number of rows of the fingerprint pixel circuit is equal to or less than the number of stages of the shift register in the gate driving circuit.

4. The display panel according to claim 2, characterized in that: The number of rows of the fingerprint pixel circuit is less than the number of stages of the shift register in the gate driving circuit, the number of the selection modules in the selection circuit is the same as the number of rows of the fingerprint pixel circuit, and each of the selection modules is provided with the second selection unit; The display panel includes at least one fingerprint recognition area, and the gate drive circuit includes at least one shift register group; each shift register group is respectively arranged corresponding to each fingerprint recognition area; the shift register group includes a plurality of continuous shift registers corresponding to a plurality of rows of fingerprint pixel circuits in the corresponding fingerprint recognition area; When the shift register group is connected to a previous stage shift register, a first switch unit is provided between an input end of a first stage shift register in the shift register group and an output end of the previous stage shift register, and an input end of the first stage shift register in the shift register group is connected to a start signal line through a second switch unit; wherein, during a full-screen light-emitting period of at least part of the display frame, the first switch unit is turned off, and the second switch unit is turned on; When the shift register group is connected to a subsequent shift register, a third switch unit is arranged between the output end of the last shift register in the shift register group and the input end of the subsequent shift register; wherein, during the line-by-line scanning period of each display frame, the third switch unit is turned on; during the full-screen light-emitting period of at least part of the display frames, the third switch unit is turned off.

5. The display panel according to claim 2, characterized in that: Also includes: a first switch signal line and a second switch signal line; The first selection unit comprises: a first transistor connected between a first input terminal and an output terminal of the first selection unit, wherein a gate of the first transistor is connected to the first switch signal line; The second selection unit comprises: a second transistor connected between the first input terminal and the output terminal of the second selection unit, the gate of the second transistor being connected to the second switch signal line; Preferably, the gates of all the first transistors are connected to the same first switch signal line; Preferably, the gates of all the second transistors are connected to the same second switch signal line; Preferably, the display panel further comprises: a third switch signal line; the first selection unit further comprises: a third transistor connected between the first input terminal and the output terminal of the first selection unit, the gate of the third transistor being connected to the third switch signal line; the third transistor and the first transistor have different channel types; Preferably, the gates of all the third transistors are connected to the same third switch signal line; Preferably, the display panel further comprises: a fourth switch signal line; the second selection unit further comprises: a fourth transistor connected between the first input terminal and the output terminal of the second selection unit, the gate of the fourth transistor being connected to the fourth switch signal line; the fourth transistor and the second transistor have different channel types; Preferably, the gates of all the fourth transistors are connected to the same fourth switch signal line; Preferably, the channel type of the first transistor is different from that of the second transistor, and the first switch signal line is multiplexed as the second switch signal line, and / or the third switch signal line is multiplexed as the fourth switch signal line; or, the channel type of the first transistor is the same as that of the second transistor, and the first switch signal line is multiplexed as the fourth switch signal line, and / or the third switch signal line is multiplexed as the second switch signal line.

6. The display panel according to claim 5, characterized in that: Also includes: a fifth switch signal line and a first auxiliary signal line, wherein the second input end of the first selection unit is connected to the first auxiliary signal line; The first selection unit further includes: a fifth transistor connected between the second input terminal and the output terminal of the first selection unit, and the gate of the fifth transistor is connected to the fifth switch signal line; wherein the signal transmitted by the fifth switch signal line controls the fifth transistor to be turned on when the first transistor is turned off, and transmits the first fixed potential provided by the first auxiliary signal line to the display pixel circuit connected to the first selection unit, so that the display pixel circuit maintains the working state before the fifth transistor is turned on; Preferably, the gates of all the fifth transistors are connected to the same fifth switch signal line; Preferably, the display panel further includes: a sixth switch signal line; the first selection unit further includes: a sixth transistor connected between the second input terminal and the output terminal of the first selection unit, and the gate of the sixth transistor is connected to the sixth switch signal line; the channel types of the fifth transistor and the sixth transistor are different; Preferably, the gates of all the sixth transistors are connected to the same sixth switch signal line; Preferably, the fifth transistor has the same channel type as that of the first transistor, and the third switch signal line is multiplexed as the fifth switch signal line, and / or the first switch signal line is multiplexed as the sixth switch signal line; or, the fifth transistor has a different channel type from that of the first transistor, and the first switch signal line is multiplexed as the fifth switch signal line, and / or the third switch signal line is multiplexed as the sixth switch signal line.

7. The display panel according to claim 6, characterized in that: Also includes: a seventh switch signal line and a second auxiliary signal line, wherein the second input end of the second selection unit is connected to the second auxiliary signal line; The second selection unit further includes: a seventh transistor connected between the second input terminal and the output terminal of the second selection unit, and the gate of the seventh transistor is connected to the seventh switch signal line; wherein the signal transmitted by the seventh switch signal line controls the seventh transistor to be turned on when the second transistor is turned off, and transmits the second fixed potential provided by the second auxiliary signal line to the fingerprint pixel circuit connected to the second selection unit, and controls the fingerprint pixel circuit to stop reading the electrical signal related to fingerprint identification; Preferably, the gates of all the seventh transistors are connected to the same seventh switch signal line; Preferably, the display panel further comprises: an eighth switch signal line; the second selection unit further comprises: an eighth transistor connected between the second input terminal and the output terminal of the second selection unit, the gate of the eighth transistor being connected to the eighth switch signal line; the seventh transistor and the eighth transistor have different channel types; Preferably, the gates of all the eighth transistors are connected to the same eighth switch signal line; Preferably, the channel type of the seventh transistor is the same as that of the second transistor, the fourth switch signal line is multiplexed as the seventh switch signal line, and / or the second switch signal line is multiplexed as the eighth switch signal line; or, the channel type of the seventh transistor is different from that of the second transistor, the second switch signal line is multiplexed as the seventh switch signal line, and / or the fourth switch signal line is multiplexed as the eighth switch signal line; Preferably, the first auxiliary signal line is multiplexed as the second auxiliary signal line; Preferably, the selection module further comprises: an inverter connected between the output end of the second selection unit and the fingerprint pixel circuit.

8. The display panel according to any one of claims 1 to 7, characterized in that: The display pixel circuit comprises: a first driving transistor, a light emitting device, at least one light emitting control transistor and at least one switch transistor, wherein the first driving transistor, the light emitting control transistor and the light emitting device are connected in series, and the switch transistor is connected to the first driving transistor or the light emitting device; The fingerprint pixel circuit comprises: a reset transistor, a second driving transistor, a reading transistor and a photosensitive device, wherein the reset transistor is respectively connected to the photosensitive device and the second driving transistor, and the second driving transistor is also connected to the reading transistor; The selection circuit is connected to the switch transistor or the light emission control transistor, and is connected to the read transistor or the reset transistor.

9. The display panel according to claim 8, characterized in that: The number of the gate driving circuits is two, and the number of the selection circuits is two; the two selection circuits are respectively arranged corresponding to the two gate driving circuits; One of the selection circuits connects the switch transistor and one of the light emission control transistors, and connects the reset transistor and one of the read transistors; the other selection circuit connects the switch transistor and the other of the light emission control transistors, and connects the reset transistor and the other of the read transistors.

10. A display device, characterized in that: include: The display panel according to any one of claims 1 to 9.

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