Virtual impedance boundary design method of virtual synchronous machine in grid-connected mode

Abstract

The invention relates to the technical field of electric power, and particularly discloses a virtual impedance boundary design method of a virtual synchronous machine in a grid-connected mode. In the grid-connected mode, the influence of the output impedance of the VSG on the power transmission capacity, the phase margin of a power ring, active and reactive power coupling and the bandwidth of an inner ring and an outer ring is analyzed, an impedance model in the grid-connected mode is established, and a quantitative design formula of an impedance boundary under different constraint conditions is deduced; and an output impedance design boundary diagram of the VSG is drawn. In combination with the impedance boundary conditions and comprehensive specific working condition analysis, the reasonable and visual value range of the virtual impedance design meeting different control performances can be obtained. According to the output impedance boundary provided by the invention, the active and reactive power control performance of the VSG system, the precision of the port voltage and the stability of the system can be improved, and a thought is provided for the virtual impedance design of the VSG in engineering application.

Description

Technical Field

[0001] The present invention relates to the field of electric power technology, and in particular to a virtual impedance boundary design method for a virtual synchronous machine in a grid-connected mode. Background Art

[0002] In actual operation, a series of problems will occur in the distributed power source under the control of the virtual synchronous machine: for example, non-inductive line impedance will cause power coupling, affect the accuracy of power control, and even cause system instability; when multiple machines are connected in parallel, line impedance mismatch will cause serious uneven power distribution; output impedance amplitude and resistance-to-inductance ratio will affect power transmission efficiency and dynamic response speed, etc. These problems are closely related to the output impedance of VSG.

[0003] Virtual impedance control technology can change the output impedance characteristics of virtual synchronous machines, and can flexibly design the system impedance to be inductive, resistive-inductive, resistive, or even capacitive. It has a good effect on solving the above-mentioned problems. Its biggest advantage is that it is simple to implement, so it has a wide range of application prospects. Therefore, the reasonable design of the virtual impedance boundary is of great value in ensuring the operating characteristics of the system. Summary of the invention

[0004] The purpose of the present invention is to provide a virtual impedance boundary design method for a virtual synchronous machine in a grid-connected mode, so as to provide ideas for the virtual impedance design of VSG in engineering applications.

[0005] To achieve the above object, the present invention provides the following technical solutions:

[0006] A virtual impedance boundary design method for a virtual synchronous machine in a grid-connected mode. The active power and reactive power transmitted between two voltage sources in the grid-connected mode can be expressed by the following mathematical expressions:

[0007]

[0008] Where: E and U are the effective values ​​of the output voltage of the virtual synchronous machine and the voltage at the PCC point, respectively; |Z| is the impedance amplitude between the voltages; the impedance angle is θ = arctan(R / X); and δ is the power angle;

[0009] When sin(δ+θ)=1, the maximum value of active power output is:

[0010]

[0011] The maximum active power output capability of VSG is P max_c , then P should be satisfied max >P max_c ; Substituting equation (3) into the equation, we can get that the output impedance must satisfy the following relationship:

[0012]

[0013] Take the power angle margin as δ c , when the output impedance angle is θ, the maximum allowable steady-state power angle changes from π / 2-θ to:

[0014]

[0015] The maximum active power that the power supply can stably output is the maximum steady-state power angle δ s，c The mathematical expression of the active power value corresponding to the location is:

[0016]

[0017] Assume that the maximum active power that VSG can stably output is P max , the following constraints should be met:

[0018]

[0019] Furthermore, it can be deduced that the impedance should satisfy the following relationship:

[0020]

[0021] Preferably, G c_δP (s) and G c_EQ (s) represent the equivalent open-loop transfer functions of the active power controller and reactive power controller respectively:

[0022] G c_δP (s) = 1 / [s(J P s+D p )],G c_EQ (s) = 1 / k Q (9)

[0023] Among them, D P =k P +D,J P =dω ref , J is the inertia, ω ref is the rated frequency, k P and k Q is the power droop coefficient, D is the damping, and s is the differential factor in Laplace transform;

[0024] G Pδ (s), G PE (s), G Qδ (s) and G QE (s) are the gains in the power transmission process; when the dynamic process of the filter inductance and the switching action of the VSC are ignored, there exists:

[0025]

[0026] In the formula, E o is the rated value of the virtual internal potential, δ o is the rated value of the power angle;

[0027] Combining the closed-loop transfer function of the active power control loop of the dynamic coupling process, the following formula can be derived:

[0028]

[0029] Where P ref is the active power command, P is the output active power;

[0030] The corresponding open-loop transfer function is:

[0031]

[0032] Order |G P_OL (jω c )|=1, solve for the cutoff frequency:

[0033]

[0034] Then, the calculation expression of phase margin can be obtained:

[0035]

[0036] Set the lower boundary of the phase margin to γ c , that is, the phase margin of the system needs to satisfy the constraint γ>γ c , substituting into the above formula we can get:

[0037]

[0038] Substituting the cut-off frequency calculation formula (13) into formula (15), after solving the equation, we can obtain the constraint conditions that the system output impedance must meet to ensure sufficient phase margin:

[0039]

[0040] Where: A is an intermediate variable, the specific

[0041] Preferably, the control of the active control loop is coupled to the reactive control loop, and the reactive power error caused is:

[0042]

[0043] When s approaches 0, the reactive steady-state error is:

[0044]

[0045] Here we only measure the size of the error, not the positive or negative sign of the error, so the absolute value is:

[0046]

[0047] Set the reactive error boundary as:

[0048]

[0049] In the formula, e Q is the upper limit of error;

[0050] Then the impedance boundary condition can be obtained as:

[0051]

[0052] Where P0 is the rated value of active power.

[0053] Preferably, the bandwidth of the power loop is 1 / 5 of the voltage and current inner loop, and the bandwidth of the voltage and current control inner loop is ω inner , the constraints should be met:

[0054]

[0055] According to equation (13), the bandwidth of the active power control loop is derived as:

[0056]

[0057] Substitute it into the bandwidth constraint and solve it through transformation to obtain the impedance constraint:

[0058]

[0059] Where: B is an intermediate variable,

[0060] The beneficial technical effects of this application mainly include:

[0061] (1) This application analyzes the impact of the output impedance of the VSG on the power transmission capability, the phase margin of the power loop, the active and reactive power coupling, and the bandwidth of the inner and outer loops in the grid-connected mode, and establishes an impedance model in the grid-connected mode. Combined with the above-mentioned impedance boundary conditions and comprehensive analysis of specific working conditions, a reasonable and intuitive virtual impedance design range that meets different control performances can be obtained;

[0062] (2) The design of virtual impedance in VSG control is studied. The requirements of different constraints on the output impedance of VSG under the grid-connected mode are comprehensively considered, and the output impedance boundaries that meet different constraints are given, which provides ideas for the virtual impedance design of VSG. BRIEF DESCRIPTION OF THE DRAWINGS

[0063] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative work.

[0064] Figure 1 This is an equivalent circuit diagram of a VSG connected to an AC bus of a power grid provided in an embodiment of the present application;

[0065] Figure 2 It is a general coupling model of a grid-connected VSG with amplitude and phase control provided in an embodiment of the present application;

[0066] Figure 3 This is an impedance boundary diagram in a grid-connected mode provided in an embodiment of the present application. DETAILED DESCRIPTION

[0067] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0068] The flowcharts shown in the accompanying drawings are only examples and do not necessarily include all the contents and operations / steps, nor must they be executed in the order described. For example, some operations / steps may also be decomposed, combined or partially merged, so the actual execution order may change according to actual conditions.

[0069] In the description of the present application, the terms "first / second" involved are merely used to distinguish similar objects and do not represent a specific order for the objects. It can be understood that "first / second" can be interchanged with a specific order or sequence where permitted, so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein.

[0070] It should be understood that the orientation or position relationship is based on the orientation or position relationship shown in the drawings. These orientation terms are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application.

[0071] Figure 1 The figure shows the equivalent circuit diagram of VSG connected to the AC bus of the power grid. VSG is equivalent to an ideal voltage source and connected to the power grid through output impedance.

[0072] Considering that this is a three-phase system, the active and reactive powers transferred between the two voltage sources can be expressed mathematically as follows:

[0073]

[0074] Where: E and U are the effective values ​​of the output voltage of the virtual synchronous machine and the voltage at the PCC point, respectively; |Z| is the impedance amplitude between the voltages; the impedance angle is θ = arctan(R / X); and δ is the power angle.

[0075] In the grid-connected mode, the specific impedance value range analysis will be carried out from four aspects: VSG power transmission capability, phase margin, power coupling, and internal and external loop bandwidth constraints.

[0076] (1) Analysis of power transmission capacity boundary conditions

[0077] As a distributed power source, the power transmission capacity of the virtual synchronous machine is its most basic performance indicator. The power transmission capacity here discusses how to optimize the design of virtual impedance in the virtual synchronous generator control algorithm so that it can fully utilize the power transmission capacity of the converter itself.

[0078] The power transmission capacity here discusses how to optimize the design of virtual impedance in the virtual synchronous machine control algorithm so that it can make full use of the power transmission capacity of the converter itself. First of all, it is pointed out that the real power output capacity of the converter is determined by the port voltage and the AC side connection impedance (including filter, line impedance, etc.), which is the power transmission capacity of the device itself. However, for the grid-connected converter system that actually adopts the VSG control algorithm, because it controls the output power by controlling the frequency (phase) and amplitude of its virtual internal potential, the power output capacity of the VSG is determined by the line impedance between the virtual internal potential and the PCC. The output impedance between the VSG virtual internal potential and the grid voltage (which can be considered to be equal to the complex sum of virtual impedance + line impedance) has an important influence on its power transmission capacity and control performance. The problem considered by the power transmission capacity boundary condition is the power output capacity of the power supply itself when it is not controlled. It is affected by the output impedance and has nothing to do with other control parameters. It is its most basic constraint.

[0079] Assuming the virtual impedance is Z, the transmission equation of active power is:

[0080]

[0081] Where: θ = arctan (R / X), called the impedance angle; δ is the power angle.

[0082] Obviously, if the impedance ratio is constant, when sin(δ+θ)=1, that is, at the theoretical maximum power angle δ max =π / 2-θ, the theoretical maximum value of active power output is:

[0083]

[0084] Formula (3) gives the maximum active power output capacity when the virtual impedance is |Z|∠θ. It should be noted that this is not the active power output capacity of the converter hardware itself, but the theoretical value of the maximum active power that the VSG can output when the VSG control strategy is adopted to avoid the control strategy from losing stability. In practical applications, sufficient power angle margin should be maintained, so the actual active power output capacity is even smaller than this value.

[0085] According to formula (3), the maximum value of the output active power is related to the impedance and the amplitude of the virtual internal potential. Although in theory, the active power output can be increased by controlling the infinite increase of the virtual internal potential E. However, as E increases, the reactive power will increase significantly. As a power generation device, VSG mainly outputs active power. In order to respond to the needs of the power grid, it only needs to maintain its ability to output reactive power at a certain time. Therefore, the active output cannot be increased by increasing E. Therefore, when calculating this constraint, E can be taken as the rated value during normal operation. When E is fixed, P can be obtained. max Constrained by impedance Z. Assume that the maximum active power output capability of VSG is P max_c , then P should be satisfied max >P max_c Substituting equation (3) into the equation, we can get that the output impedance must satisfy the following relationship:

[0086]

[0087] It can be seen from formula (4) that: ① Under the constraint of the theoretical maximum active power output capacity, the impedance modulus is negatively correlated with the impedance ratio R / X, which indicates that the resistance component is not conducive to the output of active power; ② The higher the requirement for the maximum active power output capacity, the more the impedance boundary moves downward, and the smaller the range of the impedance modulus value.

[0088] Constraint (4) gives the theoretical maximum active power output capacity. At this point, the system will be at the critical static stable operating point. When the system stabilizes at this point and a disturbance occurs, the system may become unstable. In practice, in order to ensure that the system can continue to operate stably, it is necessary to ensure that the system has a certain power angle margin.

[0089] Next, we will discuss the ability of VSG to stably output active power when the power supply has a certain power angle margin. Assume that the power angle margin is δ c , when the output impedance angle is θ, the maximum allowable steady-state power angle changes from π / 2-θ to:

[0090]

[0091] From (5), we can see that the maximum allowable steady-state power angle δ s，c Affected by the system impedance angle (that is, impedance ratio), the larger the impedance angle, the larger the maximum allowable steady-state power angle δ s，c The smaller the power angle margin is, the smaller the c Under the premise of the smaller the maximum active power that the system can output stably, the smaller it is.

[0092] At this time, the maximum active power that the power supply can stably output is the maximum steady-state power angle δ s，c The mathematical expression of the active power value corresponding to the location is:

[0093]

[0094] Assume that the maximum active power that VSG can stably output is P max , the following constraints should be met:

[0095]

[0096] Furthermore, it can be deduced that the impedance should satisfy the following relationship:

[0097]

[0098] From equation (8) and, we can draw the following conclusions: ① When the impedance ratio R / X is larger, the upper limit of the impedance modulus is smaller; ② The power angle margin δ c The smaller it is, the larger the |Z| allowed under a certain impedance ratio, and the smaller the impedance ratio allowed under a certain |Z|.

[0099] (2) Phase margin constraints

[0100] In order to ensure the stability of the system, the phase margin of the active power closed-loop transfer function can be used to measure it. Figure 2This is a general coupling model of a grid-connected VSG with amplitude and phase control provided in an embodiment of the present application. The VSG power control loop can be equivalent to the following: Figure 2 The control block diagram shown. c_δP (s) and G c_EQ (s) represent the equivalent open-loop transfer functions of the active power controller and reactive power controller respectively:

[0101] G c_δP (s) = 1 / [s(J P s+D p )],G c_EQ (s) = 1 / k Q (9)

[0102] Among them, D P =k P +D,J P =dω ref , J is the inertia, ω ref is the rated frequency, k P and k Q is the power droop coefficient, D is the damping, and s is the differential factor in the Laplace transform.

[0103] G Pδ (s), G PE (s), G Qδ (s) and G QE (s) are the gains in the power transmission process. When the dynamic process of the filter inductor and the switching action of the VSC are ignored, there exists:

[0104]

[0105] In the formula, E o is the rated value of the virtual internal potential, δ o is the rated value of the power angle.

[0106] In order to make the modeling and analysis of the system more accurate, the closed-loop transfer function of the active power control loop considering the dynamic coupling process is adopted here. Figure 2 The following formula can be deduced:

[0107]

[0108] Where P ref is the active power command, and P is the output active power.

[0109] The corresponding open-loop transfer function is:

[0110]

[0111] Order |G P_OL (jω c)|=1, solve for the cutoff frequency:

[0112]

[0113] Then, the calculation expression of phase margin can be obtained:

[0114]

[0115] Set the lower boundary of the phase margin to γ c , that is, the phase margin of the system needs to satisfy the constraint γ>γ c , substituting into the above formula we can get:

[0116]

[0117] Substituting the cut-off frequency calculation formula (13) into formula (15), after solving the equation, we can obtain the constraint conditions that the system output impedance must meet to ensure sufficient phase margin:

[0118]

[0119] Where: A is an intermediate variable, the specific

[0120] (3) Power coupling constraints

[0121] Since there is no integrator in the reactive power droop control loop like in the active power control loop, this coupling will produce a static error in reactive power control, which will in turn affect the voltage regulation and reactive power sharing performance of the system. Therefore, it is necessary to consider the impact of power coupling on reactive power control error and limit it to a tolerable range. This is what this constraint condition needs to consider, and its essence is also caused by power coupling.

[0122] The control of the active control loop is coupled to the reactive control loop, and the reactive power error caused can be expressed as Figure 2 Inferred:

[0123]

[0124] When s approaches 0, the reactive steady-state error is:

[0125]

[0126] Here we only measure the size of the error, not the positive or negative sign of the error, so the absolute value is:

[0127]

[0128] According to formula (19), it can be seen that the influence of the impedance modulus and impedance ratio on the reactive power error is as follows: the reactive power error is positively correlated with the impedance modulus and impedance ratio, that is, the larger the impedance modulus or the impedance ratio, the larger the reactive power error.

[0129] In order to ensure that the reactive error is within a reasonable range, the boundary of the reactive error is set as:

[0130]

[0131] In the formula, e Q is the upper error limit.

[0132] Then the impedance boundary condition can be obtained as:

[0133]

[0134] Where P0 is the rated value of active power.

[0135] (4) Inner and outer ring bandwidth constraints

[0136] The inner loop bandwidth refers to the bandwidth of the voltage-current double closed loop, and the outer loop bandwidth refers to the bandwidth of the power control loop. From the transfer function of the power loop (11), it can be seen that the outer loop bandwidth is related to the output impedance. The problem considered in this constraint condition is to ensure that the power loop and the inner loop do not overlap in bandwidth. Generally, for VSG, the power loop is relatively slow and the inner loop bandwidth is very wide, so this constraint condition can basically be met.

[0137] In order to ensure that the performance of the inner loop control does not affect the control of the power outer loop, it is necessary to ensure that the bandwidth of the voltage and current control inner loop in the control system is fast enough compared to the power control outer loop. Generally, the bandwidth of the power loop is 1 / 5 of the voltage and current inner loop. Assume that the bandwidth of the voltage and current control inner loop is ω inner , the constraints should be met:

[0138]

[0139] According to equation (13), the bandwidth of the active power control loop is derived as:

[0140]

[0141] Substitute it into the bandwidth constraint and solve it through transformation to obtain the impedance constraint:

[0142]

[0143] Where: B is an intermediate variable,

[0144] According to the above four boundary conditions, we can get Figure 3 The impedance boundary diagram in the grid-connected mode is shown in the figure. The ordinate is the impedance amplitude and the abscissa is the impedance-to-inductance ratio. The recommended area that meets the conditions is the shaded area in the lower left corner. It can be seen that phase margin and power coupling are the main constraints, and power transmission and inner and outer loop bandwidth dynamic constraints are weaker.

[0145] The virtual impedance design in VSG control is studied, and the requirements of different constraints on the output impedance of VSG in the grid-connected mode are comprehensively considered. The output impedance boundary that meets different constraints is given, which provides ideas for the virtual impedance design of VSG. Specifically, in the grid-connected mode, the influence of the output impedance of VSG on the power transmission capability, the phase margin of the power loop, the active and reactive power coupling, and the bandwidth of the inner and outer loops are analyzed, and the impedance model in the grid-connected mode is established. The quantitative design formula of the impedance boundary under different constraints is derived, and then the output impedance design boundary diagram of VSG is drawn. Combined with the above-mentioned impedance boundary conditions, and then combined with the specific working condition analysis, a reasonable and intuitive virtual impedance design range that meets different control performances can be obtained. The output impedance boundary proposed in this application can improve the active and reactive control performance of the VSG system, the accuracy of the port voltage, and the stability of the system, and provides ideas for the virtual impedance design of VSG in engineering applications.

[0146] It will be appreciated by those skilled in the art that all or some of the steps, systems, and functional modules / units in the methods disclosed above may be implemented as software, firmware, hardware, and appropriate combinations thereof. In a hardware implementation, the division between the functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed by several physical components in cooperation. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or may be implemented as hardware, or may be implemented as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable storage medium, which may include a computer-readable storage medium (or a non-transitory medium) and a communication medium (or a temporary medium).

[0147] The above is only a specific implementation of the present application, so that those skilled in the art can understand or implement the present application. It will be apparent to those skilled in the art that various modifications to these embodiments are possible, and the general principles defined in the present application can be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to these embodiments shown in the present application, but will conform to the widest scope consistent with the principles and novel features applied for by the present application.

Claims

1. A method for designing a virtual impedance boundary of a virtual synchronous machine in a grid-connected mode, characterized in that: The active power and reactive power transmitted between two voltage sources in grid-connected mode can be expressed by the following mathematical expressions: Where: E and U are the effective values ​​of the output voltage of the virtual synchronous machine and the voltage at the PCC point, respectively; |Z| is the impedance amplitude between the voltages; the impedance angle is θ = arctan(R / X); and δ is the power angle; When sin(δ+θ)=1, the maximum value of active power output is: The maximum active power output capability of VSG is P max_c , then P should be satisfied max >P max_c ; Substituting equation (49) into the equation, we can get that the output impedance modulus must satisfy the following relationship: Take the power angle margin as δ c , when the output impedance angle is θ, the maximum allowable steady-state power angle changes from π / 2-θ to: The maximum active power that the power supply can stably output is the maximum steady-state power angle δ s,c The mathematical expression of the active power value corresponding to the location is: Assume that the maximum active power that VSG can stably output is P max , the following constraints should be met: Furthermore, it can be deduced that the impedance should satisfy the following relationship:

2. The method according to claim 1, characterized in that: G c_δP (s) and G c_EQ (s) represent the equivalent open-loop transfer functions of the active power controller and reactive power controller respectively: G c_δP (s)=1 / [s(J P s+D p )],G c_EQ (s)=1 / k Q (8) Among them, D P =k P +D,J P =Jω ref , J is the inertia, ω ref is the rated frequency, k P and k Q is the power droop coefficient, D is the damping, and s is the differential factor in Laplace transform; G Pδ (s), G PE (s), G Qδ (s) and G QE (s) are the gains in the power transmission process; when the dynamic process of the filter inductance and the switching action of the VSC are ignored, there exists: In the formula, E o is the rated value of the virtual internal potential, δ o is the rated value of the power angle; Combining the closed-loop transfer function of the active power control loop of the dynamic coupling process, the following formula can be derived: Where P ref is the active power command, P is the output active power; The corresponding open-loop transfer function is: Order |G P_OL (jω c )|=1, solve for the cutoff frequency: Then, the calculation expression of phase margin can be obtained: Set the lower boundary of the phase margin to γ c , that is, the phase margin of the system needs to satisfy the constraint γ>γ c , substituting into the above formula we can get: Substituting the cutoff frequency calculation formula (59) into formula (61), after solving the equation, we can obtain the constraint conditions that the system output impedance must satisfy to ensure sufficient phase margin: Where: A is an intermediate variable, the specific 3. The method according to claim 2, characterized in that: The control of the active control loop is coupled to the reactive control loop, and the reactive power error caused is: When s approaches 0, the reactive steady-state error is: Here we only measure the size of the error, not the positive or negative sign of the error, so the absolute value is: Set the reactive error boundary as: In the formula, e Q is the upper limit of error; Then the impedance boundary condition can be obtained as: Where P0 is the rated value of active power.

4. The method according to claim 3, characterized in that: The bandwidth of the power loop is taken as 1 / 5 of the voltage and current inner loop, and the bandwidth of the voltage and current control inner loop is set to ω inner , the constraints should be met: According to equation (59), the bandwidth of the active power control loop is derived as: Substitute it into the bandwidth constraint and solve it through transformation to obtain the impedance constraint: Where: B is an intermediate variable,

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