oscillator

Abstract

The present disclosure provides an oscillator, comprising: a frequency control module, an oscillator module and a tuning interface module; the tuning interface module is electrically connected with the oscillator module and the frequency control module respectively; the frequency control module is used for providing a digital tuning control signal to the tuning interface module; the tuning interface module is used for generating an analog tuning quantity signal according to an obtained clock signal and the digital tuning control signal, and outputting the analog tuning quantity signal to the oscillator module. The present embodiment can accurately represent the compensation quantity required by the physical environmental change by using the digital tuning control signal, and can avoid the noise interference during the analog signal transmission; and in the present embodiment, the digital tuning control signal is converted into the analog tuning quantity signal, which can ensure the continuity of the adjustment of the oscillator module, reduce the frequency jump phenomenon during the compensation of the digital tuning control signal, and improve the stability of the oscillator frequency.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of control, and in particular, to an oscillator. BACKGROUND

[0002] High-precision oscillators are widely used in modern communication, navigation, measurement and other systems. As an example, a quartz crystal oscillator (XO) is used as a precise clock reference source, and its frequency stability is crucial to the overall performance of the system.

[0003] However, the frequency of the high-precision oscillator is still affected by changes in the physical environment (such as temperature, acceleration, etc.), resulting in frequency drift, which in turn affects the stability of the system. SUMMARY

[0004] The present disclosure provides an oscillator to solve the above technical problems.

[0005] According to a first aspect of the present disclosure, an oscillator is provided, comprising: a frequency control module, an oscillator module and a tuning interface module; the tuning interface module is electrically connected to the oscillator module and the frequency control module, respectively;

[0006] The frequency control module is configured to provide a digital tuning control signal to the tuning interface module.

[0007] The tuning interface module is configured to generate an analog tuning amount signal according to the obtained clock signal and the digital tuning control signal, and output the analog tuning amount signal to the oscillator module.

[0008] Optionally, the clock signal obtained by the tuning interface module is provided by the oscillator module.

[0009] Optionally, the oscillator further comprises a reference oscillation module, and the reference oscillation module is electrically connected to the tuning interface module.

[0010] The reference oscillation module is configured to provide a clock signal to the tuning interface module.

[0011] Optionally, the tuning interface module comprises a clock distribution sub-module, a signal mapping sub-module and a digital-to-analog conversion module; the clock distribution sub-module is electrically connected to the signal mapping sub-module and the digital-to-analog conversion module, respectively; and the signal mapping sub-module and the digital-to-analog conversion module are electrically connected.

[0012] The clock distribution sub-module is configured to perform distribution processing on the clock signal to obtain a first clock sub-signal and a second clock sub-signal.

[0013] The signal mapping submodule is configured to map the digital tuning control signal according to the first clock sub-signal to obtain a digital mapping signal.

[0014] The digital-to-analog conversion submodule is configured to perform digital-to-analog conversion on the digital mapping signal according to the second clock sub-signal to obtain the analog tuning amount signal.

[0015] Optionally, the signal mapping submodule is implemented by a digital circuit and is configured to sample a digital tuning control signal of a first bit width according to the first clock sub-signal to obtain a digital mapping signal of a second bit width; the first bit width is greater than the second bit width.

[0016] Optionally, the digital-to-analog conversion submodule comprises a remapping unit, a device array gating unit, an analog signal calculation unit and a low-pass filter unit; the device array gating unit is electrically connected to the remapping unit and the analog signal calculation unit respectively, and the analog signal calculation unit is electrically connected to the low-pass filter unit.

[0017] The remapping unit is configured to perform remapping processing on the digital mapping signal to obtain a plurality of gating control signals.

[0018] The device array selection unit is configured to switch the working states of the devices according to the plurality of gating control signals, and each device outputs a matching analog signal after being switched to a working state.

[0019] The analog signal calculation unit is configured to perform summation processing on the analog signals output by the device array selection unit to obtain a candidate analog signal.

[0020] The low-pass filter unit is configured to filter out high-frequency signals and stray signals in the candidate analog signal to obtain the analog tuning amount signal.

[0021] Optionally, the analog signal calculation unit comprises a summation calculation sub-unit and a signal correction sub-unit.

[0022] The summation calculation sub-unit is configured to perform summation processing on the analog signals output by the device array selection unit to obtain an initial analog signal.

[0023] The signal correction sub-unit is configured to perform signal correction on the initial analog signal to obtain the candidate analog signal.

[0024] Optionally, the oscillator further comprises an automatic sensing and compensation logic module, which is electrically connected to the frequency control module.

[0025] The automatic sensing and compensation logic module is configured to acquire a physical environmental change of an environment in which the oscillator module is located, and generate a compensation signal according to the physical environmental change; and send the compensation signal to the frequency control module.

[0026] The frequency control module is configured to generate the digital tuning control signal according to the compensation signal.

[0027] Optionally, the oscillator further comprises an external control interface module, and the external control interface is electrically connected to the frequency control module.

[0028] The external control interface module is configured to generate a compensation signal according to an acquired external control quantity, and send the compensation signal to the frequency control module.

[0029] The frequency control module is configured to generate the digital tuning control signal according to the compensation signal.

[0030] Optionally, the analog tuning quantity signal comprises one of the following: voltage, current, charge and capacitance.

[0031] The technical scheme provided by the embodiment of the present disclosure can have the following beneficial effects:

[0032] The oscillator provided by the embodiment comprises a frequency control module, an oscillator module and a tuning interface module; the tuning interface module is electrically connected to the oscillator module and the frequency control module respectively; the frequency control module is configured to provide a digital tuning control signal to the tuning interface module; and the tuning interface module is configured to generate an analog tuning quantity signal according to an acquired clock signal and the digital tuning control signal, and output the analog tuning quantity signal to the oscillator module. In this way, the embodiment can use the digital tuning control signal to accurately represent the compensation quantity required by the physical environmental change, and can avoid noise interference during analog signal transmission; and in the embodiment, the digital tuning control signal is converted into the analog tuning quantity signal, which can ensure the continuity of the adjustment of the oscillator module, reduce the frequency jump phenomenon during the compensation of the digital tuning control signal, and improve the stability of the oscillator frequency.

[0033] It should be understood that the foregoing general description and the following detailed description are only exemplary and explanatory, and cannot limit the present disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0034] Figure 1 A block diagram of an oscillator according to an embodiment of the present disclosure.

[0035] Figure 2 A block diagram of a tuning interface module according to an embodiment of the present disclosure.

[0036] Figure 3A block diagram of a digital-to-analog conversion sub-module according to an embodiment of the present disclosure.

[0037] Figure 4 A block diagram of another digital-to-analog conversion sub-module according to an embodiment of the present disclosure.

[0038] Figure 5 A circuit schematic diagram of a device array selection unit when performing dynamic mismatch processing according to an embodiment of the present disclosure.

[0039] Figure 6 A block diagram of an analog signal calculation unit according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0040] The exemplary embodiments will be described in detail herein with reference to the attached drawings. The following description is only exemplary and is not intended to limit the present disclosure, as defined by the appended claims, in any way. Rather, the following description provides an example of apparatuses consistent with the present disclosure.

[0041] An oscillator according to an embodiment of the present disclosure is provided, referring to Figure 1 The oscillator 10 comprises an oscillator module 11, a tuning interface module 12, and a frequency control module 13; the tuning interface module 12 is electrically connected to the oscillator module 11 and the frequency control module 13 respectively; the frequency control module 13 is configured to provide a digital tuning control signal to the tuning interface module 12; the tuning interface module 12 is configured to generate an analog tuning quantity signal according to an obtained clock signal and the digital tuning control signal, and output the analog tuning quantity signal to the oscillator module 11.

[0042] The present embodiment can use the digital tuning control signal to accurately represent the compensation quantity required by the physical environmental changes, and can avoid noise interference during analog signal transmission; and in the present embodiment, the digital tuning control signal is converted into the analog tuning quantity signal, which can ensure the continuity of the adjustment of the oscillator module, reduce the frequency jump phenomenon during the compensation of the digital tuning control signal, and improve the stability of the oscillator frequency.

[0043] In an example, the oscillator module 11 can include a resonant cavity and an oscillation maintaining circuit. The resonant cavity can be a metal cavity, a quartz crystal, a MEMS resonant body, a SAW / BAW resonant cavity, etc., which can be selected according to specific scenarios. The physical properties of the resonant cavity can be affected by external physical environments (such as temperature, acceleration, etc.), so that the oscillation frequency of the oscillator core deviates from the expected value. The oscillation maintaining circuit works with the resonant cavity to offset various losses (including the losses of the resonant cavity itself) and maintain the stability of the oscillation state so that it does not decay. The structure of the oscillator module 11 can be set according to specific scenarios, which is not limited here.

[0044] In an example, the clock signal received by the tuning interface module 12 can be provided by the oscillator module 11, or by a reference oscillator module (not shown in the figure), or be an external clock signal. In the case where a clock signal can be provided, the corresponding scheme falls within the protection scope of the present disclosure.

[0045] In an example, the clock signal received by the tuning interface module 12 can be provided by the oscillator module 11, and the tuning interface module 12 includes 2 input ports and 1 output port. The 2 input ports respectively receive the clock signal and the digital tuning control signal, and the 1 output port outputs the analog tuning quantity signal. In this example, the analog tuning quantity signal includes one of the following: voltage, current, charge, and capacitance, which can be configured according to the required tuning quantity mode of the oscillator module 11. The tuning quantity mode refers to the frequency pulling way of the oscillator module composed of different resonant cavities, for example, adjusting the bias voltage to change the frequency of the MEMS oscillator, adjusting the load capacitance to change the frequency of the quartz crystal oscillator, etc.

[0046] In an example, referring to Figure 2 , the tuning interface module 12 includes a clock distribution sub-module 21, a signal mapping sub-module 22, and a digital-to-analog conversion module 23. The clock distribution sub-module 21 is electrically connected with the signal mapping sub-module 22 and the digital-to-analog conversion module 23 respectively; the signal mapping sub-module 22 and the digital-to-analog conversion module 23 are electrically connected.

[0047] The clock distribution sub-module 21 is configured to perform distribution processing on the clock signal to obtain a first clock sub-signal and a second clock sub-signal.

[0048] The signal mapping sub-module 22 is configured to perform mapping processing on the digital tuning control signal according to the first clock sub-signal to obtain a digital mapping signal.

[0049] The digital-to-analog conversion sub-module 23 is configured to perform digital-to-analog conversion on the digital mapping signal according to the second clock sub-signal to obtain the analog tuning quantity signal.

[0050] In the example, the clock distribution submodule 21 refers to a process of distributing the clock signal, which is based on the same clock signal to generate the clock signal of the signal mapping submodule 22 and the digital-to-analog conversion submodule 23, i.e., the first clock sub-signal and the second clock sub-signal. In other words, the signal mapping submodule 22 works based on the first clock sub-signal and the digital-to-analog conversion submodule 23 works based on the first clock sub-signal. In fact, the signal mapping submodule 22 and the digital-to-analog conversion submodule 23 work based on the clock signal generating the first clock sub-signal and the second clock sub-signal. As a result, the clock distribution submodule 21, the signal mapping submodule 22 and the digital-to-analog conversion submodule 23 have a certain correlation in frequency and phase, or in other words, the three work synchronously.

[0051] In the example, the signal mapping submodule 22 is implemented by a digital circuit, which is used to sample the digital tuning control signal of the first bit width based on the first clock sub-signal to obtain a digital mapping signal of the second bit width. For example, the digital tuning control signal can be a control quantity of M-bit binary data of the first bit width, which is mapped by upsampling to reduce the bit width, and then becomes N-bit binary data of the second bit width. The second bit width N is determined by the number of devices in the device array in the digital-to-analog conversion submodule 23.

[0052] It can be understood that the implementation of the signal mapping submodule 22 by the digital circuit in the example will introduce a truncation error, and the power spectrum of the truncation error can exhibit a high-pass characteristic, i.e., the truncation error is mainly concentrated outside the signal bandwidth of the digital tuning control quantity.

[0053] In an example, referring to Figure 3 The digital-to-analog conversion submodule 23 includes a remapping unit 31, a device array gating unit 32, an analog signal calculation unit 33 and a low-pass filter unit 34. The device array gating unit 32 is electrically connected with the remapping unit 31 and the analog signal calculation unit 33, respectively. The analog signal calculation unit 33 is electrically connected with the low-pass filter unit 34.

[0054] The remapping unit 31 is used to perform remapping processing on the digital mapping signal to obtain a plurality of gating control signals.

[0055] The device array selection unit 32 is used to switch the working state of each device according to the plurality of gating control signals. Each device outputs a matching analog signal after being switched to the working state.

[0056] The analog signal calculation unit 33 is used to perform summation processing on the analog signal output by the device array selection unit to obtain a candidate analog signal.

[0057] The low-pass filter unit 34 is used to filter out high-frequency signals and spurious signals in the candidate analog signal to obtain an analog tuning quantity signal.

[0058] It should be noted that the remapping processing refers to converting the digital mapping signal into a code word capable of controlling the selection or non-selection of each device in the device array selection unit 32, such as binary to thermometer code, so as to select part of the devices in the device array selection unit 32 and ensure good linearity of the digital-analog transfer characteristic curve.

[0059] In an example, the device array selection unit 32 can include a plurality of devices such as resistance units, current source units, capacitance units, etc., which can be selected according to specific scenarios. When the devices of the device array selection unit 32 are switched to the on state, the corresponding analog signal can be output.

[0060] Taking the resistance unit as an example, it can be connected to the positive and negative reference voltages through the shape to represent the selection or non-selection, and at this time the code word controls the switch to be on or off. The resistance unit can output an analog voltage when it is turned on.

[0061] Taking the current source unit as an example, the current source unit can be connected to or disconnected from the analog signal calculation unit 33 through a switch to represent the selection / non-selection of the analog signal calculation unit 33, and the code word controls the switch to be on or off. The current source unit can output an analog current when it is turned on.

[0062] It can be understood that when the device array selection unit 32 includes other devices, the control mode of the other devices refers to the connection mode of the above-mentioned resistance unit or current source unit, and the corresponding scheme falls within the protection scope of the present disclosure.

[0063] For the error energy caused by the static mismatch of each device in the device array selection unit 32, for example, when the labeled resistance values of two resistors are the same but the actual resistance values exist process difference, the currents generated by the same input voltage will be different.

[0064] Therefore, in some possible examples, referring to Figure 4 The digital-to-analog conversion submodule 23 further includes a mismatch adjustment unit 35 electrically connected with the signal mapping submodule 22 and the remapping unit 31, configured to generate a mode control signal according to the code stream characteristics of the input digital mapping signal, and send the mode control signal to the remapping unit 31. The remapping unit 31 performs remapping processing on the digital mapping signal according to the mode control signal to obtain a plurality of selection control signals. It can be understood that for different digital mapping signals, different remapping modes are used, so that the part falling within the signal bandwidth of the error energy caused by the static mismatch is reduced.

[0065] In some possible examples, the remapping unit 31 can adopt a plurality of preset remapping manners, and randomly select one remapping manner each time remapping processing is needed. Through random selection, the part of error energy caused by static mismatch and falling within the signal bandwidth can be reduced.

[0066] It should be noted that the above two schemes for reducing the static mismatch problem are exemplified in this example. In some possible examples, the schemes can be implemented by using a dynamic element matching (DEM), a data-weighted averaging (DWA), a bidirectional data-weighted averaging, vectoring high-order shaping, or the like. Correspondingly, the structure of the digital-to-analog conversion sub-module 23 will change, and the corresponding scheme falls within the protection scope of the present disclosure.

[0067] Considering that each device in the device array selection unit 32 can generate a time-domain glitch over time when the device is switched from a gating state to a non-gating state or from a non-gating state to a gating state, dynamic mismatch can exist between units. In some possible examples, each device in the device array selection unit 32 can create a gating switch copy.

[0068] Referring to Figure 5 , when each device in the device array selection unit 32 is a resistor R, the device array selection unit 32 further includes switches S1 to S4, and S3 and S4 are used to create a gating switch copy. The remapping unit 31 controls the switches S1 to S4 to switch at each switch phase Φ when receiving a digital mapping signal Di. When Φ is 1, S1 and S2 are used; and when Φ is 0, S3 and S4 are used.

[0069] Each switch phase Φ has only one switch switching, and at each rising edge of the clock CLK, there is exactly one rising edge and one falling edge in the switches S1 to S4. The output error Vi-DiVref of the device generates the same pulse signal at each switch phase, and at this time, the pulse signal is no longer related to the input digital mapping signal Di.

[0070] In this way, the time-domain glitch caused by the dynamic mismatch tends to be consistent in this example, so the frequency and form of the spur peak introduced by the glitch are relatively fixed. At this time, mutual modulation does not occur, and the spur peak position does not fall within the useful signal bandwidth, and the position also does not frequently change unpredictably. Finally, the spur signal introduced by the above time-domain glitch in the frequency domain can be easily eliminated, and the effect of improving the signal quality (signal-to-noise-and-distortion ratio (SNDR)) of the analog tuning signal output by the digital-to-analog conversion module 23 can be achieved.

[0071] In one example, the analog signal calculation unit 33 can be implemented using analog circuitry, see [reference needed]. Figure 6 The analog signal calculation unit 33 may include a summation calculation subunit 41 and a signal correction subunit 42.

[0072] The summation calculation subunit 41 is used to sum the analog signal output by the device array selection unit 32 to obtain the initial analog signal. This summation calculation subunit 41 can be implemented using an inverting summation circuit or a non-inverting summation circuit based on an operational amplifier.

[0073] The signal correction subunit 42 is used to correct the initial analog signal to obtain a candidate analog signal. The signal correction subunit 42 can use at least one circuit or algorithm selected from chopping, self-zeroing, chopping self-stabilization, barrel shifting, and flow-controlled shifting to correct the initial analog signal.

[0074] In this example, since the analog signal calculation unit 33 is implemented using analog circuits, its output value is continuous in the time domain, without any jumps or holds; and through signal correction, the offset and low-frequency noise signals introduced by the summing analog circuit can be reduced, thereby improving the accuracy of the candidate analog signal.

[0075] In one example, see [link to example]. Figure 1 The oscillator 10 also includes an automatic sensing and compensation logic module 14. The automatic sensing and compensation logic module 14 is electrically connected to the frequency control module 13.

[0076] The automatic sensing and compensation logic module 14 is used to acquire the physical environment change of the environment where the oscillator module 11 is located, and generate a compensation signal based on the physical environment change; and send the compensation signal to the frequency control module 13; the frequency control module 13 is used to generate a digital tuning control signal based on the compensation signal.

[0077] In one example, the sensors within the automatic sensing and compensation logic module 14 can be configured based on the physical environment affecting the oscillator module 11. For instance, when the oscillator module 11 is affected by temperature, the automatic sensing and compensation logic module 14 includes a temperature sensor; similarly, when the oscillator module 11 is affected by acceleration, the automatic sensing and compensation logic module 14 includes an acceleration sensor; furthermore, when the oscillator module 11 is affected by both temperature and acceleration, the automatic sensing and compensation logic module 14 includes both a temperature sensor and an acceleration sensor. When the changes in the physical environment of the oscillator module 11 can be accurately collected, the configuration of the automatic sensing and compensation logic module 14 falls within the protection scope of this disclosure.

[0078] It should be noted that the automatic sensing and compensation logic module 14 can store a preset mapping relationship between physical changes and digital tuning control signals. This preset mapping relationship between physical changes and digital tuning control signals can be tested and stored in advance.

[0079] When the automatic sensing and compensation logic module 14 includes a sensor, the aforementioned physical change is the physical change acquired by the sensor. For example, if the automatic sensing and compensation logic module 14 includes a temperature sensor, the temperature change used by the temperature sensor is the aforementioned physical change.

[0080] When the automatic sensing and compensation logic module 14 includes two or more sensors, the aforementioned physical change is the weighted value of the physical change collected by the two or more sensors. Taking an automatic sensing and compensation logic module 14 including a temperature sensor and an acceleration sensor as an example, the temperature sensor collects the temperature change, and the acceleration sensor collects the acceleration change. Then, the product of the temperature change and a preset temperature weight, and the product of the acceleration change and a preset acceleration weight are obtained, and the sum of the two products is obtained as the aforementioned physical change.

[0081] It should be noted that when the automatic sensing and compensation logic module 14 includes two or more sensors, the weight values ​​of the physical changes can be set according to the influence of each physical parameter on the oscillator module 11, for example, each weight value can be pre-configured. In one example, the physical changes collected by each sensor in each acquisition cycle can be obtained to obtain a set of physical changes within each acquisition cycle; then, multiple sets of physical changes and the frequency change of the oscillator module 11 (i.e., the compensation signal) are fitted to obtain a mapping function between each physical change and the frequency change. It is understood that the above mapping function includes the weight values ​​of each physical change.

[0082] In another example, see [link to example]. Figure 1 The oscillator 10 also includes an external control interface module 15, which is electrically connected to the frequency control module 13. The external control interface module 15 is used to acquire external control quantities. These external control quantities can be frequency tuning direction, frequency tuning value, or the operating mode of the frequency control module 13, and can be set according to specific circumstances. Then, the external control interface module 15 generates a compensation signal based on the external control quantity and sends the compensation signal to the frequency control module 13; the frequency control module 13 generates a digital tuning control signal based on the compensation signal. Thus, in this example, by setting the external control interface module 15, external control quantities input by the user can be acquired, which helps improve the control accuracy of the oscillator 10.

[0083] The oscillator provided in this embodiment can generate an analog tuning signal from a digital tuning control signal, eliminating the frequency jump problem during digital compensation and improving short-term frequency stability. Furthermore, by controlling the noise and distortion introduced during the conversion process, the phase noise and frequency stability of the oscillator can be guaranteed. In addition, by adapting to the frequency drift characteristics of different high-precision oscillators, no specific circuits or components are required, which improves versatility and flexibility.

[0084] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the disclosure herein. This disclosure is intended to cover any variations, uses, or adaptations that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the following claims.

[0085] It should be understood that this disclosure is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this disclosure is limited only by the appended claims.

Claims

1. An oscillator characterized by, The frequency control module, the automatic sensing and compensation logic module, the oscillator module and the tuning interface module are included; the tuning interface module is electrically connected with the oscillator module and the frequency control module respectively; the automatic sensing and compensation logic module is electrically connected with the frequency control module; The automatic sensing and compensation logic module is used for acquiring a physical environmental change amount of an environment where the oscillator module is located, and generating a compensation signal according to the physical environmental change amount; and the compensation signal is sent to the frequency control module; The frequency control module is used for generating a digital tuning control signal according to the compensation signal; The frequency control module is used for providing the digital tuning control signal to the tuning interface module; The tuning interface module is used for generating an analog tuning amount signal according to the acquired clock signal and the digital tuning control signal, and outputting the analog tuning amount signal to the oscillator module; The tuning interface module includes a clock distribution sub-module, a signal mapping sub-module and a digital-to-analog conversion module; the clock distribution sub-module is electrically connected with the signal mapping sub-module and the digital-to-analog conversion module respectively; the signal mapping sub-module and the digital-to-analog conversion module are electrically connected. The clock signal acquired by the tuning interface module is provided by the oscillator module.

2. The oscillator of claim 1, wherein A reference oscillation module is further included, and the reference oscillation module is electrically connected with the tuning interface module; 3. The oscillator of claim 1, wherein The reference oscillation module is used for providing a clock signal to the tuning interface module. The clock distribution sub-module is used for performing distribution processing on the clock signal to obtain a first clock sub-signal and a second clock sub-signal; 4. The oscillator of claim 1, wherein The signal mapping sub-module is used for performing mapping processing on the digital tuning control signal according to the first clock sub-signal to obtain a digital mapping signal; The digital-to-analog conversion sub-module is used for performing digital-to-analog conversion on the digital mapping signal according to the second clock sub-signal to obtain the analog tuning amount signal. The signal mapping sub-module is realized by a digital circuit, and is used for performing sampling processing on a digital tuning control signal of a first bit width according to the first clock sub-signal to obtain a digital mapping signal of a second bit width; the first bit width is greater than the second bit width.

5. The oscillator of claim 4, wherein, The digital-to-analog conversion sub-module includes a remapping unit, a device array gating unit, an analog signal calculation unit and a low-pass filter unit; the device array gating unit is electrically connected with the remapping unit and the analog signal calculation unit respectively, and the analog signal calculation unit is electrically connected with the low-pass filter unit; 6. The oscillator of claim 4, wherein, The remapping unit is used for performing remapping processing on the digital mapping signal to obtain a plurality of gating control signals; The device array selection unit is used for switching the working states of each device according to the plurality of gating control signals, and each device outputs a matching analog signal after being switched to the working state; The analog signal calculation unit is used for performing summation processing on the analog signal output by the device array selection unit to obtain a candidate analog signal; The low-pass filter unit is used for filtering out high-frequency signals and stray signals in the candidate analog signal to obtain the analog tuning amount signal. ​ 7. The oscillator of claim 6, wherein, The analog signal calculation unit comprises a summation calculation subunit and a signal correction subunit; The summation calculation subunit is configured to perform summation processing on the analog signals output by the device array selection unit to obtain initial analog signals; The signal correction subunit is configured to perform signal correction on the initial analog signals to obtain the candidate analog signals.

8. The oscillator of claim 1, wherein Further comprising an external control interface module, the external control interface is electrically connected with the frequency control module; The external control interface module is configured to generate a compensation signal from the obtained external control quantity and send the compensation signal to the frequency control module; The frequency control module is configured to generate the digital tuning control signal according to the compensation signal.

9. The oscillator of claim 1, wherein, The analog tuning quantity signal comprises one of the following: voltage, current, charge and capacitance.

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