A server application architecture migration method, device and storage medium

Abstract

The present invention relates to a server application architecture migration method, device and storage medium, wherein the method comprises an automatic detection module analyzing and checking the application to be migrated under the X86 architecture, including static code analysis, dynamic performance analysis and system compatibility check of the application to be migrated; according to the analysis and inspection results of the automatic detection module, the automatic adjustment module replaces X86-specific instructions and library functions, memory allocation optimization and memory mapping adjustment, and generates an automatic adjustment report; the automatic optimization module performs performance benchmark testing, and performs memory access optimization, algorithm optimization, task scheduling optimization and multi-core parallelization adjustment according to the test results. The server application architecture migration method, device and storage medium can simplify the architecture adaptation process, provide performance optimization support, automatic dependency management, improve migration efficiency and reduce costs.

Description

Technical Field

[0001] The present invention relates to the field of application migration, and in particular to a method, device and storage medium for migrating a server application architecture. Background Art

[0002] With the rapid development of technologies such as cloud computing, big data, and artificial intelligence, the diversification of server architectures and hardware platforms has become a trend. In these development processes, X86 architecture and ARM architecture are currently the two most mainstream server architectures. The X86 architecture is dominated by Intel and AMD, with a mature ecosystem, extensive application support, and powerful processing capabilities; while the ARM architecture is designed by ARM, focusing on low power consumption, low cost, and high energy efficiency, and has gained a significant market share in embedded, mobile devices, and some specific applications. As the performance of the ARM architecture continues to improve, more and more companies are beginning to choose it as a server platform, especially in the fields of cloud computing and edge computing. ARM's low power consumption and high efficiency make it an ideal choice for many large-scale data centers, IoT devices, and high-performance computing (HPC) scenarios. In particular, some dedicated chips based on the ARM architecture (such as Huawei's Kunpeng processor) have excellent processing power and energy efficiency, and are gradually becoming the core components of the new generation of data centers. However, with the continuous emergence of a new generation of ARM server hardware, how to seamlessly migrate existing applications running on the X86 architecture to the ARM architecture platform has become an important technical challenge. Although the ARM architecture has lower power consumption and excellent performance, the differences between the X86 and ARM architectures, including instruction set differences, memory management differences, hardware acceleration differences, etc., lead to complexity in the migration process. Most existing migration solutions have problems such as poor architecture compatibility, cumbersome migration process, and poor performance after migration.

[0003] In the specific application migration process, common challenges in migrating X86 architecture applications to ARM architecture include:

[0004] Instruction set differences: The X86 architecture uses the CISC (Complex Instruction Set Computer) instruction set, while the ARM architecture uses the RISC (Reduced Instruction Set Computer) instruction set, resulting in significant differences between the instruction sets of the two architectures. The instruction sets and optimized codes written for traditional applications on the X86 architecture cannot be directly run on the ARM architecture and need to be refactored or compiled for optimization.

[0005] Memory management differences: There are significant differences in the memory management designs of the X86 and ARM architectures. The X86 architecture generally has a more complex memory management mechanism, while the ARM architecture focuses on simplifying memory management to optimize energy efficiency. During the migration process, how to optimize memory access and cache management on the ARM platform to ensure application performance is an important challenge.

[0006] Differences in hardware acceleration support: The hardware acceleration standards (such as SSE and AVX) supported by the X86 architecture are different from those supported by the ARM architecture. When migrating, you need to consider how to replace and adapt these acceleration instructions. Especially in applications with high computing requirements such as machine learning and image processing, how to fully utilize the hardware acceleration capabilities of the ARM platform is a key technology for migration.

[0007] Multi-core parallel optimization: The multi-core processing method of the ARM architecture is different from that of the X86 architecture. How to fully utilize multi-core resources on the ARM platform and optimize parallel computing to avoid performance bottlenecks is another technical challenge that needs to be solved during the migration process.

[0008] There are significant differences between the X86 architecture and the ARM architecture in terms of instruction set, memory management, hardware interface, etc. The existing migration methods are difficult to effectively handle these differences, resulting in the inability of applications to run normally or poor performance on the ARM platform. Especially in server applications for high-performance computing, large-scale concurrent processing, and hardware acceleration, the architecture adaptation problem during the migration process is particularly prominent. During the migration process, how to efficiently replace the instruction set unique to the X86 architecture (such as SSE, AVX) and use the optimization methods of the ARM architecture (such as NEON) to replace it, avoid performance loss, and ensure efficient computing and the use of hardware acceleration (such as GPU, NPU, etc.) is an important challenge. Under the ARM architecture, the memory access mode and parallel computing method are different from the X86 architecture. How to reasonably optimize memory alignment, cache management, thread scheduling, etc. on the ARM platform to ensure the efficient operation of the application and avoid memory access bottlenecks and multi-core performance waste is also a major technical challenge faced during the migration process. Most of the existing migration tools are adapted to a single platform, and lack automated support for the migration process from X86 to ARM architecture. How to standardize and automate the migration process and ensure the seamless operation of migrated applications on different hardware platforms (including X86 and ARM) through containerized deployment and cross-platform support is an urgent problem to be solved. Since the long-term stability and performance verification of migrated applications often rely on manual testing, there is a lack of effective automated tools to continuously monitor and evaluate the stability, performance, resource consumption and other indicators of migrated applications on the ARM platform, resulting in poor stability of some applications in actual production environments. Summary of the invention

[0009] The present invention provides a server application architecture migration method, device and storage medium, aiming to solve at least one of the technical problems existing in the prior art.

[0010] The technical solution of the present invention is a server application architecture migration method, the server application architecture migration method is applied to a server application architecture migration device, the server application architecture migration device comprises: an automatic detection module, an automatic adjustment module and an automatic optimization module connected in sequence, the server application architecture migration method comprises the following steps:

[0011] S100, the automatic detection module analyzes and checks the application to be migrated under the X86 architecture, including static code analysis, dynamic performance analysis and system compatibility check of the application to be migrated;

[0012] S200, according to the analysis and inspection results of the automatic detection module, the automatic adjustment module replaces X86-specific instructions and library functions, optimizes memory allocation and adjusts memory mapping, and generates an automatic adjustment report;

[0013] S300, the automatic optimization module performs performance benchmark tests and performs memory access optimization, algorithm optimization, task scheduling optimization, and multi-core parallelization adjustments based on the test results.

[0014] Further, the step S100 includes the following steps:

[0015] S110. Use static code analysis tools Clang and / or LLVM to perform static code analysis, extract hardware dependency information from the code, use the Clang compiler to compile the source code, and perform syntax checking and type checking on the source code, convert high-level source code into intermediate representation, help subsequent instruction set analysis and dependency search, and generate an abstract syntax tree (AST) and intermediate code (IR);

[0016] S120, identifying the X86 instruction set through the target option in Clang, marking the code segments containing X86 architecture instructions, and generating a report containing the code segments that need to be replaced or optimized;

[0017] S130, analyzing dependent libraries and hardware acceleration functions, if library function calls under the X86 architecture are detected, evaluating compatibility under the ARM architecture, and recommending replacing libraries that rely on specific X86 hardware acceleration with corresponding optimized libraries under the ARM architecture;

[0018] S140. Generate a report to identify X86 architecture-specific instructions, list all X86 architecture-related instructions, libraries, hardware acceleration functions, and possible problems in migration, and provide replacement suggestions.

[0019] Furthermore, the step S100 also includes the following steps:

[0020] S150. Use the dynamic performance analysis tool perf to run the application to be migrated on the X86 architecture, monitor performance data such as CPU usage, memory bandwidth, cache hit rate, and thread synchronization indicators, monitor CPU usage through the perf stat command, and use perf record to record detailed performance data, including cache misses and branch prediction failures;

[0021] S160, based on the performance data generated by perf, automatically analyzes potential bottlenecks such as memory access patterns, cache misses, and lock contention. If it is found that some algorithms perform poorly on multi-core systems or that memory bandwidth is limited, the performance bottlenecks are automatically marked, and corresponding optimization suggestions are proposed, such as improving memory access patterns and adjusting parallelization strategies.

[0022] S170. Generate a performance bottleneck report based on the analysis results, list the main performance bottlenecks of the application to be migrated, and provide optimization suggestions.

[0023] Further, the step S200 includes the following steps:

[0024] S210, automatically replacing the detected X86-specific instructions with instructions supported by the ARM architecture, and converting the X86 instruction segments into codes compatible with the ARM architecture through a search and replace algorithm;

[0025] S220, for applications to be migrated that rely on X86 optimized libraries, automatically select and replace them with optimized libraries on the ARM platform, and automatically replace library function calls through configuration files or built-in library mapping tables to ensure that hardware acceleration can continue to be obtained under the ARM architecture;

[0026] S230, analyze the memory access pattern under the X86 architecture, automatically optimize memory alignment, memory pool and data locality, and adjust the memory allocation strategy to adapt to the memory model of the ARM architecture;

[0027] S240, for parallel applications that need to share memory, automatically adjust the memory mapping method according to the memory consistency model of the ARM architecture to avoid cache consistency issues in the X86 architecture;

[0028] S250. Generate an automatic adjustment report, listing all replaced and optimized code segments, library functions and memory management strategies.

[0029] Further, the step S300 includes the following steps:

[0030] S310,Performance benchmarking on ARM architecture;

[0031] S320, analyze CPU, memory, and IO bottlenecks and provide optimization suggestions;

[0032] S330, memory access optimization, algorithm optimization, task scheduling optimization and multi-core parallelization adjustment for ARM architecture.

[0033] Furthermore, in step S310, in the performance benchmark test, matrix multiplication, data sorting and calculation and multi-threaded parallel calculation are tested, and execution time, memory bandwidth, CPU utilization, cache hit rate and thread efficiency are collected and analyzed, wherein,

[0034] The execution time is the running time of the entire application, the memory bandwidth is the memory access speed or read and write speed of the application, the CPU utilization is the efficiency of single-core and multi-core CPU usage, the cache hit rate is the ratio of cache hits in memory access, and the thread efficiency is the efficiency of multi-threaded parallel computing, including thread scheduling and synchronization.

[0035] Further, in step S330, the memory access optimization is to automatically optimize the memory access mode to avoid the memory bandwidth bottleneck, and automatically adjust the data layout according to the cache characteristics of the ARM architecture to reduce the cache miss rate;

[0036] The algorithm optimization is to automatically select an optimization algorithm specific to the ARM architecture for the performance bottleneck part of the application, or call an optimized third-party library for acceleration;

[0037] Task scheduling optimization automatically optimizes task scheduling strategies based on the hardware topology of the ARM architecture to avoid performance loss caused by unreasonable thread scheduling;

[0038] Multi-core parallelization adjustment means that if parallelization tools such as OpenMP or Intel TBB are used on the X86 architecture, the multi-core scheduling characteristics of the ARM architecture will be automatically analyzed, and the parallelization strategy will be adjusted. According to the core number and scheduling strategy of the ARM multi-core processor, the parallel algorithm will be automatically modified, and parameters such as the number of threads and core binding will be adjusted to achieve optimal performance.

[0039] Furthermore, the present invention also proposes a server application architecture migration device for executing the server application architecture migration method. The server application architecture migration device comprises an automatic detection module, an automatic adjustment module and an automatic optimization module connected in sequence, wherein:

[0040] The automatic detection module is used to scan the applications to be migrated under the X86 architecture, identify the architecture-related features, instruction sets, dependent libraries, etc. in the applications to be migrated, and detect the parts that may cause compatibility issues or performance bottlenecks under the X86 architecture through automated tools;

[0041] The automatic adjustment module is used to adjust the source code, compilation options, dependent libraries and memory management mode according to the detection results of the automatic detection module, so that the application to be migrated can adapt to the characteristics of the ARM architecture;

[0042] The automatic optimization module is used to ensure that the application can reach the expected performance standard under the ARM architecture through performance analysis and optimization after the application is migrated to the ARM architecture.

[0043] Furthermore, the present invention also proposes a computer-readable storage medium having program instructions stored thereon, and the program instructions implement the server application architecture migration method when executed by a processor.

[0044] The beneficial effects of the present invention are:

[0045] The server application architecture migration method, device and storage medium automatically identify and solve the instruction set differences, memory management differences and hardware acceleration differences between X86 and ARM architectures through intelligent migration tools, reduce the workload of manual modification and reduce the probability of errors. Provide comprehensive architecture compatibility detection and automatic repair mechanism to ensure that the migrated application can run stably on the ARM architecture and can fully utilize the hardware characteristics of ARM. During the migration process, by deeply analyzing the computing mode and performance bottleneck of the application, automatically select and apply optimization technologies suitable for the ARM architecture (such as memory optimization, parallel computing optimization, hardware acceleration utilization, etc.), to ensure that the migrated application can fully utilize the performance advantages of the ARM architecture. Provide performance tuning tools based on the ARM architecture to avoid performance losses caused by virtualization and containerization, and ensure that the migrated application can run efficiently on the native ARM platform. Through intelligent dependency analysis, automatically detect and repair dependency problems that may be encountered by the application during the migration process, avoid complex manual migration and dependency configuration, and simplify the migration process. Provide comprehensive migration reports and testing tools to ensure that the migrated application can run smoothly and be compatible with all necessary system dependencies. It can greatly reduce the labor cost of migration, and through intelligent analysis and repair mechanisms, reduce the need for human intervention, making the migration process more efficient and controllable. The systematic and modular migration framework enables the migration tool to adapt to a variety of different application scenarios and can be quickly deployed and put into use. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Figure 1 The overall flow chart of the server application architecture migration method.

[0047] Figure 2 The invention is a flowchart for analyzing and checking the application to be migrated under the X86 architecture for the automatic detection module in the server application architecture migration method, including static code analysis, dynamic performance analysis and system compatibility check of the application to be migrated.

[0048] Figure 3 A flowchart is provided for automatically adjusting a module in a server application architecture migration method to replace X86-specific instructions and library functions, optimize memory allocation and adjust memory mapping, and generate an automated adjustment report.

[0049] Figure 4 A flowchart of performing performance benchmark tests for the automatic optimization module in the server application architecture migration method, and performing memory access optimization, algorithm optimization, task scheduling optimization, and multi-core parallelization adjustment based on the test results.

[0050] Figure 5 It is a structural diagram of a server application architecture migration device.

[0051] Reference numerals: 100, automatic detection module; 200, automatic adjustment module; 300, automatic optimization module. DETAILED DESCRIPTION

[0052] The following will be combined with the embodiments and drawings to clearly and completely describe the concept, specific structure and technical effects of the present invention, so as to fully understand the purpose, scheme and effect of the present invention. It should be noted that the embodiments and features in the embodiments of this application can be combined with each other without conflict.

[0053] It should be noted that, unless otherwise specified, when a feature is referred to as being "fixed" or "connected" to another feature, it may be directly fixed or connected to the other feature, or it may be indirectly fixed or connected to the other feature. In addition, the descriptions of up, down, left, right, top, bottom, etc. used in the present invention are only relative to the relative positional relationship of the components of the present invention in the drawings.

[0054] In addition, unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by those skilled in the art. The terms used in this specification are only for describing specific embodiments, not for limiting the present invention. The term "and / or" used herein includes any combination of one or more related listed items.

[0055] It should be understood that, although the terms first, second, third, etc. may be used to describe various elements in the present disclosure, these elements should not be limited to these terms. These terms are only used to distinguish elements of the same type from each other. For example, without departing from the scope of the present disclosure, the first element may also be referred to as the second element, and similarly, the second element may also be referred to as the first element.

[0056] Reference Figure 1In some embodiments, the technical solution of the present invention is a server application architecture migration method, the server application architecture migration method is applied to a server application architecture migration device, the server application architecture migration device includes: an automatic detection module 100, an automatic adjustment module 200 and an automatic optimization module 300 connected in sequence, the server application architecture migration method includes the following steps:

[0057] S100, the automatic detection module 100 analyzes and checks the application to be migrated under the X86 architecture, including performing static code analysis, dynamic performance analysis and system compatibility check on the application to be migrated;

[0058] S200, according to the analysis and inspection results of the automatic detection module 100, the automatic adjustment module 200 replaces X86-specific instructions and library functions, optimizes memory allocation and adjusts memory mapping, and generates an automatic adjustment report;

[0059] S300, the automatic optimization module 300 performs a performance benchmark test, and performs memory access optimization, algorithm optimization, task scheduling optimization and multi-core parallelization adjustment according to the test results.

[0060] The beneficial effects of the present invention are:

[0061] The server application architecture migration method, device and storage medium can simplify the architecture adaptation process, provide performance optimization support, automated dependency management, improve migration efficiency and reduce costs.

[0062] Specifically, the server application architecture migration method, device and storage medium automatically identify and solve the instruction set differences, memory management differences and hardware acceleration differences between X86 and ARM architectures through intelligent migration tools, reduce the workload of manual modification and reduce the probability of errors. Provide a comprehensive architecture compatibility detection and automatic repair mechanism to ensure that the migrated application can run stably on the ARM architecture and can fully utilize the hardware characteristics of ARM. During the migration process, by deeply analyzing the computing mode and performance bottleneck of the application, automatically select and apply optimization technologies suitable for the ARM architecture (such as memory optimization, parallel computing optimization, hardware acceleration utilization, etc.), to ensure that the migrated application can give full play to the performance advantages of the ARM architecture. Provide a performance tuning tool based on the ARM architecture to avoid performance losses caused by virtualization and containerization, and ensure that the migrated application can run efficiently on the native ARM platform. Through intelligent dependency analysis, automatically detect and repair dependency problems that may be encountered by the application during the migration process, avoid complex manual migration and dependency configuration, and simplify the migration process. Provide a comprehensive migration report and testing tool to ensure that the migrated application can run smoothly and be compatible with all necessary system dependencies. It can greatly reduce the labor cost of migration, and through intelligent analysis and repair mechanisms, reduce the need for human intervention, making the migration process more efficient and controllable. The systematic and modular migration framework enables the migration tool to adapt to a variety of different application scenarios and can be quickly deployed and put into use.

[0063] The existing migration solution from X86 architecture to ARM architecture has the following main disadvantages:

[0064] (1) Compatibility issues caused by differences in instruction sets and architectures: X86 and ARM architectures have significant differences in instruction sets, memory management, hardware acceleration support, etc. Existing migration solutions (such as manual refactoring, automated compilation tools, etc.) are usually difficult to handle these underlying architectural differences, resulting in the possibility that the migrated applications may not be able to fully utilize the advantages of the ARM architecture, and may even cause runtime errors or performance bottlenecks. The migration process usually requires manual modification of a large amount of low-level code, which not only increases the workload of developers, but also easily leads to errors and performance degradation.

[0065] (2) Insufficient performance optimization: Although existing automated compilation migration tools (such as GCC and LLVM, which support compiling applications into ARM architecture binaries) can automatically complete instruction set conversion, they are often not sufficient in terms of performance optimization after migration. For complex applications, especially those that are computationally intensive and rely heavily on hardware acceleration, automated compilation tools are often unable to perform in-depth performance optimization, resulting in the fact that the migrated applications may not be able to perform as expected on the ARM architecture. The performance of applications on the ARM architecture may be low, failing to fully utilize the high performance and low power consumption advantages of the ARM architecture.

[0066] (3) Performance overhead of virtualization and containerization solutions: Although virtualization and containerization technologies can easily achieve migration from X86 to ARM, the virtualization layer or container runtime introduced by these solutions will bring additional performance overhead. Especially in scenarios such as high-performance computing and machine learning that require full utilization of hardware performance, the overhead of virtualization or containerization will make the performance of the migrated application far lower than that of the native application running on the X86 architecture. Virtualization and containerization solutions are suitable for rapid migration, but for the migration of high-performance applications, the performance loss is serious and cannot meet the needs of computing-intensive tasks.

[0067] (4) Migration complexity and dependency management: Existing technologies often lack sufficient automation support when handling the migration of large-scale applications and complex dependencies. For systems with complex dependencies, the workload of manual migration and optimization is huge, which can easily lead to compatibility issues or dependency errors in the migrated applications. The migration process of complex applications is cumbersome and error-prone, and requires a lot of manpower and time.

[0068] In view of the above shortcomings of the prior art, the object of the present invention is to provide an efficient, automated and fully optimized performance X86 to ARM architecture migration solution to solve the following problems existing in the prior art:

[0069] (1) Simplify the architecture adaptation process: Through intelligent migration tools, the differences in instruction sets, memory management, and hardware acceleration between X86 and ARM architectures can be automatically identified and resolved, reducing the workload of manual modification and the probability of errors. Comprehensive architecture compatibility detection and automatic repair mechanisms are provided to ensure that the migrated applications can run stably on the ARM architecture and can fully utilize the hardware features of ARM.

[0070] Among them, architecture compatibility check is a key technology to ensure that the differences between X86 architecture and ARM architecture are effectively handled. The differences between the two are mainly reflected in the instruction set architecture (ISA), memory model, byte order (endianness) and other aspects. Compatibility check eliminates potential incompatibility issues by ensuring that the source code, library and compilation options can adapt to the target architecture. The method applied to the present invention is to automatically perform architecture compatibility checks during the migration process. The system will identify incompatible libraries, compilation options and hardware dependencies (such as instruction sets, byte order, etc.), and provide compatibility repair solutions. This process avoids the tediousness of manually checking each dependency and reduces system crashes or performance issues caused by architectural differences.

[0071] (2) Performance optimization support: During the migration process, by deeply analyzing the computing mode and performance bottlenecks of the application, we automatically select and apply optimization technologies suitable for the ARM architecture (such as memory optimization, parallel computing optimization, hardware acceleration utilization, etc.), ensuring that the migrated application can fully utilize the performance advantages of the ARM architecture. In response to high-performance computing needs, we provide performance tuning tools based on the ARM architecture to avoid performance losses caused by virtualization and containerization, and ensure that the migrated application can run efficiently on the native ARM platform.

[0072] (3) Automated dependency management: Through intelligent dependency analysis, it automatically detects and repairs dependency problems that may be encountered during the migration process, avoiding complex manual migration and dependency configuration, and simplifying the migration process. It provides comprehensive migration reports and testing tools to ensure that the migrated application can run smoothly and is compatible with all necessary system dependencies.

[0073] (4) Improving migration efficiency and reducing costs: The automated tool provided by the present invention can greatly reduce the labor cost of migration, and through intelligent analysis and repair mechanisms, reduce the need for human intervention, making the migration process more efficient and controllable. The systematic and modular migration framework enables the migration tool to adapt to a variety of different application scenarios and can be quickly deployed and put into use.

[0074] The present invention solves the above problems by the following technical means:

[0075] (1) Static and dynamic code analysis: Static code analysis is used to identify the code related to the instruction set, memory management, and hardware interface unique to the X86 architecture, and to perform architecture adaptation. At the same time, dynamic analysis tools are used to detect the running status of the application to ensure that all hardware-related dependencies are correctly handled during the migration process.

[0076] (2) Architecture adaptation and instruction set replacement: Use the NEON instruction set of the ARM platform to replace the SSE, AVX and other instruction sets in the X86 architecture, optimize computing-intensive tasks, and ensure that the migrated application has good performance under the ARM architecture. At the same time, optimize the memory access mode and parallel computing strategy to improve the efficiency of memory management and multi-core processing.

[0077] (3) Hardware acceleration and resource optimization: Perform application-level hardware acceleration optimization for ARM architecture hardware accelerators (such as GPU and NPU) to avoid performance degradation caused by hardware mismatch during the migration process.

[0078] (4) Automated migration process and containerized deployment: Automated application migration process, using standardized migration tools to automatically identify and modify architecture-related code, reducing manual intervention. Use containerization technology (such as Docker) to ensure that applications can run seamlessly across X86 and ARM architectures, and support containerized deployment to improve system maintainability and scalability.

[0079] (5) Long-term stability and performance testing: On the migrated ARM platform, use automated testing tools to perform functional verification, performance benchmark testing, and long-term stress testing to ensure that the migrated application can run stably on the ARM platform for a long time and that its performance reaches or exceeds that of the X86 platform.

[0080] Further, refer to Figure 1 and Figure 2 , the step S100 includes the following steps;

[0081] S110. Use static code analysis tools Clang and / or LLVM to perform static code analysis, extract hardware dependency information from the code, use the Clang compiler to compile the source code, and perform syntax checking and type checking on the source code, convert high-level source code into intermediate representation, help subsequent instruction set analysis and dependency search, and generate an abstract syntax tree (AST) and intermediate code (IR);

[0082] S120, identifying the X86 instruction set through the target option in Clang, marking the code segments containing X86 architecture instructions, and generating a report containing the code segments that need to be replaced or optimized;

[0083] S130, analyzing dependent libraries and hardware acceleration functions, if library function calls under the X86 architecture are detected, evaluating compatibility under the ARM architecture, and recommending replacing libraries that rely on specific X86 hardware acceleration with corresponding optimized libraries under the ARM architecture;

[0084] S140. Generate a report to identify X86 architecture-specific instructions, list all X86 architecture-related instructions, libraries, hardware acceleration functions, and possible problems in migration, and provide replacement suggestions.

[0085] Before step S110, you need to install and configure the following tool chains on the X86 platform and the ARM platform respectively:

[0086] (1) Install Clang and perf on the X86 platform:

[0087] Install Clang / LLVM: sudo apt install clang

[0088] Install perf: sudo apt install linux-tools-common linux-tools-genericlinux-tools-$(uname -r)

[0089] (2) Install the ARM cross compiler and ARM Compute Library on the ARM platform:

[0090] Install the ARM cross-compilation toolchain:

[0091] sudo apt install gcc-arm-linux-gnueabihf g++-arm-linux-gnueabihf

[0092] Install the ARM Compute Library:

[0093] git clone https: / / github.com / ARM-software / ComputeLibrary.git

[0094] cd ComputeLibrary

[0095] scons Werror=1

[0096] Static code analysis is a technology that discovers potential problems by analyzing source code or binary code without executing the program. During the migration process, static code analysis can automatically detect X86 architecture-specific instructions, system calls, and hardware-related dependencies to ensure that these parts can be correctly replaced or modified on the ARM architecture. The method applied to the present invention is that through static analysis, the tool will automatically identify the X86 instruction set (such as SSE, AVX, etc.) and architecture-specific operations (such as memory layout, instruction pipeline), and provide automatic replacement suggestions or code correction suggestions to help developers quickly adapt to the ARM architecture.

[0097] In step S110, Clang is used to perform static code analysis. In the early stage of migration, Clang is used to perform static analysis on the existing source code to identify X86 architecture-specific dependencies. The static analysis function of Clang / LLVM is used to analyze X86 architecture-specific instructions (such as AVX, SSE, etc.) in the source code through command line tools. Replacement suggestions are provided for each X86-specific instruction to ensure that the original X86 instructions can be replaced with the Neon instruction set (SIMD instructions of the ARM architecture) on the ARM platform.

[0098] Write a simple shell script to automatically detect and report X86 instructions through Clang's analysis tool:

[0099] #! / bin / bash

[0100] # Set the target platform to x86_64

[0101] TARGET="x86_64-linux-gnu"

[0102] # Compile source code and perform static analysis

[0103] clang -target $TARGET -Xclang -analyze -Xclang -analyzer-checker=core,deadcode.DeadStores source_code.c

[0104] # Check AVX and SSE instructions, report the used X86 instructions

[0105] grep "AVX" source_code.c > avx_instructions_report.txt

[0106] grep "SSE" source_code.c > sse_instructions_report.txt

[0107] echo "Static analysis report generated: avx_instructions_report.txt, sse_instructions_report.txt"

[0108] The above script first performs static analysis through the Clang tool and marks the AVX and SSE instructions used in the source code. The grep command is used to find and generate a report listing the usage of X86 instructions.

[0109] After executing this script, you will get analysis results similar to the following:

[0110] Static analysis reports generated: avx_instructions_report.txt, sse_instructions_report.txt

[0111] The report will list in detail the locations of all AVX and SSE instructions in the code and the suggested replacement methods.

[0112] Specifically, in step S110 to step S140, static code analysis is performed, the goal is to analyze the source code and find architecture-related instruction sets, library functions, hardware acceleration features, etc. The analysis tool is selected first, and Clang / LLVM is used for static code analysis. The LLVM tool chain can handle languages ​​such as C, C++, Rust, and can extract hardware dependency information in the code. Then, the abstract syntax tree (AST) is compiled and generated. In step S110, the source code is compiled using the Clang compiler to generate an abstract syntax tree (AST) and intermediate code (IR). Clang will perform syntax checking and type checking on the source code, and convert high-level source code into intermediate representations to help subsequent instruction set analysis and dependency search. Then analyze the X86 architecture-related instructions. In step S120, use the -target option in Clang to analyze the X86 architecture instructions (such as AVX, SSE, etc.) used in the source code. This step can automatically identify X86-specific instruction sets and mark these code segments. For each identified X86-specific instruction (such as _mm256_add_ps), the system will record its location and generate a report listing the parts that need to be replaced or optimized. In step S130, the dependent libraries and hardware acceleration functions are analyzed, the library function calls under the X86 architecture (such as Intel MKL, OpenMP, TBB, etc.) are detected, and their compatibility under the ARM architecture is evaluated. For libraries that rely on specific X86 hardware acceleration (such as AVX, SSE), the system will recommend replacing them with optimized libraries supported by the ARM architecture (such as ARM Compute Library, Neon, which are optimized libraries for the ARM architecture). In step S140, the system will generate a detailed report listing all instructions, libraries, hardware acceleration functions and possible problems related to the X86 architecture, and provide replacement suggestions.

[0113] Further, refer to Figure 1 and Figure 2 , the step S100 further includes the following steps:

[0114] S150. Use the dynamic performance analysis tool perf to run the application to be migrated on the X86 architecture, monitor performance data such as CPU usage, memory bandwidth, cache hit rate, and thread synchronization indicators, monitor CPU usage through the perf stat command, and use perf record to record detailed performance data, including cache misses and branch prediction failures;

[0115] S160, based on the performance data generated by perf, automatically analyzes potential bottlenecks such as memory access patterns, cache misses, and lock contention. If it is found that some algorithms perform poorly on multi-core systems or that memory bandwidth is limited, the performance bottlenecks are automatically marked, and corresponding optimization suggestions are proposed, such as improving memory access patterns and adjusting parallelization strategies.

[0116] S170. Generate a performance bottleneck report based on the analysis results, list the main performance bottlenecks of the application to be migrated, and provide optimization suggestions.

[0117] Specifically, in step S150 to step S170, dynamic performance analysis is performed, the goal is to automatically identify the performance bottlenecks of the application under the X86 architecture, especially memory access, CPU utilization and multi-thread synchronization problems, which may become more significant after migration to the ARM architecture. First, in step S150, performance monitoring is performed, specifically using the perf tool to run the application on the X86 architecture, monitoring indicators such as CPU usage, memory bandwidth, cache hit rate, thread synchronization, etc., monitoring the CPU usage of the application through the command perf stat, and recording the detailed performance data of the application through perf record, including cache misses, branch prediction failures, etc. In step S160, based on the performance data generated by the perf tool, the system automatically analyzes potential bottlenecks such as memory access patterns, cache misses, and lock contention. If it is found that some algorithms perform poorly on multi-core systems or memory bandwidth is limited, the system will automatically mark these performance bottlenecks and make corresponding optimization suggestions (for example, improving memory access patterns, adjusting parallelization strategies, etc.).

[0118] In step S150, dynamic performance analysis refers to real-time monitoring of the running status of the application during program execution, capturing the consumption of resources such as CPU, memory, and disk I / O. This technology is crucial for detecting the performance bottleneck of the application, especially in the process of architecture migration, which can ensure that the resource utilization and performance of the system will not be negatively affected before and after the migration. The method applied to the present invention is to use dynamic performance analysis tools (such as perf or gprof) to perform performance benchmark tests on the application before and after the migration, identify potential performance bottlenecks, and optimize according to the characteristics of the ARM architecture. Through this step, the present invention ensures that the migrated application can give full play to its performance advantages on the ARM platform. Perform dynamic performance analysis and optimization, and use the perf tool to monitor the performance bottlenecks of the application on the X86 architecture, especially memory bandwidth, CPU utilization, cache hit rate, etc. Through the dynamic analysis results, optimization is performed based on the characteristics of the ARM platform.

[0119] In a specific embodiment, a script for performance analysis using the perf tool is used to monitor the running status of the application and record performance bottlenecks:

[0120] #! / bin / bash# Define the application path

[0121] APP_PATH=". / your_application"

[0122] # Use perf to monitor application performance

[0123] perf stat -e cache-references,cache-misses,cycles,instructions,branches,branch-misses $APP_PATH

[0124] # Run the application and collect CPU, memory, cache and other indicators

[0125] perf record -o perf.data $APP_PATH

[0126] perf report -i perf.data

[0127] Among them, perf stat counts different hardware events (such as cache hit rate, CPU cycle, etc.), perf record: records performance data during runtime, and perf report: analyzes the perf.data file and outputs a detailed performance bottleneck report.

[0128] By executing the above script, you will see a performance analysis report similar to the following:

[0129] Performance counter stats for '. / your_application':

[0130] 2,354,943,210 cache-references

[0131] 1,035,639,750 cache misses

[0132] 1,052,674,842 cycles

[0133] 1,025,450,123 instructions

[0134] 350,535,544 branches

[0135] 8,534,121 branch-misses

[0136] 10.058934 ( +- 0.02% ) seconds time elapsed

[0137] in,

[0138] (1) Cache-references: Indicates the number of cache accesses made by the CPU during execution, including data cache and instruction cache. This is the total number of cache accesses during program execution, including data cache and instruction cache. Cache is a high-speed storage area used by the CPU to store frequently used data, reducing the latency of memory access. Data example: 2,354,943,210 times.

[0139] The role of cache-references: This data can reflect the memory access pattern of the program. If the cache access count is too high, it means that the program relies on the cache for frequent data access, which may cause excessive cache pressure and affect performance. Based on this data, you can optimize the data storage structure or arrange the data loading order more reasonably to reduce the possibility of cache misses.

[0140] (2) cache-misses: indicates the number of cache misses, i.e., the memory accessed by the CPU is not in the cache and needs to be loaded from a slower storage layer (such as main memory); indicates the number of times when the CPU accesses the cache, the requested data is not in the cache, resulting in the need to reload the data from a slower memory layer (such as main memory). Cache misses usually lead to performance degradation because accessing main memory is much slower than accessing cache. Data example: 1,035,639,750 times.

[0141] The role of cache-misses: If the number of cache misses is too high, the program may not fully utilize the cache mechanism. Optimizing cache access strategies, adjusting data structures and access patterns, or using more efficient cache prefetching strategies can help reduce cache miss rates.

[0142] (3) cycles: Indicates the total number of CPU clock cycles, usually used to indicate CPU activity. This is the total number of clock cycles consumed by the CPU to execute instructions. The more CPU cycles, the less efficient the program runs. Data example: 1,052,674,842 times.

[0143] CPU cycles: This data reflects the computational intensity of the program. If the CPU cycles are high, it may mean that the program has many complex operations to perform, which may lead to performance bottlenecks. At this time, considering optimizing the computationally intensive parts (such as algorithm optimization, parallel computing, etc.) can improve efficiency.

[0144] (4) instructions: Indicates the total number of instructions executed by the CPU, which is an indicator of the program instruction density. This is the total number of instructions executed by the program. Each instruction usually corresponds to an operation performed by the CPU. Data example: 1,025,450,123 times.

[0145] The purpose of instructions: A high number of instructions may indicate that the program contains a lot of calculations or logical operations. A high number of instructions may be related to complex operations or non-optimized code paths. The number of instructions can be reduced by optimizing the code and reducing unnecessary calculations and repeated operations.

[0146] (5) branches (number of branch instructions): the total number of branch instructions, usually referring to conditional judgment and jump instructions. Branch instructions refer to control flow instructions such as conditional judgment and jump in the program (such as if, for, while, etc.). These instructions affect the execution path of the program. Data example: 350,535,544 times.

[0147] The role of branches: A high number of branch instructions may mean that the control flow of the program is more complex. Optimizing the branch logic of the program, reducing unnecessary conditional judgments, or using a more efficient branch prediction mechanism can improve performance.

[0148] (6) Branch-misses: The number of branch prediction failures, indicating the number of times the branch prediction failed and needed to be re-executed. This is the number of times the CPU failed to predict the execution path of the branch when executing the branch instruction. The CPU will predict the execution path of the program branch. If the prediction is wrong, it will cause the pipeline to reload, affecting the execution efficiency. Data example: 8,534,121 times.

[0149] The role of branch-misses: Too many branch prediction failures will lead to CPU performance degradation. This can be reduced by optimizing branch logic, reducing the complexity of branch instructions, or avoiding overly complex conditional judgments in the code.

[0150] (7) time elapsed (total running time): The total time the program runs, here 10.058934 seconds, indicating the time consumed to execute the program. This is the total running time of the program from the beginning to the end. Data example: 10.058934 seconds.

[0151] The function of time elapsed (total running time) is: the total running time directly reflects the execution efficiency of the program. Combined with the statistical data of other hardware events, if the total time is long, the performance bottleneck can be found by analyzing various indicators, so as to optimize the program in a targeted manner.

[0152] Combining the above data, performance optimization can be carried out from multiple angles:

[0153] (1) Optimizing cache usage: By reducing the number of cache misses and improving the cache hit rate, memory access latency can be significantly reduced.

[0154] (2) Reduce unnecessary calculations: The execution efficiency of the program can be improved by reducing the number of unnecessary instructions and reducing computationally intensive operations.

[0155] (3) Optimizing control flow: By reducing the number of branch instructions (branches) and improving the accuracy of branch prediction (reducing branch-misses), the CPU execution path can be made more efficient.

[0156] (4) Improving algorithm efficiency: For complex computing tasks, improve overall performance by optimizing the algorithm (such as reducing CPU cycles).

[0157] These analysis data and optimization measures help to gain a deeper understanding of the program's performance bottlenecks and improve the system's operating efficiency through reasonable technical solutions.

[0158] The above data can help identify performance bottlenecks and make optimizations, such as reducing cache misses, reducing branch prediction failures, etc.

[0159] In step S170, a performance bottleneck report is generated. Based on the analysis results, the system generates a detailed performance bottleneck report, lists the main performance bottlenecks in the application, and provides optimization suggestions. These reports will provide data support for the subsequent automatic optimization stage.

[0160] Further, refer to Figure 1 and Figure 3 , the step S200 includes the following steps;

[0161] S210, automatically replacing the detected X86-specific instructions with instructions supported by the ARM architecture, and converting the X86 instruction segments into codes compatible with the ARM architecture through a search and replace algorithm;

[0162] S220, for applications to be migrated that rely on X86 optimized libraries, automatically select and replace them with optimized libraries on the ARM platform, and automatically replace library function calls through configuration files or built-in library mapping tables to ensure that hardware acceleration can continue to be obtained under the ARM architecture;

[0163] S230, analyze the memory access pattern under the X86 architecture, automatically optimize memory alignment, memory pool and data locality, and adjust the memory allocation strategy to adapt to the memory model of the ARM architecture;

[0164] S240, for parallel applications that need to share memory, automatically adjust the memory mapping method according to the memory consistency model of the ARM architecture to avoid cache consistency issues in the X86 architecture;

[0165] S250. Generate an automatic adjustment report, listing all replaced and optimized code segments, library functions and memory management strategies.

[0166] Specifically, the goal of the automatic adjustment module 200 is to automatically adjust the source code, compilation options, dependent libraries and memory management methods according to the results of the detection phase, so that they can adapt to the characteristics of the ARM architecture.

[0167] Among them, steps S210 to S220 are code and instruction replacement, including replacement of X86-specific instructions and library function replacement. Specifically, first for the detected X86-specific instructions (such as AVX, SSE, etc.), the system will automatically replace them with instructions supported on the ARM architecture (such as Neon, ARMv8 SIMD instruction set, etc.). The system automatically converts the X86 instruction segment into ARM architecture-compatible code through a search and replacement algorithm. For example, replace _mm256_add_ps (X86 AVX instruction) with the corresponding operation of the Neon instruction set. Then perform library function replacement. For applications that rely on X86 optimization libraries (such as Intel MKL), the system will automatically select and replace them with optimization libraries on the ARM platform (such as ARM Compute Library, OpenBLAS, etc.). The system will automatically replace library function calls through configuration files or built-in library mapping tables to ensure that hardware acceleration can continue to be obtained under the ARM architecture.

[0168] Replace X86-specific instructions and libraries. During the static analysis process, if any X86-specific instructions or libraries are found, they need to be replaced. The following is how to replace X86 instructions in the source code with ARM-compatible code, including at least: replacing all instructions involving AVX / SSE with ARM's Neon instructions; replacing the math library using Intel MKL with ARM ComputeLibrary; optimizing memory allocation to ensure cache coherence and memory bandwidth requirements of the ARM architecture.

[0169] In a specific embodiment, a simple Python script is used to batch replace X86-specific instructions and libraries in the code:

[0170] import os

[0171] # Replace AVX instructions with Neon instructions

[0172] def replace_avx_to_neon(file_path):

[0173] with open(file_path, 'r') as file:

[0174] data = file.read()

[0175] # Replace _x256_add_ps with vaddq_f32

[0176] data = data.replace("_mm256_add_ps", "vaddq_f32")

[0177] # Replace other X86 instructions with Neon instructions

[0178] with open(file_path, 'w') as file:

[0179] file.write(data)

[0180] # Replace Intel MKL with ARM Compute Library

[0181] def replace_mkl_to_arm_compute(file_path):

[0182] with open(file_path, 'r') as file:

[0183] data = file.read()

[0184] # Replace Intel MKL library

[0185] data=data.replace("#include<mkl.h> ","#include<arm_compute / runtime / CL / CLScheduler.h> ")

[0186] with open(file_path, 'w') as file:

[0187] file.write(data)

[0188] # Perform the replacement

[0189] file_path = 'source_code.c'

[0190] replace_avx_to_neon(file_path)

[0191] replace_mkl_to_arm_compute(file_path)

[0192] print(f"X86 instructions and libraries in the code have been replaced and saved to {file_path}")

[0193] The above script will automatically replace the X86 architecture instructions (such as _mm256_add_ps) in the source code with ARM architecture instructions (such as vaddq_f32), and replace the Intel MKL library with the ARM Compute Library. After the replacement, you need to check the source code to ensure that all the replacements are performed correctly.

[0194] Among them, steps S230 to S250 are memory management adjustments, including memory allocation optimization, memory mapping adjustment and generation of automatic adjustment reports. Specifically, in S230, the system will first analyze the memory access mode under the X86 architecture and automatically adjust the memory allocation strategy to adapt to the memory model of the ARM architecture. The memory bandwidth and cache model of the ARM architecture are different from those of the X86, so the system will automatically optimize aspects such as memory alignment, memory pool and data locality. S240 For parallel applications that need to share memory, the system will automatically adjust the memory mapping method according to the memory consistency model of the ARM architecture to avoid cache consistency problems in the X86 architecture. S250 After each adjustment step is completed, the system will generate a detailed adjustment report listing all replaced and optimized code segments, library functions and memory management strategies.

[0195] Further, refer to Figure 1 and Figure 4 , the step S300 comprises the following steps:

[0196] S310,Performance benchmarking on ARM architecture;

[0197] S320, analyze CPU, memory, and IO bottlenecks and provide optimization suggestions;

[0198] S330, memory access optimization, algorithm optimization, task scheduling optimization and multi-core parallelization adjustment for ARM architecture.

[0199] Specifically, the goal of the automatic optimization module 300 is to ensure that the application can reach the expected performance standard under the ARM architecture through performance analysis and optimization after the application is migrated to the ARM architecture.

[0200] Further, refer to Figure 4 In step S310, during the performance benchmark test, matrix multiplication, data sorting and calculation, and multi-threaded parallel computing are tested, and execution time, memory bandwidth, CPU utilization, cache hit rate, and thread efficiency are collected and analyzed, wherein,

[0201] The execution time is the running time of the entire application, the memory bandwidth is the memory access speed or read and write speed of the application, the CPU utilization is the efficiency of single-core and multi-core CPU usage, the cache hit rate is the ratio of cache hits in memory access, and the thread efficiency is the efficiency of multi-threaded parallel computing, including thread scheduling and synchronization.

[0202] Specifically, the test environment for the performance benchmark test is:

[0203] X86 platform: Intel Core i7-9700K (8 cores, 16 threads), 32GB RAM, Ubuntu 20.04.

[0204] ARM platform: Raspberry Pi 4 Model B (ARM Cortex-A72, 4 cores, 4GB RAM), Ubuntu 20.04.

[0205] The performance benchmark applications are: matrix multiplication (size: 1000x1000 matrix), data sorting and calculation (large-scale array operations), and multi-threaded parallel computing (using OpenMP for thread management).

[0206] In a specific embodiment, the execution time of the ARM platform when performing matrix multiplication is reduced by 10%, indicating that the matrix calculation is accelerated by optimizing the memory access pattern and using ARM's Neon instructions. Data sorting and calculation The memory optimization and cache management of the ARM platform make it 12% faster than X86 in data processing tasks. Multi-threaded parallel computing The multi-core scheduling and thread optimization of the ARM platform improve the efficiency of parallel computing by 6%.

[0207] Memory bandwidth is another important performance indicator in the test, especially in big data computing tasks. The X86 and ARM platforms are compared by measuring the memory read and write speed. In a specific embodiment, the memory bandwidth of the ARM platform is 15% higher than that of the X86. This is due to the memory optimization of the ARM architecture, including improvements in cache coherence and memory access patterns.

[0208] CPU utilization and efficiency comparison, by analyzing the CPU usage, especially the performance of multi-core parallel computing, to compare the efficiency of the two. CPU utilization refers to the effective working time of the CPU when executing tasks. In a specific embodiment, the CPU utilization of the ARM platform in multi-core parallel computing is higher, indicating that the multi-core scheduling of the ARM platform is more efficient, can better distribute the workload, and reduce idle cores.

[0209] The cache hit rate refers to the ratio of the cache to provide data when data is accessed. A higher cache hit rate means higher memory access efficiency. In a specific embodiment, the cache hit rate of the ARM platform is higher than that of the X86 platform, especially in data-intensive tasks (such as matrix multiplication and data sorting), the ARM platform can more efficiently utilize the memory cache and reduce the latency of memory access.

[0210] Thread efficiency is the efficiency of each thread in a multithreaded task to actually complete the work. Use OpenMP to perform parallel computing tests to measure thread efficiency. In a specific embodiment, the ARM platform improves thread efficiency by optimizing thread scheduling and memory management. The efficiency of the ARM platform in parallel computing is 6% higher than that of the X86 platform.

[0211] Further, refer to Figure 4 In step S330, the memory access optimization is to automatically optimize the memory access mode to avoid the memory bandwidth bottleneck, and automatically adjust the data layout according to the cache characteristics of the ARM architecture to reduce the cache miss rate;

[0212] The algorithm optimization is to automatically select an optimization algorithm specific to the ARM architecture for the performance bottleneck part of the application, or call an optimized third-party library for acceleration;

[0213] Task scheduling optimization automatically optimizes task scheduling strategies based on the hardware topology of the ARM architecture to avoid performance loss caused by unreasonable thread scheduling;

[0214] Multi-core parallelization adjustment means that if parallelization tools such as OpenMP or Intel TBB are used on the X86 architecture, the multi-core scheduling characteristics of the ARM architecture will be automatically analyzed, and the parallelization strategy will be adjusted. According to the core number and scheduling strategy of the ARM multi-core processor, the parallel algorithm will be automatically modified, and parameters such as the number of threads and core binding will be adjusted to achieve optimal performance.

[0215] In a specific embodiment, it also includes S400, migration follow-up planning and optimization.

[0216] S410. Continue to monitor performance and benchmark. Continue to benchmark applications on the ARM platform to ensure that performance is not negatively affected as new features are added or updated. Regularly use perf tools and other performance monitoring tools to track performance data and analyze potential performance bottlenecks.

[0217] S420, memory optimization and parallel computing strategy, further optimizes memory access patterns, reduces cache misses, and reorganizes data according to access patterns to better adapt to the cache structure of the ARM architecture; further optimizes task scheduling based on the different multi-core characteristics of the ARM platform to ensure that each core is fully utilized;

[0218] S430, multithreading and task scheduling, automatic adjustment of the number of threads, dynamically adjusts the number of threads and task allocation according to the number of cores and load conditions of the ARM platform, especially in computing-intensive tasks, automatic adjustment of the number of threads can better utilize each core;

[0219] S440, continuous performance optimization, continue to explore the hardware acceleration function of the ARM platform, if the hardware supports, use NEON SIMD extension and GPU acceleration to further improve the performance of compute-intensive tasks, and dynamically adjust memory allocation according to task needs at runtime to ensure efficient use of memory bandwidth.

[0220] Further, refer to Figure 5 The present invention also proposes a server application architecture migration device for executing the server application architecture migration method. The server application architecture migration device comprises an automatic detection module 100, an automatic adjustment module 200 and an automatic optimization module 300 connected in sequence, wherein:

[0221] The automatic detection module 100 is used to scan the applications to be migrated under the X86 architecture, identify the architecture-related features, instruction sets, dependent libraries, etc. in the applications to be migrated, and detect the parts that may cause compatibility issues or performance bottlenecks under the X86 architecture through automated tools;

[0222] The automatic adjustment module 200 is used to adjust the source code, compilation options, dependent libraries and memory management methods according to the detection results of the automatic detection module 100, so that the application to be migrated can adapt to the characteristics of the ARM architecture;

[0223] The automatic optimization module 300 is used to ensure that the application can reach the expected performance standard under the ARM architecture through performance analysis and optimization after the application is migrated to the ARM architecture.

[0224] Specifically, multi-core parallelization adjustment may use parallelization tools such as OpenMP or Intel TBB on the X86 architecture. The system will automatically analyze the multi-core scheduling characteristics of the ARM architecture and adjust the parallelization strategy. According to the number of cores and scheduling strategy of the ARM multi-core processor, the system will automatically modify the parallel algorithm and adjust the number of threads, core binding and other parameters to achieve the best performance.

[0225] Task scheduling optimization is the system that automatically optimizes task scheduling strategies based on the hardware topology of the ARM architecture to avoid performance losses caused by unreasonable thread scheduling.

[0226] Memory access optimization automatically optimizes memory access patterns to avoid memory bandwidth bottlenecks. The system automatically adjusts data layout based on the cache characteristics of the ARM architecture to reduce cache miss rates.

[0227] To optimize the performance of the application bottleneck (such as matrix operations with high computational load), the system will automatically select the optimization algorithm specific to the ARM architecture, or call optimized third-party libraries (such as the ARM Compute Library) for acceleration.

[0228] In addition, the present invention is applied to the following core tools and platforms:

[0229] (1) Compilation toolchain GCC / Clang: used to compile source code into machine code supported by the ARM architecture. GCC and Clang are widely used open source compilers that support cross-platform compilation. During the migration process, the compilation toolchain will automatically adjust the relevant optimization options according to the target architecture (such as ARM) and generate code compatible with the ARM architecture.

[0230] The present invention is applied in the following manner: In the automatic adjustment stage, the present invention uses the GCC or Clang tool chain to perform cross-platform compilation. The automatically adjusted compilation options will be based on the characteristics of the ARM architecture, such as optimizing a specific ARM instruction set (such as NEON), to improve the performance of the migrated application.

[0231] (2) Debugging tool GDB: The GNU debugger is a powerful debugging tool that can be used to analyze and debug C / C++ programs. During the migration process, GDB can be used to check the execution flow of the application, especially when debugging low-level system calls and memory accesses, to help developers better understand problems that may occur during the migration process.

[0232] The method applied to the present invention is as follows: the present invention uses GDB to debug the code on the ARM platform to ensure that the specific functions of the X86 architecture (such as memory management, concurrent processing, etc.) can be correctly migrated to the ARM architecture.

[0233] (3) Performance analysis tool Perf: Perf is a Linux performance analysis tool that can provide high-precision CPU performance analysis, including memory consumption, cache hit rate, instruction execution, etc. It can help developers accurately locate performance bottlenecks and provide strong support for optimizing migrated applications.

[0234] Performance analysis tool gprof: gprof is part of the GNU toolset, which can analyze the performance of a program, output function call graphs and execution time information for each function. gprof is often used to optimize the hotspot code of a program.

[0235] Method applied in the present invention: The present invention uses Perf and gprof to perform performance tests on applications before and after migration, dynamically evaluates performance bottlenecks under the ARM architecture, and then optimizes critical paths to maximize application performance.

[0236] (4) Cross-architecture migration tools: Some open source tools (such as QEMU and LLVM) support code migration or simulation between different architectures. These tools can be used to simulate applications on the X86 architecture and debug and test them on the ARM architecture.

[0237] Application method in the present invention: The present invention can dynamically simulate the source code with the help of these cross-architecture migration tools to ensure that the migrated application can be seamlessly migrated to the ARM architecture.

[0238] Overview of key steps and tools. In actual operation, the present invention combines the above technologies and tools to achieve an efficient migration process through three stages of automation (automatic detection, automatic adjustment, and automatic optimization):

[0239] Automatic detection phase: Use static code analysis tools to comprehensively scan the code of the X86 architecture to identify problems specific to the X86 instruction set, library dependencies, memory model, etc.

[0240] Leverage dynamic performance analysis tools (e.g., Perf, gprof) to assess performance bottlenecks before migration.

[0241] Automatic adjustment phase: Use automated code replacement tools (such as GCC, Clang) to replace the identified architecture-specific code, adjust compilation options, and ensure the compatibility of system libraries and dependencies.

[0242] Adjust system configurations, such as operating system kernel parameters, hardware interfaces, etc., to ensure compatibility with the ARM architecture.

[0243] Automatic optimization stage: Optimize the performance of migrated applications based on performance analysis tools to maximize the parallel computing capabilities and low power consumption advantages of the ARM architecture.

[0244] Generate performance comparison reports and make continuous adjustments to ensure the best performance of the system on the ARM platform.

[0245] The technical solution of the present invention realizes efficient and automated migration from X86 architecture to ARM architecture by combining a variety of modern tools and technologies. The process of automatic detection, automatic adjustment, and automatic optimization ensures the accuracy and efficiency of the migration process. At the same time, through performance optimization, it can fully tap the potential of ARM architecture and meet the needs of modern high-performance computing. The use of the above tools and technologies can greatly reduce manual intervention, save time and cost, and improve the stability and performance of migration.

[0246] Furthermore, the present invention also proposes a computer-readable storage medium having program instructions stored thereon, and the program instructions implement the server application architecture migration method when executed by a processor.

[0247] The above is only a preferred embodiment of the present invention. The present invention is not limited to the above implementation. As long as the technical effect of the present invention is achieved by the same means, any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present disclosure shall be included in the scope of protection of the present disclosure. All should belong to the protection scope of the present invention. Within the protection scope of the present invention, its technical scheme and / or implementation method can have various modifications and changes.

Claims

1. A server application architecture migration method, wherein the server application architecture migration method is applied to a server application architecture migration device, wherein the server application architecture migration device comprises: The automatic detection module, the automatic adjustment module and the automatic optimization module are connected in sequence, wherein the server application architecture migration method comprises the following steps: S100, the automatic detection module analyzes and checks the application to be migrated under the X86 architecture, including static code analysis, dynamic performance analysis and system compatibility check of the application to be migrated; The step S100 includes the following steps: S110, using static code analysis tools Clang and / or LLVM to perform static code analysis, extract hardware dependency information in the code, use the Clang compiler to compile the source code, and perform syntax check and type check on the source code, convert the high-level source code into an intermediate representation, help subsequent instruction set analysis and dependency search, and generate an abstract syntax tree and intermediate code; S120, identifying the X86 instruction set through the target option in Clang, marking the code segments containing X86 architecture instructions, and generating a report containing the code segments that need to be replaced or optimized; S130, analyzing dependent libraries and hardware acceleration functions, if library function calls under the X86 architecture are detected, evaluating compatibility under the ARM architecture, and recommending replacing libraries that rely on specific X86 hardware acceleration with corresponding optimized libraries under the ARM architecture; S140, generate a report to identify X86 architecture-specific instructions, list all X86 architecture-related instructions, libraries, hardware acceleration functions and possible problems in migration, and provide replacement suggestions; The step S100 also includes the following steps: S150. Use the dynamic performance analysis tool perf to run the application to be migrated on the X86 architecture, monitor the CPU usage, memory bandwidth, cache hit rate, and thread synchronization performance data, use the perf stat command to monitor CPU usage, and use perfrecord to record detailed performance data, including cache misses and branch prediction failures. S160, based on the performance data generated by perf, automatically analyzes memory access patterns, cache misses, and potential bottlenecks in lock contention. If it is found that some algorithms perform poorly on multi-core systems or memory bandwidth is limited, the performance bottleneck project is automatically marked, and corresponding optimization suggestions are made to improve the memory access pattern and adjust the parallelization strategy; S170. Generate a performance bottleneck report based on the analysis results, list the main performance bottlenecks of the application to be migrated, and provide optimization suggestions; S200, according to the analysis and inspection results of the automatic detection module, the automatic adjustment module replaces X86-specific instructions and library functions, optimizes memory allocation and adjusts memory mapping, and generates an automatic adjustment report; The step S200 includes the following steps: S210, automatically replacing the detected X86-specific instructions with instructions supported by the ARM architecture, and converting the X86 instruction segments into codes compatible with the ARM architecture through a search and replace algorithm; S220, for applications to be migrated that rely on X86 optimized libraries, automatically select and replace them with optimized libraries on the ARM platform, and automatically replace library function calls through configuration files or built-in library mapping tables to ensure that hardware acceleration can continue to be obtained under the ARM architecture; S230, analyze the memory access pattern under the X86 architecture, automatically optimize memory alignment, memory pool and data locality, and adjust the memory allocation strategy to adapt to the memory model of the ARM architecture; S240, for parallel applications that need to share memory, automatically adjust the memory mapping method according to the memory consistency model of the ARM architecture to avoid cache consistency issues in the X86 architecture; S250, generating an automatic adjustment report, listing all replaced and optimized code segments, library functions and memory management strategies; S300, the automatic optimization module performs performance benchmark tests and performs memory access optimization, algorithm optimization, task scheduling optimization, and multi-core parallelization adjustments based on the test results.

2. The server application architecture migration method according to claim 1, characterized in that: The step S300 includes the following steps: S310,Performance benchmarking on ARM architecture; S320, analyze CPU, memory, and IO bottlenecks and provide optimization suggestions; S330, memory access optimization, algorithm optimization, task scheduling optimization and multi-core parallelization adjustment for ARM architecture.

3. The server application architecture migration method according to claim 2, characterized in that: In step S310, during the performance benchmark test, matrix multiplication, data sorting and calculation, and multi-threaded parallel computing are tested, and execution time, memory bandwidth, CPU utilization, cache hit rate, and thread efficiency are collected and analyzed, wherein: The execution time is the running time of the entire application, the memory bandwidth is the memory access speed or read and write speed of the application, the CPU utilization is the efficiency of single-core and multi-core CPU usage, the cache hit rate is the ratio of cache hits in memory access, and the thread efficiency is the efficiency of multi-threaded parallel computing, including thread scheduling and synchronization.

4. The server application architecture migration method according to claim 2, characterized in that: In the step S330, the memory access optimization is to automatically optimize the memory access mode to avoid the memory bandwidth bottleneck, and automatically adjust the data layout according to the cache characteristics of the ARM architecture to reduce the cache miss rate; The algorithm optimization is to automatically select an optimization algorithm specific to the ARM architecture for the performance bottleneck part of the application, or call an optimized third-party library for acceleration; Task scheduling optimization automatically optimizes task scheduling strategies based on the hardware topology of the ARM architecture to avoid performance loss caused by unreasonable thread scheduling; Multi-core parallelization adjustment means that if OpenMP or Intel TBB parallelization tools are used on the X86 architecture, the multi-core scheduling characteristics of the ARM architecture will be automatically analyzed, and the parallelization strategy will be adjusted. According to the core number and scheduling strategy of the ARM multi-core processor, the parallel algorithm will be automatically modified, and the number of threads and core binding parameters will be adjusted to achieve the best performance.

5. A server application architecture migration device, used to execute the server application architecture migration method according to any one of claims 1 to 4, characterized in that: The server application architecture migration device comprises an automatic detection module, an automatic adjustment module and an automatic optimization module which are connected in sequence, wherein: The automatic detection module is used to scan the applications to be migrated under the X86 architecture, identify the architecture-related features, instruction sets, and dependent libraries in the applications to be migrated, and detect the parts that may cause compatibility issues or performance bottlenecks under the X86 architecture through automated tools; The automatic adjustment module is used to adjust the source code, compilation options, dependent libraries and memory management methods according to the detection results of the automatic detection module, so that the application to be migrated can adapt to the characteristics of the ARM architecture; The automatic optimization module is used to ensure that the application can reach the expected performance standard under the ARM architecture through performance analysis and optimization after the application is migrated to the ARM architecture.

6. A computer-readable storage medium having program instructions stored thereon, characterized in that: When the program instructions are executed by a processor, the method according to any one of claims 1 to 4 is implemented.

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