Silicon carbide ohmic contact electrode structure without step etching and preparation method
By using the method of growing and spaced sputtering on the silicon carbide substrate, the ohmic contact metal electrode arrays with different electrode spacings are solved, and more efficient and accurate electrode preparation and performance evaluation are achieved.
Patent Information
- Application Number
- CN202411823652.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-12
- Publication Date
- 2025-03-18
- Estimated Expiration
- 2044-12-12
AI Technical Summary
The prior art when manufacturing silicon carbide ohmic contact electrodes has complex processes, long time and high cost, and requires operators to have an advanced micro-nano manufacturing process foundation.
The ohmic contact metal electrode array with different electrode spacings is formed on the silicon carbide substrate by growing and spaced sputtering, and the metal electrode array is formed by the surface growth doped epitaxial layer and magnetron sputtering, avoiding the step etching process.
It reduces the difficulty and cost of electrode preparation, shortens the preparation time, improves the accuracy of the electrical performance evaluation of the ohmic contact electrode, and reduces leakage current error.
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Figure CN119650417A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of semiconductor processing and manufacturing, and in particular relates to a silicon carbide ohmic contact electrode structure without step etching and a preparation method thereof. Background Art
[0002] As a typical representative of the third generation of wide bandgap semiconductors, silicon carbide is widely used as a substrate material in microelectronic devices and sensor devices due to its mechanical, electrical and chemical material advantages such as wide bandgap, high carrier mobility, high thermal conductivity, and corrosion resistance. In the field of power devices, metal-oxide semiconductor field effect transistors (MOSFETs) currently made of silicon carbide as the main material have been proven to have higher operating frequencies, their on-resistance and switching losses have been greatly reduced, and the high-temperature stability and switching speed of the device have been greatly improved; in the field of micro-nano sensing, compared with silicon-based sensors, pressure sensors and acceleration sensors with silicon carbide as substrates have been proven to be able to work directly in harsh environments such as high temperature and radiation. The high-temperature resistance of the electrical ohmic contact of the above-mentioned silicon carbide-based power devices and sensor devices directly determines the survival performance of the device at high temperatures. Therefore, the performance research of silicon carbide ohmic contacts has become one of the important branches of silicon carbide device research.
[0003] At present, the experimental research on ohmic contact is mainly based on the method based on the rectangular transmission line (TLM) principle. For example, the papers "Abbas T, Slewa L. Transmission line method (TLM) measurement of (metal / ZnS) contact resistance [J]. Int. J. Nanoelectronics and Materials, 2015, 8: 111-120." and "Lee DY, Ko WS, Kim KN, et al. Analysis of metal and zinc oxide semiconductor interface resistance using transmission line method [J]. Solid-State Electronics, 2024, 216: 108916." adopt this principle. The corresponding ohmic contact electrode manufacturing method involves many process flows including dry etching, photolithography, stripping, secondary photolithography (overlay), etc., which have significant defects such as complex process, long process time, high cost, and requiring the operator to have a certain foundation in micro-nano manufacturing process. Summary of the invention
[0004] In order to overcome the above-mentioned shortcomings of the prior art, the purpose of the present invention is to propose a silicon carbide ohmic contact electrode structure and preparation method that does not require step etching, and to form an ohmic contact metal electrode array with different electrode spacings on a silicon carbide substrate by growth and interval sputtering, thereby reducing the difficulty of electrode preparation from a process perspective.
[0005] To achieve the above object, the technical solution of the present invention is:
[0006] A silicon carbide ohmic contact electrode structure without step etching includes a silicon carbide substrate 101, characterized in that an epitaxial layer with a doping type different from that of the substrate is grown on the surface of the silicon carbide substrate 101, and a metal electrode array 201 is manufactured on the surface of the epitaxial layer.
[0007] The silicon carbide substrate 101 is a silicon carbide single crystal including a 4H crystal type or a 6H crystal type.
[0008] The epitaxial layer includes an N-type doped epitaxial layer 103 or a P-type doped epitaxial layer 102 .
[0009] The epitaxial layer is a single layer or multiple layers; the growth thickness of each layer is 2-5 μm; when it is a multiple layer, adjacent epitaxial layers have different doping types and grow crosswise.
[0010] The metal electrode array 201 is composed of a plurality of rectangular metal single electrode regions, and the plurality of rectangular metal single electrode regions are separated by a certain distance; the distance between each metal single electrode increases by a fixed value δd.
[0011] The material of the metal electrode array 201 is any type of single-layer or multi-layer metal film, alloy film, semiconductor film or other film with conductive capability.
[0012] A method for preparing a silicon carbide ohmic contact electrode structure without step etching, characterized in that it comprises the following steps:
[0013] Step 1: growing an N-type doped epitaxial layer 103 or a P-type doped epitaxial layer 102 on the surface of a silicon carbide substrate 101, ensuring that the silicon carbide substrate 101 has different doping types from the epitaxial layer in contact with it, and obtaining a multilayer silicon carbide epitaxial wafer used for preparing an ohmic contact electrode;
[0014] Step 2: Using a standard silicon wafer RCA cleaning method to clean and dry the surface of the multilayer silicon carbide epitaxial wafer obtained in step 1;
[0015] Step 3, attaching tapes 301 of different widths in parallel to the surface of the multilayer silicon carbide epitaxial wafer obtained in step 2;
[0016] Step 4, magnetron sputtering or electron beam evaporation is performed on the surface of the sample obtained in step 3 to form a metal conductive film 401;
[0017] Step 5, tear off all the tapes 301 on the surface of the sample obtained in step 4 to obtain an ohmic contact metal electrode array 201 with the same electrode width and different electrode spacing;
[0018] Step 6, annealing the sample obtained in step 5;
[0019] Step 7, cutting the sample obtained in step 6 to obtain a number of slender silicon carbide ohmic contact electrode samples with a total length of L and a total width of W, each sample being deposited with a metal electrode array 201 with an electrode width of W, a length of l, and a spacing of d.
[0020] The specific method of growing an N-type doped epitaxial layer 103 or a P-type doped epitaxial layer 102 on the surface of the silicon carbide substrate 101 in step 1 is to adopt a chemical vapor deposition method, introduce an epitaxial layer growth source into a high-temperature furnace at a temperature of 1500-1800°C, with a flow rate of 2sccm-1000sccm and an introduction time of 10-30 minutes; the growth thickness of each layer is 2-5μm.
[0021] When the tape in step 3 is pasted, the specific pasting method is: adhere tape No. 1 with a width of d1 to the surface of the multilayer silicon carbide epitaxial wafer obtained in step 2; then, at a blank position L away from tape No. 1, adhere tape No. 2 with a width of d2 in parallel; then, along the same direction, at a distance of L from tape No. 2, adhere tape No. 3 with a width of d3 in parallel; repeat this process until a plurality of parallel arrays of tapes with equal blank spacing l are formed on the surface of the multilayer silicon carbide epitaxial wafer, and the tape widths of the arrays are d1, d2, d3, ..., until dn; the tape width d satisfies: d2 = d1 + δd; d3 = d2 + δd; d4 = d3 + δd, that is, dn = d(n-1) + δd.
[0022] The adhesive tape used in step 3 is an adhesive tape with regular edges, including polymer adhesive tape and transparent laboratory adhesive tape made of different materials.
[0023] The specific parameters of the magnetron sputtering in step 4 are: sputtering power is 80-200 W, sputtering gas is argon, flow rate is 20 sccm, and sputtering time is 5-40 minutes.
[0024] The specific method of the annealing treatment in step 6 is: placing the sample to be annealed in an annealing furnace, setting the temperature to 500-1200° C., and the annealing time to 2-30 minutes.
[0025] The method for cutting the sample used in step 7 includes diamond wheel cutting and laser cutting.
[0026] Compared with the prior art, the present invention has the following beneficial technical effects:
[0027] (1) Aiming at the hot research issues of ohmic contact in the field of micro-nano sensor manufacturing, the present invention proposes a new method to get rid of the "etching isolation step". An ohmic contact metal electrode array with different electrode spacings is formed on a silicon carbide substrate by growth and interval sputtering. In principle, it effectively avoids the leakage current that may be generated at the edge of the etching step in the traditional transmission line method, reduces the measurement error of the specific contact resistance between electrodes, and improves the accuracy of the electrical performance evaluation of the ohmic contact electrode.
[0028] (2) The present invention uses adhesive tape to prepare a metal electrode array with a spacing of d, which reduces the difficulty of preparing the electrode from a process perspective and effectively shortens the experimental time.
[0029] In summary, the present invention is based on the rectangular transmission line (TLM) principle and realizes the preparation of a silicon carbide ohmic contact electrode with a simpler structure and smaller leakage current error, overcomes the complex process problems of the traditional electrode rectangular transmission line manufacturing method, reduces the manufacturing cost and greatly shortens the electrode preparation time, and is easy to implement. BRIEF DESCRIPTION OF THE DRAWINGS
[0030] Figure 1 This is a three-dimensional diagram showing the structure of the silicon carbide ohmic contact electrode sample of the present invention.
[0031] Figure 2 This is a front view of the silicon carbide ohmic contact electrode sample structure of the present invention.
[0032] Figure 3 This is a top view of the silicon carbide ohmic contact electrode sample structure of the present invention.
[0033] Figure 4 The present invention provides a simple process flow for preparing the silicon carbide ohmic contact electrode sample structure.
[0034] In the figure: 101 - silicon carbide substrate, 102 - P-type doped epitaxial layer, 103 - N-type doped epitaxial layer, 201 - metal electrode array, 301 - tape, 401 - metal conductive film. DETAILED DESCRIPTION
[0035] In order to make the purpose and technical solution of the present invention clearer and easier to understand, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. The specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.
[0036] Reference Figure 1 , Figure 2 and Figure 3A silicon carbide ohmic contact electrode structure without step etching includes a silicon carbide substrate 101, characterized in that an epitaxial layer with a doping type different from that of the substrate is grown on the surface of the silicon carbide substrate, and a metal electrode array 201 is manufactured on the surface of the epitaxial layer.
[0037] The silicon carbide substrate 101 is an N-type 4H-SiC single crystal wafer.
[0038] Two epitaxial layers are grown on the silicon carbide substrate 101 , and the epitaxial doping types grow crosswise, that is, from bottom to top, there are a P-type doped epitaxial layer 102 in the middle and an N-type doped epitaxial layer 103 on the surface.
[0039] The metal electrode array 201 is composed of a plurality of rectangular metal single electrode regions, and the longitudinal dimension l and the transverse dimension W of each electrode are the same, which are 1000 μm and 2000 μm respectively; the distance between each electrode increases by a fixed value, and the fixed value is 1000 μm.
[0040] The electrode material of the metal electrode array 201 region is three layers, which are a multilayer metal system composed of Ni / TaSi2 / Pt from bottom to top.
[0041] Reference Figure 4 A method for preparing a silicon carbide ohmic contact electrode structure without step etching, characterized in that it comprises the following steps:
[0042] Step 1: grow an epitaxial Al-doped layer on a single crystal 4H silicon carbide substrate 101 to form a layer with a thickness of 5 μm and a doping concentration of 1e18 cm 3 The P-type epitaxial layer 102 is then grown epitaxially doped with N elements to form a thickness of 2 μm and a doping concentration of 1e19 cm 3 ~1e20cm 3 N-type doped epitaxial layer 103;
[0043] The specific method of growing the N-type doped epitaxial layer 103 on the surface of the silicon carbide substrate 101 is as follows: using a chemical vapor deposition method, introducing a growth silicon source, a growth carbon source and nitrogen into a high temperature furnace at a temperature of 1500-1800° C., with a flow rate of 2 sccm-1000 sccm, and the introduction time is 10-30 minutes;
[0044] The specific method of growing the P-type doped epitaxial layer 102 on the surface of the silicon carbide substrate 101 is as follows: using a chemical vapor deposition method, introducing a growth silicon source, a growth carbon source and a trimethylaluminum TMA dopant into a high temperature furnace at a temperature of 1500-1800° C., with a flow rate of 2 sccm-1000 sccm, and the introduction time is 10-30 minutes;
[0045] Step 2: Use the standard silicon wafer RCA cleaning method to clean the surface of the multilayer silicon carbide epitaxial wafer obtained in step 1 and dry it on a hot plate for later use;
[0046] Step 3, attaching polyimide tapes 301 with widths of 1000 μm, 2000 μm, 3000 μm, 4000 μm, and 5000 μm in parallel to the N-type epitaxial doped surface of the multilayer silicon carbide epitaxial wafer obtained in step 2;
[0047] Step 4, on the surface of the sample obtained in step 3, a Ni layer, a TaSi2 layer and a Pt layer are sequentially sputtered by a magnetron sputtering method to form a multilayer metal conductive film 401; the sputtering power is 100 W, the sputtering gas is argon, the flow rate is 20 sccm, and the sputtering time is 20 minutes;
[0048] Step 5, tear off all the polyimide tapes 301 on the surface of the sample obtained in step 4 to obtain an ohmic contact metal electrode array 201 having the same electrode size but different electrode spacings;
[0049] Step 6, performing a rapid thermal annealing treatment at a temperature of 1000° C. for 200 seconds on the sample obtained in step 5;
[0050] Step 7, perform femtosecond laser cutting on the sample obtained in step 6 to obtain several slender silicon carbide ohmic contact electrode samples with a total length of 2 cm and a total width of 2 mm, each sample is deposited with a metal electrode array 201 with a longitudinal dimension of l = 1000 μm and a lateral dimension of W = 2000 μm, and the spacing between each electrode is 1000 μm, 2000 μm, 3000 μm, 4000 μm, and 5000 μm.
[0051] When the polyimide tape 301 in the step 3 is pasted, the specific pasting method is: adhere tape No. 1 with a width of 1000μm to the surface of the multilayer silicon carbide epitaxial wafer obtained in step 2; then, at a blank position 1000μm away from the tape No. 1, adhere tape No. 2 with a width of 2000μm in parallel; then, along the same direction, at a distance of 1000μm from the tape No. 2, adhere tape No. 3 with a width of 3000μm in parallel; continue along the same direction, at a distance of 1000μm from the tape No. 3, adhere tape No. 4 with a width of 4000μm in parallel; continue along the same direction, at a distance of 1000μm from the tape No. 4, adhere tape No. 5 with a width of 5000μm in parallel, and finally, a plurality of parallel arrays of tapes 301 with equal blank spacing (1000μm) are formed on the surface of the multilayer silicon carbide epitaxial wafer.
[0052] The adhesive tape 301 used in step 3 is a laboratory-specific polyimide tape, which has a custom width and regular edges.
[0053] The above contents are only for explaining the technical idea of the present invention and cannot be used to limit the protection scope of the present invention. Any changes made on the basis of the technical solution in accordance with the technical idea proposed by the present invention shall fall within the protection scope of the claims of the present invention.
Claims
1. A silicon carbide ohmic contact electrode structure without step etching, comprising a silicon carbide substrate (101), characterized in that: An epitaxial layer with a doping type different from that of the substrate is grown on the surface of a silicon carbide substrate, and a metal electrode array (201) is manufactured on the surface of the epitaxial layer.
2. The silicon carbide ohmic contact electrode structure without step etching according to claim 1, characterized in that: The silicon carbide substrate (101) is a silicon carbide single crystal including a 4H crystal type or a 6H crystal type; the epitaxial layer includes an N-type doped epitaxial layer 103 or a P-type doped epitaxial layer 102.
3. The silicon carbide ohmic contact electrode structure without step etching according to claim 1 or 2, characterized in that: The epitaxial layer is a single layer or multiple layers; the growth thickness of each layer is 2-5 μm; adjacent epitaxial layers have different doping types and grow crosswise.
4. The silicon carbide ohmic contact electrode structure without step etching according to claim 1, characterized in that: The metal electrode array (201) is composed of a plurality of rectangular metal single electrode regions, wherein the plurality of rectangular metal single electrode regions are separated by a certain distance; and the distance between each metal single electrode increases by a fixed value δd.
5. The silicon carbide ohmic contact electrode structure without step etching according to claim 1, characterized in that: The material of the metal electrode array (201) is any type of single-layer or multi-layer metal film, alloy film, semiconductor film or other film with conductive capability; it is single-layer or multi-layer.
6. A method for preparing a silicon carbide ohmic contact electrode structure without step etching according to claim 1, characterized in that: The following steps are involved: Step 1: growing an N-type doped epitaxial layer (103) or a P-type doped epitaxial layer (102) on the surface of a silicon carbide substrate (101), ensuring that the silicon carbide substrate (101) and the epitaxial layer in contact therewith have different doping types, thereby obtaining a multilayer silicon carbide epitaxial wafer used for preparing an ohmic contact electrode; Step 2: Using a standard silicon wafer RCA cleaning method to clean and dry the surface of the multilayer silicon carbide epitaxial wafer obtained in step 1; Step 3, attaching adhesive tapes (301) of different widths in parallel to the surface of the multilayer silicon carbide epitaxial wafer obtained in step 2; Step 4, magnetron sputtering or electron beam evaporation is performed on the surface of the sample obtained in step 3 to form a metal conductive film (401); Step 5, tearing off all the tapes (301) on the surface of the sample obtained in step 4 to obtain an ohmic contact metal electrode array (201) with the same electrode width and different electrode spacing; Step 6, annealing the sample obtained in step 5; Step 7, cutting the sample obtained in step 6 to obtain a number of slender silicon carbide ohmic contact electrode samples with a total length of L and a total width of W, each sample being deposited with a metal electrode array (201) with an electrode width of W, a length of l, and a spacing of d.
7. A method for preparing a silicon carbide ohmic contact electrode structure without step etching according to claim 6, characterized in that: When the tape in step 3 is pasted, the specific pasting method is: adhere tape No. 1 with a width of d1 to the surface of the multilayer silicon carbide epitaxial wafer obtained in step 2; then, at a blank position L away from tape No. 1, adhere tape No. 2 with a width of d2 in parallel; then, along the same direction, at a distance of L from tape No. 2, adhere tape No. 3 with a width of d3 in parallel; repeat this process until a plurality of parallel arrays of tapes with equal blank spacing l are formed on the surface of the multilayer silicon carbide epitaxial wafer, and the tape widths of the arrays are d1, d2, d3, ..., until dn; the tape width d satisfies: d2 = d1 + δd; d3 = d2 + δd; d4 = d3 + δd, that is, dn = d(n-1) + δd.
8. A method for preparing a silicon carbide ohmic contact electrode structure without step etching according to claim 6, characterized in that: The adhesive tape used in step 3 is an adhesive tape with regular edges, including polymer adhesive tape and transparent laboratory adhesive tape made of different materials.
9. A method for preparing a silicon carbide ohmic contact electrode structure without step etching according to claim 6, characterized in that: The method for cutting the sample used in step 7 includes diamond wheel cutting and laser cutting.
10. A method for preparing a silicon carbide ohmic contact electrode structure without step etching according to claim 6, characterized in that: The specific method of growing the N-type doped epitaxial layer 103 or the P-type doped epitaxial layer 102 on the surface of the silicon carbide substrate 101 in step 1 is to use a chemical vapor deposition method, in a high temperature furnace at a temperature of 1500-1800° C., introduce an epitaxial layer growth source with a flow rate of 2 sccm-1000 sccm for 10-30 minutes; the growth thickness of each layer is 2-5 μm; The specific parameters of the magnetron sputtering in step 4 are: sputtering power is 80-200W, sputtering gas is argon, flow rate is 20sccm, and sputtering time is 5-40 minutes; The specific method of the annealing treatment in step 6 is: placing the sample to be annealed in an annealing furnace, setting the temperature to 500-1200° C., and the annealing time to 2-30 minutes.
Citation Information
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