A memory chip 3D stacking packaging structure and packaging process thereof

Abstract

The present invention discloses a 3D stacked packaging structure of a memory chip and its packaging process, and relates to the field of semiconductors. A 3D stacked packaging structure of a memory chip and its packaging process, comprising a DBC substrate and an integrated circuit chip integrated on the DBC substrate, wherein the integrated circuit chips are stacked and arranged, and further comprising a packaging structure installed on the outside of the DBC substrate; the packaging structure comprises: a packaging shell, wherein the packaging shell covers the outside of the DBC substrate; a group of heat sinks are installed on the outer wall of each integrated circuit chip, and each group of heat sinks is provided with a plurality of heat sinks, which are distributed in a vertical array; a slot is provided at the corner of each group of heat sinks, and a heat conduction plug is plugged into the inner wall of the slot, and each heat sink of the same group is connected in series through the heat conduction plug; the present invention conducts the accumulated heat of the integrated circuit chip through the heat sink, and then conducts it to the heat collection frame by the heat conduction plug, and then gathers the heat collection frame to the heat dissipation plate for conduction, so as to facilitate heat exchange with the external gas to dissipate the heat.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor technology, and in particular relates to a memory chip 3D stacking packaging structure and a packaging process thereof. Background Art

[0002] The development of microelectronics technology has led to the development of packaging technology towards miniaturization, multi-function, low power consumption and high performance.

[0003] Stacked packaging is a packaging technology that stacks two or more chips vertically in the same package to achieve multifunctionality and miniaturization of the chip. This packaging method has high requirements for the heat dissipation of the chip.

[0004] In the prior art, the heat dissipation of the chip is usually performed by using silicone grease or the like, but the heat dissipation performance is not ideal. Summary of the invention

[0005] The purpose of the present invention is to solve the problems in the prior art and to propose a memory chip 3D stacking packaging structure and a packaging process thereof.

[0006] In order to solve the above technical problems, the basic concept of the technical solution adopted by the present invention is:

[0007] A 3D stacked packaging structure of a memory chip, comprising a DBC substrate and an integrated circuit chip integrated on the DBC substrate, wherein the integrated circuit chips are stacked and further comprise a packaging structure installed outside the DBC substrate;

[0008] The packaging structure comprises:

[0009] A packaging shell, wherein the packaging shell covers the outer side of the DBC substrate;

[0010] A group of heat sinks are installed on the outer wall of each integrated circuit chip, and each group of heat sinks is provided with a plurality of heat sinks distributed in a vertical array;

[0011] A slot is provided at the corner of each group of heat sinks, a heat conduction plug is plugged into the inner wall of the slot, and each heat sink in the same group is connected in series through the heat conduction plug;

[0012] The top of each of the heat-conducting plugs is connected to a heat collecting frame, the top of the heat collecting frame is fixedly connected to a heat dissipation plate, and the heat dissipation plate is installed on the top surface of the packaging shell;

[0013] When the stacked integrated circuit chips generate heat during use, the heat is transferred to the heat sink connected to the outside of each integrated circuit chip, and then gathered by the heat conductive plug block on the heat collecting frame and the heat dissipation plate for heat dissipation.

[0014] Preferably, the packaging shell comprises an outer shell, the bottom end of the outer shell is fixedly connected to the bottom plate, the outer shell is covered with a top cover, and silicone gel is placed at the connection between the top cover and the top end of the outer shell.

[0015] Preferably, a sealing plate is slidably connected to the inner wall of the shell, and positioning holes are provided at the corners of the sealing plate, the corners of the DBC substrate and the corners of the bottom plate.

[0016] Preferably, a heat-conducting metal block is installed inside the DBC substrate, a heat-conducting metal plate is arranged between the bottom of the DBC substrate and the top of the bottom plate, and the heat-conducting metal block is in contact with the heat-conducting metal plate.

[0017] Preferably, a heat dissipation side plate is installed on the side wall of the shell, and the heat dissipation side plate is in contact with the heat-conducting metal plate.

[0018] Preferably, both sides of the heat dissipation side plate are fixedly connected with heat conduction side plates, and the heat conduction side plates are fitted with the heat dissipation side plates.

[0019] Preferably, a vertical groove is formed on the side wall of the top cover, a U-shaped heat conducting plate is installed on the outer side of the heat dissipation side plate, and the outer wall of the U-shaped heat conducting plate is slidably connected to the inner side of the vertical groove.

[0020] Preferably, both sides of each integrated circuit chip are connected with gold wires, and the other end of the gold wires is connected to the top of the DBC substrate.

[0021] Preferably, the integrated circuit chip includes: a substrate one, logic chips are provided on both sides of the middle of the top of the substrate one, memory chips are provided on both sides of the substrate one, the two memory chips are respectively located on the outsides of the two logic chips, the top of the substrate one is covered with a metal heat dissipation sealing frame, and flux is provided at the connection between the bottom of the metal heat dissipation sealing frame and the substrate one.

[0022] Preferably, the inner top of the metal heat dissipation sealing frame is in contact with the top of the memory chip and the top of the logic chip respectively, and a first heat dissipation material and a second heat dissipation material are respectively provided at the connection points.

[0023] After adopting the above technical solution, the present invention has the following beneficial effects compared with the prior art: the present invention;

[0024] 1. A 3D stacked packaging structure of a memory chip, which conducts the accumulated heat of the integrated circuit chip through a heat sink, and then conducts it to a heat collecting frame through a heat conductive plug, and then gathers it from the heat collecting frame to a heat dissipation plate for conduction, thereby expanding the heat dissipation area and facilitating heat exchange with external gas for heat dissipation;

[0025] 2. This 3D stacked packaging structure of a memory chip conducts the accumulated heat inside the DBC substrate to the heat-conducting metal plate through a heat-conducting metal block, and then conducts it to the heat-dissipating side plate by the metal heat-conducting plate. The heat-dissipating side plate and the U-shaped heat-conducting plate increase the heat dissipation area and reduce internal heat accumulation. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In the attached picture:

[0027] Figure 1 This is a front view of a 3D stacked packaging structure of a memory chip proposed by the present invention;

[0028] Figure 2 This is a schematic diagram of an exploded view of a 3D stacked packaging structure of a memory chip proposed by the present invention;

[0029] Figure 3 A memory chip 3D stacking packaging structure proposed by the present invention Figure 2 Bottom view;

[0030] Figure 4 A cross-sectional view of a memory chip 3D stacking packaging structure proposed by the present invention;

[0031] Figure 5 A top view of a U-shaped heat conducting plate of a memory chip 3D stacking packaging structure proposed by the present invention;

[0032] Figure 6 A schematic cross-sectional view of an integrated circuit chip of a memory chip 3D stacking packaging structure proposed by the present invention.

[0033] In the figure: 101, bottom plate; 102, shell; 103, sealing plate; 104, top cover; 105, silicone gel; 2, DBC substrate; 3, integrated circuit chip; 301, substrate one; 302, logic chip; 303, memory chip; 304, metal heat dissipation sealing frame; 305, heat sink; 306, first heat dissipation material; 307, second heat dissipation material; 308, soldering flux; 4, gold wire; 501, slot; 502, heat conductive plug; 503, heat collecting frame; 504, heat dissipation plate; 601, heat conductive metal block; 602, heat conductive metal plate; 603, heat conductive side plate; 604, heat dissipation side plate; 605, U-shaped heat conductive plate; 606, vertical groove. DETAILED DESCRIPTION

[0034] The present invention is further described in detail below in conjunction with the accompanying drawings and embodiments so that those skilled in the art can implement the invention with reference to the description.

[0035] It should be understood that the terms such as “having”, “including” and “comprising” used herein do not exclude the existence or addition of one or more other elements or combinations thereof.

[0036] In the description of the present invention, the terms "lateral", "longitudinal", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside" and "outside" etc. to indicate directions or positional relationships are based on the directions or positional relationships shown in the accompanying drawings and are only for the convenience of describing the present invention and simplifying the description. They do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore should not be understood as a limitation on the present invention.

[0037] Example 1: Reference Figure 1-Figure 6 , a memory chip 3D stacking packaging structure, comprising a DBC substrate 2 and an integrated circuit chip 3 integrated on the DBC substrate 2, wherein the integrated circuit chip 3 is stacked and further comprises a packaging structure mounted on the outer side of the DBC substrate 2;

[0038] The packaging structure includes: a packaging shell, which is covered on the outside of the DBC substrate 2; a group of heat sinks 305 are installed on the outer wall of each integrated circuit chip 3, and the heat of the integrated circuit chip 3 is discharged through the heat sink 305 to avoid the heat accumulation of the stacked multiple integrated circuit chips 3 causing damage to the parts; each group of heat sinks 305 is provided with multiple heat sinks 305, which are distributed in a vertical array, and the contact area is increased by multiple heat sinks 305, and the heat is evenly discharged at the same time; a slot 501 is opened at the corner of each group of heat sinks 305, and a heat conductive plug is inserted into the inner wall of the slot 501. The heat sinks 305 of the same group are connected in series through the heat conductive plug 502, and part of the heat of the heat sinks 305 of the same group is gathered and discharged through the heat conductive plug 502; the top of each heat conductive plug 502 is connected to a heat collecting frame 503, and the top of the heat collecting frame 503 is fixedly connected to a heat sink 504, and the heat sink 504 is installed on the top surface of the packaging shell. The heat discharged by the heat conductive plug 502 is collected to the heat sink 504 through the heat collecting frame 503, and then discharged by the heat sink 504, so as to expand the heat dissipation area and improve the heat dissipation efficiency, and at the same time, the outer wall thereof is in contact with the external air for heat exchange;

[0039] Working principle: When the heat generated by the stacked integrated circuit chips 3 during use is conducted to the heat sink 305 connected to the outside of each integrated circuit chip 3, the heat of the stacked integrated circuit chips 3 is prevented from being damaged by the heat accumulation of the multiple integrated circuit chips 3. The heat conduction plug 502 is inserted into the slot 501 provided on the heat sink 305. The heat sinks 305 of the same group are connected in series through the heat conduction plug 502, and part of the heat of the heat sinks 305 of the same group is gathered and conducted to the heat collection frame 503, and then conducted out by the heat sink 504, so as to expand the heat dissipation area and improve the heat dissipation efficiency, and at the same time, the outer wall is in contact with the external air for heat exchange;

[0040] Specifically: the packaging shell includes an outer shell 102, the bottom end of the outer shell 102 is fixedly connected to the bottom plate 101, the outer shell 102 is covered with a top cover 104, and silicone gel 105 is placed at the connection between the top cover 104 and the top of the outer shell 102; both sides of each integrated circuit chip 3 are connected with gold wires 4, and the other end of the gold wires 4 is connected to the top of the DBC substrate 2; the integrated circuit chip 3 is connected to the DBC substrate 2 through the gold wires 4. When in use, the DBC substrate 2 is placed in the outer shell 102 and fixed, and then fixed to the top of the outer shell 102 through the top cover 104, fixed by welding, and silicone gel 105 is used at the connection to improve the sealing.

[0041] Example 2: Reference Figure 1-Figure 6 , Example 1: Reference Figure 1-Figure 6 A 3D stacked packaging structure of a memory chip comprises a DBC substrate 2 and an integrated circuit chip 3 integrated on the DBC substrate 2, wherein the integrated circuit chips 3 are stacked and arranged, and further comprises a packaging structure installed on the outer side of the DBC substrate 2; the packaging structure comprises: a packaging shell, wherein the packaging shell is covered on the outer side of the DBC substrate 2; a group of heat sinks 305 are installed on the outer wall of each integrated circuit chip 3, and the heat of the integrated circuit chip 3 is conducted out through the heat sink 305; each group of heat sinks 305 is provided with a plurality of heat sinks 305, which are arranged in a vertical array; a slot 501 is opened at the corner of each group of heat sinks 305, and a heat conductive plug 502 is plugged into the inner wall of the slot 501, and each heat sink 305 of the same group is connected in series through the heat conductive plug 502; the top of each heat conductive plug 502 is A heat collecting frame 503 is connected, and a heat sink 504 is fixedly connected to the top of the heat collecting frame 503. The heat sink 504 is installed on the top surface of the packaging shell. Furthermore, a heat-conducting metal block 601 is installed inside the DBC substrate 2, and a heat-conducting metal plate 602 is arranged between the bottom of the DBC substrate 2 and the top of the bottom plate 101. The heat-conducting metal block 601 is in contact with the heat-conducting metal plate 602. The heat accumulated in the DBC substrate 2 is conducted through the heat-conducting metal block 601 to the heat-conducting metal plate 602 in contact with it, and the heat is conducted to the heat-dissipating side plate 604 through the heat-conducting metal plate 602; the heat-dissipating side plate 604 is installed on the side wall of the shell 102, and the heat-dissipating side plate 604 is in contact with the heat-conducting metal plate 602, and the heat is transferred to the heat-dissipating side plate 604 to expand the heat dissipation area;

[0042] Working principle: When the heat generated by the stacked integrated circuit chips 3 during use is conducted to the heat sink 305 connected to the outside of each integrated circuit chip 3, to avoid heat accumulation of the multiple stacked integrated circuit chips 3 and damage to parts, the heat conductive plug 502 is inserted into the slot 501 opened on the heat sink 305, and the heat conductive plug 502 is connected in series to the heat sink 305 of the same group, and part of the heat of the heat sink 305 of the same group is gathered and conducted to the heat collecting frame 503, and then conducted out by the heat sink 504, so as to expand the heat dissipation area and improve the heat dissipation efficiency, and at the same time make its outer wall contact with the external air for heat exchange, and conduct the heat accumulated in the DBC substrate 2 through the heat conductive metal block 601, and conduct it to the heat conductive metal plate 602 in contact with it, and conduct the heat to the heat dissipation side plate 604 through the heat conductive metal plate 602, so as to expand the heat dissipation area through the heat dissipation side plate 604.

[0043] Example 3: Reference Figure 1-Figure 6 , which is basically the same as the second embodiment, and furthermore, a vertical groove 606 is provided on the side wall of the top cover 104, a U-shaped heat conducting plate 605 is installed on the outer side of the heat dissipation side plate 604, and the outer wall of the U-shaped heat conducting plate 605 is slidably connected to the inner side of the vertical groove 606;

[0044] Working principle: When the heat generated by the stacked integrated circuit chips 3 during use is conducted to the heat sink 305 connected to the outside of each integrated circuit chip 3, to avoid heat accumulation of the multiple stacked integrated circuit chips 3 and damage to parts, the heat conduction plug 502 is inserted into the slot 501 opened on the heat sink 305, and the heat conduction plug 502 is used to connect the heat sinks 305 of the same group in series, and part of the heat of the heat sinks 305 of the same group is gathered and conducted to the heat collection frame 503, and then conducted out by the heat sink 504, so as to expand the heat dissipation area and improve the heat dissipation efficiency, and at the same time make its outer wall contact with the external air for heat exchange, and conduct the heat accumulated in the DBC substrate 2 through the heat conduction metal block 601 to the heat conduction metal plate 602 in contact with it, and conduct the heat to the heat dissipation side plate 604 and the U-shaped heat conduction plate 605 on the outer wall of the heat dissipation side plate 604 through the heat conduction metal plate 602, so as to expand the heat dissipation area.

[0045] Example 4: Reference Figure 1-Figure 6 , which is basically the same as the third embodiment, and furthermore, the integrated circuit chip 3 comprises: a substrate 1 301, logic chips 302 are arranged on both sides of the middle of the top of the substrate 1 301, memory chips 303 are arranged on both sides of the substrate 1 301, the two memory chips 303 are respectively located outside the two logic chips 302, and the top of the substrate 1 301 is covered with a metal heat dissipation sealing frame 304;

[0046] The inner top of the metal heat dissipation sealing frame 304 is in contact with the top of the memory chip 303 and the top of the logic chip 302 respectively, and a first heat dissipation material 306 and a second heat dissipation material 307 are provided at the connection respectively, and the connection between the bottom end of the metal heat dissipation sealing frame 304 and the substrate 1 301 is welded;

[0047] Working principle: The heat of the substrate 301, memory chip 303, and logic chip 302 is transferred to the metal heat dissipation sealing frame 304, and then the metal heat dissipation sealing frame 304 transfers the heat to the heat sink 305; when the heat generated by the stacked integrated circuit chips 3 during use is transferred to the heat sink 305 connected to the outside of each integrated circuit chip 3, the heat of the stacked integrated circuit chips 3 is prevented from being damaged by the heat accumulation of the multiple integrated circuit chips 3. The heat conduction plug 502 is inserted into the slot 501 opened on the heat sink 305. The heat sinks 305 of the same group are connected in series, and part of the heat of the heat sinks 305 of the same group is gathered and conducted to the heat collection frame 503, and then conducted out by the heat sink 504, so as to expand the heat dissipation area and improve the heat dissipation efficiency. At the same time, the outer wall is in contact with the external air for heat exchange, and the heat accumulated in the DBC substrate 2 is conducted through the heat conductive metal block 601 to the heat conductive metal plate 602 in contact with it, and the heat is conducted to the heat dissipation side plate 604 and the U-shaped heat conductive plate 605 on the outer wall of the heat dissipation side plate 604 through the heat conductive metal plate 602, so as to expand the heat dissipation area.

[0048] Example 5: Reference Figure 1-Figure 6 , which is basically the same as the fourth embodiment, and furthermore: a soldering flux 308 is provided at the connection between the bottom end of the metal heat dissipation sealing frame 304 and the substrate 1 301, and the soldering flux 308 is provided before welding, and the soldering flux 308 is a thermal conductive silicone grease;

[0049] Working principle: The heat of the substrate 301, memory chip 303, and logic chip 302 is transferred to the metal heat dissipation sealing frame 304, and then the metal heat dissipation sealing frame 304 transfers the heat to the heat sink 305; when the heat generated by the stacked integrated circuit chips 3 during use is transferred to the heat sink 305 connected to the outside of each integrated circuit chip 3, the heat of the stacked integrated circuit chips 3 is prevented from being damaged by the heat accumulation of the multiple integrated circuit chips 3. The heat conduction plug 502 is inserted into the slot 501 opened on the heat sink 305. The heat sinks 305 of the same group are connected in series, and part of the heat of the heat sinks 305 of the same group is gathered and conducted to the heat collection frame 503, and then conducted out by the heat sink 504, so as to expand the heat dissipation area and improve the heat dissipation efficiency. At the same time, the outer wall is in contact with the external air for heat exchange, and the heat accumulated in the DBC substrate 2 is conducted through the heat conductive metal block 601 to the heat conductive metal plate 602 in contact with it, and the heat is conducted to the heat dissipation side plate 604 and the U-shaped heat conductive plate 605 on the outer wall of the heat dissipation side plate 604 through the heat conductive metal plate 602, so as to expand the heat dissipation area.

[0050] Example 6: Reference Figure 1-Figure 6 , which is basically the same as Example 5, and furthermore, a sealing plate 103 is slidably connected to the inner wall of the housing 102, and positioning holes are provided at the corners of the sealing plate 103, the corners of the DBC substrate 2, and the corners of the bottom plate 101; the DBC substrate 2 is clamped and fixed to the bottom end of the housing 102 by the sealing plate 103;

[0051] Working principle: The DBC substrate 2 is placed in the housing 102 and fixed, and then fixed to the top of the housing 102 through the top cover 104, fixed by welding, and the silicone gel 105 at the connection improves the sealing performance, and the DBC substrate 2 is clamped and fixed to the bottom of the housing 102 through the sealing plate 103, and the heat of the substrate 301, the memory chip 303, and the logic chip 302 is transferred to the metal heat dissipation sealing frame 304, and then the metal heat dissipation sealing frame 304 transfers the heat to the heat sink 305; when the stacked integrated circuit chips 3 generate heat during use, it is transferred to the heat sink 305 connected to the outside of each integrated circuit chip 3, so as to avoid the stacked integrated circuit chips 3 Heat accumulation causes damage to parts, and the heat-conducting plug 502 is inserted into the slot 501 provided on the heat sink 305. The heat sinks 305 of the same group are connected in series through the heat-conducting plug 502, and part of the heat of the heat sinks 305 of the same group is concentrated and conducted to the heat-concentrating frame 503, and then conducted out by the heat sink 504, so as to expand the heat dissipation area and improve the heat dissipation efficiency. At the same time, the outer wall is in contact with the external air for heat exchange, and the heat accumulated in the DBC substrate 2 is conducted through the heat-conducting metal block 601 to the heat-conducting metal plate 602 in contact therewith, and the heat is conducted to the heat-conducting side plate 604 and the U-shaped heat-conducting plate 605 on the outer wall of the heat-conducting side plate 604 through the heat-conducting metal plate 602, so as to expand the heat dissipation area.

[0052] Example 7: Reference Figure 1-Figure 6 , which is basically the same as Example 6, and furthermore: both sides of the heat dissipation side plate 604 are fixedly connected with the heat conduction side plate 603, and the heat conduction side plate 603 is attached to the heat dissipation side plate 604, and the contact area is increased by the heat conduction side plate 603 and the heat dissipation side plate 604, thereby improving the efficiency;

[0053] Working principle: The DBC substrate 2 is placed in the housing 102 and fixed, and then fixed to the top of the housing 102 through the top cover 104, fixed by welding, and the silicone gel 105 at the connection improves the sealing performance, and the DBC substrate 2 is clamped and fixed to the bottom of the housing 102 through the sealing plate 103, and the heat of the substrate 301, the memory chip 303, and the logic chip 302 is transferred to the metal heat dissipation sealing frame 304, and then the metal heat dissipation sealing frame 304 transfers the heat to the heat sink 305; when the stacked integrated circuit chips 3 generate heat during use, it is transferred to the heat sink 305 connected to the outside of each integrated circuit chip 3, so as to avoid the stacked integrated circuit chips 3 Heat accumulation causes damage to parts, and the heat-conducting plug 502 is inserted into the slot 501 provided on the heat sink 305. The heat sinks 305 of the same group are connected in series through the heat-conducting plug 502, and part of the heat of the heat sinks 305 of the same group is concentrated and conducted to the heat-concentrating frame 503, and then conducted out by the heat sink 504, so as to expand the heat dissipation area and improve the heat dissipation efficiency. At the same time, the outer wall is in contact with the external air for heat exchange, and the heat accumulated in the DBC substrate 2 is conducted through the heat-conducting metal block 601 to the heat-conducting metal plate 602 in contact therewith, and the heat is conducted to the heat-conducting side plate 604 and the U-shaped heat-conducting plate 605 on the outer wall of the heat-conducting side plate 604 through the heat-conducting metal plate 602, so as to expand the heat dissipation area.

[0054] The above embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several modifications and improvements can be made without departing from the concept of the present invention, which are equivalent modifications and improvements made to the above embodiments based on the essential technology of the present invention, and all of them belong to the protection scope of the present invention.

Claims

1. A memory chip 3D stacking packaging structure, comprising a DBC substrate (2) and an integrated circuit chip (3) integrated on the DBC substrate (2), wherein the integrated circuit chip (3) is stacked and characterized in that: Also included is a packaging structure mounted on the outside of the DBC substrate (2); The packaging structure comprises: A packaging shell, the packaging shell covering the outside of the DBC substrate (2); A group of heat sinks (305) are installed on the outer wall of each integrated circuit chip (3), and each group of heat sinks (305) is provided with a plurality of heat sinks (305) distributed in a vertical array; A slot (501) is provided at a corner of each group of the heat sinks (305); a heat conduction plug (502) is plugged into the inner wall of the slot (501); and the heat sinks (305) of the same group are connected in series via the heat conduction plug (502); The top of each of the heat-conducting plugs (502) is connected to a heat collecting frame (503), the top of the heat collecting frame (503) is fixedly connected to a heat dissipation plate (504), and the heat dissipation plate (504) is installed on the top surface of the packaging shell; When the stacked integrated circuit chips (3) generate heat during use, the heat is conducted to the heat sink (305) connected to the outside of each integrated circuit chip (3), and then gathered by the heat conductive plug (502) on the heat collecting frame (503) and the heat dissipation plate (504) for heat dissipation.

2. The memory chip 3D stacking packaging structure according to claim 1, characterized in that: The packaging shell comprises an outer shell (102), the bottom end of the outer shell (102) is fixedly connected to the bottom plate (101), the outer shell (102) is covered with a top cover (104), and silicone gel (105) is placed at the connection between the top cover (104) and the top of the outer shell (102).

3. The memory chip 3D stacking packaging structure according to claim 2, characterized in that: The inner wall of the housing (102) is slidably connected to a sealing plate (103), and positioning holes are provided at the corners of the sealing plate (103), the corners of the DBC substrate (2), and the corners of the bottom plate (101).

4. The memory chip 3D stacking packaging structure according to claim 3, characterized in that: A heat-conducting metal block (601) is installed inside the DBC substrate (2), a heat-conducting metal plate (602) is arranged between the bottom of the DBC substrate (2) and the top of the bottom plate (101), and the heat-conducting metal block (601) is in contact with the heat-conducting metal plate (602).

5. The memory chip 3D stacking packaging structure according to claim 4, characterized in that: A heat dissipation side plate (604) is installed on the side wall of the housing (102), and the heat dissipation side plate (604) is in contact with the heat-conducting metal plate (602).

6. The memory chip 3D stacking packaging structure according to claim 5, characterized in that: Both sides of the heat dissipation side plate (604) are fixedly connected to heat conduction side plates (603), and the heat conduction side plates (603) are fitted to the heat dissipation side plates (604).

7. The memory chip 3D stacking packaging structure according to claim 6, characterized in that: A vertical groove (606) is provided on the side wall of the top cover (104), a U-shaped heat conducting plate (605) is installed on the outer side of the heat dissipation side plate (604), and the outer wall of the U-shaped heat conducting plate (605) is slidably connected to the inner side of the vertical groove (606).

8. The memory chip 3D stacking packaging structure according to claim 7, characterized in that: Both sides of each integrated circuit chip (3) are connected with a gold wire (4), and the other end of the gold wire (4) is connected to the top of the DBC substrate (2).

9. The memory chip 3D stacking packaging structure according to claim 8, characterized in that: The integrated circuit chip (3) comprises: a substrate one (301), logic chips (302) are arranged on both sides of the middle of the top of the substrate one (301), memory chips (303) are arranged on both sides of the substrate one (301), and the two memory chips (303) are respectively located outside the two logic chips (302), the top of the substrate one (301) is covered with a metal heat dissipation sealing frame (304), and soldering flux (308) is arranged at the connection between the bottom of the metal heat dissipation sealing frame (304) and the substrate one (301).

10. The memory chip 3D stacking packaging structure according to claim 9, characterized in that: The inner top of the metal heat dissipation sealing frame (304) is in contact with the top of the memory chip (303) and the top of the logic chip (302), respectively, and a first heat dissipation material (306) and a second heat dissipation material (307) are respectively provided at the connection points.

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