Electrostatic protection ring structure and manufacturing method thereof

Abstract

The invention discloses an electrostatic protection ring structure and a manufacturing method thereof, and the electrostatic protection ring structure comprises a plurality of first fin-shaped structures, a plurality of second fin-shaped structures, a plurality of first polycrystalline silicon conductive wires, a plurality of second polycrystalline silicon conductive wires, a plurality of third polycrystalline silicon conductive wires, and a plurality of single-diffusion blocking parts. Each first fin-shaped structure is at least provided with a single diffusion block, and the single diffusion block is overlapped with the third polycrystalline silicon conductive wire.

Description

Technical Field

[0001] The invention relates to an electrostatic protection ring structure and a manufacturing method thereof, in particular to an electrostatic protection ring structure with single diffusion blocking and a manufacturing method thereof. Background Art

[0002] Modern electronic manufacturing processes can manufacture nano-scale devices. However, these small-sized devices increase their sensitivity to electrostatic discharge (ESD), so guard rings are set around many components. Guard ring design with integrated circuits is basic in semiconductor design. Guard rings can be used in various places in semiconductor design to provide electrical isolation of circuit functions, such as preventing adverse interactions between devices, circuits, and power supply areas. In addition, guard rings can also prevent current injection and other potential disturbances that may cause parasitic components, noise, electrostatic failures, or latch-up effects.

[0003] However, as the integration of components increases, the volume of the guard ring needs to be reduced, which makes it easy for the long strip components in the guard ring to collapse, thus affecting the semiconductor performance. Summary of the invention

[0004] In view of this, the present invention provides an electrostatic protection ring structure to solve the above problem.

[0005] According to a preferred embodiment of the present invention, an electrostatic protection ring structure comprises a substrate, wherein a first direction is parallel to an upper surface of the substrate, a second direction is parallel to an upper surface of the substrate, and the first direction and the second direction are perpendicular, and an electrostatic protection ring is arranged on the substrate, wherein the electrostatic protection ring forms a hollow rectangular profile, and the electrostatic protection ring comprises a plurality of first fin structures, a plurality of second fin structures, a plurality of first polysilicon conductive lines, a plurality of second polysilicon conductive lines, a plurality of third polysilicon conductive lines, and a plurality of single diffusion blocking (Single Diffusion Blocking) The invention relates to a hollow rectangular break, wherein the hollow rectangular outline comprises a first lateral region, a second lateral region, a first longitudinal region and a second longitudinal region, wherein the first lateral region and the second lateral region both extend along a first direction, the first longitudinal region and the second longitudinal region both extend along a second direction, the first longitudinal region and the second longitudinal region are both sandwiched between the first lateral region and the second lateral region, the first fin-shaped structure is arranged in the first lateral region and the second lateral region, each of the first fin-shaped structures extends along the first direction and all of the first fin-shaped structures are arranged parallel to each other along the second direction, the second fin-shaped structure is arranged in the first longitudinal region and the second longitudinal region, each of the second fin-shaped structures extends along the first direction and all of the second fin-shaped structures are arranged parallel to each other along the second direction, and the first polysilicon conductive line is only arranged in the first lateral region, the first longitudinal region and the second lateral region, each of the first polysilicon conductive lines extends along the second direction and is arranged parallel to each other along the second direction. And each first polysilicon conductive line is arranged parallel to each other along the first direction, the first polysilicon conductive line spans the first fin structure and the second fin structure, the second polysilicon conductive line is only arranged in the first lateral region, the second longitudinal region and the second lateral region, each second polysilicon conductive line extends along the second direction and the second polysilicon conductive lines are arranged parallel to each other along the first direction, the second polysilicon conductive line spans the first fin structure and the second fin structure, the third polysilicon conductive line is arranged in the first lateral region and the second lateral region, each third polysilicon conductive line extends along the second direction and each third polysilicon conductive line is arranged parallel to each other along the first direction, the third polysilicon conductive line only spans the first fin structure, each single diffusion block is buried in a first fin structure, the single diffusion blocks in adjacent first fin structures do not overlap along the second direction, and each single diffusion block overlaps with one of the third polysilicon conductive lines.

[0006] According to another preferred embodiment of the present invention, a method for manufacturing an electrostatic protection ring structure includes providing a substrate, wherein a first direction is parallel to an upper surface of the substrate, a second direction is parallel to the upper surface of the substrate, and the first direction and the second direction are perpendicular, and then forming an electrostatic protection ring on the substrate, wherein the electrostatic protection ring includes a substrate, wherein a first direction is parallel to the upper surface of the substrate, a second direction is parallel to the upper surface of the substrate, and the first direction and the second direction are perpendicular, and an electrostatic protection ring is arranged on the substrate, wherein the electrostatic protection ring forms a hollow rectangular outline, and the electrostatic protection ring includes a plurality of first fin structures, a plurality of second fin structures, and a plurality of first polycrystalline silicon structures. The invention relates to a silicon conductive line, a plurality of second polysilicon conductive lines, a plurality of third polysilicon conductive lines and a plurality of single diffusion blocks, wherein the hollow rectangular outline comprises a first lateral region, a second lateral region, a first longitudinal region and a second longitudinal region, the first lateral region and the second lateral region both extend along a first direction, the first longitudinal region and the second longitudinal region both extend along a second direction, the first longitudinal region and the second longitudinal region are both sandwiched between the first lateral region and the second lateral region, the first fin-shaped structure is arranged in the first lateral region and the second lateral region, each first fin structure extends along the first direction and all the first fin structures are arranged parallel to each other along the second direction The second fin structure is arranged in a first longitudinal region and a second longitudinal region, each second fin structure extends along a first direction, and all the second fin structures are arranged parallel to each other along the second direction, the first polysilicon conductive line is only arranged in the first lateral region, the first longitudinal region, and the second lateral region, each first polysilicon conductive line extends along the second direction, and each first polysilicon conductive line is arranged parallel to each other along the first direction, the first polysilicon conductive line spans the first fin structure and the second fin structure, the second polysilicon conductive line is only arranged in the first lateral region, the second longitudinal region, and the second lateral region, and each second polysilicon conductive line is arranged along The second polysilicon conductive lines extend in the second direction and are arranged parallel to each other along the first direction, the second polysilicon conductive lines span the first fin structure and the second fin structure, the third polysilicon conductive lines are arranged in the first lateral region and the second lateral region, each third polysilicon conductive line extends in the second direction and is arranged parallel to each other along the first direction, the third polysilicon conductive lines only span the first fin structure, each single diffusion block is buried in a first fin structure, the single diffusion blocks in adjacent first fin structures do not overlap along the second direction, and each single diffusion block overlaps with one of the third polysilicon conductive lines.

[0007] In order to make the above-mentioned objectives, features and advantages of the present invention more clearly understood, the following is a detailed description of the preferred embodiments and the accompanying drawings. However, the following preferred embodiments and drawings are only for reference and explanation, and are not intended to limit the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figures 1 to 7 A schematic diagram of a method for manufacturing an electrostatic protection ring structure according to a preferred embodiment of the present invention;

[0009] Figure 8 for Figure 7 A cross-sectional view along the tangent line BB';

[0010] Fig. 9 for Figure 7 A cross-sectional view along the tangent line CC';

[0011] Fig.10 for Figure 7 A cross-sectional view taken along the tangent line DD' in FIG.

[0012] Main component symbols

[0013] 10: Base

[0014] 12: Fin structure

[0015] 12a: First fin structure

[0016] 12b: Second fin structure

[0017] 14: Single diffusion blocking

[0018] 16: Patterned Mask

[0019] 18: Groove

[0020] 20: Silicon oxide layer

[0021] 22a: first polysilicon conductive line

[0022] 22b: second polysilicon conductive line

[0023] 22c: third polysilicon conductive line

[0024] 24: Hollow rectangular outline

[0025] 24a: first transverse region

[0026] 24b: Second lateral area

[0027] 24c: first longitudinal region

[0028] 24d: Second longitudinal area

[0029] 24e: Hollow Area

[0030] 26a: first conductor

[0031] 26b: Second conductor

[0032] 28: Components

[0033] 30: Dielectric layer

[0034] 100: Static Electricity Protection Ring

[0035] 112a: First fin structure

[0036] 112b: Second fin structure

[0037] V1: Voltage

[0038] V2: voltage

[0039] X: First direction

[0040] Y: Second direction DETAILED DESCRIPTION

[0041] Figures 1 to 7 A method for manufacturing an electrostatic protection ring structure is illustrated according to a preferred embodiment of the present invention.

[0042] like Figure 1 As shown, a substrate 10 is provided, and the substrate 10 includes a silicon substrate, a germanium substrate, a gallium arsenide substrate, a silicon germanium substrate, an indium phosphide substrate, a gallium nitride substrate, a silicon carbide substrate, or a silicon-on-insulator substrate. A first direction X and a second direction Y are parallel to an upper surface of the substrate 10, and the first direction X and the second direction Y are perpendicular. Then, the substrate 10 is etched to form a plurality of fin structures 12, and each fin structure 12 extends along the first direction X. Figure 2 As shown, part of the fin structure 12 is removed, so that the remaining fin structure is divided into a first fin structure 12a and a second fin structure 12b according to the length. The length of the first fin structure 12a is greater than the length of the second fin structure 12b. Multiple first fin structures 12a are arranged in two areas, and all the second fin structures 12b are sandwiched between the first fin structures 12a.

[0043] like Figure 3 As shown, several single diffusion breaks 14 are formed, and at least one single diffusion break 14 is formed in each first fin structure 12a. However, according to different embodiments, more than two single diffusion breaks 14 can be formed in each first fin structure 12a, but no single diffusion break 14 is formed in the second fin structure 12b. Figures 4 to 6 It is a single diffusion blocking process. Figure 4 To continue Figure 2The manufacturing process of the cross section along the cut line AA' in FIG. 1 is to start manufacturing the single diffusion block 14. First, a patterned mask 16 is formed to cover the first fin structure 12a. Then, the patterned mask 16 is used as a mask to etch the first fin structure 12a to form a trench 18. Figure 5 As shown, a flow chemical vapor deposition is performed to form a silicon oxide layer 20 to fill the trench 18 and the silicon oxide layer 20 is also filled between adjacent first fin structures 12a, between adjacent second fin structures 12b, and between adjacent first fin structures 12a and second fin structures 12b and covers the entire substrate 10 (not shown), as shown in FIG. Figure 6 As shown, the silicon oxide layer 20 and the patterned mask 16 are etched back so that the silicon oxide layer 20 remains in the lower half of the trench 18, and most of the first fin structure 12a and most of the second fin structure 12b protrude from the silicon oxide layer 20 (not shown). At this time, the silicon oxide layer 20 remaining in the lower half of the trench 18 serves as a single diffusion barrier 14, and the silicon oxide layer 20 remaining between adjacent first fin structures 12a, between adjacent second fin structures 12b, and between adjacent first fin structures 12a and second fin structures 12b serves as shallow trench isolation (not shown). Figure 3 All single diffusion blocks 14 are based on Figures 4 to 6 Formed in the manner described.

[0044] like Figure 7 As shown, a dielectric layer (not shown) such as silicon oxide is formed on the first fin structure 12a and the second fin structure 12b protruding from the shallow trench isolation (not shown), and then a plurality of first polysilicon conductive lines 22a, a plurality of second polysilicon conductive lines 22b and a plurality of third polysilicon conductive lines 22c are formed. The first polysilicon conductive lines 22a, the second polysilicon conductive lines 22b and the third polysilicon conductive lines 22c all extend along the second direction Y. The length of the first polysilicon conductive line 22a is equal to the length of the second polysilicon conductive line 22b. The length of the first polysilicon conductive line 22a is equal to the length of the second polysilicon conductive line 22b. The length of the conductive line 22a is greater than the length of the third polysilicon conductive line 22c, the third polysilicon conductive line 22c only crosses the first fin structure 12a and the single diffusion barrier 14 overlaps with the third polysilicon conductive line 22c, the first polysilicon conductive line 22a and the second polysilicon conductive line 22b both cross the first fin structure 12a and the second fin structure 12b, and there is no single diffusion barrier 14 in the first fin structure 12a and the second fin structure 12b directly below the first polysilicon conductive line 22a and directly below the second polysilicon conductive line 22b. At this point, the electrostatic protection ring 100 of the present invention has been completed.

[0045] like Figure 7As shown, an electrostatic guard ring structure includes a substrate 10, a first direction X and a second direction Y are parallel to the upper surface of the substrate 10, the first direction X and the second direction Y are perpendicular, an electrostatic guard ring 100 is disposed on the substrate 10, wherein the electrostatic guard ring 100 forms a hollow rectangular outline 24, the electrostatic guard ring 100 includes a plurality of first fin structures 12a, a plurality of second fin structures 12b, a plurality of first polysilicon conductive lines 22a, a plurality of second polysilicon conductive lines 22b, a plurality of third polysilicon conductive lines 22c and a plurality of single diffusion blocking 14, the hollow rectangular outline 24 is formed by a first lateral region 24a, a second lateral region 24b, a first longitudinal region 24c, a second longitudinal region 24d and a hollow region 24e, the first lateral region 24a and the second lateral region 24b both extend along the first direction X, the first longitudinal region 24c and the second longitudinal region 24d both extend along the second direction Y, the first longitudinal region 24c and the second longitudinal region 24d are both sandwiched between the first lateral region 24a and the second lateral region 24b, and the first lateral region 24a, the second lateral region 24b, the first longitudinal region 24c and the second longitudinal region 24d define the hollow region 24e.

[0046] The first fin structures 12a are arranged in the first lateral region 24a and the second lateral region 24b, the number of the first fin structures 12a in the first lateral region 24a and the second lateral region 24b is preferably the same, each of the first fin structures 12a extends along the first direction X and each of the first fin structures 12a is arranged parallel to each other along the second direction Y, the second fin structures 12b are arranged in the first longitudinal region 24c and the second longitudinal region 24d, the number of the second fin structures 12b in the first longitudinal region 24c and the second longitudinal region 24d is preferably the same, each of the second fin structures 12b extends along the first direction X and the second fin structures 12b are arranged parallel to each other along the second direction Y. The first polysilicon conductive line 22a is arranged in parallel with the first lateral region 24a, the first longitudinal region 24c and the second lateral region 24b, that is, there is no first polysilicon conductive line 22a in the second longitudinal region 24d, the first polysilicon conductive line 22a extends along the second direction Y and the first polysilicon conductive line 22a is arranged in parallel with each other along the first direction X, the second polysilicon conductive line 22b crosses the first fin structure 12a and the second fin structure 12b, and the second polysilicon conductive line 22b is only arranged in the first lateral region 24a, the first longitudinal region 24c and the second lateral region 24b. The second polysilicon conductive lines 22a and the second polysilicon conductive lines 22b are arranged in parallel with each other in the first direction X, and the second polysilicon conductive lines 22b are arranged in parallel with each other in the first direction Y. The second polysilicon conductive lines 22b are arranged in parallel with each other in the first direction X. The second polysilicon conductive lines 22b are arranged in parallel with each other in the first fin structure 12a and the second fin structure 12b. The first polysilicon conductive lines 22a and the second polysilicon conductive lines 22b are preferably the same in number. The third polysilicon conductive lines 22c are arranged in the first lateral region 24a and the second lateral region 24b. There is no third polysilicon conductive line 22c in the longitudinal region 24c and the second longitudinal region 24d, each third polysilicon conductive line 22c extends along the second direction Y and each third polysilicon conductive line 22c is arranged parallel to each other along the first direction X, each third polysilicon conductive line 22c only crosses the first fin structure 12a without contacting the second fin structure 12b, each single diffusion block 14 is respectively buried in a first fin structure 12a, the single diffusion blocks 14 in adjacent first fin structures 12a do not overlap along the second direction Y, and each single diffusion block 14 overlaps with a third polysilicon conductive line 22c.

[0047] In addition, the length of the first fin structure 12a is greater than the length of the second fin structure 12b, the length of the first polysilicon conductive line 22a is equal to the length of the second polysilicon conductive line 22b, and the length of the first polysilicon conductive line 22a is greater than the length of the third polysilicon conductive line 22c. Furthermore, a first conductive line 26a is also included to electrically connect the first polysilicon conductive line 22a, the second polysilicon conductive line 22b and the third polysilicon conductive line 22c at the same time, so that the first polysilicon conductive line 22a, the second polysilicon conductive line 22b and the third polysilicon conductive line 22c can be externally connected to the same voltage V1. A second conductive line 26b is electrically connected to the first fin structure 12a and the second fin structure 12b at the same time, so that the first fin structure 12a and the second fin structure 12b can be externally connected to the same voltage V2. Furthermore, a component 28 is disposed on the substrate 10 and is located in the hollow area 24e of the hollow rectangular outline 24. The component 28 can be a semiconductor component or an alignment mark. After the voltage V1 and the voltage V2 are activated, the electrostatic protection ring can prevent the component from being interfered by electrostatics.

[0048] Figure 8 for Figure 7 A cross-sectional view taken along the tangent line BB' in FIG. Fig. 9 for Figure 7 A cross-sectional view taken along the tangent line CC'. Fig.10 7 is a cross-sectional view along the tangent line DD'.

[0049] Please also see Figure 7 and Figure 8 In this embodiment, three first fin structures 12a are arranged in the second lateral region 24b. Along the tangent line BB', a single diffusion block 14 is arranged on the first fin structure 12a closest to the hollow region 24e. Therefore, there is no first fin structure 12a directly above the single diffusion block 14, but the third polysilicon wire 22c directly contacts the single diffusion block 14a. The other two first fin structures 12a are not provided with a single diffusion block 14 along the tangent line BB', so the first fin structure 12a is still retained, and a dielectric layer 30 and a third polysilicon wire 22c are arranged on the first fin structure 12a. It is worth noting that along the tangent line BB', that is, along the second direction Y, the single diffusion blocks 14 in adjacent first fin structures 12a do not overlap. Therefore, among the three first fin structures 12a, only the first fin structure 12a closest to the hollow region 24e is provided with a single diffusion block 14.

[0050] Please also see Figure 7 and Fig. 9In this embodiment, three first fin structures 12a are provided in the second lateral region 24b. Along the tangent line CC', a single diffusion block 14 is provided on the middle first fin structure 12a, and no single diffusion block 14 is provided on the other two first fin structures 12a along the tangent line CC'. Similarly, this embodiment also illustrates that along the tangent line CC', that is, along the second direction Y, the single diffusion blocks 14 in adjacent first fin structures 12a do not overlap.

[0051] Please also see Figure 7 and Fig.10 In this embodiment, only one single diffusion barrier 14 is disposed on the first fin structure 12a farthest from the hollow region 24e, and the single diffusion barrier 14 separates the first fin structure 12a into a first fin structure 112a and a second fin structure 112b, and a portion of the third polysilicon conductive line 22c directly above the single diffusion barrier 14 is buried in the first fin structure 12a. Because there is no single diffusion barrier 14 at other positions, the third polysilicon conductive line 22c is located above the first fin structure 12a, and spacers may be disposed on both sides of the third polysilicon conductive line 22c.

[0052] The single diffusion block 14 of the present invention is used to separate the relatively long first fin structure 12a into shorter secondary fin structures 112a / 112b, so as to reduce the problem of collapse of the first fin structure 12a in the subsequent manufacturing process. In addition, along the second direction Y, the single diffusion blocks 14 in adjacent first fin structures 12a do not overlap because the silicon oxide layer 20 needs to be etched back when forming the single diffusion blocks 14. If the single diffusion blocks 14 are all arranged on the same tangent line, the stress will be too concentrated in the same area during the back etching, causing the surface of the single diffusion block 14 and the surrounding shallow trench isolation to be concave.

[0053] The above descriptions are only preferred embodiments of the present invention. All equivalent changes and modifications made according to the claims of the present invention should fall within the scope of the present invention.

Claims

1. An electrostatic protection ring structure, comprising: A substrate, wherein a first direction is parallel to an upper surface of the substrate, a second direction is parallel to the upper surface of the substrate, and the first direction is perpendicular to the second direction; An electrostatic protection ring is disposed on the substrate, wherein the electrostatic protection ring forms a hollow rectangular outline, and the electrostatic protection ring includes a plurality of first fin-shaped structures, a plurality of second fin-shaped structures, a plurality of first polysilicon conductive lines, a plurality of second polysilicon conductive lines, a plurality of third polysilicon conductive lines, and a plurality of single diffusion breaks; The hollow rectangular outline comprises a first transverse region, a second transverse region, a first longitudinal region, and a second longitudinal region, the first transverse region and the second transverse region both extending along the first direction, the first longitudinal region and the second longitudinal region both extending along the second direction, and the first longitudinal region and the second longitudinal region both being sandwiched between the first transverse region and the second transverse region; The plurality of first fin structures are disposed in the first lateral region and the second lateral region, each of the first fin structures extends along the first direction and the plurality of first fin structures are arranged parallel to each other along the second direction; The plurality of second fin structures are disposed in the first longitudinal region and the second longitudinal region, each of the second fin structures extends along the first direction, and the plurality of second fin structures are arranged parallel to each other along the second direction; The plurality of first polysilicon conductive lines are only disposed in the first lateral region, the first longitudinal region and the second lateral region, each of the first polysilicon conductive lines extends along the second direction and the plurality of first polysilicon conductive lines are arranged parallel to each other along the first direction, and the plurality of first polysilicon conductive lines cross the plurality of first fin structures and the plurality of second fin structures; The plurality of second polysilicon conductive lines are only disposed in the first lateral region, the second longitudinal region and the second lateral region, each of the second polysilicon conductive lines extends along the second direction and the plurality of second polysilicon conductive lines are arranged parallel to each other along the first direction, and the plurality of second polysilicon conductive lines cross the plurality of first fin structures and the plurality of second fin structures; The plurality of third polysilicon conductive lines are disposed in the first lateral region and the second lateral region, each of the third polysilicon conductive lines extends along the second direction and the plurality of third polysilicon conductive lines are arranged parallel to each other along the first direction, and the plurality of third polysilicon conductive lines only cross the plurality of first fin structures; as well as Each of the single diffusion blocks is buried in one of the plurality of first fin structures, the single diffusion blocks in adjacent first fin structures do not overlap along the second direction, and each of the single diffusion blocks overlaps one of the plurality of third polysilicon conductive lines. 2 . The electrostatic protection ring structure as claimed in claim 1 , wherein a length of each of the first fin-shaped structures is greater than a length of each of the second fin-shaped structures. 3 . The electrostatic guard ring structure as claimed in claim 1 , wherein the length of each of the first polysilicon conductive lines is equal to the length of each of the second polysilicon conductive lines. 4 . The electrostatic guard ring structure as claimed in claim 1 , wherein a length of each of the first polysilicon conductive lines is greater than a length of each of the third polysilicon conductive lines. 5 . The electrostatic guard ring structure as claimed in claim 1 , further comprising a first conductive wire electrically connecting the plurality of first polysilicon conductive lines, the plurality of second polysilicon conductive lines and the plurality of third polysilicon conductive lines at the same time. 6 . The electrostatic guard ring structure as claimed in claim 1 , further comprising a second conductive wire electrically connecting the plurality of first fin structures and the plurality of second fin structures at the same time. 7 . The electrostatic guard ring structure as claimed in claim 1 , wherein each of the single diffusion blocks comprises: a trench disposed in one of the plurality of first fin structures, and a silicon oxide layer filling the trench. 8 . The electrostatic protection ring structure as claimed in claim 1 , further comprising a semiconductor device disposed on the substrate and located in a hollow area of ​​the hollow rectangular outline. 9 . The electrostatic protection ring structure as claimed in claim 1 , further comprising an alignment mark disposed on the substrate and located in a hollow area of ​​the hollow rectangular outline. 10 . The electrostatic guard ring structure as claimed in claim 1 , wherein no single diffusion block is disposed in the plurality of second fin structures.

11. A method for manufacturing an electrostatic protection ring structure, comprising: Providing a substrate, wherein a first direction is parallel to an upper surface of the substrate, a second direction is parallel to the upper surface of the substrate, and the first direction is perpendicular to the second direction; An electrostatic protection ring is formed on the substrate, wherein the electrostatic protection ring comprises: An electrostatic protection ring is disposed on the substrate, wherein the electrostatic protection ring forms a hollow rectangular outline, and the electrostatic protection ring includes a plurality of first fin-shaped structures, a plurality of second fin-shaped structures, a plurality of first polysilicon conductive lines, a plurality of second polysilicon conductive lines, a plurality of third polysilicon conductive lines, and a plurality of single diffusion breaks; The hollow rectangular outline comprises a first transverse region, a second transverse region, a first longitudinal region, and a second longitudinal region, the first transverse region and the second transverse region both extending along the first direction, the first longitudinal region and the second longitudinal region both extending along the second direction, and the first longitudinal region and the second longitudinal region both being sandwiched between the first transverse region and the second transverse region; The plurality of first fin structures are disposed in the first lateral region and the second lateral region, each of the first fin structures extends along the first direction and the plurality of first fin structures are arranged parallel to each other along the second direction; The plurality of second fin structures are disposed in the first longitudinal region and the second longitudinal region, each of the second fin structures extends along the first direction, and the plurality of second fin structures are arranged parallel to each other along the second direction; The plurality of first polysilicon conductive lines are only disposed in the first lateral region, the first longitudinal region and the second lateral region, each of the first polysilicon conductive lines extends along the second direction and the plurality of first polysilicon conductive lines are arranged parallel to each other along the first direction, and the plurality of first polysilicon conductive lines cross the plurality of first fin structures and the plurality of second fin structures; The plurality of second polysilicon conductive lines are only disposed in the first lateral region, the second longitudinal region and the second lateral region, each of the second polysilicon conductive lines extends along the second direction and the plurality of second polysilicon conductive lines are arranged parallel to each other along the first direction, and the plurality of second polysilicon conductive lines cross the plurality of first fin structures and the plurality of second fin structures; The plurality of third polysilicon conductive lines are disposed in the first lateral region and the second lateral region, each of the third polysilicon conductive lines extends along the second direction and the plurality of third polysilicon conductive lines are arranged parallel to each other along the first direction, and the plurality of third polysilicon conductive lines only cross the plurality of first fin structures; as well as Each of the single diffusion blocks is buried in one of the plurality of first fin structures, the single diffusion blocks in adjacent first fin structures do not overlap along the second direction, and each of the single diffusion blocks overlaps one of the plurality of third polysilicon conductive lines. 12 . The method for manufacturing an electrostatic guard ring structure as claimed in claim 11 , wherein a length of each of the first fin-shaped structures is greater than a length of each of the second fin-shaped structures. 13 . The method for manufacturing an electrostatic guard ring structure as claimed in claim 11 , wherein a length of each of the first polysilicon conductive lines is equal to a length of each of the second polysilicon conductive lines. 14 . The method for manufacturing an electrostatic protection ring structure as claimed in claim 11 , wherein a length of each of the first polysilicon conductive lines is greater than a length of each of the third polysilicon conductive lines. 15 . The method for manufacturing an electrostatic guard ring structure according to claim 11 , further comprising a first conductive wire electrically connecting the plurality of first polysilicon conductive wires, the plurality of second polysilicon conductive wires, and the plurality of third polysilicon conductive wires at the same time. 16 . The method for manufacturing an electrostatic guard ring structure according to claim 11 , further comprising a second conductive wire electrically connecting the plurality of first fin structures and the plurality of second fin structures at the same time. 17 . The method for manufacturing an electrostatic guard ring structure as claimed in claim 11 , wherein each of the single diffusion blocks comprises: a trench disposed in one of the plurality of first fin structures, and a silicon oxide layer is filled into the trench. 18 . The method for manufacturing an electrostatic protection ring structure as claimed in claim 11 , further comprising disposing a semiconductor element on the substrate and located in a hollow area of ​​the hollow rectangular outline. 19 . The method for manufacturing an electrostatic protection ring structure as claimed in claim 11 , further comprising an alignment mark disposed on the substrate and located in a hollow area of ​​the hollow rectangular outline. 20 . The method for manufacturing an electrostatic guard ring structure according to claim 11 , wherein no single diffusion block is disposed in the plurality of second fin structures.

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