Photoelectric chip integration module based on three-dimensional packaging form
By setting up a heat dissipation pipe running through the chip in the 3D packaged optoelectronic chip integration module and connecting it with an external radiator, the longitudinal heat dissipation problem caused by multi-chip stacking under the 3D package structure is solved, and more efficient heat dissipation and more stable chip performance are achieved.
Patent Information
- Application Number
- CN202411846888.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-16
- Publication Date
- 2025-03-18
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
The stacking of multiple chips under the 3D packaging structure leads to longitudinal heat dissipation problems, affecting the performance and reliability of optoelectronic devices.
An optoelectronic chip integration module based on three-dimensional packaging is designed, and effective heat dissipation is achieved by setting a heat dissipation pipe running through the chip in the chip and connecting it with an external radiator.
It effectively reduces the operating temperature of 3D stacked chips, improves heat dissipation efficiency, enhances the stability and reliability of high-speed photoelectric integrated chipsets, and provides electromagnetic shielding function.
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Figure CN119650558A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of optoelectronic integration technology, and in particular to an optoelectronic chip integrated module based on a three-dimensional packaging form. Background Art
[0002] As the demand for photoelectric conversion rate and integration level in the communication and computing fields continues to increase, 3D packaging structures in which multiple chips are vertically stacked and electrically connected through solder balls are gradually gaining attention.
[0003] Although this 3D (three-dimensional) packaging structure has significant advantages in improving integration and performance, it also brings more important thermal management challenges. Due to the stacking of multiple chips, the problem of longitudinal heat dissipation is more severe than that of traditional planar integrated chips. For example, optoelectronic devices such as modulators need to work at a stable temperature. Especially when processing high-speed signals, optoelectronic devices are more sensitive to temperature. Excessive temperature and rapid temperature changes will seriously reduce device performance and even cause device failure. Therefore, in order to ensure the performance and reliability of the device. It is necessary to effectively dissipate the heat generated by the chips in the high-speed optoelectronic integrated chipset in a timely manner. Summary of the invention
[0004] 1. Technical issues to be resolved
[0005] In view of the above-mentioned deficiencies, the main purpose of the present invention is to provide an optoelectronic chip integrated module based on a three-dimensional packaging form. By setting a heat dissipation pipe running through the chip and connecting it to an external radiator, the operating temperature of the 3D stacked chip can be effectively reduced, the heat dissipation efficiency can be improved, and the stability and reliability of the high-speed optoelectronic integrated chipset can be enhanced.
[0006] (II) Technical solution
[0007] In order to achieve the above-mentioned purpose, the present invention provides an optoelectronic chip integrated module based on a three-dimensional packaging form, comprising: an external heat sink; a high-speed optoelectronic integrated chipset is stacked on the external heat sink, and the external heat sink and the high-speed optoelectronic integrated chipset are connected by a plurality of solder balls; wherein the high-speed optoelectronic integrated chipset comprises a plurality of high-speed optoelectronic chips stacked in sequence along a first direction, and any two high-speed optoelectronic chips are connected by solder balls; at a position corresponding to the solder balls along the first direction, a heat dissipation pipe runs through the high-speed optoelectronic integrated chipset and the plurality of solder balls, and extends into the external heat sink.
[0008] In the above solution, the positions of the solder balls arranged on the upper and lower surfaces of any high-speed optoelectronic chip along the first direction are the same.
[0009] In the above solution, the cross-sectional area of the heat dissipation pipe is set according to the heat generated by the high-speed optoelectronic chip.
[0010] In the above solution, the materials of the heat dissipation pipe include copper, aluminum and tungsten.
[0011] In the above solution, the filler in the heat dissipation pipe includes coolant and phase change material.
[0012] In the above solution, the heat dissipation pipeline is connected to an external pump device so that the heat dissipation pipeline is filled with coolant for circulating cooling.
[0013] In the above solution, the heat dissipation pipe can shield electromagnetic radiation.
[0014] In the above solution, a through silicon via is preset in any high-speed optoelectronic chip at a position corresponding to the position of the arranged solder ball.
[0015] In the above solution, the surface of the heat dissipation pipe is designed with a microstructure.
[0016] In the above solution, the surface of the heat dissipation pipe is coated with a material that enhances heat radiation.
[0017] (III) Beneficial effects
[0018] The technical solution of the embodiment of the present invention has at least the following beneficial effects:
[0019] (1) This optoelectronic chip integrated module based on three-dimensional packaging effectively reduces the operating temperature of the 3D stacked chip, improves the heat dissipation efficiency, and enhances the stability and reliability of the high-speed optoelectronic integrated chipset by setting a heat dissipation pipe that runs through the chip and connects to an external heat sink. It provides a stable ambient temperature for the high-speed chip and enhances the stability and reliability of the high-speed optoelectronic integrated chipset.
[0020] (2) The connection method of the heat dissipation pipes in the optoelectronic chip integrated module based on the three-dimensional packaging form helps to form electromagnetic shielding and effectively suppress electromagnetic interference. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] Figure 1 A schematic diagram shows a structural side view of an optoelectronic chip integrated module based on a three-dimensional packaging form according to an embodiment of the present invention;
[0022] Figure 2 The structure top view of the optoelectronic chip integrated module based on the three-dimensional packaging form according to an embodiment of the present invention is schematically shown. DETAILED DESCRIPTION
[0023] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings.
[0024] Figure 1The structure side view of the optoelectronic chip integrated module based on the three-dimensional packaging form according to an embodiment of the present invention is schematically shown. Figure 2 The structure top view of the optoelectronic chip integrated module based on the three-dimensional packaging form according to an embodiment of the present invention is schematically shown.
[0025] Please refer to Figure 1 and Figure 2 The embodiment of the present invention provides an optoelectronic chip integrated module based on a three-dimensional packaging form, which solves the heat dissipation problem caused by multi-chip stacking, and specifically includes: an external radiator 1; a high-speed optoelectronic integrated chipset 2 is stacked on the external radiator 1, and the external radiator 1 and the high-speed optoelectronic integrated chipset 2 are connected through a plurality of solder balls 3; wherein, the high-speed optoelectronic integrated chipset 2 has a plurality of high-speed optoelectronic chips 21 stacked in sequence along a first direction X1, and any two high-speed optoelectronic chips 21 are connected through solder balls 3; at a position corresponding to the solder balls 3 along the first direction X1, a heat dissipation pipe 4 runs through the high-speed optoelectronic integrated chipset 2 and the plurality of solder balls 3, and extends into the external radiator 1.
[0026] Specifically, the high-speed optoelectronic integrated chipset 2 is stacked on the external heat sink 1 along the first direction X1 and connected via a plurality of solder balls 3 .
[0027] The high-speed optoelectronic integrated chipset 2 includes a plurality of high-speed optoelectronic chips 21 stacked in sequence along a first direction X1. Figure 1 As shown, for example, there are four high-speed optoelectronic chips 21. Any two high-speed optoelectronic chips 21 are connected by solder balls 3. Wherein, a silicon through hole is preset in any high-speed optoelectronic chip 21 at a position corresponding to the position of the arranged solder ball 3, and the solder ball 3 is implanted at the position of the silicon through hole on the chip surface.
[0028] In the embodiment of the present invention, the positions of the solder balls 3 arranged on the upper and lower surfaces of any high-speed optoelectronic chip 21 along the first direction X1 are the same.
[0029] In the embodiment of the present invention, at a position corresponding to the solder balls 3 along the first direction X1, the heat dissipation pipe 4 penetrates each high-speed optoelectronic chip 21 and multiple solder balls 3 in the high-speed optoelectronic integrated chipset 2 and extends into the external heat sink 1.
[0030] Specifically, if Figure 1 and Figure 2 As shown, for example, there may be two rows of heat dissipation pipes 4 arranged in parallel along the second direction X2, penetrating each high-speed optoelectronic chip 21 and multiple solder balls 3 in the high-speed optoelectronic integrated chipset 2, and extending into the external heat sink 1, wherein the first direction X1 and the second direction X2 are perpendicular to each other.
[0031] Illustratively, multiple rows of heat dissipation pipes 4 may be arranged in parallel along the second direction X2 and penetrate each high-speed optoelectronic chip 21 and multiple solder balls 3 in the high-speed optoelectronic integrated chipset 2 .
[0032] In the embodiment of the present invention, the heat dissipation pipe 4 is extended into the external radiator 1. This connection method with the external radiator 1 can achieve rapid conduction and dissipation of heat.
[0033] In the embodiment of the present invention, the cross-sectional area of the heat dissipation pipe 4 is set according to the heat generated by the high-speed optoelectronic chip 21 .
[0034] Specifically, the cross-sectional area of the heat dissipation pipe 4 is optimized according to the heat generated by the chip. For example, the cross-sectional area of the heat dissipation pipe 4 is proportional to the heat generated by the high-speed optoelectronic chip 21 to improve the heat dissipation efficiency.
[0035] In the embodiment of the present invention, the material of the heat dissipation pipe 4 includes materials with high thermal conductivity such as copper, aluminum and tungsten.
[0036] In an embodiment of the present invention, the filler in the heat dissipation pipe 4 includes a coolant and a phase change material. Such filler can enhance the heat dissipation capability.
[0037] In the embodiment of the present invention, the heat dissipation pipe 4 is connected to an external pump device so that the heat dissipation pipe 4 is filled with coolant for circulating cooling.
[0038] In the embodiment of the present invention, the heat dissipation pipe 4 can shield electromagnetic radiation.
[0039] Specifically, the material or structural design of the heat dissipation pipe 4 can provide electromagnetic shielding effect to reduce the influence of electromagnetic interference on chip performance.
[0040] In the embodiment of the present invention, the surface of the heat dissipation pipe 4 is designed with a microstructure, which can increase the heat dissipation area.
[0041] In an embodiment of the present invention, the surface of the heat dissipation pipe 4 is coated with a material that enhances heat radiation, for example, the surface of the heat dissipation pipe 4 is coated with a material with high emissivity.
[0042] Through the embodiments of the present invention, the optoelectronic chip integrated module based on the three-dimensional packaging form effectively reduces the operating temperature of the 3D stacked chip through the heat dissipation pipe that runs through the chip, improves the heat dissipation efficiency, and enhances the stability and reliability of the high-speed optoelectronic integrated chipset. The heat dissipation pipe design takes into account the cross-sectional area optimization, the selection of high thermal conductivity materials, the internal filler, and the circulating cooling system to adapt to the heat generation of different chips. Compared with the prior art, the optoelectronic chip integrated module of the embodiment of the present invention significantly improves the heat dissipation performance of the 3D stacked chip and is suitable for high-speed optoelectronic integrated applications; in addition, it is also conducive to enhancing the electromagnetic shielding function of the chipset.
[0043] Based on the above-mentioned optoelectronic chip integrated module based on the three-dimensional packaging form, the present invention also provides a method for preparing the optoelectronic chip integrated module based on the three-dimensional packaging form.
[0044] Specifically, a plurality of high-speed optoelectronic chips 21 are obtained, and a through silicon via is reserved at the same position of each high-speed optoelectronic chip 21; the through silicon via is filled with solder or other solids that can be melted at high temperature, wherein the melting point of the solid needs to be higher than the welding temperature; solder balls 3 are implanted at positions where through holes are present on the chip surface; and a chip stacking operation, i.e., a 3D packaging process, is performed through a reflow soldering process to obtain a high-speed optoelectronic integrated chipset 2 based on a three-dimensional packaging form.
[0045] Furthermore, after the 3D packaging process is completed, the entire chip set is heated to near the melting point of the solder ball 3, and then a needle with a diameter smaller than the through-silicon via is used to penetrate all high-speed optoelectronic chips 21 and the solder ball 3 at the through-hole position. It should be noted that the needle should not be wetted by the solder, and during this process, the solder ball 3 is constrained by surface tension and remains in place.
[0046] Furthermore, after cooling, the needle is removed, and the heat dissipation pipe 4 penetrating the high-speed optoelectronic integrated chipset 2 is formed. For example, a hollow needle can be inserted into the formed heat dissipation pipe 4 to improve the sealing performance of the heat dissipation pipe 4.
[0047] Furthermore, the heat dissipation pipe 4 is connected to an external radiator, and then a coolant or a phase change material is injected into the heat dissipation pipe 4. Finally, a pump is used in the external radiator to drive the coolant to flow, thereby improving the heat dissipation effect.
[0048] In summary, the optoelectronic chip integrated module based on the three-dimensional packaging form in this embodiment improves the heat dissipation problem in the longitudinal direction (i.e., the first direction) due to the stacking of multiple chips in the prior art. By setting a heat dissipation pipeline that runs through the chip and is connected to an external radiator, the operating temperature of the 3D stacked chip is effectively reduced, the heat dissipation efficiency is improved, and the stability and reliability of the high-speed optoelectronic integrated chipset are enhanced. A stable ambient temperature is provided for the high-speed chip, and the stability and reliability of the high-speed optoelectronic integrated chipset are enhanced.
[0049] The above specific embodiments further illustrate the purpose, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above are only specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.
Claims
1. An optoelectronic chip integrated module based on a three-dimensional packaging form, characterized in that: include: External heat sink (1); A high-speed optoelectronic integrated chipset (2) is stacked on the external heat sink (1), and the external heat sink (1) and the high-speed optoelectronic integrated chipset (2) are connected via a plurality of solder balls (3); The high-speed optoelectronic integrated chipset (2) comprises a plurality of high-speed optoelectronic chips (21) stacked in sequence along a first direction, and any two of the high-speed optoelectronic chips (21) are connected via solder balls (3); At a position corresponding to the solder balls (3) along the first direction, a heat dissipation pipeline (4) penetrates the high-speed optoelectronic integrated chipset (2) and the plurality of solder balls (3), and extends into the external heat sink (1).
2. The optoelectronic chip integrated module based on three-dimensional packaging according to claim 1, characterized in that: The positions of the solder balls (3) arranged on the upper and lower surfaces of any of the high-speed optoelectronic chips (21) along the first direction are the same.
3. The optoelectronic chip integrated module based on three-dimensional packaging according to claim 1 or 2, characterized in that: The cross-sectional area of the heat dissipation pipeline (4) is set according to the heat generated by the high-speed optoelectronic chip (21).
4. The optoelectronic chip integrated module based on three-dimensional packaging according to claim 3, characterized in that: The material of the heat dissipation pipe (4) includes copper, aluminum and tungsten.
5. The optoelectronic chip integrated module based on three-dimensional packaging according to claim 1 or 4, characterized in that: The filler in the heat dissipation pipe (4) includes cooling liquid and phase change material.
6. The optoelectronic chip integrated module based on three-dimensional packaging according to claim 5, characterized in that: The heat dissipation pipeline (4) is connected to an external pump device so that the heat dissipation pipeline (4) is filled with coolant for circulating cooling.
7. The optoelectronic chip integrated module based on three-dimensional packaging according to claim 4, characterized in that: The heat dissipation pipe (4) is capable of shielding electromagnetic radiation.
8. The optoelectronic chip integrated module based on three-dimensional packaging according to claim 1 or 2, characterized in that: A through silicon via is preset in any of the high-speed optoelectronic chips (21) at a position corresponding to the position of the arranged solder ball (3).
9. The optoelectronic chip integrated module based on three-dimensional packaging according to claim 3, characterized in that: The surface of the heat dissipation pipe (4) is designed with a microstructure.
10. The optoelectronic chip integrated module based on three-dimensional packaging according to claim 9, characterized in that: The surface of the heat dissipation pipe (4) is coated with a material that enhances heat radiation.
Citation Information
Patent Citations
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US20120228779A1
Semiconductor Device and Methods of Making and Using Thermally Advanced Semiconductor Packages
US20240105551A1