Method for optimizing conduction loss of soft switching circuit and application thereof

Abstract

The present disclosure provides a soft switching circuit conduction loss optimization method and application thereof. The soft switching circuit includes an energy storage capacitor and an inductor, and is used to charge the equivalent parasitic capacitor of the switching node of the power stage circuit to realize zero voltage switching of the power stage circuit. The soft switching circuit conduction loss optimization method includes operations S1-S4: operation S1: determining the timing waveform of the inductor current of the soft switching circuit in different stages in a switching cycle; operation S2: obtaining the theoretical value of the soft switching conduction loss in a switching cycle according to the timing waveform of the inductor current; operation S3: determining the relationship between the soft switching conduction loss and the energy storage capacitor voltage according to the timing waveform of the inductor current and the theoretical value of the conduction loss, and determining the regulation target of the energy storage capacitor voltage; and operation S4: adjusting the energy storage capacitor power compensation time according to the regulation target to stabilize the energy storage capacitor voltage at the regulation target, thereby realizing real-time optimization of the soft switching circuit conduction loss.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of circuit, in particular to a soft switching circuit conduction loss optimization method and application. BACKGROUND

[0002] When the high-voltage direct-current-direct-current converter works in the hard switching mode, the switching loss caused by the large input voltage and the high-voltage power tube parasitic capacitance seriously limits the conversion efficiency. The soft switching technology is usually used to eliminate the switching loss, thereby improving the conversion efficiency. The existing soft switching control method realizes the ideal soft switching state through charge control, that is, no partial or excessive soft switching state occurs, but the conduction loss of the soft switching circuit is not optimized. SUMMARY

[0003] Therefore, in order to at least partially solve at least one of the above-mentioned technical problems, the present disclosure provides a soft switching circuit conduction loss optimization method and application.

[0004] In order to achieve the above-mentioned purpose, the technical scheme of the present disclosure is as follows:

[0005] According to an embodiment of one aspect of the present disclosure, a soft switching circuit conduction loss optimization method is provided, the soft switching circuit comprising an energy storage capacitor and an inductor, and being used for charging the equivalent parasitic capacitor of the switching node of the power stage circuit to realize zero voltage switching of the power stage circuit, the soft switching circuit conduction loss optimization method comprising operations S1-S4: operation S1: determining the time sequence waveform of the inductor current of the soft switching circuit in different stages in one switching cycle; operation S2: obtaining the soft switching conduction loss theoretical value in one switching cycle according to the time sequence waveform of the inductor current; operation S3: determining the relationship between the soft switching conduction loss and the energy storage capacitor voltage according to the time sequence waveform of the inductor current and the conduction loss theoretical value, and determining the regulation target of the energy storage capacitor voltage; and operation S4: adjusting the energy storage capacitor charging time according to the regulation target to stabilize the energy storage capacitor voltage at the regulation target, thereby realizing real-time optimization of the soft switching circuit conduction loss.

[0006] According to the embodiment of the present disclosure, operation S1 comprises: operation S11: dividing one switching cycle into four periods of pre-magnetic charging period, dead zone period, charging period and demagnetizing period; and operation S12: determining the waveform of the inductor current in the four periods respectively, thereby obtaining the time sequence waveform of the inductor current in one switching cycle.

[0007] According to the embodiment of the present disclosure, the pre-magnetic charging period represents the time period of the current rising in the inductor; the dead zone period represents the time period of charging the equivalent parasitic capacitor of the switching node of the power stage circuit; the charging period represents the time period of charging the energy storage capacitor; and the demagnetizing period represents the time period of the current falling in the inductor.

[0008] According to the embodiment of the present disclosure, the timing waveform expression of the soft switching circuit inductor current in different stages in one switching cycle is:

[0009]

[0010] wherein, V IN represents the input voltage, V CZVS represents the energy storage capacitor voltage, L ZVS represents the inductor, w ZVS represents the resonant frequency of the inductor and the equivalent parasitic capacitance of the switching node, t represents time, t1-t2 represents the pre-magnetization period, t2-t3 represents the dead time period, t3-t4 represents the supplement time period, t4-t5 represents the demagnetization period, I0 represents the load current, I L1 represents the initial current of the dead time period, I L2 represents the initial current of the supplement time period, I L3 represents the initial current of the demagnetization period.

[0011] According to the embodiment of the present disclosure, in operation S2, the soft switching conduction loss theoretical value is obtained by integrating the square of the soft switching current in one switching cycle.

[0012] According to the embodiment of the present disclosure, in operation S3, the soft switching conduction loss is proportional to |V IN -2V CZVS |, the input voltage V IN is constant, so the control target of the energy storage capacitor voltage V CZVS is 0.5 times the input voltage.

[0013] According to the embodiment of the present disclosure, operation S4 includes: operation S41, detecting whether the voltage value of the energy storage capacitor deviates from the control target in real time; and operation S42, adjusting the energy stored in the energy storage capacitor by increasing or decreasing the supplement time, so that the energy storage capacitor voltage is stabilized at the control target.

[0014] According to the embodiment of the present disclosure, the soft switching circuit further comprises an auxiliary switch network and a control circuit, the control circuit is used to control the on-off of the auxiliary switch network, so as to realize the low conduction loss work of the soft switching circuit.

[0015] According to the embodiment of the present disclosure, the power stage circuit described above is a boost type, a buck type or a boost / buck type.

[0016] According to the embodiment of another aspect of the present disclosure, the application of the soft switching circuit conduction loss optimization method described above in the converter is provided, and the converter is selected from the buck converter, the boost converter, the boost / buck converter, and the combination thereof. BRIEF DESCRIPTION OF DRAWINGS

[0017] The above and other objects, features and advantages of the present disclosure will become more apparent through the following description of the embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0018] Figure 1 It is a traditional step-down DC-DC converter;

[0019] Figure 2 is a schematic diagram of a soft-switching DC-DC converter in the prior art;

[0020] Figure 3 It is a schematic diagram of the working principle of the soft switch control circuit in the prior art;

[0021] Figure 4 A schematic diagram of a soft switching circuit and a power stage circuit according to an embodiment of the present disclosure;

[0022] Figure 5 This is a flow chart of a method for optimizing conduction loss of a soft switching circuit according to an embodiment of the present disclosure;

[0023] Figure 6 Schematic diagram of the timing waveforms of the inductor current and the voltage of the switch tube in the power stage circuit according to an embodiment of the present disclosure;

[0024] Figure 7a Schematic diagram of soft switching operating waveforms under different energy storage capacitor voltages according to an embodiment of the present disclosure;

[0025] Figure 7b Schematic diagram of conduction loss of a soft switching circuit under different energy storage capacitor voltages according to an embodiment of the present disclosure;

[0026] Figure 8 A schematic diagram of the principle of adjusting the charging time of the energy storage capacitor according to an embodiment of the present disclosure;

[0027] Figure 9 In the embodiment of the present disclosure, when the load current jumps from light load to heavy load, the charging time is adjusted to adjust the energy storage capacitor voltage V CZVS Modulated at 0.5V IN Schematic diagram of; DETAILED DESCRIPTION

[0028] The present disclosure provides a method and application for optimizing conduction loss of a soft switching circuit, which optimizes the additional conduction loss caused by the soft switching circuit by modulating the voltage value of the energy storage capacitor, thereby improving conversion efficiency.

[0029] When the high-voltage DC-DC converter works in hard switching mode, the switching loss caused by the large parasitic capacitance of the high-voltage power tube seriously limits the conversion efficiency. For traditional step-down DC-DC converters, such as Figure 1 As shown, the equivalent parasitic capacitance of the switch node SW is C SW, the switch loss generated by the large input capacitance charging the parasitic capacitance is:

[0030] ;

[0031] The switch loss is proportional to the square of the switching node parasitic capacitance C SW , the switching frequency f s , and the input voltage V IN . Under high-voltage and high-frequency conditions, the switch loss cannot be ignored. In addition, during the switching process of the power tube, there is also V-I overlap loss generated by the source-drain voltage and the drain current, which is proportional to the current and input voltage. The overlap loss in the high-voltage environment also cannot be ignored, limiting the conversion efficiency.

[0032] In high-voltage and high-frequency application environments, soft switching technology is usually used to eliminate the switching loss of the power tube to improve the conversion efficiency. By using lossless inductive energy storage elements, an efficient charging and discharging path is constructed by introducing inductive current, and the switching node parasitic capacitance C SW is charged and discharged in the dead time, making the source-drain voltage zero, achieving zero-voltage switching, and thus eliminating the switching loss of the power tube. Soft switching circuit will introduce additional conduction loss. How to achieve optimal loss control is of great significance to improve the efficiency of soft switching DC-DC converters. Reference paper: [J. Yuan, Q. Min, Z. Liu, X. Han and L. Cheng, "A 12V-to-42V Input Zero-Voltage Switching Buck Converter Achieving Up to 4.5% Efficiency Improvement," 2024 IEEE European Solid-State Electronics Research Conference (ESSERC), Bruges, Belgium, 2024, pp. 69-72, doi: 10.1109 / ESSERC62670.2024.10719417.].

[0033] The existing soft switching DC-DC converter as shown in Figure 2 , which includes a power stage circuit 101 and a soft switching circuit 102. The soft switching circuit 102 is composed of an auxiliary switching network 1021, a soft switching control circuit 1022, an auxiliary inductor L ZVS , and an energy storage capacitor C ZVS . Its working principle is as shown in Figure 3 : by detecting the switching state of the switching node SW, the charging and energy supplementing time of the soft switching circuit is adjusted to adjust the energy storage capacitor C ZVSThe stored energy can realize the ideal soft switching process under different conditions. If it is detected that the switch node SW is in a partial soft switching state, that is, the switch node voltage V SW Always less than the input voltage V IN , indicating that the amount of charge stored in the soft switching circuit topology is too small. In the next cycle, the soft switching circuit charging time will be extended to increase the energy stored in the soft switching topology. If the switch node is detected to be in an excessive soft switching state, that is, the switch node voltage V SW Higher than the input voltage V IN , indicating that the soft switching circuit topology stores too much charge. The next cycle will shorten the soft switching charging time and reduce the energy stored in the soft switching topology.

[0034] The above method adjusts the charging time of the soft switching circuit by detecting the switching state of the switch node SW to adjust the energy storage capacitor C of the soft switching circuit. ZVS The stored energy is used to realize the soft switching process under different conditions. Although this work ensures the precise control of charge, that is, soft switching is realized without excess charge, it does not analyze the conduction loss of the soft switching circuit and does not optimize the conduction loss of the soft switching circuit. The conversion efficiency needs to be further improved.

[0035] Therefore, the present invention provides a method and application for optimizing the conduction loss of a soft switching circuit, which is used to reduce the additional conduction loss caused by the soft switching circuit, thereby improving the conversion efficiency of a converter based on the soft switching circuit (such as a soft switching DC-DC converter). The inventors analyzed the conduction loss of the soft switching circuit and found that the conduction loss of the soft switching circuit is related to |V IN -2V CZVS | is positively correlated, so by modulating the energy storage capacitor C ZVS The voltage drop is reduced, and the additional conduction loss caused by the soft switching circuit is optimized, thereby improving the conversion efficiency.

[0036] In order to make the objectives, technical solutions and advantages of the present disclosure more clearly understood, the present disclosure is further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0037] In the embodiment of the present disclosure, Figure 5 and Figure 4 As shown, a method for optimizing the conduction loss of a soft switching circuit is provided. The soft switching circuit is used to reduce the equivalent parasitic capacitance C of the switch node SW of the power stage circuit. SWThe soft switching circuit is charged to realize zero-voltage switching of the power stage circuit 201, and the soft switching circuit conduction loss optimization method comprises operations S1-S4: operation S1: determining the time sequence waveform of the inductor current in different stages in one switching cycle; operation S2: obtaining a soft switching conduction loss theoretical value in one switching cycle according to the time sequence waveform of the inductor current; operation S3: determining the relationship between the soft switching conduction loss and the energy storage capacitor voltage according to the time sequence waveform of the inductor current and the conduction loss theoretical value, and determining the energy storage capacitor voltage regulation target; and operation S4: adjusting the energy storage capacitor charging time according to the regulation target to stabilize the energy storage capacitor voltage at the regulation target, thereby realizing real-time optimization of the soft switching circuit conduction loss.

[0038] According to the embodiments of the present disclosure, operation S1 comprises: dividing one switching cycle into four periods of pre-magnetization period, dead time period, charging period, and demagnetization period; and determining the waveform of the inductor current in the four periods respectively to obtain the time sequence waveform of the inductor current in one switching cycle. Figure 6 As shown in the figure, t1-t2 represents the pre-magnetization period, which represents the period of current rise in the inductor; t2-t3 represents the dead time period, which represents the period of charging the equivalent parasitic capacitor of the switching node of the power stage circuit; t3-t4 represents the charging period, which represents the period of charging the energy storage capacitor; and t4-t5 represents the demagnetization period, which represents the period of current drop in the inductor.

[0039] According to the embodiments of the present disclosure, as shown in the figure, Figure 4 The soft switching circuit comprises an energy storage capacitor C ZVS , an inductor L ZVS , an auxiliary switch network 2021, and a conduction loss optimization control circuit 2022, wherein the conduction loss optimization control circuit is used to control the on-off of the auxiliary switch network to realize low conduction loss operation of the soft switching circuit.

[0040] The power stage circuit 201 is used to convert high-voltage direct current into stable low-voltage direct current with ripple to realize voltage conversion function. Here, a step-down DC-DC converter is taken as an example, and the soft switching DC-DC converter loss optimal control method proposed by the present application can also be applied to step-up DC-DC converters and step-up / down DC-DC converters without limitation. The power stage of the step-down DC-DC converter comprises power stage switches Q1, Q2, a filter inductor L, and an output capacitor C. The power switches Q1, Q2 are alternately turned on in each switching cycle to control power output, and the output voltage with ripple is obtained after filtering. The soft switching circuit 202 comprises an auxiliary switch network 2021, a conduction loss optimization control circuit 2022, an inductor L ZVS , and an energy storage capacitor C ZVS . The auxiliary switch network 2021 is connected between the inductor L ZVS and the switching node SW, and is used to charge the energy storage capacitor CZVS The switch node SW is provided with a charge and an input voltage V IN The energy storage capacitor C ZVS The charge path supplements the charge. The inductor L ZVS is connected to the energy storage capacitor C ZVS and the auxiliary switch network 2021. The conduction loss optimization control circuit 2022 is used to control the auxiliary switch network to achieve the lowest loss soft switching: using the inductor current I LZVS , the parasitic capacitance C SW of the switch node is charged to achieve soft switching of the power tube Q1; and the voltage drop of the energy storage capacitor C ZVS is modulated to optimize the additional conduction loss brought by the soft switching circuit, thereby improving the conversion efficiency of the soft switching DC-DC converter.

[0041] By analyzing the conduction loss of the soft switching circuit, the relationship between the conduction loss and the voltage drop of the energy storage capacitor C ZVS is studied, and the voltage drop of the energy storage capacitor C ZVS is modulated at the optimal value to optimize the additional conduction loss brought by the soft switching circuit. The relevant voltage and current time sequence waveforms are shown in Figure 6 , and the inductor current I waveform expression is:

[0042]

[0043] The resonant frequency w ZVS of the inductor and the equivalent parasitic capacitance of the switch node is:

[0044] ;

[0045] wherein V IN represents the input voltage, V CZVS represents the energy storage capacitor voltage, I LZVS represents the inductor current, L ZVS represents the inductor, C SW is the equivalent parasitic capacitance value of the switch node, w ZVS represents the resonant frequency of the inductor and the equivalent parasitic capacitance of the switch node, t represents time, t1~t2 represents the pre-magnetic period, t2~t3 represents the dead time period, t3~t4 represents the charge period, t4~t5 represents the demagnetization period, I0 represents the load current, I L1 represents the initial current in the dead time period, I L2 represents the initial current in the charge period, I L3 represents the initial current in the demagnetization period.

[0046] According to the embodiment of the present disclosure, in operation S2, the soft switching conduction loss theoretical value can be obtained by integrating the square of the soft switching current in one switching cycle. In operation S3, the soft switching conduction loss is proportional to |V IN -2V CZVS , the input voltage V IN is constant, and therefore the regulation target of the energy storage capacitor voltage V CZVS is 0.5 times the input voltage, at which time the switching circuit conduction loss is the lowest, combined with the fact that the energy storage capacitor voltage V Figure 7a and Figure 7b , V IN is the input voltage, I O is the load current, V OUT is the output voltage, Figure 7a , the horizontal coordinate is time t, and the vertical coordinates are the switching node voltage V SW and the inductor current I LZVS , respectively. The soft switching working waveform simulation results under three different conditions of V CZVS =V IN , V CZVS =0.5V IN , and V CZVS =V OUT indicate that the inductor current peak value is high under high energy storage capacitor voltage, and the conduction time is long under low energy storage capacitor voltage, both of which cannot bring optimized conduction loss, and the conduction loss should be optimal when the energy storage capacitor voltage is at the intermediate value. In Figure 7b , the horizontal coordinate is the energy storage capacitor voltage V CZVS , and the vertical coordinate is the conduction loss. The data conditions are that the input voltage V IN is 42V, the output voltage V OUT is 5V, and the load current I O is 1A. The theoretical data shows that the conduction loss is optimal when V CZVS =0.5V IN , and the simulation data is consistent with the theoretical data.

[0047] As shown in Figure 8 and Figure 9 , Figure 4 , the input voltage V IN and the energy storage capacitor voltage V CZVS are divided by a voltage divider, and then a voltage V EA is obtained by inputting a type-I compensation error amplifier (EA), and compared with a ramp signal V RAMP to determine the compensation time t charge . As shown in Figure 9 , taking the case that the load current jumps from light load to heavy load, since the energy storage capacitor discharges more charge than the compensation charge, the energy storage capacitor voltage V CZVSThe voltage of the energy storage capacitor C ZVS is finally modulated to 0.5V IN , and returns to the full soft switching state.

[0048] According to the embodiment of the present disclosure, operation S4 comprises: detecting whether the voltage value of the energy storage capacitor deviates from the regulation target (V CVZS =0.5V IN ) in real time; adjusting the energy stored in the energy storage capacitor by increasing or decreasing the power compensation time, so that the voltage of the energy storage capacitor is stabilized at the regulation target, reaching a steady state, and if deviation occurs, repeating the above steps to restore the steady state.

[0049] According to the embodiment of the present disclosure, the power stage circuit can be a boost type, a buck type, or a boost / buck type.

[0050] Another aspect of the present disclosure provides an application of the soft switching circuit conduction loss optimization method as described above in a converter selected from a buck converter, a boost converter, a boost / buck converter, and combinations thereof.

[0051] So far, the embodiments of the present disclosure have been described in detail in conjunction with the drawings. It should be noted that the implementation methods not shown or described in the drawings or the text are known to those skilled in the art, and are not described in detail. In addition, the definitions of the elements and methods described above are not limited to the various specific structures, shapes or ways mentioned in the embodiments, and those skilled in the art can make simple changes or replacements.

[0052] According to the above description, those skilled in the art should have a clear understanding of the soft switching circuit conduction loss optimization method and application of the present disclosure.

[0053] In summary, the present disclosure provides a soft switching circuit conduction loss optimization method and application, which modulates the voltage drop of the energy storage capacitor C ZVS to 0.5V IN , optimizes the additional conduction loss caused by the soft switching circuit, and thus improves the conversion efficiency. Compared with the existing optimal control method, the present disclosure not only controls the charge quantity to achieve precise soft switching state, but also modulates the voltage drop of the energy storage capacitor C ZVS to achieve optimal control of conduction loss, reducing the limitation of soft switching circuit conduction loss on efficiency improvement.

[0054] In this document, the terms "comprises", "comprising", "includes", "including", "has", "having" or "contains", "containing" or "including" means "including but not limited to".

[0055] In addition, unless the steps are specifically described or must occur in sequence, the order of the steps of the above-described embodiments is not limited to the order described above and can be changed or rearranged as desired or necessary. Also, the above-described embodiments can be used in combination with each other or with other embodiments based on design and reliability considerations, i.e., technical features in different embodiments can be freely combined to form more embodiments.

[0056] The above-described specific embodiments have further detailed the purposes, technical solutions, and beneficial effects of the present disclosure. It should be understood that the above-described embodiments are merely specific embodiments of the present disclosure and are not intended to limit the present disclosure. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. A method for optimizing conduction loss in a soft-switching circuit, wherein the soft-switching circuit includes an energy storage capacitor and an inductor and is used to charge the equivalent parasitic capacitance of a switch node of a power stage circuit to achieve zero-voltage switching of the power stage circuit. The method for optimizing conduction loss in a soft-switching circuit includes: Operation S1: determining the timing waveform of the inductor current of the soft switching circuit at different stages within a switching cycle; Operation S2: obtaining a theoretical value of soft switching conduction loss within a switching cycle according to the timing waveform of the inductor current; Operation S3: determining a relationship between soft switch conduction loss and energy storage capacitor voltage according to the timing waveform of the inductor current and a theoretical value of conduction loss, and determining a voltage control target of the energy storage capacitor; and Operation S4: adjusting the energy storage capacitor charging time according to the control target to stabilize the energy storage capacitor voltage at the control target, thereby optimizing the conduction loss of the soft switching circuit in real time; In operation S3, the soft switching conduction loss is proportional to |V IN -2V CZVS | Proportional to the input voltage V IN unchanged, so the energy storage capacitor voltage V CZVS The regulation target is 0.5 times the input voltage.

2. The method for optimizing conduction loss of a soft switching circuit according to claim 1, wherein operation S1 comprises: A switching cycle is divided into four periods: pre-magnetization period, dead period, power replenishment period, and demagnetization period; as well as The waveforms of the inductor current in four time periods are determined respectively to obtain the timing waveform of the inductor current in one switching cycle.

3. The method for optimizing conduction loss of a soft switching circuit according to claim 2, wherein: The pre-magnetization period represents the time period during which the current in the inductor rises; The dead time period represents a time period for charging the equivalent parasitic capacitance of the power stage circuit switch node; The charging period represents the time period for charging the energy storage capacitor; The demagnetization period refers to a time period during which the current in the inductor decreases.

4. According to the method for optimizing conduction loss of a soft switching circuit as claimed in claim 3, the timing waveforms of the inductor current of the soft switching circuit at different stages within a switching cycle are expressed as follows: in, V IN Indicates the input voltage, V CZVS Represents the voltage of the energy storage capacitor, L ZVS Indicates inductance, w ZVS represents the resonant frequency of the equivalent parasitic capacitance of the inductor and the switch node, t represents time, t1~t2 represents the pre-magnetization period, t2~t3 represents the dead time period, t3~t4 represents the charging period, t4~t5 represents the demagnetization period, I0 represents the load current, I L1 Indicates the initial current during the dead time period, I L2 Indicates the initial current during the charging period, I L3 Indicates the initial current during the demagnetization period.

5. The method for optimizing conduction loss of a soft switching circuit according to claim 1, wherein in operation S2, a theoretical value of conduction loss of the soft switching circuit is obtained by integrating the square of the inductor current of the soft switching circuit within one switching cycle.

6. The method for optimizing conduction loss of a soft switching circuit according to claim 1, wherein operation S4 comprises: Real-time detection of whether the voltage value of the energy storage capacitor deviates from the control target; as well as By increasing or decreasing the charging time, the energy stored in the energy storage capacitor is adjusted so that the voltage of the energy storage capacitor is stabilized at the control target.

7. The method for optimizing conduction loss of a soft switching circuit according to claim 1, wherein the soft switching circuit further comprises an auxiliary switch network and a control circuit, wherein the control circuit is used to control the on and off of the auxiliary switch network to achieve low conduction loss operation of the soft switching circuit. 8 . The method for optimizing conduction loss of a soft switching circuit according to claim 1 , wherein the power stage circuit is a boost type, a buck type, or a boost / buck type.

9. Application of the soft switching circuit conduction loss optimization method according to any one of claims 1 to 8 in a converter, wherein the converter is selected from a buck converter, a boost converter, a buck-boost converter, and combinations thereof.

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