Semiconductor device including capacitor structure

Abstract

An example semiconductor device includes a capacitor structure on a substrate. The capacitor structure includes a first electrode structure, a second electrode structure, and a capacitor dielectric layer. The first electrode structure includes first horizontal electrode portions separated from each other in a first direction perpendicular to the substrate and first conductive pillars connected to each of the first horizontal electrode portions and extending in the first direction. The second electrode structure includes a second conductive pillar extending through the first horizontal electrode portions in the first direction and second horizontal electrode portions spaced apart from each other in the first direction on sidewalls of the second conductive pillar and alternately arranged with the first horizontal electrode portions. A capacitor dielectric layer is between a sidewall of the second conductive pillar and the first horizontal electrode portion.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device including a capacitor structure. Background Art

[0002] With the development of electronic devices, semiconductor devices such as integrated circuit devices or image sensors have been highly integrated and gradually miniaturized. With the high integration and miniaturization of semiconductor devices, the integration and miniaturization of passive devices such as capacitors are also expected. For example, for image sensors with high resolution, capacitors with high capacitance and relatively reduced area are expected (there are other uses). Summary of the invention

[0003] The present disclosure relates to semiconductor devices, including semiconductor devices having capacitor structures with improved capacitance.

[0004] In general, according to some aspects, a semiconductor device includes a capacitor structure, which is arranged on a substrate and includes: a first electrode structure, the first electrode structure including a plurality of first horizontal electrode portions separated from each other in a first direction perpendicular to an upper surface of the substrate and a first conductive column connected to each of the plurality of first horizontal electrode portions and extending in the first direction; a second electrode structure, the second electrode structure including a second conductive column penetrating the plurality of first horizontal electrode portions and extending in the first direction and a plurality of second horizontal electrode portions separated from each other along the first direction on side walls of the second conductive column and alternately arranged with the plurality of first horizontal electrode portions; and a capacitor dielectric layer, the capacitor dielectric layer being arranged between the side walls of the second conductive column and the plurality of first horizontal electrode portions and on the upper surface, side surface and bottom surface of each of the plurality of second horizontal electrode portions.

[0005] In general, according to some aspects, a semiconductor device includes a capacitor structure, which is arranged on a substrate and includes: a first electrode structure, the first electrode structure includes a plurality of first horizontal electrode portions, a plurality of molded insulating layers and a first conductive pillar, the plurality of first horizontal electrode portions are separated from each other in a first direction perpendicular to an upper surface of the substrate, the plurality of molded insulating layers are alternately arranged with the plurality of first horizontal electrode portions and respectively include a plurality of openings overlapping each other in the first direction, and the first conductive pillar is connected to each of the plurality of first horizontal electrode portions and extends in the first direction; a second electrode structure, the second electrode structure includes a second conductive pillar and a plurality of second horizontal electrode portions, the second conductive pillar penetrates the plurality of first horizontal electrode portions and extends in the first direction, the plurality of second horizontal electrode portions are separated from each other along the first direction on sidewalls of the second conductive pillar and are respectively arranged in the plurality of openings; and a capacitor dielectric layer, the capacitor dielectric layer is arranged between the first electrode structure and the second electrode structure, and includes portions on an upper surface, a side surface and a bottom surface of each of the plurality of second horizontal electrode portions arranged in the plurality of openings.

[0006] In general, according to some aspects, a semiconductor device includes: a semiconductor substrate on which a plurality of pixel regions are defined, each pixel region including a photovoltaic region; and a capacitor structure, which is arranged on the semiconductor substrate and includes: a first electrode structure, which includes a plurality of first horizontal electrode portions and a first conductive column, the plurality of first horizontal electrode portions are separated from each other in a first direction perpendicular to an upper surface of the substrate, and the first conductive column is connected to each of the plurality of first horizontal electrode portions and extends in the first direction; a second electrode structure, which includes a second conductive column and a plurality of second horizontal electrode portions, the second conductive column penetrates the plurality of first horizontal electrode portions and extends in the first direction, and the plurality of second horizontal electrode portions are separated from each other along the first direction on the sidewalls of the second conductive column and are alternately arranged with the plurality of first horizontal electrode portions; and a capacitor dielectric layer, which is arranged between the sidewalls of the second conductive column and the plurality of first horizontal electrode portions, and is arranged on the upper surface, the side surface and the bottom surface of each of the plurality of second horizontal electrode portions. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The implementation will be more clearly understood from the following detailed description in conjunction with the accompanying drawings.

[0008] Figure 1is a perspective view of an example of a semiconductor device.

[0009] Figure 2 yes Figure 1 An example cross-sectional view of a semiconductor device.

[0010] Figure 3 yes Figure 2 An example magnified view of area CX1.

[0011] Figures 4 to 7 are top views of various planar layouts of examples of the first electrode structure and examples of the second electrode structure.

[0012] Figure 8 is a cross-sectional view of an example of a semiconductor device.

[0013] Fig. 9 yes Figure 8 An example magnified view of area CX1.

[0014] Fig.10 is a cross-sectional view of an example of a semiconductor device.

[0015] Fig.11 yes Fig.10 An example magnified view of area CX1.

[0016] Fig.12 is a cross-sectional view of another example of a semiconductor device.

[0017] Fig.13 is a cross-sectional view of another example of a semiconductor device.

[0018] Fig.14 is a cross-sectional view of another example of a semiconductor device.

[0019] Fig.15 is a cross-sectional view of another example of a semiconductor device.

[0020] Fig.16 is a cross-sectional view of another example of a semiconductor device.

[0021] Fig.17A , Fig. 17B , Fig.18A , Fig.18B , Fig.19A , Fig.19B , Fig. 20A , Fig. 20B , Fig.21 , Fig.22A , Fig. 22B , Fig.23A , Fig. 23B and Fig.24 is a schematic diagram illustrating an example of a method of manufacturing a semiconductor device.

[0022] Figure 25 to Figure 28 is a schematic diagram illustrating another example of a method of manufacturing a semiconductor device. DETAILED DESCRIPTION

[0023] Hereinafter, the implementation will be described in detail with reference to the accompanying drawings.

[0024] Figure 1 is a perspective view of an example of a semiconductor device 100 . Figure 2 yes Figure 1 FIG. 1 is an exemplary cross-sectional view of a semiconductor device 100 . Figure 3 yes Figure 2 An example magnified view of area CX1.

[0025] Reference Figures 1 to 3 , the semiconductor device 100 may include a substrate 110 and a capacitor structure CS disposed on the substrate 110. The capacitor structure CS may include a first electrode structure 130 having a three-dimensional structure, a second electrode structure 140 having a three-dimensional structure, and a capacitor dielectric layer 150 disposed between the first electrode structure 130 and the second electrode structure 140.

[0026] The lower structure 120 may be disposed on a substrate 110. The substrate 110 may include, for example, a semiconductor material such as silicon, germanium, SiC, GaAs, InAs, and InP. Various independent devices may be disposed on the substrate 110. The independent devices may include various microelectronic devices, for example, a metal oxide semiconductor field effect transistor (MOSFET) such as a complementary metal insulator semiconductor (CMOS) transistor, a system large scale integration (LSI), an image sensor, an active device, a passive device, etc.

[0027] The lower structure 120 may be arranged on the substrate 110 in a manner covering the independent device. The lower structure 120 may also include a conductive plug or an interconnect layer electrically connected to the independent device and / or the substrate 110. In some implementations, the lower structure 120 may include an insulating layer arranged at multiple vertical heights to cover the independent device and surround the conductive plug or the interconnect layer.

[0028] The first lower conductive line LM1 may be arranged to be covered by the lower structure 120, and, for example, may extend in the first horizontal direction HD1. The first lower conductive line LM1 may be a connection line for providing power supply and / or signals to the first electrode structure 130 of the capacitor structure CS. In some implementations, the first lower conductive line LM1 may include at least one of TiN, TaN, WN, MoN, NbN, CoN, Ti, Ta, W, Ru, Mo, Nb, Co, and silicides thereof.

[0029] The first electrode structure 130 may be disposed on the lower structure 120. The first electrode structure 130 may include a plurality of first horizontal electrode portions 132, a plurality of first mold insulating layers 134, and first conductive pillars 136. The plurality of first horizontal electrode portions 132 and the plurality of first mold insulating layers 134 may be alternately arranged in the vertical direction VD1, and the first conductive pillars 136 may penetrate the plurality of first horizontal electrode portions 132 and the plurality of first mold insulating layers 134 and may extend in the vertical direction VD1.

[0030] In some implementations, the plurality of first horizontal electrode portions 132 may include a semiconductor material such as polysilicon, germanium, or silicon germanium. For example, the plurality of first horizontal electrode portions 132 may include doped or undoped polysilicon. The plurality of first mold insulating layers 134 may include an insulating material. For example, the plurality of first mold insulating layers 134 may include at least one of silicon nitride, silicon oxynitride, silicon oxide, and silicon oxycarbide.

[0031] In some implementations, the plurality of first horizontal electrode portions 132 and the plurality of first mold insulating layers 134 may include materials having an etch selectivity relative to each other. In some implementations, the plurality of first horizontal electrode portions 132 may include polysilicon, and the plurality of first mold insulating layers 134 may include silicon nitride.

[0032] The first conductive pillar 136 may be arranged in a first vertical hole 136H penetrating the plurality of first horizontal electrode portions 132 and the plurality of first mold insulating layers 134, and a bottom of the first conductive pillar 136 may be connected to the first lower conductive line LM1. A sidewall portion of the first conductive pillar 136 may be surrounded by the plurality of first horizontal electrode portions 132, and the plurality of first horizontal electrode portions 132 may be electrically connected to the first lower conductive line LM1 through the first conductive pillar 136. In some implementations, the first conductive pillar 136 may include at least one of TiN, TaN, WN, MoN, NbN, CoN, Ti, Ta, W, Ru, Mo, Nb, Co, and silicides thereof.

[0033] The plurality of first molded insulating layers 134 may include a plurality of openings OP, respectively, and the plurality of openings OP may be arranged to overlap each other vertically. For example, a second vertical hole 144H may be formed that penetrates the plurality of first horizontal electrode portions 132 and the plurality of first molded insulating layers 134 alternately stacked in the vertical direction VD1, and a portion of the plurality of first molded insulating layers 134 (the portion exposed by the second vertical hole 144H) may be removed in the lateral direction by a pull-back process, and thus, a plurality of openings OP may be formed. In the pull-back process, the plurality of first horizontal electrode portions 132 may not be removed or damaged but may be left, and in some implementations, the plurality of openings OP may be formed to have a shape that forms a concentric circle with the second vertical hole 144H.

[0034] The second electrode structure 140 may include a plurality of second horizontal electrode portions 142 and a second conductive pillar 144. The plurality of second horizontal electrode portions 142 may be arranged in a plurality of openings OP. Accordingly, the plurality of second horizontal electrode portions 142 may be surrounded by a plurality of first molded insulating layers 134 in the plurality of openings OP. For example, each of the plurality of second horizontal electrode portions 142 may be arranged in an opening OP of the first molded insulating layer 134 corresponding to the second horizontal electrode portion, and each of the plurality of second horizontal electrode portions 142 may be arranged at the same vertical height as the first molded insulating layer 134 corresponding to the second horizontal electrode portion. For example, as Figure 2 As shown in FIG. 1 , the number of the first mold insulating layers 134 stacked in the vertical direction VD1 may be the same as the number of the second horizontal electrode parts 142 stacked in the vertical direction VD1 .

[0035] The second conductive pillar 144 may penetrate the plurality of first horizontal electrode portions 132 and may be arranged in the second vertical hole 144H extending in the vertical direction VD1. The second conductive pillar 144 may extend in the vertical direction VD1, and the plurality of second horizontal electrode portions 142 may be arranged on the sidewall of the second conductive pillar 144 in a manner of being separated from each other in the vertical direction VD1. The bottom surface of the second conductive pillar 144 may be located at a height lower than the bottom surface of the lowermost second horizontal electrode portion 142, and the bottom of the second conductive pillar 144 may be surrounded by the lower structure 120.

[0036] In some implementations, the plurality of second horizontal electrode portions 142 and the second conductive pillars 144 may include at least one of TiN, TaN, WN, MoN, NbN, CoN, Ti, Ta, W, Ru, Mo, Nb, Co, and silicides thereof.

[0037] In some implementations, the second conductive pillar 144 may be formed integrally with the plurality of second horizontal electrode portions 142. For example, the second conductive pillar 144 and the plurality of second horizontal electrode portions 142 may be formed by the same formation process. For example, by filling the second vertical hole 144H and the plurality of openings OP with a conductive material, the second conductive pillar 144 and the plurality of second horizontal electrode portions 142 may be formed by the same operation of the process. For example, a portion of a material layer formed of a conductive material (the portion filling the plurality of openings OP and extending in the horizontal direction) may be referred to as a plurality of second horizontal electrode portions 142, and a portion of a material layer formed of a conductive material (the portion filling the second vertical hole 144H and extending in the vertical direction VD1) may be referred to as a second conductive pillar 144. For example, the second conductive pillar 144 may form a continuous material layer with the plurality of second horizontal electrode portions 142.

[0038] The capacitor dielectric layer 150 may be disposed between the first electrode structure 130 and the second electrode structure 140. The capacitor dielectric layer 150 may include a first portion P1, a second portion P2, and a third portion P3.

[0039] The capacitor dielectric layer 150 may include at least one selected from a high-k dielectric material and a ferroelectric material having a higher dielectric constant than silicon oxide. In some implementations, the capacitor dielectric layer 150 may include at least one material selected from HfO, HfSiO, HfON, HfSiON, LaO, LaAlO, ZrO, ZrSiO, ZrON, ZrSiON, TaO, TiO, BaSrTiO, BaTiO, PbZrTiO, SrTaBiO, BiFeO, SrTiO, YO, AlO, or PbScTaO.

[0040] The first portion P1 of the capacitor dielectric layer 150 may be disposed on the sidewall of the second vertical hole 144H, and, for example, may be disposed between the sidewall of the second conductive pillar 144 and the sidewalls of the plurality of first horizontal electrode portions 132. For example, the first portion P1 of the capacitor dielectric layer 150 may extend on the sidewall of the second conductive pillar 144 in the vertical direction VD1.

[0041] The second portion P2 of the capacitor dielectric layer 150 may be arranged in the plurality of openings OP, and, for example, may be arranged on the upper surface and the bottom surface of each of the plurality of second horizontal electrode portions 142. For example, the second portion P2 of the capacitor dielectric layer 150 may be arranged between the upper surface of one second horizontal electrode portion 142 and the bottom surface of one first horizontal electrode portion 132 arranged just above the second horizontal electrode portion 142, and may be arranged between the bottom surface of the second horizontal electrode portion 142 and the upper surface of another first horizontal electrode portion 132 arranged just below the second horizontal electrode portion 142. The second portion P2 of the capacitor dielectric layer 150 may extend in a horizontal direction on the upper surface and the bottom surface of each of the plurality of second horizontal electrode portions 142.

[0042] The third portion P3 of the capacitor dielectric layer 150 may be disposed in the plurality of openings OP and may be disposed between the plurality of first mold insulating layers 134 and the plurality of second horizontal electrode portions 142. For example, the third portion P3 of the capacitor dielectric layer 150 may contact the side surface 142S of each of the plurality of second horizontal electrode portions 142 and may extend in the vertical direction VD1.

[0043] In some implementations, since the first portion P1 of the capacitor dielectric layer 150 may be disposed between the sidewall of the first horizontal electrode portion 132 and the sidewall of the second conductive pillar 144, the first portion P1 of the capacitor dielectric layer 150 may be used as a first effective capacitor region exhibiting capacitance, and since the second portion P2 of the capacitor dielectric layer 150 may be disposed between the plurality of first horizontal electrode portions 132 and the plurality of second horizontal electrode portions 142 that are alternately arranged with each other, the second portion P2 of the capacitor dielectric layer 150 may be used as a second effective capacitor region exhibiting capacitance. In some implementations, the width of the second horizontal electrode portion 142 in the horizontal direction (e.g., the width in the second horizontal direction HD2) may be greater than the thickness of the second horizontal electrode portion 142 (e.g., the thickness in the vertical direction VD1) and / or the thickness of the first horizontal electrode portion 132 (e.g., the thickness in the vertical direction VD1), and the area of ​​the second effective capacitor region may be greater than the area of ​​the first effective capacitor region. In some implementations, according to the number of first horizontal electrode portions 132 and the number of second horizontal electrode portions 142 , the area of ​​the second effective capacitor region may increase, and the capacitor structure CS may have a relatively increased capacitance.

[0044] In some implementations, the plurality of openings OP respectively included in the plurality of first molded insulating layers 134 may be formed so that at least a portion of each of the plurality of openings OP may have a curved shape. For example, for an opening OP arranged in a space between one first molded insulating layer 134, one first horizontal electrode portion 132 arranged directly above the first molded insulating layer 134, and another first horizontal electrode portion 132 arranged directly below the first molded insulating layer 134, a first portion of a sidewall of the opening OP arranged adjacent to the first horizontal electrode portion 132 and a second portion of a sidewall of the opening OP arranged adjacent to the other first horizontal electrode portion 132 may have a curved profile, and the first molded insulating layer 134 may include a tail portion 134T corresponding to the curved profile of the opening OP. The first molded insulating layer 134 may include the tail portion 134T, and the capacitor dielectric layer 150 may be arranged to conformally cover the tail portion 134T, and therefore, the side surface 142S of each second horizontal electrode portion 142 may have a rounded shape.

[0045] In some implementations, Figure 3 , the plurality of openings OP respectively included in the plurality of first mold insulating layers 134 may be formed to have a substantially vertical profile, and the tail portion 134T may not be formed in the first mold insulating layer 134. In this case, the side surface 142S of the second horizontal electrode portion 142 may also have a substantially vertical profile according to the vertical profiles of the plurality of openings OP.

[0046] The upper insulating layer 160 may be disposed on the uppermost first horizontal electrode portion 132. The first upper conductive line UM1 and the second upper conductive line UM2 may be disposed in the opening extending into the upper insulating layer 160.

[0047] The first upper conductive line UM1 may be connected to the first conductive pillar 136 of the first electrode structure 130 and, for example, may extend in the first horizontal direction HD1 on the first conductive pillar 136. The first upper conductive line UM1 may be a connection line for providing power supply and / or signals to the first electrode structure 130 of the capacitor structure CS.

[0048] The second upper conductive line UM2 may be connected to the second conductive pillar 144 of the second electrode structure 140, and, for example, may extend along the first horizontal direction HD1 on the second conductive pillar 144. The second upper conductive line UM2 may be arranged to be separated from the first upper conductive line UM1. The second upper conductive line UM2 may be a connection line for providing power supply and / or signals to the second electrode structure 140 of the capacitor structure CS.

[0049] In some implementations, the first upper conductive line UM1 and the second upper conductive line UM2 may include at least one of TiN, TaN, WN, MoN, NbN, CoN, Ti, Ta, W, Ru, Mo, Nb, Co, and silicides thereof.

[0050] Figure 2 It is shown that the bottom surface of the first conductive pillar 136 can be connected to the first lower conductive line LM1, and the upper surface of the first conductive pillar 136 can be connected to the first upper conductive line UM1. However, in some implementations, the first conductive pillar 136 can be connected to the first upper conductive line UM1 and the first lower conductive line LM1 can be omitted, or the first conductive pillar 136 can be connected to the first lower conductive line LM1 and the first upper conductive line UM1 can be omitted.

[0051] Figures 4 to 7 are top views of various planar layouts of examples of the first electrode structure 130 and examples of the second electrode structure 140 . Figures 4 to 7 Corresponds to Figure 2 A horizontal cross-sectional view at a first vertical height LV1.

[0052] Reference Figure 4 , the first vertical hole 136H may have a groove shape extending in the first horizontal direction HD1, and the first conductive pillar 136 disposed in the first vertical hole 136H may extend in the first horizontal direction HD1. For example, the first conductive pillar 136 may have a bar-shaped horizontal cross-section extending in the first horizontal direction HD1.

[0053] The second conductive pillar 144 may have a circular planar shape (e.g., a circular horizontal cross section), and the second horizontal electrode portion 142 may have an annular planar shape (e.g., an annular horizontal cross section). For example, the side surface 142S of the second horizontal electrode portion 142 may form a concentric circle with the second conductive pillar 144. For example, the lateral distance ld from the side surface 142S of the second horizontal electrode portion 142 to the second conductive pillar 144 in the radial direction may be the same.

[0054] For example, Figure 2 As shown in FIG. 1 , a second vertical hole 144H penetrating a plurality of first horizontal electrode portions 132 and a plurality of first molded insulating layers 134 alternately stacked in a vertical direction VD1 may be formed, and a portion of the plurality of first molded insulating layers 134 (the portion exposed by the second vertical hole 144H) may be removed in a lateral direction by a pull-back process to form a plurality of openings OP. Through the pull-back process, the plurality of openings OP may be formed to have a shape that forms a concentric circle with the second vertical hole 144H, and the second horizontal electrode portion 142 filling the plurality of openings OP may also have a shape that forms a concentric circle with the second conductive pillar 144 disposed in the second vertical hole 144H.

[0055] Reference Figure 5 The first vertical hole 136H may have a circular horizontal cross section, and the first conductive pillar 136 disposed in the first vertical hole 136H may have a circular horizontal cross section. The second conductive pillar 144 may have a circular horizontal cross section, and the second horizontal electrode portions 142 may each have a ring-shaped horizontal cross section.

[0056] Figure 5 FIG. 1 shows that the first conductive pillar 136 can be arranged to be offset from the second conductive pillar 144 in the first horizontal direction HD1. Figure 5 Unlike the illustration, the second conductive pillar 144 may have the same position as the first conductive pillar 136 in the first horizontal direction HD1, and may be arranged to be separated from the first conductive pillar 136 in the second horizontal direction HD2.

[0057] Reference Figure 6 , the first vertical hole 136H may have a groove shape extending in the first horizontal direction HD1 , and the first conductive pillar 136 disposed in the first vertical hole 136H may extend in the first horizontal direction HD1 .

[0058] The second conductive pillar 144 may have a bar shape extending in the first horizontal direction HD1. The second horizontal electrode portion 142 may include a first sub-electrode portion 142L disposed on a first side surface 144S1 of the second conductive pillar 144 and a second sub-electrode portion 142R disposed on a second side surface 144S2 of the second conductive pillar 144. For example, the first sub-electrode portion 142L and the second sub-electrode portion 142R may be formed to have symmetrical shapes with respect to each other.

[0059] In some implementations, the width from the first side surface 144S1 of the second conductive pillar 144 to the side surface of the first sub-electrode portion 142L (e.g., the side surface of the first sub-electrode portion 142L facing the first molded insulating layer 134) in the second horizontal direction HD2 can be the same as the width from the second side surface 144S2 of the second conductive pillar 144 to the side surface of the second sub-electrode portion 142R (e.g., the side surface of the second sub-electrode portion 142R facing the first molded insulating layer 134) in the second horizontal direction HD2.

[0060] For example, Figure 2As shown in FIG. 1 , a second vertical hole 144H penetrating a plurality of first horizontal electrode portions 132 and a plurality of first molded insulating layers 134 alternately stacked in a vertical direction VD1 may be formed, and a portion of the plurality of first molded insulating layers 134 (the portion exposed by the second vertical hole 144H) may be removed in a lateral direction by a pull-back process to form a plurality of openings OP. The second vertical hole 144H may have a groove shape extending in the first horizontal direction HD1, and here, a portion of the plurality of first molded insulating layers 134 (the portion arranged on both sides of the second vertical hole 144H) may be removed by a pull-back process.

[0061] In some implementations, each of the plurality of openings OP may include a first sidewall and a second sidewall, the first sidewalls of the plurality of openings OP may be arranged to be parallel to the first sidewall of the second vertical hole 144H, and the second sidewalls of the plurality of openings OP may be arranged to be parallel to the second sidewall of the second vertical hole 144H. For example, the first sidewalls of the plurality of openings OP may be arranged to be parallel to the first side surface 144S1 of the second conductive pillar 144, and the second sidewalls of the plurality of openings OP may be arranged to be parallel to the second side surface 144S2 of the second conductive pillar 144.

[0062] Reference Figure 7 , the first vertical hole 136H may have a circular horizontal cross-section, and the first conductive pillar 136 arranged in the first vertical hole 136H may have a circular horizontal cross-section. The second conductive pillar 144 may have a bar shape extending in the first horizontal direction HD1. The second horizontal electrode portions 142 may each include a first sub-electrode portion 142L arranged on a first side surface 144S1 of the second conductive pillar 144 and a second sub-electrode portion 142R arranged on a second side surface 144S2 of the second conductive pillar 144.

[0063] Figure 8 is a cross-sectional view of an example of a semiconductor device 100A. Fig. 9 yes Figure 8 An example magnified view of area CX1.

[0064] Reference Figure 8 and Fig. 9 , the second vertical hole 144H may have a tapered shape in which an upper width of the second vertical hole 144H is greater than a lower width of the second vertical hole 144H.

[0065] In some implementations, a second vertical hole 144H can be formed that penetrates a plurality of first horizontal electrode portions 132 and a plurality of first molded insulating layers 134 that are alternately stacked in a vertical direction VD1, and a portion of the plurality of first molded insulating layers 134 (the portion exposed by the second vertical hole 144H) can be removed in a lateral direction by a pull-back process to form a plurality of openings OP.

[0066] During formation of the second vertical hole 144H, an upper portion of the second vertical hole 144H may be relatively more exposed to the etching atmosphere than a lower portion of the second vertical hole 144H, and thus an upper width of the second vertical hole 144H may become greater than a lower width of the second vertical hole 144H.

[0067] In addition, when a portion of the plurality of first mold insulating layers 134, which are arranged on both sides of the second vertical hole 144H, is removed by the pull-back process, a portion of the first mold insulating layer 134 adjacent to the upper portion of the second vertical hole 144H may be exposed to the etching atmosphere more than a portion of the first mold insulating layer 134 adjacent to the lower portion of the second vertical hole 144H. In this case, an etching amount of the first mold insulating layer 134 adjacent to the upper portion of the second vertical hole 144H may be greater than an etching amount of the first mold insulating layer 134 adjacent to the lower portion of the second vertical hole 144H, and a width of an opening OP of the first mold insulating layer 134 adjacent to the upper portion of the second vertical hole 144H may be greater than a width of an opening OP of the first mold insulating layer 134 adjacent to the lower portion of the second vertical hole 144H.

[0068] In some implementations, the width in the horizontal direction of one second horizontal electrode portion 142 (the second horizontal electrode portion 142 being adjacent to the upper portion of the second vertical hole 144H) among the plurality of second horizontal electrode portions 142 may be greater than the width in the horizontal direction of another second horizontal electrode portion 142 (the other second horizontal electrode portion 142 being adjacent to the lower portion of the second vertical hole 144H) among the plurality of second horizontal electrode portions 142. For example, the width in the horizontal direction of the second horizontal electrode portion 142 arranged at the first vertical height LV1 may be greater than the width in the horizontal direction of the second horizontal electrode portion 142 arranged at a vertical height lower than the first vertical height LV1.

[0069] In some implementations, the second vertical hole 144H may have an inclined sidewall, and at least a portion of each of the plurality of openings OP may also have an inclined sidewall profile. Accordingly, at least a portion of a side surface 142S of each of the plurality of second horizontal electrode portions 142 respectively arranged in the opening OP may have an inclined profile.

[0070] Fig.10 is a cross-sectional view of an example of a semiconductor device 100B. Fig.11 yes Fig.10 An example magnified view of area CX1.

[0071] Reference Fig.10 and Fig.11The first electrode structure 130B may include a plurality of first horizontal electrode portions 132 , a plurality of first mold insulating layers 134 , a first conductive pillar 136 , and a conductive electrode layer 138 .

[0072] In some implementations, the conductive electrode layer 138 may be arranged along the sidewalls of the second vertical hole 144H and the inner wall of each opening OP, and may be arranged between the plurality of first horizontal electrode portions 132 and the capacitor dielectric layer 150 and between the plurality of first mold insulating layers 134 and the capacitor dielectric layer 150. For example, the conductive electrode layer 138 may be conformally arranged on the first portion P1, the second portion P2, and the third portion P3 of the capacitor dielectric layer 150. Accordingly, the capacitor dielectric layer 150 may not contact the plurality of first horizontal electrode portions 132 or the plurality of first mold insulating layers 134, and may be arranged between the second electrode structure 140 and the conductive electrode layer 138.

[0073] In some implementations, the conductive electrode layer 138 can include at least one of titanium, tantalum, tungsten, molybdenum, niobium, titanium nitride, tantalum nitride, tungsten nitride, molybdenum nitride, and niobium nitride.

[0074] In some implementations, the first upper insulating layer 160A may be disposed on the uppermost first horizontal electrode portion 132, and the second upper insulating layer 160B may be disposed on the first upper insulating layer 160A. The second vertical hole 144H may penetrate the first upper insulating layer 160A, the plurality of first horizontal electrode portions 132, and the plurality of first mold insulating layers 134, and may extend in the vertical direction VD1. The conductive electrode layer 138 may be disposed on the sidewalls of the second vertical hole 144H and the inner walls of the plurality of openings OP, and a portion of the conductive electrode layer 138 may extend onto the upper surface of the first upper insulating layer 160A.

[0075] In some implementations, the capacitor structure CS may be a metal-insulator-metal-semiconductor (MIMS) type capacitor including a first horizontal electrode portion 132 and a conductive electrode layer 138 as electrodes of the first electrode structure 130B. For example, the conductive electrode layer 138 may be electrically connected to the first conductive pillar 136 through a plurality of first horizontal electrode portions 132 in contact with the conductive electrode layer 138. The conductive electrode layer 138 may be used together with the plurality of first horizontal electrode portions 132 as an effective electrode region of the first electrode structure 130B. In addition, the conductive electrode layer 138 may be arranged to conformally extend along the sidewalls of the second vertical hole 144H and the inner walls of the plurality of openings OP, and thus, the first portion P1, the second portion P2, and the third portion P3 of the capacitor dielectric layer 150 may all be used as an effective capacitor region. The semiconductor device 100B according to the above implementation may have a relatively increased capacitance.

[0076] Fig.12 is a cross-sectional view of another example of the semiconductor device 100C.

[0077] Reference Fig.12 The second lower wire LM1A may be disposed in the lower structure 120 , and the second lower wire LM1A may be separated from the first lower wire LM1 and may extend in the first horizontal direction HD1 . The second lower wire LM1A may be electrically connected to the bottom surface of the conductive electrode layer 138 .

[0078] Fig.13 is a cross-sectional view of another example of the semiconductor device 100D.

[0079] Reference Fig.13 , the first electrode structure 130D may include a plurality of first molded insulating layers 134, a conductive electrode layer 138, and a plurality of second molded insulating layers 139. The plurality of first molded insulating layers 134 and the plurality of second molded insulating layers 139 may be molded structures for defining a three-dimensional shape of the conductive electrode layer 138. The plurality of first molded insulating layers 134 may include a plurality of openings OP, and the conductive electrode layer 138 may be arranged on inner walls of the plurality of openings OP.

[0080] For example, the plurality of first mold insulating layers 134 and the plurality of second mold insulating layers 139 may include materials having an etching selectivity relative to each other. For example, the plurality of first mold insulating layers 134 and the plurality of second mold insulating layers 139 may include at least one of silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, and silicon oxycarbide. For example, the plurality of first mold insulating layers 134 may include silicon nitride, and the plurality of second mold insulating layers 139 may include silicon oxide.

[0081] The plurality of first molded insulating layers 134 may include a plurality of openings OP, respectively, and the plurality of openings OP may be arranged to overlap each other vertically. For example, a second vertical hole 144H may be formed that penetrates the plurality of first molded insulating layers 134 and the plurality of second molded insulating layers 139 alternately stacked in the vertical direction VD1, and a portion of the plurality of first molded insulating layers 134 (the portion exposed by the second vertical hole 144H) may be removed in the lateral direction by a pull-back process. Thus, a plurality of openings OP may be formed. In the pull-back process, the plurality of second molded insulating layers 139 may not be removed or damaged but may be left, and in some implementations, the plurality of openings OP may be formed to have a shape that forms a concentric circle with the second vertical hole 144H.

[0082] The second electrode structure 140 may include a plurality of second horizontal electrode parts 142 and second conductive pillars 144. The second conductive pillars 144 may extend in the vertical direction VD1 in the second vertical holes 144H, and the plurality of second horizontal electrode parts 142 may be arranged on sidewalls of the second conductive pillars 144 to extend in the horizontal direction.

[0083] The conductive electrode layer 138 and the capacitor dielectric layer 150 may be sequentially formed in the plurality of openings OP, and the remaining portions of the plurality of openings OP may be filled with the plurality of second horizontal electrode portions 142. Accordingly, an effective capacitor region having a three-dimensional structure may be defined in the plurality of openings OP, and the effective capacitor region may have a relatively increased area.

[0084] In some implementations, the planar shape of the second electrode structure 140 may be similar to the reference Figures 4 to 7 In some implementations, such as reference Figure 4 and Figure 5 As described above, the second conductive pillar 144 may have a circular horizontal cross-sectional shape, and the plurality of second horizontal electrode portions 142 may have an annular horizontal cross-sectional shape that forms a concentric circle with the second conductive pillar 144. In some implementations, as shown in FIG. Figure 6 and Figure 7 As described, the second conductive pillar 144 may have a strip-shaped horizontal cross-section extending in the first horizontal direction HD1, and the plurality of second horizontal electrode portions 142 may include a first sub-electrode portion 142L arranged on a first sidewall of the second conductive pillar 144 (see Figure 6 ) and a second sub-electrode portion 142R arranged on a second side wall of the second conductive pillar 144 (see Figure 6 ).

[0085] The second lower conductive line LM1A may be disposed in the lower structure 120 , and the second lower conductive line LM1A may extend in the first horizontal direction HD1 . The second lower conductive line LM1A may be electrically connected to a bottom surface of the conductive electrode layer 138 .

[0086] Fig.14 is a cross-sectional view of another example of the semiconductor device 100E.

[0087] Reference Fig.14, the lower structure 120 may have a textured upper surface and may include, for example, a concave-convex surface. The plurality of first horizontal electrode portions 132 and the plurality of first molded insulating layers 134 may have concave-convex surfaces conforming in shape to the concave-convex surface of the lower structure 120, and the plurality of second horizontal electrode portions 142 arranged in the openings OP of the plurality of first molded insulating layers 134 may also have concave-convex surfaces conforming in shape to the concave-convex surfaces of the plurality of first horizontal electrode portions 132. The capacitor dielectric layer 150 may be conformally arranged between the concave-convex surfaces of the plurality of first horizontal electrode portions 132 and the concave-convex surfaces of the plurality of second horizontal electrode portions 142.

[0088] In some implementations, the concavo-convex surface of the lower structure 120 may be formed by forming a mask pattern on the lower structure 120 and removing an upper portion of the lower structure 120 by using the mask pattern as an etching mask. Thereafter, a plurality of first horizontal electrode portions 132 and a plurality of first mold insulating layers 134 may be alternately and sequentially formed on the lower structure 120 having the concavo-convex surface, and thus, the shapes of the plurality of first horizontal electrode portions 132 and the plurality of first mold insulating layers 134 may be formed to have the concavo-convex surface.

[0089] In some implementations, the lower structure 120 may have a flat upper surface, a template layer having a concavoconvex surface may be further formed between the lower structure 120 and the lowermost first horizontal electrode portion 132, and a plurality of first horizontal electrode portions 132 and a plurality of first mold insulating layers 134 may be alternately and sequentially formed on the template layer. Thus, the shapes of the plurality of first horizontal electrode portions 132 and the plurality of first mold insulating layers 134 may be formed to have a concavoconvex surface.

[0090] In some implementations, because the plurality of first horizontal electrode portions 132 and the plurality of second horizontal electrode portions 142 may have concavo-convex surfaces, the area of ​​an effective capacitor region may increase, and the capacitor structure CS may have relatively increased capacitance.

[0091] Fig.15 is a cross-sectional view of another example of the semiconductor device 200. Fig.15 In, with Figures 1 to 14 The same reference numerals may indicate the same elements.

[0092] Reference Fig.15 , the semiconductor device 200 may be a global shutter type image sensor including a plurality of photovoltaic regions PD formed on a semiconductor substrate 210 and a capacitor structure CS arranged on a front surface of the semiconductor substrate 210 .

[0093] The transfer gate TG may be arranged to extend into the semiconductor substrate 210 and may be configured to control photoelectrons stored in the photovoltaic region PD. A pixel transistor may also be formed on the front surface of the semiconductor substrate 210, and the pixel transistor may be electrically connected to the capacitor structure CS so that the charge transferred from the photovoltaic region PD of each pixel region may be stored in the capacitor structure CS.

[0094] A front-side interconnection layer FL and a front-side insulating layer FI covering the capacitor structure CS may be disposed on the front side of the semiconductor substrate 210 , and a color filter CF and a microlens ML may be disposed on the back side of the semiconductor substrate 210 .

[0095] The capacitor structure CS may include a first electrode structure 130, a second electrode structure 140, and a capacitor dielectric layer 150, and the structure of the capacitor structure CS may include a reference Figures 1 to 15 In some implementations, the capacitor structure CS may be formed in plurality, and the plurality of capacitor structures CS may be arranged to correspond to a plurality of pixel regions formed on the semiconductor substrate 210, respectively.

[0096] In some implementations, the capacitor structure CS may have relatively increased capacitance and relatively reduced area, and thus, a global shutter type image sensor including the capacitor structure CS may have high resolution and excellent image quality.

[0097] Fig.16 is a cross-sectional view of another example of a semiconductor device 200A.

[0098] Reference Fig.16 , the capacitor structure CS may be arranged on a plurality of pixels formed on the semiconductor substrate 210. For example, the first electrode structure 130 may be arranged to extend in the horizontal direction to vertically overlap with a plurality of pixels (e.g., to vertically overlap with a plurality of photovoltaic regions PD), and the second electrode structure 140 may be arranged to penetrate the first electrode structure 130. For example, the first electrode structure 130 may be a common electrode and may be electrically connected to a plurality of pixel regions in common. The second electrode structure 140 may be formed in plurality, and at least one second electrode structure 140 may be electrically connected to each pixel region.

[0099] Fig.15 and Fig.16An image sensor including a capacitor structure CS is shown. However, in some implementations, the capacitor structure CS may be integrated into an integrated circuit device including a memory device and / or a logic device. In some implementations, the capacitor structure CS may be included in an integrated circuit device including a logic device, and may be used as a device control circuit such as a power regulator of the logic device. For example, the capacitor structure CS may have a relatively increased capacitance, and therefore, the noise of the power line and / or signal line of the integrated circuit device may be reduced. In some implementations, the capacitor structure CS may be included in an electronic system such as a mobile electronic device, and may be used as a backup power source such as a battery backup random access memory (RAM). For example, the capacitor structure CS may have a relatively increased capacitance, and therefore, even when the power of the electronic system such as the mobile electronic device is momentarily suspended, stable operation of the system may become possible.

[0100] Fig.17A , Fig. 17B , Fig.18A , Fig.18B , Fig.19A , Fig.19B , Fig. 20A , Fig. 20B , Fig.21 , Fig.22A , Fig. 22B , Fig.23A , Fig. 23B and Fig.24 1 is a schematic diagram illustrating an example of a method of manufacturing the semiconductor device 100 . Fig.17A , Fig.18A , Fig.19A , Fig. 20A , Fig.21 , Fig.22A , Fig.23A and Fig.24 is a cross-sectional view shown according to the process sequence, and Fig. 17B , Fig.18B , Fig.19B , Fig. 20B , Fig. 22B and Fig. 23B yes Fig.17A , Fig.18A , Fig.19A , Fig. 20A , Fig.22A and Fig.23A A horizontal cross-sectional view at a first vertical height LV1.

[0101] Reference Fig.17A and Fig. 17B , a lower structure 120 may be formed on the substrate 110 , and a first lower conductive line LM1 surrounded by the lower structure 120 and extending in the first horizontal direction HD1 may be formed.

[0102] A plurality of first horizontal electrode parts 132 and a plurality of first mold insulating layers 134 may be alternately formed on the lower structure 120 .

[0103] In some implementations, the plurality of first horizontal electrode portions 132 may be formed by using a semiconductor material such as polysilicon, germanium, or silicon germanium, and the plurality of first mold insulating layers 134 may be formed by using at least one insulating material among silicon nitride, silicon oxynitride, silicon oxide, and silicon oxycarbide. In some implementations, the plurality of first horizontal electrode portions 132 and the plurality of first mold insulating layers 134 may be formed by using materials having an etching selectivity with respect to each other.

[0104] Thereafter, an upper insulating layer 160 may be formed on the uppermost first horizontal electrode portion 132 .

[0105] Reference Fig.18A and Fig.18B A mask pattern may be formed on the upper insulating layer 160, and the mask pattern may be used as an etching mask to remove a portion of the plurality of first horizontal electrode portions 132 and a portion of the plurality of first mold insulating layers 134, thereby forming a second vertical hole 144H. The second vertical hole 144H may be arranged at a lower height than the lowermost first horizontal electrode portion 132, and may have a bottom covered by the lower structure 120.

[0106] In some implementations, such as Fig.18B As shown in FIG. 1 , the second vertical hole 144H may have a circular horizontal cross-section. In some implementations, such as Figure 7 As shown in FIG. 1 , the second vertical hole 144H may have a bar-shaped horizontal cross-section extending in the first horizontal direction HD1 .

[0107] Fig.18A 144H may have a vertical sidewall profile, and the upper width of the second vertical hole 144H may be substantially the same as the lower width of the second vertical hole 144H. In some implementations, according to etching process conditions, the upper portion of the second vertical hole 144H may be more exposed to the etching atmosphere than the lower portion of the second vertical hole 144H, and therefore, the upper width of the second vertical hole 144H may be greater than the lower width of the second vertical hole 144H, and in this case, as shown in reference Figure 8 and Fig. 9 As described above, the second vertical hole 144H may have an inclined sidewall.

[0108] Reference Fig.19A and Fig.19B, a portion of the plurality of first mold insulating layers 134 exposed through the sidewalls of the second vertical holes 144H may be removed, and a plurality of openings OP may be formed. In some implementations, in a process for removing a portion of the plurality of first mold insulating layers 134, the plurality of first horizontal electrode portions 132 may be less removed and may be retained.

[0109] In some implementations, the process for removing a portion of the plurality of first mold insulating layers 134 may be referred to as a pull-back process. In the pull-back process, the following etching method may be used: while the plurality of first horizontal electrode portions 132 may have a relatively reduced etching rate, the plurality of first mold insulating layers 134 may have a relatively increased etching rate. In some implementations, in the pull-back process, a method including H 3 PO 4 of etchant.

[0110] The plurality of openings OP may be spaces defined between the plurality of first horizontal electrode portions 132 after a portion of the plurality of first molded insulating layers 134 is removed. In some implementations, the plurality of openings OP may have a circular horizontal cross section surrounding the second vertical hole 144H. The plurality of openings OP may have a relatively increased width in the lateral direction. The plurality of openings OP may form concentric circles with the second vertical hole 144H. For example, the lateral distance ld from the sidewall of each of the plurality of openings OP to the second vertical hole 144H in the radial direction may be the same.

[0111] In some implementations, such as Fig.19B As shown in FIG. 1 , the second vertical hole 144H may have a circular horizontal cross section, and the plurality of openings OP may each have an annular horizontal cross section that forms a concentric circle with the second vertical hole 144H. Figure 7 As shown in FIG, the second vertical hole 144H may have a strip-shaped horizontal cross-section extending in the first horizontal direction HD1, and here, the plurality of openings OP may include a first opening OP1 arranged at a first side of the second vertical hole 144H and a second opening OP2 arranged at a second side of the second vertical hole 144H.

[0112] Reference Fig. 20A and Fig. 20B , the capacitor dielectric layer 150 may be conformally formed in the second vertical hole 144H and the plurality of openings OP, and the second electrode layer 140L filling the second vertical hole 144H and the plurality of openings OP may be formed on the capacitor dielectric layer 150 .

[0113] A portion of the second electrode layer 140L may fill a space between the plurality of first horizontal electrode portions 132 , and the capacitor dielectric layer 150 may be disposed between the second electrode layer 140L and the plurality of first horizontal electrode portions 132 .

[0114] In some implementations, the second electrode layer 140L may include at least one of TiN, TaN, WN, MoN, NbN, CoN, Ti, Ta, W, Ru, Mo, Nb, Co, and silicides thereof.

[0115] Reference Fig.21 , the capacitor dielectric layer 150 and the second electrode layer 140L arranged on the upper surface of the upper insulating layer 160 may be removed. Here, the portion of the second electrode layer 140L filling the plurality of openings OP may be referred to as a second horizontal electrode portion 142, and the portion of the second electrode layer 140L filling the second vertical hole 144H and extending in the vertical direction VD1 may be referred to as a second conductive pillar 144.

[0116] Reference Fig.22A and Fig. 22B , a mask pattern may be formed on the upper insulating layer 160, and the mask pattern may be used as an etching mask to remove a portion of the plurality of first horizontal electrode portions 132 and a portion of the plurality of first mold insulating layers 134, thereby forming a first vertical hole 136H. The first vertical hole 136H may be arranged at a height lower than the lowermost first horizontal electrode portion 132, and an upper surface of the first lower conductive line LM1 may be exposed to a bottom of the first vertical hole 136H.

[0117] In some implementations, such as Fig. 22B As shown in FIG. 1 , the first vertical hole 136H may have a strip-shaped horizontal cross section extending in the first horizontal direction HD1. Figure 5 As shown in FIG. 1 , the first vertical hole 136H may have a circular horizontal cross-section.

[0118] Reference Fig.23A and Fig. 23B , a first conductive pillar 136 may be formed in the first vertical hole 136H. The first conductive pillar 136 may include at least one of TiN, TaN, WN, MoN, NbN, CoN, Ti, Ta, W, Ru, Mo, Nb, Co, and silicides thereof.

[0119] Reference Fig.24 A line trench may be formed by removing a portion of the upper insulating layer 160, and a first upper conductive line UM1 and a second upper conductive line UM2 may be formed in the line trench. The first upper conductive line UM1 may be electrically connected to the first conductive pillar 136, and the second upper conductive line UM2 may be electrically connected to the second conductive pillar 144.

[0120] By using the above-described processes, the semiconductor device 100 may be formed.

[0121] In some implementations, through the pull-back process, a portion of the plurality of first mold insulation layers 134 may be removed and a plurality of openings OP may be formed. Accordingly, a three-dimensional capacitor structure CS having a three-dimensional structure and having a relatively increased effective capacitor area may be obtained.

[0122] Figure 25 to Figure 28 100D is a schematic diagram illustrating another example of a method of manufacturing the semiconductor device 100D.

[0123] Reference Fig.25 , a plurality of first mold insulating layers 134 and a plurality of second mold insulating layers 139 may be alternately formed on the lower structure 120 .

[0124] In some implementations, the plurality of first mold insulating layers 134 and the plurality of second mold insulating layers 139 may include materials having an etching selectivity relative to each other. For example, the plurality of first mold insulating layers 134 and the plurality of second mold insulating layers 139 may include at least one of silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, and silicon oxycarbide. For example, the plurality of first mold insulating layers 134 may include silicon nitride, and the plurality of second mold insulating layers 139 may include silicon oxide.

[0125] Thereafter, a first upper insulating layer 160A may be formed on the uppermost second mold insulating layer 139 .

[0126] Reference Fig.26 , a portion of the plurality of first mold insulation layers 134 and a portion of the plurality of second mold insulation layers 139 may be removed to form the second vertical holes 144H.

[0127] Thereafter, a portion of the plurality of first mold insulation layers 134 exposed by the sidewalls of the second vertical holes 144H may be removed, and a plurality of openings OP may be formed. In some implementations, in a process for removing a portion of the plurality of first mold insulation layers 134, the plurality of second mold insulation layers 139 may be less removed and may be retained.

[0128] In some implementations, the process for removing a portion of the plurality of first molded insulating layers 134 may be referred to as a pull-back process. In the pull-back process, the following etching method may be used: while the plurality of second molded insulating layers 139 may have a relatively reduced etching rate, the plurality of first molded insulating layers 134 may have a relatively increased etching rate. In some implementations, in the pull-back process, a method including H 3 PO 4 of etchant.

[0129] The second lower conductive line LM1A may be exposed at the bottom of the second vertical hole 144H. For example, in the pull-back process, the upper surface of the second lower conductive line LM1A may be exposed. Alternatively, in the pull-back process, the upper surface of the second lower conductive line LM1A may be covered by the lower structure 120 and may not be exposed at the bottom of the second vertical hole 144H, and then the upper surface of the second lower conductive line LM1A may be exposed by using another etching process after the pull-back process.

[0130] Reference Fig. 27 , a conductive electrode layer 138 and a capacitor dielectric layer 150 may be sequentially formed in the second vertical hole 144H and the plurality of openings OP, and a second electrode layer 140L filling the second vertical hole 144H and the plurality of openings OP may be formed on the capacitor dielectric layer 150 .

[0131] Reference Fig.28 , the conductive electrode layer 138, the capacitor dielectric layer 150, and the second electrode layer 140L arranged on the upper surface of the first upper insulating layer 160A may be removed. Here, the portion of the second electrode layer 140L arranged in the plurality of openings OP may be referred to as a second horizontal electrode portion 142, and the portion of the second electrode layer 140L filling the second vertical hole 144H and extending in the vertical direction VD1 may be referred to as a second conductive pillar 144.

[0132] Afterwards, refer again to Fig.13 , a second upper insulating layer 160B covering the second conductive pillar 144 may be formed on the first upper insulating layer 160A. Thereafter, a line trench may be formed by removing a portion of the second upper insulating layer 160B, and a second upper conductive line UM2 may be formed in the line trench.

[0133] The semiconductor device 100D may be formed through the above-described processes.

[0134] In some implementations, through the pull-back process, a portion of the plurality of first mold insulation layers 134 may be removed, and a plurality of openings OP may be formed. Accordingly, a three-dimensional capacitor structure CS having a three-dimensional structure and having a relatively increased effective capacitor area may be obtained.

[0135] Although this specification contains many specific implementation details, these should not be interpreted as limitations on the scope of any invention or on the scope that can be claimed, but rather as descriptions of features that can be specific to a specific implementation of a particular invention. Certain features described in this specification in the context of various implementations may also be implemented in combination in a single implementation. Conversely, various features described in the context of a single implementation may also be implemented individually in multiple implementations or in any suitable sub-combination. In addition, although features may be described above as working in certain combinations, in some cases, one or more features in a combination may be deleted from the combination, and a combination may involve a sub-combination or a variation of a sub-combination.

[0136] While the present disclosure has been particularly shown and described with reference to example implementations thereof, various changes in form and details may be made therein without departing from the spirit and scope of the appended claims.

Claims

1. A semiconductor device comprising a capacitor structure, the capacitor structure being disposed on a substrate and comprising: a first electrode structure including a plurality of first horizontal electrode portions and a first conductive pillar, the plurality of first horizontal electrode portions being spaced apart from each other in a first direction perpendicular to an upper surface of the substrate, and the first conductive pillar being connected to each of the plurality of first horizontal electrode portions and extending in the first direction; a second electrode structure, the second electrode structure comprising a plurality of second horizontal electrode portions and a second conductive pillar, the second conductive pillar extending through the plurality of first horizontal electrode portions in the first direction, and the plurality of second horizontal electrode portions being spaced apart from each other along the first direction on a sidewall of the second conductive pillar and arranged alternately with the plurality of first horizontal electrode portions; as well as A capacitor dielectric layer is located between the sidewall of the second conductive pillar and the plurality of first horizontal electrode portions, and the capacitor dielectric layer is located on the upper surface, the side surface and the bottom surface of each of the plurality of second horizontal electrode portions.

2. The semiconductor device according to claim 1, wherein The second conductive pillar has a circular planar shape, and Each of the plurality of second horizontal electrode portions has a ring-shaped planar shape surrounding the second conductive pillar.

3. The semiconductor device according to claim 2, wherein: A side surface of at least one of the plurality of second horizontal electrode portions forms a concentric circle with a side surface of a portion of the second conductive pillar, the portion of the second conductive pillar being at the same height as the at least one second horizontal electrode portion.

4. The semiconductor device according to claim 1, wherein: The first conductive pillar extends in a first horizontal direction, and The second conductive pillar extends in the first horizontal direction and is spaced apart from the first conductive pillar in a second horizontal direction.

5. The semiconductor device according to claim 4, wherein: Each of the plurality of second horizontal electrode portions includes a first sub-electrode portion located on a first side surface of the second conductive pillar and a second sub-electrode portion located on a second side surface of the second conductive pillar, the second side surface being opposite to the first side surface, and The width of the first sub-electrode portion in the second horizontal direction is the same as the width of the second sub-electrode portion in the second horizontal direction.

6. The semiconductor device according to claim 1, wherein The first electrode structure includes a plurality of molded insulating layers alternately arranged with the plurality of first horizontal electrode portions, wherein the plurality of molded insulating layers respectively include a plurality of openings, and the plurality of openings overlap with each other in the first direction, and Wherein, the plurality of second horizontal electrode portions are arranged in the plurality of openings.

7. The semiconductor device according to claim 6, wherein: A portion of the capacitor dielectric layer is located in a corresponding opening of the plurality of openings of the plurality of molded insulating layers.

8. The semiconductor device according to claim 6, wherein: A portion of the capacitor dielectric layer contacts a corresponding molded insulating layer of the plurality of molded insulating layers.

9. The semiconductor device according to claim 6, wherein: The plurality of mold insulation layers include silicon nitride, and Wherein, the plurality of first horizontal electrode portions include doped or undoped polysilicon.

10. The semiconductor device according to claim 1, wherein The first electrode structure includes a conductive electrode layer located between the plurality of first horizontal electrode portions and the capacitor dielectric layer and between a plurality of mold insulating layers and the capacitor dielectric layer, and Wherein, the conductive electrode layer includes at least one of titanium, tantalum, tungsten, molybdenum, niobium, titanium nitride, tantalum nitride, tungsten nitride, molybdenum nitride or niobium nitride.

11. The semiconductor device according to claim 1, wherein Each of the plurality of first horizontal electrode portions includes a first concavo-convex surface, and Each of the plurality of second horizontal electrode portions includes a second concave-convex surface conforming to a shape of the first concave-convex surface.

12. A semiconductor device comprising a capacitor structure, the capacitor structure being disposed on a substrate and comprising: a first electrode structure, the first electrode structure comprising a plurality of first horizontal electrode portions, a plurality of molded insulating layers, and first conductive pillars, the plurality of first horizontal electrode portions being spaced apart from each other in a first direction perpendicular to an upper surface of the substrate, the plurality of molded insulating layers being alternately arranged with the plurality of first horizontal electrode portions and respectively comprising a plurality of openings, the plurality of openings overlapping each other in the first direction, and the first conductive pillars being connected to each of the plurality of first horizontal electrode portions and extending in the first direction; a second electrode structure, the second electrode structure comprising a plurality of second horizontal electrode portions and a second conductive pillar, the second conductive pillar extending through the plurality of first horizontal electrode portions in the first direction, and the plurality of second horizontal electrode portions being spaced apart from each other along the first direction on a sidewall of the second conductive pillar and respectively arranged in the plurality of openings; as well as A capacitor dielectric layer is located between the first electrode structure and the second electrode structure, and the capacitor dielectric layer includes multiple portions located in multiple openings on the upper surface, side surface and bottom surface of corresponding second horizontal electrode portions among the multiple second horizontal electrode portions.

13. The semiconductor device according to claim 12, wherein: The plurality of second horizontal electrode portions are alternately arranged with the plurality of first horizontal electrode portions.

14. The semiconductor device according to claim 12, wherein: The second conductive pillar has a circular planar shape, and Each of the plurality of openings has a ring-shaped planar shape surrounding the second conductive column.

15. The semiconductor device according to claim 14, wherein: A side surface of each of the plurality of second horizontal electrode portions forms a concentric circle with a sidewall of the second conductive pillar.

16. The semiconductor device according to claim 12, wherein: The first conductive pillar extends in a first horizontal direction, and The second conductive pillar extends in the first horizontal direction and is spaced apart from the first conductive pillar in a second horizontal direction.

17. The semiconductor device according to claim 16, wherein: Each of the plurality of second horizontal electrode portions includes a first sub-electrode portion located on a first side surface of the second conductive pillar and a second sub-electrode portion located on a second side surface of the second conductive pillar, the second side surface being opposite to the first side surface, and The width of the first sub-electrode portion in the second horizontal direction is the same as the width of the second sub-electrode portion in the second horizontal direction.

18. The semiconductor device according to claim 12, wherein: The first electrode structure includes a conductive electrode layer between the plurality of first horizontal electrode portions and the capacitor dielectric layer and between the plurality of mold insulating layers and the capacitor dielectric layer, and Wherein, the conductive electrode layer includes at least one of titanium, tantalum, tungsten, molybdenum, niobium, titanium nitride, tantalum nitride, tungsten nitride, molybdenum nitride or niobium nitride.

19. A semiconductor device, comprising: A semiconductor substrate having a plurality of pixel regions defined thereon, each pixel region including a photovoltaic region; as well as A capacitor structure is disposed on the semiconductor substrate and includes: a first electrode structure including a plurality of first horizontal electrode portions spaced apart from each other in a first direction perpendicular to an upper surface of the semiconductor substrate and a first conductive pillar connected to each of the plurality of first horizontal electrode portions and extending in the first direction; a second electrode structure, the second electrode structure comprising a plurality of second horizontal electrode portions and a second conductive pillar, the second conductive pillar extending through the plurality of first horizontal electrode portions in the first direction, and the plurality of second horizontal electrode portions being spaced apart from each other along the first direction on sidewalls of the second conductive pillar and arranged alternately with the plurality of first horizontal electrode portions; and A capacitor dielectric layer is located between the sidewall of the second conductive pillar and the plurality of first horizontal electrode portions, and the capacitor dielectric layer is located on the upper surface, the side surface and the bottom surface of each of the plurality of second horizontal electrode portions.

20. The semiconductor device according to claim 19, wherein The first electrode structure includes a plurality of molded insulating layers alternately arranged with the plurality of first horizontal electrode portions, wherein the plurality of molded insulating layers respectively include a plurality of openings, and the plurality of openings overlap with each other in the first direction, and Wherein, the plurality of second horizontal electrode portions are arranged in the plurality of openings.

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