Topological spin material-based magnetoresistive memory device

Abstract

The invention provides a topological spin material-based magnetoresistive memory device, and the device comprises a spin-orbit coupling layer which is made of a topological insulator and is used for generating a spin current; the nickel oxide layer is formed on the spin-orbit coupling layer; the interface layer is formed on the nickel oxide layer; the magnetic tunnel junction is formed on the interface layer and comprises ferromagnetic layers formed on the upper side and the lower side of the barrier layer; the spin current is transmitted in the nickel oxide layer in the form of a magnetic vibrator and then acts on the ferromagnetic layer, and the interface layer is used for enhancing the anisotropy of the ferromagnetic layer.

Description

Technical Field

[0001] The present disclosure relates to the field of magnetic storage technology, and in particular to a topological spin material-based magnetoresistive storage device. Background Art

[0002] Topological insulators (TIs) have spin Hall angles much larger than those of conventional heavy metal materials and are candidate material systems for realizing ultra-low energy consumption spin-orbit moment magnetic random access memory (SOT-MRAM). There are now reports of prototype devices of SOT-MTJ (spin-orbit moment magnetic tunnel junction) with topological insulators as spin-orbit coupling layers. However, due to the bulk insulation of topological insulators, the resistivity is much higher than that of metal materials, so there is a serious shunting effect in topological insulator SOT-MTJs, which makes the actual energy consumption of topological insulator SOT-MTJs not significantly improved. In topological materials or heavy metals, there are significant spin memory loss and spin back flow at the interface formed with the ferromagnetic layer due to the strong spin-orbit coupling effect, which limits the improvement of the spin conversion efficiency of the spin-orbit coupling layer. In addition, the existing topological insulator magnetic tunnel junctions have a small TMR (Tunnel Magnetoresistance Ratio), which limits their read performance. Summary of the invention

[0003] In view of this, in order to at least partially solve at least one of the above-mentioned technical problems, the present disclosure provides a topological spin material-based magnetoresistive memory device.

[0004] In order to achieve the above purpose, the technical solution of the present invention is as follows:

[0005] According to an embodiment of one aspect of the present disclosure, a topological spin material-based magnetoresistive memory device is provided, comprising: a spin-orbit coupling layer, a nickel oxide layer, an interface layer, and a magnetic tunnel junction.

[0006] The spin-orbit coupling layer material is a topological insulator for generating a spin current; a nickel oxide layer is formed on the spin-orbit coupling layer; an interface layer is formed on the nickel oxide layer; a magnetic tunnel junction is formed on the interface layer, including a ferromagnetic layer formed on the upper and lower sides of the barrier layer; the spin current is transmitted in the nickel oxide layer in the form of a magnetic oscillator and then acts on the ferromagnetic layer; the interface layer is used to enhance the anisotropy of the ferromagnetic layer and improve the thermal budget.

[0007] According to an embodiment of the present disclosure, the ferromagnetic layer includes a ferromagnetic reference layer located on the upper side of the barrier layer and a ferromagnetic free layer located on the lower side of the barrier layer; the magnetic tunnel junction includes a ferromagnetic free layer, a barrier layer, a ferromagnetic reference layer, a synthetic antiferromagnetic layer, and a cap layer from bottom to top.

[0008] According to an embodiment of the present disclosure, the magnetoresistive memory device further includes a TMR enhancement layer, which is a first TMR enhancement layer formed under the ferromagnetic free layer and a second TMR enhancement layer formed on the upper side of the ferromagnetic reference layer, for further improving the tunneling magnetoresistance.

[0009] According to the embodiment of the present disclosure, the material of the topological insulator is selected from Bi 1-x Sb x ,(Bi 1-x Sb x ) 2 Te 3 ,Bi 2 Se 3 , Sb 2 Te 3 ,Bi 2 Te 3 One or a combination of .

[0010] According to an embodiment of the present disclosure, the interface layer material is selected from one or a combination of Ti, Mo, Hf, Ta, and Cu.

[0011] According to the embodiments of the present disclosure, when etching to form a magnetic tunnel junction, the etching is stopped on the spin-orbit coupling layer; when a write current is applied to the topological insulator along the spin-orbit coupling layer, since the nickel oxide layer is an insulator along the current direction, the shunt effect of the metal material layers on the nickel oxide layer is effectively suppressed, thereby further improving the write energy efficiency of the topological insulator magnetoresistive memory device.

[0012] According to an embodiment of the present disclosure, the thickness of the nickel oxide layer is less than 1 nm.

[0013] According to an embodiment of the present disclosure, the TMR enhancement layer may be an antiferromagnetic material IrMn; the tunneling magnetoresistivity may be enhanced by modulation of the antiferromagnetic spins in the antiferromagnetic material IrMn and the ferromagnetic spin configuration in the ferromagnetic free layer.

[0014] According to the embodiment of the present disclosure, the memory device further includes a read control transistor T R , write control transistor T W The gate of the write control transistor is connected to the write bit line WWL, the drain is connected to the write byte line WBL, and the source is connected to one side of the spin-orbit coupling layer; the gate of the read control transistor is connected to the read bit line RWL, the drain is connected to the read byte line RBL, and the source is connected to the top electrode.

[0015] According to the embodiment of the present disclosure, when performing a write operation, the write bit line WWL is pulled to a high level, and the write byte line WBL or the source line SL is pulled to a write voltage V Write , the remaining metal lines are grounded, generating a write current flowing through the topological surface state of the topological insulator; when performing a read operation, the read bit line RWL is pulled to a high level, and the read byte line RBL is pulled to a read voltage V Read, and the remaining metal lines are grounded, generating a read current that flows through the magnetic tunnel junction.

[0016] In the topological spin material-based magnetoresistive memory device disclosed in the present invention, the nickel oxide intercalation layer improves the TI / FM interface spin transfer efficiency; the nickel oxide intercalation layer suppresses the metal layer shunt effect, so that the write current mainly flows through the TI surface state, further improving the energy efficiency; the TMR enhancement layer improves the tunneling magnetoresistance. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The above and other objects, features and advantages of the present disclosure will become more apparent through the following description of the embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0018] Figure 1A A main film stack structure of a topological spin material-based magnetoresistive memory device according to an embodiment of the present disclosure;

[0019] Figure 1B Another main film stack structure of a topological spin material-based magnetoresistive memory device according to an embodiment of the present disclosure;

[0020] Figure 2A Based on Figure 1A A schematic diagram of the structure of a topological spin material-based magnetoresistive memory device with a main film stack structure shown;

[0021] Figure 2B Based on Figure 1B A schematic diagram of the structure of a topological spin material-based magnetoresistive memory device with a main film stack structure shown;

[0022] Figure 3 A schematic diagram of the efficiency enhancement mechanism of the nickel oxide layer according to an embodiment of the present disclosure;

[0023] Figure 4 Schematic diagram of the working principle of the TMR enhancement layer in an embodiment of the present disclosure;

[0024] Figure 5 A schematic diagram of a topological spin material-based magnetoresistive memory device with an external circuit added according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0025] The present disclosure provides a topological spin material-based magnetoresistive memory device. The preparation method is simple and reliable. The prepared detector has high gain for high-energy particle detection, good gain uniformity, good two-dimensional position resolution, and can withstand very high particle irradiation counting rates, which can overcome the main shortcomings and deficiencies of existing cross-radiation detectors.

[0026] In order to make the objectives, technical solutions and advantages of the present disclosure more clearly understood, the present disclosure is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0027] In an embodiment of the present disclosure, a topological spin material-based magnetoresistive memory device is provided, such as Figure 1A , Figure 1B , Figure 2A , Figure 2B As shown, the topological spin material-based magnetoresistive memory device includes: a spin-orbit coupling layer, a nickel oxide layer, an interface layer, and a magnetic tunnel junction. Wherein:

[0028] The spin-orbit coupling layer material is a topological insulator (i.e., a topological insulator layer), which is used to generate spin current;

[0029] A nickel oxide layer is formed on the spin-orbit coupling layer;

[0030] An interface layer is formed on the nickel oxide layer; and

[0031] A magnetic tunnel junction is formed on the interface layer, including ferromagnetic layers formed on both sides of the barrier layer;

[0032] The spin current acts on the ferromagnetic layer after being transmitted in the nickel oxide layer in the form of magnetic oscillators, and the interface layer is used to enhance the anisotropy of the ferromagnetic layer.

[0033] According to an embodiment of the present disclosure, the ferromagnetic layer includes a ferromagnetic reference layer located on the upper side of the barrier layer and a ferromagnetic free layer located on the lower side of the barrier layer; the magnetic tunnel junction includes a ferromagnetic free layer, a barrier layer, a ferromagnetic reference layer, a synthetic antiferromagnetic layer, and a cap layer from bottom to top.

[0034] According to the disclosed embodiment, the magnetoresistive memory device further includes a TMR enhancement layer, which is a first TMR enhancement layer formed on the lower side of the ferromagnetic free layer, and a second TMR enhancement layer formed on the upper side of the ferromagnetic reference layer, for further improving the tunneling magnetoresistance. The TMR enhancement layer can be an antiferromagnetic material IrMn; the tunneling magnetoresistance can be enhanced by modulation of the antiferromagnetic spin in the antiferromagnetic material IrMn and the ferromagnetic spin configuration in the ferromagnetic free layer.

[0035] According to the embodiment of the present disclosure, the topological insulator layer can be Bi 1-x Sb x ,(Bi 1-x Sb x ) 2 Te 3 ,Bi 2 Se 3 , Sb 2 Te 3 ,Bi 2 Te 3One or a combination of, where x represents the stoichiometric ratio of the element Sb. The spin current generated by the topological insulator layer is transmitted in the form of magnons, thereby improving the spin memory loss (SML) and spin back flow (SBF) at the TI / FM (topological insulator layer / ferromagnetic layer) interface and improving the TI / FM interface spin transmission efficiency. The ferromagnetic layer can be made of CoFeB, CoFe, Co, or CoPt, and the barrier layer can be made of MgO, AlO x The material for preparing the cap layer can be one or a combination of Ta, Ru, Pt, etc.

[0036] The interface layer is used to enhance the anisotropy of the ferromagnetic layer and improve the thermal budget of the device. The interface layer material is selected from one or a combination of Ti, Mo, Hf, Ta, and Cu.

[0037] In the embodiments of the present disclosure, Figure 2A and Figure 2B As shown in the figure, when etching forms a tunnel junction, the etching stops at the topological insulator. When a write current is applied, the nickel oxide layer NiO insulates and isolates the remaining metal layers, effectively suppressing the shunt effect of the metal layer, so that the write current (indicated by the long right arrow in the figure) mainly flows through the topological surface state, improving the write efficiency. Since the nickel oxide layer is very thin, it will not destroy the TMR ratio (tunneling magnetoresistance) read through the tunneling magnetoresistance effect.

[0038] In the embodiments of the present disclosure, Figure 3 As shown in the figure, the spin current generated by the topological insulator is transmitted in the nickel oxide layer in the form of magnon. In the figure, Jc represents the charge flow and Js represents the polarized spin current. The nickel oxide layer is insulated, so the charge flow cannot flow through, so Jc=0. However, the spin current can be transmitted through the nickel oxide layer in the form of magnon, so Js≠0 in the nickel oxide layer, and acts on the adjacent ferromagnetic layer (such as the ferromagnetic free layer located on the interface layer and TMR enhancement layer) after passing through the nickel oxide layer. Since no electron flow is involved, the interface spin backflow is suppressed. Since there is no strong interface spin-orbit coupling effect (ISCO) at the interface between the nickel oxide layer and the ferromagnetic layer, the interface spin memory loss is improved. Therefore, the nickel oxide layer intercalation can effectively improve the spin transmission efficiency at the interface between the topological insulator and the ferromagnetic layer, and improve the writing energy efficiency.

[0039] In the embodiments of the present disclosure, Figure 4As shown, on the left is the lattice structure of IrMn, the light-colored spheres represent Mn atoms, and the dark-colored spheres represent Ir atoms. x=y=3.855Å means that the lattice constants along the x and y directions are the same, 3.855Å. z / x=0.945 means that the lattice constant along the z direction is 3.855Å×0.945, and the antiferromagnetic spin configuration of Mn in the TMR enhanced layer material leads to mixed Bloch symmetry. When the magnetic tunnel junction is in the parallel state, both the majority and minority spin channels are enhanced, achieving high tunneling magnetoresistance. When the structure is written, the spin-orbit moment generated by the topological insulator flips the magnetic moment of the TMR enhanced layer material IrMn. Due to the exchange bias at the interface between IrMn and the ferromagnetic free layer, the magnetic moment of the ferromagnetic free layer also flips accordingly. The writing of the resistance state is achieved.

[0040] In the embodiments of the present disclosure, Figure 5 As shown in FIG. 1 , a topological spin material-based magnetoresistive memory device with an external circuit is added, which mainly includes a read control transistor T R , write control transistor T W The gate of the write control transistor is connected to the write bit line WWL, the drain is connected to the write byte line WBL, and the source is connected to one side of the spin-orbit coupling layer; the gate of the read control transistor is connected to the read bit line RWL, the drain is connected to the read byte line RBL, and the source is connected to the top electrode. When performing a write operation, the write bit line WWL is pulled to a high level, and the write byte line WBL or the source line SL is pulled to the write voltage V Write , the remaining metal lines are grounded, generating a write current flowing through the topological surface state of the topological insulator; when performing a read operation, the read bit line RWL is pulled to a high level, and the read byte line RBL is pulled to a read voltage V Read , and the remaining metal lines are grounded, generating a read current that flows through the magnetic tunnel junction.

[0041] So far, the embodiments of the present disclosure have been described in detail in conjunction with the accompanying drawings. It should be noted that the implementation methods not shown or described in the drawings or the body of the specification are all forms known to ordinary technicians in the relevant technical field and are not described in detail. In addition, the above definitions of each element and method are not limited to the various specific structures, shapes or methods mentioned in the embodiments, and ordinary technicians in the field can simply change or replace them.

[0042] According to the above description, those skilled in the art should have a clear understanding of the topological spin material-based magnetoresistive memory device disclosed in the present invention.

[0043] In summary, the present disclosure provides a topological spin material-based magnetoresistive memory device, wherein the nickel oxide layer improves the spin transfer efficiency, suppresses the shunting effect of the metal layer, and improves the write energy efficiency of the topological insulator magnetoresistive memory device. The interface layer improves the anisotropy of the ferromagnetic free layer and improves the thermal budget of the device. The TMR enhancement layer enhances the TMR of the device. The topological spin material-based magnetoresistive memory proposed in the present invention has the characteristics of multifunctionality, high energy efficiency and process feasibility, and can meet the diverse needs of large-scale integrated applications.

[0044] It should be noted that, in this document, unless otherwise specified, “a” element is not limited to a single element, but may include one or more elements.

[0045] In addition, in this document, unless otherwise specified, ordinal numbers such as "first" and "second" are only used to distinguish multiple components with the same name, and do not indicate that there is a hierarchy, level, execution order, or process order between them. A "first" component and a "second" component may appear together in the same component, or appear in different components. The presence of a component with a larger ordinal number does not necessarily indicate the presence of another component with a smaller ordinal number.

[0046] In this document, unless otherwise specified, the so-called feature A "or" or "and / or" (and / or) feature B means that A exists alone, B exists alone, or A and B exist at the same time; the so-called feature A "and" (and) or "and" (and) or "and" (and) feature B means that A and B exist at the same time; the so-called "include", "comprise", "have" and "contain" mean including but not limited to these.

[0047] In addition, in this document, the terms "upper", "lower", "left", "right", "front", "back", or "between" are only used to describe the relative positions between multiple elements, and can be extended to include translation, rotation, or mirroring. In addition, in this document, unless otherwise specified, "an element is on another element" or similar descriptions do not necessarily mean that the element contacts the other element.

[0048] In addition, unless the steps are specifically described or must occur in sequence, the order of the above steps is not limited to the above list, and can be changed or rearranged according to the required design. And the above embodiments can be mixed and matched with each other or with other embodiments based on design and reliability considerations, that is, the technical features in different embodiments can be freely combined to form more embodiments.

[0049] The specific embodiments described above further illustrate the purpose, technical solutions and beneficial effects of the present disclosure. It should be understood that the above description is only a specific embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present disclosure should be included in the protection scope of the present disclosure.

Claims

1. A topological spin material-based magnetoresistive memory device, comprising: The spin-orbit coupling layer is made of topological insulator and is used to generate spin current; A nickel oxide layer formed on the spin-orbit coupling layer; an interface layer formed on the nickel oxide layer; as well as A magnetic tunnel junction is formed on the interface layer, including ferromagnetic layers formed on the upper and lower sides of the barrier layer; The spin current acts on the ferromagnetic layer after being transmitted in the nickel oxide layer in the form of magnetic oscillators, and the interface layer is used to enhance the anisotropy of the ferromagnetic layer.

2. The memory device according to claim 1, wherein the ferromagnetic layer comprises a ferromagnetic reference layer located on an upper side of the barrier layer and a ferromagnetic free layer located on a lower side of the barrier layer; The magnetic tunnel junction comprises, from bottom to top, a ferromagnetic free layer, a barrier layer, a ferromagnetic reference layer, a synthetic antiferromagnetic layer, and a cap layer.

3. The memory device according to claim 1 or 2 further comprises a TMR enhancement layer, which is a first TMR enhancement layer formed on the lower side of the ferromagnetic free layer and a second TMR enhancement layer formed on the upper side of the ferromagnetic reference layer, for further improving the tunneling magnetoresistivity.

4. The memory device according to any one of claims 1 to 3, wherein the material of the topological insulator is selected from Bi 1-x Sb x ,(Bi 1-x Sb x )2Te3, Bi2Se3, Sb2Te3, Bi2Te3 or a combination thereof. 5 . The memory device according to claim 1 , wherein the interface layer material is selected from one or a combination of Ti, Mo, Hf, Ta, and Cu.

6. The memory device according to any one of claims 1 to 3, wherein when etching to form a magnetic tunnel junction, the etching is stopped on the spin-orbit coupling layer; When a write current is applied along the topological insulator of the spin-orbit coupling layer, since the nickel oxide layer is an insulator along the current direction, the shunt effect of the metal material layers on the nickel oxide layer is effectively suppressed, further improving the write energy efficiency of the topological insulator memory device. The memory device according to claim 6 , wherein the nickel oxide layer has a thickness less than 1 nm.

8. In the memory device according to any one of claims 1 to 3, the TMR enhancement layer may be an antiferromagnetic material IrMn; and the tunneling magnetoresistivity may be enhanced by modulation of the antiferromagnetic spins in the antiferromagnetic material IrMn and the ferromagnetic spin configuration in the ferromagnetic free layer.

9. The memory device according to any one of claims 1 to 8, further comprising a read control transistor T R , write control transistor T W ; The gate of the write control transistor is connected to the write bit line WWL, the drain is connected to the write byte line WBL, and the source is connected to one side of the spin-orbit coupling layer; The gate of the read control transistor is connected to the read bit line RWL, the drain is connected to the read byte line RBL, and the source is connected to the top electrode.

10. The memory device according to claim 9, When performing a write operation, the write bit line WWL is pulled to a high level, and the write byte line WBL or source line SL is pulled to a write voltage V Write , the rest of the metal wires are grounded, generating a write current flowing through the topological surface states of the topological insulator; When performing a read operation, the read bit line RWL is pulled to a high level and the read byte line RBL is pulled to a read voltage V Read , and the remaining metal lines are grounded, generating a read current that flows through the magnetic tunnel junction.

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