Topological spin material based magnetoresistive memory device

Abstract

The disclosure provides a topological spin material-based magnetic resistance storage device, comprising: a spin-orbit coupling layer, a material being a topological insulator, for generating a spin current; a nickel oxide layer formed on the spin-orbit coupling layer; an interface layer formed on the nickel oxide layer; and a magnetic tunnel junction formed on the interface layer, comprising ferromagnetic layers formed on both sides of a barrier layer; the spin current acts on the ferromagnetic layers in the form of magnons after being transmitted in the nickel oxide layer, and the interface layer is used for enhancing anisotropy of the ferromagnetic layers.

Description

Technical Field

[0001] The present disclosure relates to the field of magnetic storage technology, and in particular to a topological spin material-based magnetoresistive memory device. Background Art

[0002] Topological insulators (TIs) have spin Hall angles significantly greater than those of conventional heavy metals, making them a promising candidate for realizing ultra-low-energy spin-orbit moment magnetic random access memory (SOT-MRAM). Prototype devices using topological insulators as the spin-orbit coupling layer in SOT-MTJs (spin-orbit moment magnetic tunnel junctions) have been reported. However, due to the bulk insulating nature of topological insulators, their resistivity is much higher than that of metals. Consequently, a significant shunting effect exists within these SOT-MTJs, preventing significant improvement in their actual energy consumption. Strong spin-orbit coupling (SOC) at the interface between topological materials or heavy metals and the ferromagnetic layer results in significant spin memory loss and spin backflow, limiting improvements in the spin-orbit coupling layer's spin conversion efficiency. Furthermore, existing topological insulator magnetic tunnel junctions have a low TMR (Tunnel Magnetoresistance Ratio), limiting their read performance. Summary of the Invention

[0003] In view of this, in order to at least partially solve at least one of the above-mentioned technical problems, the present disclosure provides a topological spin material-based magnetoresistive memory device.

[0004] In order to achieve the above objectives, the technical solutions disclosed in this disclosure are as follows:

[0005] According to an embodiment of one aspect of the present disclosure, a topological spin material-based magnetoresistive memory device is provided, including: a spin-orbit coupling layer, a nickel oxide layer, an interface layer, and a magnetic tunnel junction.

[0006] The spin-orbit coupling layer material is a topological insulator used to generate a spin current; a nickel oxide layer is formed on the spin-orbit coupling layer; an interface layer is formed on the nickel oxide layer; a magnetic tunnel junction is formed on the interface layer, including ferromagnetic layers formed on the upper and lower sides of the barrier layer; the spin current is transmitted in the nickel oxide layer in the form of magnetic oscillators and then acts on the ferromagnetic layer; the interface layer is used to enhance the anisotropy of the ferromagnetic layer and improve the thermal budget.

[0007] According to an embodiment of the present disclosure, the ferromagnetic layer includes a ferromagnetic reference layer located on the upper side of the barrier layer and a ferromagnetic free layer located on the lower side of the barrier layer; the magnetic tunnel junction includes a ferromagnetic free layer, a barrier layer, a ferromagnetic reference layer, a synthetic antiferromagnetic layer, and a cap layer from bottom to top.

[0008] According to an embodiment of the present disclosure, the magnetoresistive memory device further includes a TMR enhancement layer, which includes a first TMR enhancement layer formed on the lower side of the ferromagnetic free layer and a second TMR enhancement layer formed on the upper side of the ferromagnetic reference layer, for further improving the tunneling magnetoresistance.

[0009] According to the embodiment of the present disclosure, the material of the topological insulator is selected from Bi 1-x Sb x ,(Bi 1-x Sb x )2Te3, Bi2Se3, Sb2Te3, Bi2Te3 or a combination thereof.

[0010] According to an embodiment of the present disclosure, the interface layer material is selected from one or a combination of Ti, Mo, Hf, Ta, and Cu.

[0011] According to the embodiments of the present disclosure, when etching to form a magnetic tunnel junction, the etching is terminated on the spin-orbit coupling layer; when a write current is applied to the topological insulator along the spin-orbit coupling layer, since the nickel oxide layer is an insulator along the direction of the current, the shunting effect of the metal material layers on the nickel oxide layer is effectively suppressed, thereby further improving the write energy efficiency of the topological insulator magnetoresistive memory device.

[0012] According to an embodiment of the present disclosure, the thickness of the nickel oxide layer is less than 1 nm.

[0013] According to an embodiment of the present disclosure, the TMR enhancement layer may be an antiferromagnetic material IrMn; and the tunneling magnetoresistivity may be enhanced by modulation of the antiferromagnetic spins in the antiferromagnetic material IrMn and the ferromagnetic spin configuration in the ferromagnetic free layer.

[0014] According to an embodiment of the present disclosure, the memory device further includes a read control transistor T R , write control transistor T W The gate of the write control transistor is connected to the write bit line WWL, the drain is connected to the write byte line WBL, and the source is connected to one side of the spin-orbit coupling layer; the gate of the read control transistor is connected to the read bit line RWL, the drain is connected to the read byte line RBL, and the source is connected to the top electrode.

[0015] According to the embodiment of the present disclosure, when performing a write operation, the write bit line WWL is pulled to a high level, and the write byte line WBL or the source line SL is pulled to a write voltage V Write , the remaining metal lines are grounded, generating a write current flowing through the topological surface state of the topological insulator; when performing a read operation, the read bit line RWL is pulled to a high level, and the read byte line RBL is pulled to a read voltage V Read , and the remaining metal lines are grounded, generating a read current flowing through the magnetic tunnel junction.

[0016] In the topological spin material-based magnetoresistive memory device disclosed herein, the nickel oxide intercalation layer improves the spin transfer efficiency of the TI / FM interface; the nickel oxide intercalation layer suppresses the metal layer shunt effect, allowing the write current to flow mainly through the TI surface state, further improving energy efficiency; and the TMR enhancement layer increases the tunneling magnetoresistance. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The above and other objects, features and advantages of the present disclosure will become more apparent through the following description of the embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0018] Figure 1A A main film stack structure of a topological spin material-based magnetoresistive memory device according to an embodiment of the present disclosure;

[0019] Figure 1B Another main film stack structure of a topological spin material-based magnetoresistive memory device according to an embodiment of the present disclosure;

[0020] Figure 2A Based on Figure 1A Schematic diagram of the structure of a topological spin material-based magnetoresistive memory device with a main film stack structure shown;

[0021] Figure 2B Based on Figure 1B Schematic diagram of the structure of a topological spin material-based magnetoresistive memory device with a main film stack structure shown;

[0022] Figure 3 Schematic diagram of the efficiency enhancement mechanism of the nickel oxide layer according to an embodiment of the present disclosure;

[0023] Figure 4 Schematic diagram of the working principle of the TMR enhancement layer according to an embodiment of the present disclosure;

[0024] Figure 5 Schematic diagram of a topological spin material-based magnetoresistive memory device with an external circuit added according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0025] The present disclosure provides a topological spin material-based magnetoresistive memory device. The preparation method is simple and reliable. The prepared detector has high gain for high-energy particle detection, good gain uniformity, good two-dimensional position resolution, and can withstand very high particle irradiation counting rates, which can overcome the main shortcomings and deficiencies of existing through-radiation detectors.

[0026] In order to make the objectives, technical solutions and advantages of the present disclosure more clearly understood, the present disclosure is further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0027] In an embodiment of the present disclosure, a topological spin material-based magnetoresistive memory device is provided, such as Figure 1A 、 Figure 1B 、 Figure 2A 、 Figure 2B As shown, the topological spin material-based magnetoresistive memory device includes: a spin-orbit coupling layer, a nickel oxide layer, an interface layer, and a magnetic tunnel junction.

[0028] The spin-orbit coupling layer material is a topological insulator (also known as a topological insulator layer), which is used to generate spin current;

[0029] A nickel oxide layer is formed on the spin-orbit coupling layer;

[0030] An interface layer is formed on the nickel oxide layer; and

[0031] A magnetic tunnel junction is formed on the interface layer, including ferromagnetic layers formed on the upper and lower sides of the barrier layer;

[0032] The spin current acts on the ferromagnetic layer after being transmitted in the nickel oxide layer in the form of magnetic oscillators. The interface layer is used to enhance the anisotropy of the ferromagnetic layer.

[0033] According to an embodiment of the present disclosure, the ferromagnetic layer includes a ferromagnetic reference layer located on the upper side of the barrier layer and a ferromagnetic free layer located on the lower side of the barrier layer; the magnetic tunnel junction includes a ferromagnetic free layer, a barrier layer, a ferromagnetic reference layer, a synthetic antiferromagnetic layer, and a cap layer from bottom to top.

[0034] According to an embodiment of the present disclosure, the magnetoresistive memory device further includes a TMR enhancement layer, comprising a first TMR enhancement layer formed below the ferromagnetic free layer and a second TMR enhancement layer formed above the ferromagnetic reference layer, to further enhance tunneling magnetoresistance. The TMR enhancement layer can be made of an antiferromagnetic material, IrMn. The tunneling magnetoresistance can be enhanced by modulating the antiferromagnetic spins in the IrMn material and the ferromagnetic spins in the ferromagnetic free layer.

[0035] According to the embodiment of the present disclosure, the topological insulator layer can be Bi 1-x Sb x ,(Bi 1-x Sb x )2Te3, Bi2Se3, Sb2Te3, Bi2Te3 or a combination thereof, where x represents the stoichiometric ratio of the element Sb. The spin current generated by the topological insulator layer is transmitted in the form of magnons, thereby improving the spin memory loss (SML) and spin back flow (SBF) at the TI / FM (topological insulator layer / ferromagnetic layer) interface and improving the spin transfer efficiency at the TI / FM interface. The ferromagnetic layer can be made of CoFeB, CoFe, Co or CoPt, and the barrier layer can be made of MgO, AlO x The material for preparing the cap layer can be one or a combination of Ta, Ru, Pt, etc.

[0036] The interface layer is used to enhance the anisotropy of the ferromagnetic layer and improve the thermal budget of the device, and the interface layer material is selected from one or a combination of Ti, Mo, Hf, Ta, and Cu.

[0037] In the embodiments of the present disclosure, as shown in Figure 2A and Figure 2B When etching to form a tunnel junction, the etching is stopped on the topological insulator. When a write current is applied, the remaining metal layers are insulated by the nickel oxide layer NiO, effectively suppressing the shunt effect of the metal layers, so that the write current (the long arrow to the right in the figure) mainly flows through the topological surface state, improving the write efficiency. Since the nickel oxide layer is very thin, it will not destroy the TMR ratio (tunneling magnetoresistance) read by the tunneling magnetoresistance effect.

[0038] In the embodiments of the present disclosure, as shown in Figure 3 The spin current generated by the topological insulator is transmitted in the form of magnon in the nickel oxide layer, and Jc in the figure represents the charge current, and Js represents the polarized spin current. The nickel oxide layer is insulated, so the charge current cannot flow through it, and therefore Jc=0. The spin current can pass through the nickel oxide layer in the form of magnon, so Js≠0 in the nickel oxide layer, and after passing through the nickel oxide layer, it acts on the adjacent ferromagnetic layer (for example, the ferromagnetic free layer located on the interface layer and the TMR enhancement layer). Since it does not involve electron flow, the interface spin backflow is suppressed. Since there is no strong interface spin-orbit coupling effect (ISCO) at the interface between the nickel oxide layer and the ferromagnetic layer, the interface spin memory loss is improved. Therefore, the insertion of the nickel oxide layer can effectively improve the spin transport efficiency at the interface between the topological insulator and the ferromagnetic layer, and improve the write energy efficiency.

[0039] In the embodiments of the present disclosure, as shown in Figure 4 The left side is the lattice structure of IrMn, and the light-colored spheres represent Mn atoms and the dark-colored spheres represent Ir atoms. x=y=3.855Å indicates that the lattice constants along the x and y directions are the same, which is 3.855Å. z / x=0.945 indicates that the lattice constant along the z direction is 3.855Å×0.945. The antiferromagnetic spin configuration of Mn in the TMR enhancement layer material leads to mixed Bloch symmetry. This makes the magnetic tunnel junction in the parallel state, and both the majority and minority spin channels are enhanced, achieving high tunneling magnetoresistance. When writing to this structure, the spin-orbit torque generated by the topological insulator flips the magnetic moment of the TMR enhancement layer material IrMn. Since there is exchange bias at the interface between IrMn and the ferromagnetic free layer, the magnetic moment of the ferromagnetic free layer also flips accordingly. The write of the resistance state is realized.

[0040] In the embodiments of the present disclosure, as shown in Figure 5 The topological spin material-based magnetoresistive memory device with an external circuit is added, mainly including a read control transistor T R, write control transistor T W The gate of the write control transistor is connected to the write bit line WWL, the drain is connected to the write byte line WBL, and the source is connected to one side of the spin-orbit coupling layer; the gate of the read control transistor is connected to the read bit line RWL, the drain is connected to the read byte line RBL, and the source is connected to the top electrode. When performing a write operation, the write bit line WWL is pulled to a high level, and the write byte line WBL or the source line SL is pulled to the write voltage V Write , the remaining metal lines are grounded, generating a write current flowing through the topological surface state of the topological insulator; when performing a read operation, the read bit line RWL is pulled to a high level, and the read byte line RBL is pulled to a read voltage V Read , and the remaining metal lines are grounded, generating a read current flowing through the magnetic tunnel junction.

[0041] The embodiments of the present disclosure have been described in detail with reference to the accompanying drawings. It should be noted that any implementations not depicted or described in the drawings or the main text of the specification are known to those skilled in the art and are not described in detail. Furthermore, the above definitions of the various elements and methods are not limited to the various specific structures, shapes, or methods described in the embodiments, and can be easily modified or replaced by those skilled in the art.

[0042] According to the above description, those skilled in the art should have a clear understanding of the topological spin material-based magnetoresistive memory device disclosed in the present invention.

[0043] In summary, the present disclosure provides a topological spin material-based magnetoresistive memory device. Its nickel oxide layer improves spin transfer efficiency, suppresses the shunting effect of the metal layer, and enhances the write energy efficiency of the topological insulator magnetoresistive memory device. The interface layer enhances the anisotropy of the ferromagnetic free layer, improving the device's thermal budget. The TMR enhancement layer enhances the device's TMR. The topological spin material-based magnetoresistive memory device proposed in this invention combines versatility, high energy efficiency, and process feasibility, meeting the diverse needs of large-scale integrated applications.

[0044] It should be noted that, herein, unless otherwise specified, “a” element is not limited to a single element, but may include one or more elements.

[0045] Furthermore, unless otherwise specified, ordinal numbers such as "first" and "second" are used herein solely to distinguish multiple components with the same name and do not imply a hierarchy, level, execution order, or process sequence between them. A "first" component and a "second" component may appear together in the same component or in different components. The presence of a component with a higher ordinal number does not necessarily imply the presence of the other component with a lower ordinal number.

[0046] In this document, unless otherwise specified, the so-called feature A "or" or "and / or" feature B means that A exists alone, B exists alone, or A and B exist at the same time; the so-called feature A "and" or "and" or "and" feature B means that A and B exist at the same time; the so-called "include", "comprise", "have" and "contain" mean including but not limited to these.

[0047] Furthermore, in this document, terms such as "upper," "lower," "left," "right," "front," "back," or "between" are used solely to describe the relative positions of multiple elements and can be interpreted to include translation, rotation, or mirroring. Furthermore, in this document, unless otherwise specified, "an element is on another element" or similar descriptions do not necessarily mean that the element contacts the other element.

[0048] Furthermore, unless specifically described or required to occur sequentially, the order of the steps is not limited to the order listed above and may be varied or rearranged based on desired design requirements. Furthermore, the above embodiments may be mixed and matched with each other or with other embodiments based on design and reliability considerations. That is, the technical features of different embodiments may be freely combined to form more embodiments.

[0049] The specific embodiments described above further illustrate the purpose, technical solutions and beneficial effects of the present disclosure. It should be understood that the above are only specific embodiments of the present disclosure and are not intended to limit the present disclosure. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present disclosure should be included in the scope of protection of the present disclosure.

Claims

1. A topological spin material-based magnetoresistive memory device, comprising: The spin-orbit coupling layer is made of topological insulator and is used to generate spin current; a nickel oxide layer formed on the spin-orbit coupling layer; an interface layer formed on the nickel oxide layer; as well as a magnetic tunnel junction formed on the interface layer, comprising ferromagnetic layers formed on the upper and lower sides of the barrier layer; The spin current acts on the ferromagnetic layer after being transmitted in the nickel oxide layer in the form of magnons, and the interface layer is used to enhance the anisotropy of the ferromagnetic layer; The ferromagnetic layer includes a ferromagnetic reference layer located on the upper side of the barrier layer and a ferromagnetic free layer located on the lower side of the barrier layer; the magnetic tunnel junction includes, from bottom to top, a ferromagnetic free layer, a barrier layer, a ferromagnetic reference layer, a synthetic antiferromagnetic layer, and a cap layer; the magnetoresistive memory device also includes a TMR enhancement layer, which uses the antiferromagnetic material IrMn. The TMR enhancement layer includes a first TMR enhancement layer formed on the lower side of the ferromagnetic free layer, and a second TMR enhancement layer formed on the upper side of the ferromagnetic reference layer, which is used to further improve the tunneling magnetoresistance.

2. The memory device according to claim 1, wherein the material of the topological insulator is selected from Bi 1-x Sb x ,(Bi 1-x Sb x )2Te3, Bi2Se3, Sb2Te3, Bi2Te3 or a combination thereof. 3 . The memory device according to claim 1 , wherein the interface layer material is selected from one or a combination of Ti, Mo, Hf, Ta, and Cu.

4. The memory device according to claim 1, wherein when etching to form the magnetic tunnel junction, the etching is stopped on the spin-orbit coupling layer; When a write current is applied along the topological insulator of the spin-orbit coupling layer, since the nickel oxide layer is an insulator along the direction of the current, the shunt effect of the metal material layers on the nickel oxide layer is effectively suppressed, further improving the write energy efficiency of the topological insulator memory device. The memory device according to claim 4 , wherein the nickel oxide layer has a thickness less than 1 nm.

6. The memory device according to claim 1, wherein the tunneling magnetoresistivity is enhanced by modulation of the antiferromagnetic spins in the antiferromagnetic material IrMn and the ferromagnetic spin configuration in the ferromagnetic free layer.

7. The memory device according to any one of claims 1 to 6, further comprising a read control transistor T R , write control transistor T W ; The write control transistor has a gate connected to the write bit line WWL, a drain connected to the write byte line WBL, and a source connected to one side of the spin-orbit coupling layer; The gate of the read control transistor is connected to the read bit line RWL, the drain is connected to the read byte line RBL, and the source is connected to the top electrode.

8. The memory device according to claim 7, When performing a write operation, the write bit line WWL is pulled to a high level, and the write byte line WBL or source line SL is pulled to a write voltage V Write , the remaining metal wires are grounded, generating a write current flowing through the topological surface states of the topological insulator; When performing a read operation, the read bit line RWL is pulled to a high level and the read byte line RBL is pulled to a read voltage V Read , and the remaining metal lines are grounded, generating a read current flowing through the magnetic tunnel junction.

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